1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include <dt-bindings/pwm/pwm.h> 8#include "rk3399-base.dtsi" 9 10/ { 11 model = "Rockchip RK3399 Evaluation Board"; 12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399"; 13 14 aliases { 15 ethernet0 = &gmac; 16 mmc0 = &sdhci; 17 }; 18 19 backlight: backlight { 20 compatible = "pwm-backlight"; 21 brightness-levels = < 22 0 1 2 3 4 5 6 7 23 8 9 10 11 12 13 14 15 24 16 17 18 19 20 21 22 23 25 24 25 26 27 28 29 30 31 26 32 33 34 35 36 37 38 39 27 40 41 42 43 44 45 46 47 28 48 49 50 51 52 53 54 55 29 56 57 58 59 60 61 62 63 30 64 65 66 67 68 69 70 71 31 72 73 74 75 76 77 78 79 32 80 81 82 83 84 85 86 87 33 88 89 90 91 92 93 94 95 34 96 97 98 99 100 101 102 103 35 104 105 106 107 108 109 110 111 36 112 113 114 115 116 117 118 119 37 120 121 122 123 124 125 126 127 38 128 129 130 131 132 133 134 135 39 136 137 138 139 140 141 142 143 40 144 145 146 147 148 149 150 151 41 152 153 154 155 156 157 158 159 42 160 161 162 163 164 165 166 167 43 168 169 170 171 172 173 174 175 44 176 177 178 179 180 181 182 183 45 184 185 186 187 188 189 190 191 46 192 193 194 195 196 197 198 199 47 200 201 202 203 204 205 206 207 48 208 209 210 211 212 213 214 215 49 216 217 218 219 220 221 222 223 50 224 225 226 227 228 229 230 231 51 232 233 234 235 236 237 238 239 52 240 241 242 243 244 245 246 247 53 248 249 250 251 252 253 254 255>; 54 default-brightness-level = <200>; 55 pwms = <&pwm0 0 25000 0>; 56 }; 57 58 edp_panel: edp-panel { 59 compatible = "lg,lp079qx1-sp0v"; 60 backlight = <&backlight>; 61 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 62 power-supply = <&vcc3v3_s0>; 63 64 port { 65 panel_in_edp: endpoint { 66 remote-endpoint = <&edp_out_panel>; 67 }; 68 }; 69 }; 70 71 clkin_gmac: external-gmac-clock { 72 compatible = "fixed-clock"; 73 clock-frequency = <125000000>; 74 clock-output-names = "clkin_gmac"; 75 #clock-cells = <0>; 76 }; 77 78 vdd_center: regulator-vdd-center { 79 compatible = "pwm-regulator"; 80 pwms = <&pwm3 0 25000 0>; 81 regulator-name = "vdd_center"; 82 regulator-min-microvolt = <800000>; 83 regulator-max-microvolt = <1400000>; 84 regulator-always-on; 85 regulator-boot-on; 86 status = "okay"; 87 }; 88 89 vcc3v3_sys: regulator-vcc3v3-sys { 90 compatible = "regulator-fixed"; 91 regulator-name = "vcc3v3_sys"; 92 regulator-always-on; 93 regulator-boot-on; 94 regulator-min-microvolt = <3300000>; 95 regulator-max-microvolt = <3300000>; 96 }; 97 98 vcc5v0_sys: regulator-vcc5v0-sys { 99 compatible = "regulator-fixed"; 100 regulator-name = "vcc5v0_sys"; 101 regulator-always-on; 102 regulator-boot-on; 103 regulator-min-microvolt = <5000000>; 104 regulator-max-microvolt = <5000000>; 105 }; 106 107 vcc5v0_host: regulator-vcc5v0-host { 108 compatible = "regulator-fixed"; 109 enable-active-high; 110 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&vcc5v0_host_en>; 113 regulator-name = "vcc5v0_host"; 114 vin-supply = <&vcc5v0_sys>; 115 }; 116 117 vcc_phy: regulator-vcc-phy { 118 compatible = "regulator-fixed"; 119 regulator-name = "vcc_phy"; 120 regulator-always-on; 121 regulator-boot-on; 122 }; 123 124 vcc_phy: regulator-vcc-phy { 125 compatible = "regulator-fixed"; 126 regulator-name = "vcc_phy"; 127 regulator-always-on; 128 regulator-boot-on; 129 }; 130 131}; 132 133&edp { 134 status = "okay"; 135 force-hpd; 136 137 ports { 138 edp_out: port@1 { 139 reg = <1>; 140 #address-cells = <1>; 141 #size-cells = <0>; 142 143 edp_out_panel: endpoint@0 { 144 reg = <0>; 145 remote-endpoint = <&panel_in_edp>; 146 }; 147 }; 148 }; 149}; 150 151&emmc_phy { 152 status = "okay"; 153}; 154 155&gmac { 156 assigned-clocks = <&cru SCLK_RMII_SRC>; 157 assigned-clock-parents = <&clkin_gmac>; 158 clock_in_out = "input"; 159 phy-supply = <&vcc_phy>; 160 phy-mode = "rgmii"; 161 pinctrl-names = "default"; 162 pinctrl-0 = <&rgmii_pins>; 163 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 164 snps,reset-active-low; 165 snps,reset-delays-us = <0 10000 50000>; 166 tx_delay = <0x28>; 167 rx_delay = <0x11>; 168 status = "okay"; 169}; 170 171&i2c0 { 172 status = "okay"; 173 174 rk808: pmic@1b { 175 compatible = "rockchip,rk808"; 176 reg = <0x1b>; 177 interrupt-parent = <&gpio1>; 178 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 179 pinctrl-names = "default"; 180 pinctrl-0 = <&pmic_int_l>; 181 system-power-controller; 182 wakeup-source; 183 #clock-cells = <1>; 184 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 185 186 vcc1-supply = <&vcc3v3_sys>; 187 vcc2-supply = <&vcc3v3_sys>; 188 vcc3-supply = <&vcc3v3_sys>; 189 vcc4-supply = <&vcc3v3_sys>; 190 vcc6-supply = <&vcc3v3_sys>; 191 vcc7-supply = <&vcc3v3_sys>; 192 vcc8-supply = <&vcc3v3_sys>; 193 vcc9-supply = <&vcc3v3_sys>; 194 vcc10-supply = <&vcc3v3_sys>; 195 vcc11-supply = <&vcc3v3_sys>; 196 vcc12-supply = <&vcc3v3_sys>; 197 vddio-supply = <&vcc1v8_pmu>; 198 199 regulators { 200 vdd_log: DCDC_REG1 { 201 regulator-name = "vdd_log"; 202 regulator-min-microvolt = <750000>; 203 regulator-max-microvolt = <1350000>; 204 regulator-ramp-delay = <6001>; 205 regulator-always-on; 206 regulator-boot-on; 207 regulator-state-mem { 208 regulator-on-in-suspend; 209 regulator-suspend-microvolt = <900000>; 210 }; 211 }; 212 213 vdd_cpu_l: DCDC_REG2 { 214 regulator-name = "vdd_cpu_l"; 215 regulator-min-microvolt = <750000>; 216 regulator-max-microvolt = <1350000>; 217 regulator-ramp-delay = <6001>; 218 regulator-always-on; 219 regulator-boot-on; 220 regulator-state-mem { 221 regulator-off-in-suspend; 222 }; 223 }; 224 225 vcc_ddr: DCDC_REG3 { 226 regulator-name = "vcc_ddr"; 227 regulator-always-on; 228 regulator-boot-on; 229 regulator-state-mem { 230 regulator-on-in-suspend; 231 }; 232 }; 233 234 vcc_1v8: DCDC_REG4 { 235 regulator-name = "vcc_1v8"; 236 regulator-min-microvolt = <1800000>; 237 regulator-max-microvolt = <1800000>; 238 regulator-always-on; 239 regulator-boot-on; 240 regulator-state-mem { 241 regulator-on-in-suspend; 242 regulator-suspend-microvolt = <1800000>; 243 }; 244 }; 245 246 vcc1v8_dvp: LDO_REG1 { 247 regulator-name = "vcc1v8_dvp"; 248 regulator-min-microvolt = <1800000>; 249 regulator-max-microvolt = <1800000>; 250 regulator-always-on; 251 regulator-boot-on; 252 regulator-state-mem { 253 regulator-off-in-suspend; 254 }; 255 }; 256 257 vcc3v0_tp: LDO_REG2 { 258 regulator-name = "vcc3v0_tp"; 259 regulator-min-microvolt = <3000000>; 260 regulator-max-microvolt = <3000000>; 261 regulator-always-on; 262 regulator-boot-on; 263 regulator-state-mem { 264 regulator-off-in-suspend; 265 }; 266 }; 267 268 vcc1v8_pmu: LDO_REG3 { 269 regulator-name = "vcc1v8_pmu"; 270 regulator-min-microvolt = <1800000>; 271 regulator-max-microvolt = <1800000>; 272 regulator-always-on; 273 regulator-boot-on; 274 regulator-state-mem { 275 regulator-on-in-suspend; 276 regulator-suspend-microvolt = <1800000>; 277 }; 278 }; 279 280 vcc_sd: LDO_REG4 { 281 regulator-name = "vcc_sd"; 282 regulator-min-microvolt = <1800000>; 283 regulator-max-microvolt = <3000000>; 284 regulator-always-on; 285 regulator-boot-on; 286 regulator-state-mem { 287 regulator-on-in-suspend; 288 regulator-suspend-microvolt = <3000000>; 289 }; 290 }; 291 292 vcca3v0_codec: LDO_REG5 { 293 regulator-name = "vcca3v0_codec"; 294 regulator-min-microvolt = <3000000>; 295 regulator-max-microvolt = <3000000>; 296 regulator-always-on; 297 regulator-boot-on; 298 regulator-state-mem { 299 regulator-off-in-suspend; 300 }; 301 }; 302 303 vcc_1v5: LDO_REG6 { 304 regulator-name = "vcc_1v5"; 305 regulator-min-microvolt = <1500000>; 306 regulator-max-microvolt = <1500000>; 307 regulator-always-on; 308 regulator-boot-on; 309 regulator-state-mem { 310 regulator-on-in-suspend; 311 regulator-suspend-microvolt = <1500000>; 312 }; 313 }; 314 315 vcca1v8_codec: LDO_REG7 { 316 regulator-name = "vcca1v8_codec"; 317 regulator-min-microvolt = <1800000>; 318 regulator-max-microvolt = <1800000>; 319 regulator-always-on; 320 regulator-boot-on; 321 regulator-state-mem { 322 regulator-off-in-suspend; 323 }; 324 }; 325 326 vcc_3v0: LDO_REG8 { 327 regulator-name = "vcc_3v0"; 328 regulator-min-microvolt = <3000000>; 329 regulator-max-microvolt = <3000000>; 330 regulator-always-on; 331 regulator-boot-on; 332 regulator-state-mem { 333 regulator-on-in-suspend; 334 regulator-suspend-microvolt = <3000000>; 335 }; 336 }; 337 338 vcc3v3_s3: SWITCH_REG1 { 339 regulator-name = "vcc3v3_s3"; 340 regulator-always-on; 341 regulator-boot-on; 342 regulator-state-mem { 343 regulator-on-in-suspend; 344 }; 345 }; 346 347 vcc3v3_s0: SWITCH_REG2 { 348 regulator-name = "vcc3v3_s0"; 349 regulator-always-on; 350 regulator-boot-on; 351 regulator-state-mem { 352 regulator-off-in-suspend; 353 }; 354 }; 355 }; 356 }; 357 358 vdd_cpu_b: regulator@40 { 359 compatible = "silergy,syr827"; 360 reg = <0x40>; 361 fcs,suspend-voltage-selector = <1>; 362 regulator-name = "vdd_cpu_b"; 363 regulator-min-microvolt = <712500>; 364 regulator-max-microvolt = <1500000>; 365 regulator-ramp-delay = <1000>; 366 regulator-always-on; 367 regulator-boot-on; 368 vin-supply = <&vcc5v0_sys>; 369 370 regulator-state-mem { 371 regulator-off-in-suspend; 372 }; 373 }; 374 375 vdd_gpu: regulator@41 { 376 compatible = "silergy,syr828"; 377 reg = <0x41>; 378 fcs,suspend-voltage-selector = <1>; 379 regulator-name = "vdd_gpu"; 380 regulator-min-microvolt = <712500>; 381 regulator-max-microvolt = <1500000>; 382 regulator-ramp-delay = <1000>; 383 regulator-always-on; 384 regulator-boot-on; 385 vin-supply = <&vcc5v0_sys>; 386 387 regulator-state-mem { 388 regulator-off-in-suspend; 389 }; 390 }; 391}; 392 393&pwm0 { 394 status = "okay"; 395}; 396 397&pwm2 { 398 status = "okay"; 399}; 400 401&pwm3 { 402 status = "okay"; 403}; 404 405&sdhci { 406 bus-width = <8>; 407 mmc-hs400-1_8v; 408 mmc-hs400-enhanced-strobe; 409 non-removable; 410 status = "okay"; 411}; 412 413&pcie_phy { 414 status = "disabled"; 415}; 416 417&pcie0 { 418 ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; 419 num-lanes = <4>; 420 pinctrl-names = "default"; 421 pinctrl-0 = <&pcie_clkreqn_cpm>; 422 status = "disabled"; 423}; 424 425&u2phy0 { 426 status = "okay"; 427}; 428 429&u2phy0_host { 430 phy-supply = <&vcc5v0_host>; 431 status = "okay"; 432}; 433 434&u2phy1 { 435 status = "okay"; 436}; 437 438&u2phy1_host { 439 phy-supply = <&vcc5v0_host>; 440 status = "okay"; 441}; 442 443&uart2 { 444 status = "okay"; 445}; 446 447&usb_host0_ehci { 448 status = "okay"; 449}; 450 451&usb_host0_ohci { 452 status = "okay"; 453}; 454 455&usb_host1_ehci { 456 status = "okay"; 457}; 458 459&usb_host1_ohci { 460 status = "okay"; 461}; 462 463&pinctrl { 464 pmic { 465 pmic_int_l: pmic-int-l { 466 rockchip,pins = 467 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 468 }; 469 }; 470 471 usb2 { 472 vcc5v0_host_en: vcc5v0-host-en { 473 rockchip,pins = 474 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 475 }; 476 }; 477}; 478 479&vopb { 480 status = "okay"; 481}; 482 483&vopb_mmu { 484 status = "okay"; 485}; 486