1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Hardkernel Co., Ltd 4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH 5 */ 6 7/dts-v1/; 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include "rk3326.dtsi" 12 13/ { 14 model = "ODROID-GO Advance"; 15 compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326"; 16 17 chosen { 18 stdout-path = "serial2:115200n8"; 19 }; 20 21 adc-joystick { 22 compatible = "adc-joystick"; 23 io-channels = <&saradc 1>, 24 <&saradc 2>; 25 #address-cells = <1>; 26 #size-cells = <0>; 27 28 axis@0 { 29 reg = <0>; 30 abs-flat = <10>; 31 abs-fuzz = <10>; 32 abs-range = <172 772>; 33 linux,code = <ABS_X>; 34 }; 35 36 axis@1 { 37 reg = <1>; 38 abs-flat = <10>; 39 abs-fuzz = <10>; 40 abs-range = <278 815>; 41 linux,code = <ABS_Y>; 42 }; 43 }; 44 45 backlight: backlight { 46 compatible = "pwm-backlight"; 47 power-supply = <&vcc_bl>; 48 pwms = <&pwm1 0 25000 0>; 49 }; 50 51 gpio-keys { 52 compatible = "gpio-keys"; 53 pinctrl-names = "default"; 54 pinctrl-0 = <&btn_pins>; 55 56 /* 57 * *** ODROIDGO2-Advance Switch layout *** 58 * |------------------------------------------------| 59 * | sw15 sw16 | 60 * |------------------------------------------------| 61 * | sw1 |-------------------| sw8 | 62 * | sw3 sw4 | | sw7 sw5 | 63 * | sw2 | LCD Display | sw6 | 64 * | | | | 65 * | |-------------------| | 66 * | sw9 sw10 sw11 sw12 sw13 sw14 | 67 * |------------------------------------------------| 68 */ 69 70 sw1 { 71 gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; 72 label = "DPAD-UP"; 73 linux,code = <BTN_DPAD_UP>; 74 }; 75 sw2 { 76 gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; 77 label = "DPAD-DOWN"; 78 linux,code = <BTN_DPAD_DOWN>; 79 }; 80 sw3 { 81 gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; 82 label = "DPAD-LEFT"; 83 linux,code = <BTN_DPAD_LEFT>; 84 }; 85 sw4 { 86 gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; 87 label = "DPAD-RIGHT"; 88 linux,code = <BTN_DPAD_RIGHT>; 89 }; 90 sw5 { 91 gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; 92 label = "BTN-A"; 93 linux,code = <BTN_EAST>; 94 }; 95 sw6 { 96 gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; 97 label = "BTN-B"; 98 linux,code = <BTN_SOUTH>; 99 }; 100 sw7 { 101 gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; 102 label = "BTN-Y"; 103 linux,code = <BTN_WEST>; 104 }; 105 sw8 { 106 gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; 107 label = "BTN-X"; 108 linux,code = <BTN_NORTH>; 109 }; 110 sw9 { 111 gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; 112 label = "F1"; 113 linux,code = <BTN_TRIGGER_HAPPY1>; 114 }; 115 sw10 { 116 gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; 117 label = "F2"; 118 linux,code = <BTN_TRIGGER_HAPPY2>; 119 }; 120 sw11 { 121 gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; 122 label = "F3"; 123 linux,code = <BTN_TRIGGER_HAPPY3>; 124 }; 125 sw12 { 126 gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; 127 label = "F4"; 128 linux,code = <BTN_TRIGGER_HAPPY4>; 129 }; 130 sw13 { 131 gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>; 132 label = "F5"; 133 linux,code = <BTN_TRIGGER_HAPPY5>; 134 }; 135 sw14 { 136 gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>; 137 label = "F6"; 138 linux,code = <BTN_TRIGGER_HAPPY6>; 139 }; 140 sw15 { 141 gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; 142 label = "TOP-LEFT"; 143 linux,code = <BTN_TL>; 144 }; 145 sw16 { 146 gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; 147 label = "TOP-RIGHT"; 148 linux,code = <BTN_TR>; 149 }; 150 }; 151 152 leds: gpio-leds { 153 compatible = "gpio-leds"; 154 pinctrl-names = "default"; 155 pinctrl-0 = <&blue_led_pin>; 156 157 blue_led: led-0 { 158 label = "blue:heartbeat"; 159 gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 160 linux,default-trigger = "heartbeat"; 161 }; 162 }; 163 164 vccsys: vccsys { 165 compatible = "regulator-fixed"; 166 regulator-name = "vcc3v8_sys"; 167 regulator-always-on; 168 regulator-min-microvolt = <3800000>; 169 regulator-max-microvolt = <3800000>; 170 }; 171 172 vcc_host: vcc_host { 173 compatible = "regulator-fixed"; 174 regulator-name = "vcc_host"; 175 regulator-min-microvolt = <5000000>; 176 regulator-max-microvolt = <5000000>; 177 178 gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 179 enable-active-high; 180 regulator-always-on; 181 vin-supply = <&vccsys>; 182 }; 183}; 184 185&cpu0 { 186 cpu-supply = <&vdd_arm>; 187}; 188 189&cpu1 { 190 cpu-supply = <&vdd_arm>; 191}; 192 193&cpu2 { 194 cpu-supply = <&vdd_arm>; 195}; 196 197&cpu3 { 198 cpu-supply = <&vdd_arm>; 199}; 200 201&cru { 202 assigned-clocks = <&cru PLL_NPLL>, 203 <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, 204 <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, 205 <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>, 206 <&cru PLL_CPLL>; 207 208 assigned-clock-rates = <1188000000>, 209 <200000000>, <200000000>, 210 <150000000>, <150000000>, 211 <100000000>, <200000000>, 212 <17000000>; 213}; 214 215&display_subsystem { 216 status = "okay"; 217}; 218 219&dsi { 220 status = "okay"; 221 222 ports { 223 mipi_out: port@1 { 224 reg = <1>; 225 226 mipi_out_panel: endpoint { 227 remote-endpoint = <&mipi_in_panel>; 228 }; 229 }; 230 }; 231 232 panel@0 { 233 compatible = "elida,kd35t133"; 234 reg = <0>; 235 backlight = <&backlight>; 236 iovcc-supply = <&vcc_lcd>; 237 reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 238 vdd-supply = <&vcc_lcd>; 239 240 port { 241 mipi_in_panel: endpoint { 242 remote-endpoint = <&mipi_out_panel>; 243 }; 244 }; 245 }; 246}; 247 248&dsi_dphy { 249 status = "okay"; 250}; 251 252&gpu { 253 mali-supply = <&vdd_logic>; 254 status = "okay"; 255}; 256 257&i2c0 { 258 clock-frequency = <400000>; 259 i2c-scl-falling-time-ns = <16>; 260 i2c-scl-rising-time-ns = <280>; 261 status = "okay"; 262 263 rk817: pmic@20 { 264 compatible = "rockchip,rk817"; 265 reg = <0x20>; 266 interrupt-parent = <&gpio0>; 267 interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 268 pinctrl-names = "default"; 269 pinctrl-0 = <&pmic_int>; 270 wakeup-source; 271 #clock-cells = <1>; 272 clock-output-names = "rk808-clkout1", "xin32k"; 273 274 vcc1-supply = <&vccsys>; 275 vcc2-supply = <&vccsys>; 276 vcc3-supply = <&vccsys>; 277 vcc4-supply = <&vccsys>; 278 vcc5-supply = <&vccsys>; 279 vcc6-supply = <&vccsys>; 280 vcc7-supply = <&vccsys>; 281 282 regulators { 283 vdd_logic: DCDC_REG1 { 284 regulator-name = "vdd_logic"; 285 regulator-min-microvolt = <950000>; 286 regulator-max-microvolt = <1150000>; 287 regulator-ramp-delay = <6001>; 288 regulator-always-on; 289 regulator-boot-on; 290 291 regulator-state-mem { 292 regulator-on-in-suspend; 293 regulator-suspend-microvolt = <950000>; 294 }; 295 }; 296 297 vdd_arm: DCDC_REG2 { 298 regulator-name = "vdd_arm"; 299 regulator-min-microvolt = <950000>; 300 regulator-max-microvolt = <1350000>; 301 regulator-ramp-delay = <6001>; 302 regulator-always-on; 303 regulator-boot-on; 304 305 regulator-state-mem { 306 regulator-off-in-suspend; 307 regulator-suspend-microvolt = <950000>; 308 }; 309 }; 310 311 vcc_ddr: DCDC_REG3 { 312 regulator-name = "vcc_ddr"; 313 regulator-always-on; 314 regulator-boot-on; 315 316 regulator-state-mem { 317 regulator-on-in-suspend; 318 }; 319 }; 320 321 vcc_3v3: DCDC_REG4 { 322 regulator-name = "vcc_3v3"; 323 regulator-min-microvolt = <3300000>; 324 regulator-max-microvolt = <3300000>; 325 regulator-always-on; 326 regulator-boot-on; 327 328 regulator-state-mem { 329 regulator-off-in-suspend; 330 regulator-suspend-microvolt = <3300000>; 331 }; 332 }; 333 334 vcc_1v8: LDO_REG2 { 335 regulator-name = "vcc_1v8"; 336 regulator-min-microvolt = <1800000>; 337 regulator-max-microvolt = <1800000>; 338 regulator-always-on; 339 regulator-boot-on; 340 341 regulator-state-mem { 342 regulator-on-in-suspend; 343 regulator-suspend-microvolt = <1800000>; 344 }; 345 }; 346 347 vdd_1v0: LDO_REG3 { 348 regulator-name = "vdd_1v0"; 349 regulator-min-microvolt = <1000000>; 350 regulator-max-microvolt = <1000000>; 351 regulator-always-on; 352 regulator-boot-on; 353 354 regulator-state-mem { 355 regulator-on-in-suspend; 356 regulator-suspend-microvolt = <1000000>; 357 }; 358 }; 359 360 vcc3v3_pmu: LDO_REG4 { 361 regulator-name = "vcc3v3_pmu"; 362 regulator-min-microvolt = <3300000>; 363 regulator-max-microvolt = <3300000>; 364 regulator-always-on; 365 regulator-boot-on; 366 367 regulator-state-mem { 368 regulator-on-in-suspend; 369 regulator-suspend-microvolt = <3300000>; 370 }; 371 }; 372 373 vccio_sd: LDO_REG5 { 374 regulator-name = "vccio_sd"; 375 regulator-min-microvolt = <1800000>; 376 regulator-max-microvolt = <3300000>; 377 regulator-always-on; 378 regulator-boot-on; 379 380 regulator-state-mem { 381 regulator-on-in-suspend; 382 regulator-suspend-microvolt = <3300000>; 383 }; 384 }; 385 386 vcc_sd: LDO_REG6 { 387 regulator-name = "vcc_sd"; 388 regulator-min-microvolt = <3300000>; 389 regulator-max-microvolt = <3300000>; 390 regulator-boot-on; 391 392 regulator-state-mem { 393 regulator-on-in-suspend; 394 regulator-suspend-microvolt = <3300000>; 395 }; 396 }; 397 398 vcc_bl: LDO_REG7 { 399 regulator-name = "vcc_bl"; 400 regulator-min-microvolt = <3300000>; 401 regulator-max-microvolt = <3300000>; 402 403 regulator-state-mem { 404 regulator-off-in-suspend; 405 regulator-suspend-microvolt = <3300000>; 406 }; 407 }; 408 409 vcc_lcd: LDO_REG8 { 410 regulator-name = "vcc_lcd"; 411 regulator-min-microvolt = <2800000>; 412 regulator-max-microvolt = <2800000>; 413 414 regulator-state-mem { 415 regulator-off-in-suspend; 416 regulator-suspend-microvolt = <2800000>; 417 }; 418 }; 419 420 vcc_cam: LDO_REG9 { 421 regulator-name = "vcc_cam"; 422 regulator-min-microvolt = <3000000>; 423 regulator-max-microvolt = <3000000>; 424 425 regulator-state-mem { 426 regulator-off-in-suspend; 427 regulator-suspend-microvolt = <3000000>; 428 }; 429 }; 430 }; 431 }; 432}; 433 434/* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */ 435&i2c1 { 436 clock-frequency = <400000>; 437 status = "okay"; 438}; 439 440/* I2S 1 Channel Used */ 441&i2s1_2ch { 442 status = "okay"; 443}; 444 445&io_domains { 446 vccio1-supply = <&vcc_3v3>; 447 vccio2-supply = <&vccio_sd>; 448 vccio3-supply = <&vcc_3v3>; 449 vccio4-supply = <&vcc_3v3>; 450 vccio5-supply = <&vcc_3v3>; 451 vccio6-supply = <&vcc_3v3>; 452 status = "okay"; 453}; 454 455&pmu_io_domains { 456 pmuio1-supply = <&vcc3v3_pmu>; 457 pmuio2-supply = <&vcc3v3_pmu>; 458 status = "okay"; 459}; 460 461&pwm1 { 462 status = "okay"; 463}; 464 465&saradc { 466 vref-supply = <&vcc_1v8>; 467 status = "okay"; 468}; 469 470&sdmmc { 471 cap-sd-highspeed; 472 card-detect-delay = <200>; 473 cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/ 474 sd-uhs-sdr12; 475 sd-uhs-sdr25; 476 sd-uhs-sdr50; 477 sd-uhs-sdr104; 478 vmmc-supply = <&vcc_sd>; 479 vqmmc-supply = <&vccio_sd>; 480 status = "okay"; 481}; 482 483&tsadc { 484 status = "okay"; 485}; 486 487&u2phy { 488 status = "okay"; 489 490 u2phy_host: host-port { 491 status = "okay"; 492 }; 493 494 u2phy_otg: otg-port { 495 status = "disabled"; 496 }; 497}; 498 499&usb20_otg { 500 status = "okay"; 501}; 502 503/* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */ 504&uart1 { 505 pinctrl-names = "default"; 506 pinctrl-0 = <&uart1_xfer &uart1_cts>; 507 status = "okay"; 508}; 509 510&uart2 { 511 pinctrl-names = "default"; 512 pinctrl-0 = <&uart2m1_xfer>; 513 status = "okay"; 514}; 515 516&vopb { 517 status = "okay"; 518}; 519 520&vopb_mmu { 521 status = "okay"; 522}; 523 524&pinctrl { 525 btns { 526 btn_pins: btn-pins { 527 rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 528 <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 529 <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 530 <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 531 <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 532 <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, 533 <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, 534 <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, 535 <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, 536 <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, 537 <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 538 <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, 539 <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, 540 <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 541 <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 542 <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 543 }; 544 }; 545 546 headphone { 547 hp_det: hp-det { 548 rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; 549 }; 550 }; 551 552 leds { 553 blue_led_pin: blue-led-pin { 554 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 555 }; 556 }; 557 558 pmic { 559 dc_det: dc-det { 560 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 561 }; 562 563 pmic_int: pmic-int { 564 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 565 }; 566 567 soc_slppin_gpio: soc_slppin_gpio { 568 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 569 }; 570 571 soc_slppin_rst: soc_slppin_rst { 572 rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>; 573 }; 574 575 soc_slppin_slp: soc_slppin_slp { 576 rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; 577 }; 578 }; 579}; 580