1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH 4 */ 5 6/dts-v1/; 7#include "px30.dtsi" 8#include <dt-bindings/leds/common.h> 9 10/ { 11 aliases { 12 i2c10 = &i2c10; 13 mmc0 = &emmc; 14 mmc1 = &sdio; 15 rtc0 = &rtc_twi; 16 rtc1 = &rk809; 17 }; 18 19 /* allows userspace to control the gate of the ATtiny UPDI pass FET via sysfs */ 20 attiny-updi-gate-regulator { 21 compatible = "regulator-output"; 22 vout-supply = <&vg_attiny_updi>; 23 }; 24 25 emmc_pwrseq: emmc-pwrseq { 26 compatible = "mmc-pwrseq-emmc"; 27 pinctrl-0 = <&emmc_reset>; 28 pinctrl-names = "default"; 29 reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; 30 }; 31 32 leds { 33 compatible = "gpio-leds"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&module_led_pin>; 36 status = "okay"; 37 38 module_led: led-0 { 39 gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; 40 function = LED_FUNCTION_HEARTBEAT; 41 linux,default-trigger = "heartbeat"; 42 color = <LED_COLOR_ID_AMBER>; 43 }; 44 }; 45 46 vcc5v0_sys: regulator-vccsys { 47 compatible = "regulator-fixed"; 48 regulator-name = "vcc5v0_sys"; 49 regulator-always-on; 50 regulator-boot-on; 51 regulator-min-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>; 53 }; 54}; 55 56&cpu0 { 57 cpu-supply = <&vdd_arm>; 58}; 59 60&cpu1 { 61 cpu-supply = <&vdd_arm>; 62}; 63 64&cpu2 { 65 cpu-supply = <&vdd_arm>; 66}; 67 68&cpu3 { 69 cpu-supply = <&vdd_arm>; 70}; 71 72&emmc { 73 bus-width = <8>; 74 cap-mmc-highspeed; 75 mmc-hs200-1_8v; 76 mmc-pwrseq = <&emmc_pwrseq>; 77 non-removable; 78 vmmc-supply = <&vcc_3v3>; 79 vqmmc-supply = <&vcc_emmc>; 80 81 status = "okay"; 82}; 83 84/* On-module TI DP83825I PHY but no connector, enable in carrierboard */ 85&gmac { 86 snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; 87 snps,reset-active-low; 88 snps,reset-delays-us = <0 50000 50000>; 89 phy-supply = <&vcc_3v3>; 90 clock_in_out = "output"; 91}; 92 93&gpio2 { 94 /* 95 * The Qseven BIOS_DISABLE signal on the PX30-µQ7 keeps the on-module 96 * eMMC powered-down initially (in fact it keeps the reset signal 97 * asserted). BIOS_DISABLE_OVERRIDE pin allows to re-enable eMMC after 98 * the SPL has been booted from SD Card. 99 */ 100 bios-disable-override-hog { 101 gpios = <RK_PB5 GPIO_ACTIVE_LOW>; 102 output-high; 103 line-name = "bios_disable_override"; 104 gpio-hog; 105 }; 106 107 /* 108 * The BIOS_DISABLE hog is a feedback pin for the actual status of the 109 * signal, ignoring the BIOS_DISABLE_OVERRIDE logic. This usually 110 * represents the state of a switch on the baseboard. 111 */ 112 bios-disable-n-hog { 113 gpios = <RK_PC2 GPIO_ACTIVE_LOW>; 114 line-name = "bios_disable"; 115 input; 116 gpio-hog; 117 }; 118}; 119 120&gpu { 121 status = "okay"; 122}; 123 124&i2c0 { 125 status = "okay"; 126 127 rk809: pmic@20 { 128 compatible = "rockchip,rk809"; 129 reg = <0x20>; 130 interrupt-parent = <&gpio0>; 131 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 132 pinctrl-0 = <&pmic_int>; 133 pinctrl-names = "default"; 134 #clock-cells = <0>; 135 clock-output-names = "xin32k"; 136 system-power-controller; 137 wakeup-source; 138 139 vcc1-supply = <&vcc5v0_sys>; 140 vcc2-supply = <&vcc5v0_sys>; 141 vcc3-supply = <&vcc5v0_sys>; 142 vcc4-supply = <&vcc5v0_sys>; 143 vcc5-supply = <&vcc_3v3>; 144 vcc6-supply = <&vcc_3v3>; 145 vcc7-supply = <&vcc_3v3>; 146 vcc9-supply = <&vcc5v0_sys>; 147 148 regulators { 149 vdd_log: DCDC_REG1 { 150 regulator-name = "vdd_log"; 151 regulator-min-microvolt = <950000>; 152 regulator-max-microvolt = <1350000>; 153 regulator-ramp-delay = <6001>; 154 regulator-always-on; 155 regulator-boot-on; 156 157 regulator-state-mem { 158 regulator-on-in-suspend; 159 regulator-suspend-microvolt = <950000>; 160 }; 161 }; 162 163 vdd_arm: DCDC_REG2 { 164 regulator-name = "vdd_arm"; 165 regulator-min-microvolt = <950000>; 166 regulator-max-microvolt = <1350000>; 167 regulator-ramp-delay = <6001>; 168 regulator-always-on; 169 regulator-boot-on; 170 171 regulator-state-mem { 172 regulator-off-in-suspend; 173 regulator-suspend-microvolt = <950000>; 174 }; 175 }; 176 177 vcc_ddr: DCDC_REG3 { 178 regulator-name = "vcc_ddr"; 179 regulator-always-on; 180 regulator-boot-on; 181 182 regulator-state-mem { 183 regulator-on-in-suspend; 184 }; 185 }; 186 187 vcc_3v0_1v8: vcc_emmc: DCDC_REG4 { 188 regulator-name = "vcc_3v0_1v8"; 189 regulator-min-microvolt = <1800000>; 190 regulator-max-microvolt = <3000000>; 191 regulator-always-on; 192 regulator-boot-on; 193 194 regulator-state-mem { 195 regulator-on-in-suspend; 196 regulator-suspend-microvolt = <3000000>; 197 }; 198 }; 199 200 vcc_3v3: DCDC_REG5 { 201 regulator-name = "vcc_3v3"; 202 regulator-min-microvolt = <3300000>; 203 regulator-max-microvolt = <3300000>; 204 regulator-always-on; 205 regulator-boot-on; 206 207 regulator-state-mem { 208 regulator-on-in-suspend; 209 regulator-suspend-microvolt = <3300000>; 210 }; 211 }; 212 213 vcc_1v8: LDO_REG2 { 214 regulator-name = "vcc_1v8"; 215 regulator-min-microvolt = <1800000>; 216 regulator-max-microvolt = <1800000>; 217 regulator-always-on; 218 regulator-boot-on; 219 220 regulator-state-mem { 221 regulator-on-in-suspend; 222 regulator-suspend-microvolt = <1800000>; 223 }; 224 }; 225 226 vcc_1v0: LDO_REG3 { 227 regulator-name = "vcc_1v0"; 228 regulator-min-microvolt = <1000000>; 229 regulator-max-microvolt = <1000000>; 230 regulator-always-on; 231 regulator-boot-on; 232 233 regulator-state-mem { 234 regulator-on-in-suspend; 235 regulator-suspend-microvolt = <1000000>; 236 }; 237 }; 238 239 vccio_sd: LDO_REG5 { 240 regulator-name = "vccio_sd"; 241 regulator-min-microvolt = <1800000>; 242 regulator-max-microvolt = <3300000>; 243 regulator-always-on; 244 regulator-boot-on; 245 246 regulator-state-mem { 247 regulator-on-in-suspend; 248 regulator-suspend-microvolt = <3300000>; 249 }; 250 }; 251 252 vcc_lcd: LDO_REG7 { 253 regulator-always-on; 254 regulator-boot-on; 255 regulator-min-microvolt = <1000000>; 256 regulator-max-microvolt = <1000000>; 257 regulator-name = "vcc_lcd"; 258 259 regulator-state-mem { 260 regulator-off-in-suspend; 261 regulator-suspend-microvolt = <1000000>; 262 }; 263 }; 264 265 vcc_1v8_lcd: LDO_REG8 { 266 regulator-name = "vcc_1v8_lcd"; 267 regulator-min-microvolt = <1800000>; 268 regulator-max-microvolt = <1800000>; 269 regulator-always-on; 270 regulator-boot-on; 271 272 regulator-state-mem { 273 regulator-on-in-suspend; 274 regulator-suspend-microvolt = <1800000>; 275 }; 276 }; 277 278 vcca_1v8: LDO_REG9 { 279 regulator-name = "vcca_1v8"; 280 regulator-min-microvolt = <1800000>; 281 regulator-max-microvolt = <1800000>; 282 regulator-always-on; 283 regulator-boot-on; 284 285 regulator-state-mem { 286 regulator-off-in-suspend; 287 regulator-suspend-microvolt = <1800000>; 288 }; 289 }; 290 291 /* supplies the gate of the ATtiny UPDI pass FET */ 292 vg_attiny_updi: SWITCH_REG1 { 293 regulator-name = "vg_attiny_updi"; 294 }; 295 }; 296 }; 297}; 298 299&i2c1 { 300 status = "okay"; 301 302 /* SE05x is limited to Fast Mode */ 303 clock-frequency = <400000>; 304 305 fan: fan@18 { 306 compatible = "tsd,mule", "ti,amc6821"; 307 reg = <0x18>; 308 309 i2c-mux { 310 compatible = "tsd,mule-i2c-mux"; 311 #address-cells = <1>; 312 #size-cells = <0>; 313 314 i2c10: i2c@0 { 315 reg = <0x0>; 316 #address-cells = <1>; 317 #size-cells = <0>; 318 319 rtc_twi: rtc@6f { 320 compatible = "isil,isl1208"; 321 reg = <0x6f>; 322 }; 323 }; 324 }; 325 }; 326}; 327 328&i2c3 { 329 status = "okay"; 330}; 331 332&i2s0_8ch { 333 rockchip,trcm-sync-tx-only; 334 335 pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8ch_lrcktx 336 &i2s0_8ch_sdo0 &i2s0_8ch_sdi0>; 337}; 338 339&io_domains { 340 vccio1-supply = <&vcc_3v3>; 341 vccio2-supply = <&vccio_sd>; 342 vccio3-supply = <&vcc_3v3>; 343 vccio4-supply = <&vcc_3v3>; 344 vccio5-supply = <&vcc_3v3>; 345 vccio6-supply = <&vcc_emmc>; 346 vccio-oscgpi-supply = <&vcc_3v3>; 347 348 status = "okay"; 349}; 350 351&pinctrl { 352 emmc { 353 emmc_reset: emmc-reset { 354 rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 355 }; 356 }; 357 358 leds { 359 module_led_pin: module-led-pin { 360 rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 361 }; 362 }; 363 364 pmic { 365 pmic_int: pmic-int { 366 rockchip,pins = 367 <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 368 }; 369 }; 370}; 371 372&pmu_io_domains { 373 pmuio1-supply = <&vcc_3v3>; 374 pmuio2-supply = <&vcc_3v3>; 375 status = "okay"; 376}; 377 378&saradc { 379 vref-supply = <&vcc_1v8>; 380 status = "okay"; 381}; 382 383&sdmmc { 384 vqmmc-supply = <&vccio_sd>; 385}; 386 387&tsadc { 388 status = "okay"; 389}; 390 391&u2phy { 392 status = "okay"; 393}; 394 395&u2phy_host { 396 status = "okay"; 397}; 398 399/* Mule UCAN */ 400&usb_host0_ehci { 401 status = "okay"; 402}; 403 404&usb_host0_ohci { 405 status = "okay"; 406}; 407 408&wdt { 409 status = "okay"; 410}; 411