1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH 4 */ 5 6/dts-v1/; 7#include "px30.dtsi" 8#include <dt-bindings/leds/common.h> 9 10/ { 11 aliases { 12 i2c10 = &i2c10; 13 mmc0 = &emmc; 14 mmc1 = &sdio; 15 rtc0 = &rtc_twi; 16 rtc1 = &rk809; 17 }; 18 19 /* allows userspace to control the gate of the ATtiny UPDI pass FET via sysfs */ 20 attiny-updi-gate-regulator { 21 compatible = "regulator-output"; 22 vout-supply = <&vg_attiny_updi>; 23 }; 24 25 emmc_pwrseq: emmc-pwrseq { 26 compatible = "mmc-pwrseq-emmc"; 27 pinctrl-0 = <&emmc_reset>; 28 pinctrl-names = "default"; 29 reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; 30 }; 31 32 leds { 33 compatible = "gpio-leds"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&module_led_pin>; 36 status = "okay"; 37 38 module_led: led-0 { 39 gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; 40 function = LED_FUNCTION_HEARTBEAT; 41 linux,default-trigger = "heartbeat"; 42 color = <LED_COLOR_ID_AMBER>; 43 }; 44 }; 45 46 vcc5v0_sys: regulator-vccsys { 47 compatible = "regulator-fixed"; 48 regulator-name = "vcc5v0_sys"; 49 regulator-always-on; 50 regulator-boot-on; 51 regulator-min-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>; 53 }; 54}; 55 56&cpu0 { 57 cpu-supply = <&vdd_arm>; 58}; 59 60&cpu1 { 61 cpu-supply = <&vdd_arm>; 62}; 63 64&cpu2 { 65 cpu-supply = <&vdd_arm>; 66}; 67 68&cpu3 { 69 cpu-supply = <&vdd_arm>; 70}; 71 72&emmc { 73 bus-width = <8>; 74 cap-mmc-highspeed; 75 mmc-hs200-1_8v; 76 supports-emmc; 77 mmc-pwrseq = <&emmc_pwrseq>; 78 non-removable; 79 vmmc-supply = <&vcc_3v3>; 80 vqmmc-supply = <&vcc_emmc>; 81 82 status = "okay"; 83}; 84 85/* On-module TI DP83825I PHY but no connector, enable in carrierboard */ 86&gmac { 87 snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; 88 snps,reset-active-low; 89 snps,reset-delays-us = <0 50000 50000>; 90 phy-supply = <&vcc_3v3>; 91 clock_in_out = "output"; 92}; 93 94&gpio2 { 95 /* 96 * The Qseven BIOS_DISABLE signal on the PX30-µQ7 keeps the on-module 97 * eMMC powered-down initially (in fact it keeps the reset signal 98 * asserted). BIOS_DISABLE_OVERRIDE pin allows to re-enable eMMC after 99 * the SPL has been booted from SD Card. 100 */ 101 bios-disable-override-hog { 102 gpios = <RK_PB5 GPIO_ACTIVE_LOW>; 103 output-high; 104 line-name = "bios_disable_override"; 105 gpio-hog; 106 }; 107 108 /* 109 * The BIOS_DISABLE hog is a feedback pin for the actual status of the 110 * signal, ignoring the BIOS_DISABLE_OVERRIDE logic. This usually 111 * represents the state of a switch on the baseboard. 112 */ 113 bios-disable-n-hog { 114 gpios = <RK_PC2 GPIO_ACTIVE_LOW>; 115 line-name = "bios_disable"; 116 input; 117 gpio-hog; 118 }; 119}; 120 121&gpu { 122 status = "okay"; 123}; 124 125&i2c0 { 126 status = "okay"; 127 128 rk809: pmic@20 { 129 compatible = "rockchip,rk809"; 130 reg = <0x20>; 131 interrupt-parent = <&gpio0>; 132 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 133 pinctrl-0 = <&pmic_int>; 134 pinctrl-names = "default"; 135 #clock-cells = <0>; 136 clock-output-names = "xin32k"; 137 system-power-controller; 138 wakeup-source; 139 140 vcc1-supply = <&vcc5v0_sys>; 141 vcc2-supply = <&vcc5v0_sys>; 142 vcc3-supply = <&vcc5v0_sys>; 143 vcc4-supply = <&vcc5v0_sys>; 144 vcc5-supply = <&vcc_3v3>; 145 vcc6-supply = <&vcc_3v3>; 146 vcc7-supply = <&vcc_3v3>; 147 vcc9-supply = <&vcc5v0_sys>; 148 149 regulators { 150 vdd_log: DCDC_REG1 { 151 regulator-name = "vdd_log"; 152 regulator-min-microvolt = <950000>; 153 regulator-max-microvolt = <1350000>; 154 regulator-ramp-delay = <6001>; 155 regulator-always-on; 156 regulator-boot-on; 157 158 regulator-state-mem { 159 regulator-on-in-suspend; 160 regulator-suspend-microvolt = <950000>; 161 }; 162 }; 163 164 vdd_arm: DCDC_REG2 { 165 regulator-name = "vdd_arm"; 166 regulator-min-microvolt = <950000>; 167 regulator-max-microvolt = <1350000>; 168 regulator-ramp-delay = <6001>; 169 regulator-always-on; 170 regulator-boot-on; 171 172 regulator-state-mem { 173 regulator-off-in-suspend; 174 regulator-suspend-microvolt = <950000>; 175 }; 176 }; 177 178 vcc_ddr: DCDC_REG3 { 179 regulator-name = "vcc_ddr"; 180 regulator-always-on; 181 regulator-boot-on; 182 183 regulator-state-mem { 184 regulator-on-in-suspend; 185 }; 186 }; 187 188 vcc_3v0_1v8: vcc_emmc: DCDC_REG4 { 189 regulator-name = "vcc_3v0_1v8"; 190 regulator-min-microvolt = <1800000>; 191 regulator-max-microvolt = <3000000>; 192 regulator-always-on; 193 regulator-boot-on; 194 195 regulator-state-mem { 196 regulator-on-in-suspend; 197 regulator-suspend-microvolt = <3000000>; 198 }; 199 }; 200 201 vcc_3v3: DCDC_REG5 { 202 regulator-name = "vcc_3v3"; 203 regulator-min-microvolt = <3300000>; 204 regulator-max-microvolt = <3300000>; 205 regulator-always-on; 206 regulator-boot-on; 207 208 regulator-state-mem { 209 regulator-on-in-suspend; 210 regulator-suspend-microvolt = <3300000>; 211 }; 212 }; 213 214 vcc_1v8: LDO_REG2 { 215 regulator-name = "vcc_1v8"; 216 regulator-min-microvolt = <1800000>; 217 regulator-max-microvolt = <1800000>; 218 regulator-always-on; 219 regulator-boot-on; 220 221 regulator-state-mem { 222 regulator-on-in-suspend; 223 regulator-suspend-microvolt = <1800000>; 224 }; 225 }; 226 227 vcc_1v0: LDO_REG3 { 228 regulator-name = "vcc_1v0"; 229 regulator-min-microvolt = <1000000>; 230 regulator-max-microvolt = <1000000>; 231 regulator-always-on; 232 regulator-boot-on; 233 234 regulator-state-mem { 235 regulator-on-in-suspend; 236 regulator-suspend-microvolt = <1000000>; 237 }; 238 }; 239 240 vccio_sd: LDO_REG5 { 241 regulator-name = "vccio_sd"; 242 regulator-min-microvolt = <1800000>; 243 regulator-max-microvolt = <3300000>; 244 regulator-always-on; 245 regulator-boot-on; 246 247 regulator-state-mem { 248 regulator-on-in-suspend; 249 regulator-suspend-microvolt = <3300000>; 250 }; 251 }; 252 253 vcc_lcd: LDO_REG7 { 254 regulator-always-on; 255 regulator-boot-on; 256 regulator-min-microvolt = <1000000>; 257 regulator-max-microvolt = <1000000>; 258 regulator-name = "vcc_lcd"; 259 260 regulator-state-mem { 261 regulator-off-in-suspend; 262 regulator-suspend-microvolt = <1000000>; 263 }; 264 }; 265 266 vcc_1v8_lcd: LDO_REG8 { 267 regulator-name = "vcc_1v8_lcd"; 268 regulator-min-microvolt = <1800000>; 269 regulator-max-microvolt = <1800000>; 270 regulator-always-on; 271 regulator-boot-on; 272 273 regulator-state-mem { 274 regulator-on-in-suspend; 275 regulator-suspend-microvolt = <1800000>; 276 }; 277 }; 278 279 vcca_1v8: LDO_REG9 { 280 regulator-name = "vcca_1v8"; 281 regulator-min-microvolt = <1800000>; 282 regulator-max-microvolt = <1800000>; 283 regulator-always-on; 284 regulator-boot-on; 285 286 regulator-state-mem { 287 regulator-off-in-suspend; 288 regulator-suspend-microvolt = <1800000>; 289 }; 290 }; 291 292 /* supplies the gate of the ATtiny UPDI pass FET */ 293 vg_attiny_updi: SWITCH_REG1 { 294 regulator-name = "vg_attiny_updi"; 295 }; 296 }; 297 }; 298}; 299 300&i2c1 { 301 status = "okay"; 302 303 /* SE05x is limited to Fast Mode */ 304 clock-frequency = <400000>; 305 306 fan: fan@18 { 307 compatible = "tsd,mule", "ti,amc6821"; 308 reg = <0x18>; 309 310 i2c-mux { 311 compatible = "tsd,mule-i2c-mux"; 312 #address-cells = <1>; 313 #size-cells = <0>; 314 315 i2c10: i2c@0 { 316 reg = <0x0>; 317 #address-cells = <1>; 318 #size-cells = <0>; 319 320 rtc_twi: rtc@6f { 321 compatible = "isil,isl1208"; 322 reg = <0x6f>; 323 }; 324 }; 325 }; 326 }; 327}; 328 329&i2c3 { 330 status = "okay"; 331}; 332 333&i2s0_8ch { 334 rockchip,trcm-sync-tx-only; 335 336 pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8ch_lrcktx 337 &i2s0_8ch_sdo0 &i2s0_8ch_sdi0>; 338}; 339 340&io_domains { 341 vccio1-supply = <&vcc_3v3>; 342 vccio2-supply = <&vccio_sd>; 343 vccio3-supply = <&vcc_3v3>; 344 vccio4-supply = <&vcc_3v3>; 345 vccio5-supply = <&vcc_3v3>; 346 vccio6-supply = <&vcc_emmc>; 347 vccio-oscgpi-supply = <&vcc_3v3>; 348 349 status = "okay"; 350}; 351 352&pinctrl { 353 emmc { 354 emmc_reset: emmc-reset { 355 rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 356 }; 357 }; 358 359 leds { 360 module_led_pin: module-led-pin { 361 rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 362 }; 363 }; 364 365 pmic { 366 pmic_int: pmic-int { 367 rockchip,pins = 368 <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 369 }; 370 }; 371}; 372 373&pmu_io_domains { 374 pmuio1-supply = <&vcc_3v3>; 375 pmuio2-supply = <&vcc_3v3>; 376 status = "okay"; 377}; 378 379&saradc { 380 vref-supply = <&vcc_1v8>; 381 status = "okay"; 382}; 383 384&sdmmc { 385 vqmmc-supply = <&vccio_sd>; 386}; 387 388&tsadc { 389 status = "okay"; 390}; 391 392&u2phy { 393 status = "okay"; 394}; 395 396&u2phy_host { 397 status = "okay"; 398}; 399 400/* Mule UCAN */ 401&usb_host0_ehci { 402 status = "okay"; 403}; 404 405&usb_host0_ohci { 406 status = "okay"; 407}; 408 409&wdt { 410 status = "okay"; 411}; 412