xref: /linux/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi (revision b50ecc5aca4d18f1f0c4942f5c797bc85edef144)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Engicam srl
4 * Copyright (c) 2020 Amarula Solutions
5 * Copyright (c) 2020 Amarula Solutions(India)
6 */
7
8/ {
9	aliases {
10		ethernet0 = &gmac;
11		mmc1 = &sdmmc;
12		mmc2 = &sdio;
13	};
14
15	vcc5v0_sys: regulator-vcc5v0-sys {
16		compatible = "regulator-fixed";
17		regulator-name = "vcc5v0_sys";	/* +5V */
18		regulator-always-on;
19		regulator-boot-on;
20		regulator-min-microvolt = <5000000>;
21		regulator-max-microvolt = <5000000>;
22	};
23
24	sdio_pwrseq: sdio-pwrseq {
25		compatible = "mmc-pwrseq-simple";
26		clocks = <&xin32k>;
27		clock-names = "ext_clock";
28		post-power-on-delay-ms = <80>;
29		pinctrl-names = "default";
30		pinctrl-0 = <&wifi_enable_h>;
31	};
32
33	vcc3v3_btreg: vcc3v3-btreg {
34		compatible = "regulator-gpio";
35		enable-active-high;
36		pinctrl-names = "default";
37		pinctrl-0 = <&bt_enable_h>;
38		regulator-name = "btreg-gpio-supply";
39		regulator-min-microvolt = <3300000>;
40		regulator-max-microvolt = <3300000>;
41		regulator-always-on;
42		states = <3300000 0x0>;
43	};
44
45	vcc3v3_rf_aux_mod: regulator-vcc3v3-rf-aux-mod {
46		compatible = "regulator-fixed";
47		regulator-name = "vcc3v3_rf_aux_mod";
48		regulator-min-microvolt = <3300000>;
49		regulator-max-microvolt = <3300000>;
50		regulator-always-on;
51		regulator-boot-on;
52		vin-supply = <&vcc5v0_sys>;
53	};
54
55	xin32k: xin32k {
56		compatible = "fixed-clock";
57		#clock-cells = <0>;
58		clock-frequency = <32768>;
59		clock-output-names = "xin32k";
60	};
61};
62
63&sdio {
64	#address-cells = <1>;
65	#size-cells = <0>;
66	bus-width = <4>;
67	clock-frequency = <50000000>;
68	cap-sdio-irq;
69	cap-sd-highspeed;
70	keep-power-in-suspend;
71	mmc-pwrseq = <&sdio_pwrseq>;
72	non-removable;
73	sd-uhs-sdr104;
74	status = "okay";
75
76	brcmf: wifi@1 {
77		compatible = "brcm,bcm4329-fmac";
78		reg = <1>;
79	};
80};
81
82&gmac {
83	clock_in_out = "output";
84	phy-supply = <&vcc_3v3>;	/* +3V3_SOM */
85	snps,reset-active-low;
86	snps,reset-delays-us = <0 50000 50000>;
87	snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
88	status = "okay";
89};
90
91&pwm0 {
92	status = "okay";
93};
94
95&sdmmc {
96	cap-sd-highspeed;
97	card-detect-delay = <800>;
98	vmmc-supply = <&vcc_3v3>;	/* +3V3_SOM */
99	vqmmc-supply = <&vcc_3v3>;
100	status = "okay";
101};
102
103&u2phy {
104	status = "okay";
105
106	u2phy_host: host-port {
107		status = "okay";
108	};
109
110	u2phy_otg: otg-port {
111		status = "okay";
112	};
113};
114
115&uart2 {
116	pinctrl-0 = <&uart2m1_xfer>;
117	status = "okay";
118};
119
120&usb20_otg {
121	status = "okay";
122};
123
124&usb_host0_ehci {
125	status = "okay";
126};
127
128&usb_host0_ohci {
129	status = "okay";
130};
131