xref: /linux/arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi (revision 69bfec7548f4c1595bac0e3ddfc0458a5af31f4c)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Engicam srl
4 * Copyright (c) 2020 Amarula Solutions
5 * Copyright (c) 2020 Amarula Solutions(India)
6 */
7
8/ {
9	aliases {
10		mmc1 = &sdmmc;
11		mmc2 = &sdio;
12	};
13
14	vcc5v0_sys: vcc5v0-sys {
15		compatible = "regulator-fixed";
16		regulator-name = "vcc5v0_sys";	/* +5V */
17		regulator-always-on;
18		regulator-boot-on;
19		regulator-min-microvolt = <5000000>;
20		regulator-max-microvolt = <5000000>;
21	};
22
23	sdio_pwrseq: sdio-pwrseq {
24		compatible = "mmc-pwrseq-simple";
25		clocks = <&xin32k>;
26		clock-names = "ext_clock";
27		post-power-on-delay-ms = <80>;
28		pinctrl-names = "default";
29		pinctrl-0 = <&wifi_enable_h>;
30	};
31
32	vcc3v3_btreg: vcc3v3-btreg {
33		compatible = "regulator-gpio";
34		enable-active-high;
35		pinctrl-names = "default";
36		pinctrl-0 = <&bt_enable_h>;
37		regulator-name = "btreg-gpio-supply";
38		regulator-min-microvolt = <3300000>;
39		regulator-max-microvolt = <3300000>;
40		regulator-always-on;
41		states = <3300000 0x0>;
42	};
43
44	vcc3v3_rf_aux_mod: vcc3v3-rf-aux-mod {
45		compatible = "regulator-fixed";
46		regulator-name = "vcc3v3_rf_aux_mod";
47		regulator-min-microvolt = <3300000>;
48		regulator-max-microvolt = <3300000>;
49		regulator-always-on;
50		regulator-boot-on;
51		vin-supply = <&vcc5v0_sys>;
52	};
53
54	xin32k: xin32k {
55		compatible = "fixed-clock";
56		#clock-cells = <0>;
57		clock-frequency = <32768>;
58		clock-output-names = "xin32k";
59	};
60};
61
62&sdio {
63	#address-cells = <1>;
64	#size-cells = <0>;
65	bus-width = <4>;
66	clock-frequency = <50000000>;
67	cap-sdio-irq;
68	cap-sd-highspeed;
69	keep-power-in-suspend;
70	mmc-pwrseq = <&sdio_pwrseq>;
71	non-removable;
72	sd-uhs-sdr104;
73	status = "okay";
74
75	brcmf: wifi@1 {
76		compatible = "brcm,bcm4329-fmac";
77		reg = <1>;
78	};
79};
80
81&gmac {
82	clock_in_out = "output";
83	phy-supply = <&vcc_3v3>;	/* +3V3_SOM */
84	snps,reset-active-low;
85	snps,reset-delays-us = <0 50000 50000>;
86	snps,reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
87	status = "okay";
88};
89
90&pwm0 {
91	status = "okay";
92};
93
94&sdmmc {
95	cap-sd-highspeed;
96	card-detect-delay = <800>;
97	vmmc-supply = <&vcc_3v3>;	/* +3V3_SOM */
98	vqmmc-supply = <&vcc_3v3>;
99	status = "okay";
100};
101
102&u2phy {
103	status = "okay";
104
105	u2phy_host: host-port {
106		status = "okay";
107	};
108
109	u2phy_otg: otg-port {
110		status = "okay";
111	};
112};
113
114&uart2 {
115	pinctrl-0 = <&uart2m1_xfer>;
116	status = "okay";
117};
118
119&usb20_otg {
120	status = "okay";
121};
122
123&usb_host0_ehci {
124	status = "okay";
125};
126
127&usb_host0_ohci {
128	status = "okay";
129};
130