1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the common parts shared by the White Hawk CPU and 4 * White Hawk Single boards 5 * 6 * Copyright (C) 2022 Renesas Electronics Corp. 7 */ 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/leds/common.h> 12 13/ { 14 aliases { 15 ethernet0 = &avb0; 16 serial0 = &hscif0; 17 }; 18 19 chosen { 20 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 21 stdout-path = "serial0:921600n8"; 22 }; 23 24 sn65dsi86_refclk: clk-x6 { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; 27 clock-frequency = <38400000>; 28 }; 29 30 keys { 31 compatible = "gpio-keys"; 32 33 pinctrl-0 = <&keys_pins>; 34 pinctrl-names = "default"; 35 36 key-1 { 37 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 38 linux,code = <KEY_1>; 39 label = "SW47"; 40 wakeup-source; 41 debounce-interval = <20>; 42 }; 43 44 key-2 { 45 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; 46 linux,code = <KEY_2>; 47 label = "SW48"; 48 wakeup-source; 49 debounce-interval = <20>; 50 }; 51 52 key-3 { 53 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; 54 linux,code = <KEY_3>; 55 label = "SW49"; 56 wakeup-source; 57 debounce-interval = <20>; 58 }; 59 }; 60 61 leds { 62 compatible = "gpio-leds"; 63 64 led-1 { 65 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; 66 color = <LED_COLOR_ID_GREEN>; 67 function = LED_FUNCTION_INDICATOR; 68 function-enumerator = <1>; 69 }; 70 71 led-2 { 72 gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; 73 color = <LED_COLOR_ID_GREEN>; 74 function = LED_FUNCTION_INDICATOR; 75 function-enumerator = <2>; 76 }; 77 78 led-3 { 79 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; 80 color = <LED_COLOR_ID_GREEN>; 81 function = LED_FUNCTION_INDICATOR; 82 function-enumerator = <3>; 83 }; 84 }; 85 86 memory@48000000 { 87 device_type = "memory"; 88 /* first 128MB is reserved for secure area. */ 89 reg = <0x0 0x48000000 0x0 0x78000000>; 90 }; 91 92 memory@480000000 { 93 device_type = "memory"; 94 reg = <0x4 0x80000000 0x0 0x80000000>; 95 }; 96 97 memory@600000000 { 98 device_type = "memory"; 99 reg = <0x6 0x00000000 0x1 0x00000000>; 100 }; 101 102 mini-dp-con { 103 compatible = "dp-connector"; 104 label = "CN5"; 105 type = "mini"; 106 107 port { 108 mini_dp_con_in: endpoint { 109 remote-endpoint = <&sn65dsi86_out>; 110 }; 111 }; 112 }; 113 114 reg_1p2v: regulator-1p2v { 115 compatible = "regulator-fixed"; 116 regulator-name = "fixed-1.2V"; 117 regulator-min-microvolt = <1200000>; 118 regulator-max-microvolt = <1200000>; 119 regulator-boot-on; 120 regulator-always-on; 121 }; 122 123 reg_1p8v: regulator-1p8v { 124 compatible = "regulator-fixed"; 125 regulator-name = "fixed-1.8V"; 126 regulator-min-microvolt = <1800000>; 127 regulator-max-microvolt = <1800000>; 128 regulator-boot-on; 129 regulator-always-on; 130 }; 131 132 reg_3p3v: regulator-3p3v { 133 compatible = "regulator-fixed"; 134 regulator-name = "fixed-3.3V"; 135 regulator-min-microvolt = <3300000>; 136 regulator-max-microvolt = <3300000>; 137 regulator-boot-on; 138 regulator-always-on; 139 }; 140}; 141 142&avb0 { 143 pinctrl-0 = <&avb0_pins>; 144 pinctrl-names = "default"; 145 phy-handle = <&phy0>; 146 tx-internal-delay-ps = <2000>; 147 status = "okay"; 148 149 phy0: ethernet-phy@0 { 150 compatible = "ethernet-phy-id0022.1622", 151 "ethernet-phy-ieee802.3-c22"; 152 rxc-skew-ps = <1500>; 153 reg = <0>; 154 interrupt-parent = <&gpio7>; 155 interrupts = <5 IRQ_TYPE_LEVEL_LOW>; 156 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; 157 }; 158}; 159 160&dsi0 { 161 status = "okay"; 162 163 ports { 164 port@1 { 165 dsi0_out: endpoint { 166 remote-endpoint = <&sn65dsi86_in>; 167 data-lanes = <1 2 3 4>; 168 }; 169 }; 170 }; 171}; 172 173&du { 174 status = "okay"; 175}; 176 177&extal_clk { 178 clock-frequency = <16666666>; 179}; 180 181&extalr_clk { 182 clock-frequency = <32768>; 183}; 184 185&hscif0 { 186 pinctrl-0 = <&hscif0_pins>; 187 pinctrl-names = "default"; 188 189 status = "okay"; 190}; 191 192&i2c0 { 193 pinctrl-0 = <&i2c0_pins>; 194 pinctrl-names = "default"; 195 196 status = "okay"; 197 clock-frequency = <400000>; 198 199 io_expander_a: gpio@20 { 200 compatible = "onnn,pca9654"; 201 reg = <0x20>; 202 interrupt-parent = <&gpio0>; 203 interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 204 gpio-controller; 205 #gpio-cells = <2>; 206 interrupt-controller; 207 #interrupt-cells = <2>; 208 }; 209 210 eeprom@50 { 211 compatible = "rohm,br24g01", "atmel,24c01"; 212 label = "cpu-board"; 213 reg = <0x50>; 214 pagesize = <8>; 215 }; 216}; 217 218&i2c1 { 219 pinctrl-0 = <&i2c1_pins>; 220 pinctrl-names = "default"; 221 222 status = "okay"; 223 clock-frequency = <400000>; 224 225 bridge@2c { 226 compatible = "ti,sn65dsi86"; 227 reg = <0x2c>; 228 229 clocks = <&sn65dsi86_refclk>; 230 clock-names = "refclk"; 231 232 interrupt-parent = <&intc_ex>; 233 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 234 235 enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 236 237 vccio-supply = <®_1p8v>; 238 vpll-supply = <®_1p8v>; 239 vcca-supply = <®_1p2v>; 240 vcc-supply = <®_1p2v>; 241 242 ports { 243 #address-cells = <1>; 244 #size-cells = <0>; 245 246 port@0 { 247 reg = <0>; 248 sn65dsi86_in: endpoint { 249 remote-endpoint = <&dsi0_out>; 250 }; 251 }; 252 253 port@1 { 254 reg = <1>; 255 sn65dsi86_out: endpoint { 256 remote-endpoint = <&mini_dp_con_in>; 257 }; 258 }; 259 }; 260 }; 261}; 262 263&mmc0 { 264 pinctrl-0 = <&mmc_pins>; 265 pinctrl-1 = <&mmc_pins>; 266 pinctrl-names = "default", "state_uhs"; 267 268 vmmc-supply = <®_3p3v>; 269 vqmmc-supply = <®_1p8v>; 270 mmc-hs200-1_8v; 271 mmc-hs400-1_8v; 272 bus-width = <8>; 273 no-sd; 274 no-sdio; 275 non-removable; 276 full-pwr-cycle-in-suspend; 277 status = "okay"; 278}; 279 280&pfc { 281 pinctrl-0 = <&scif_clk_pins>; 282 pinctrl-names = "default"; 283 284 avb0_pins: avb0 { 285 mux { 286 groups = "avb0_link", "avb0_mdio", "avb0_rgmii", 287 "avb0_txcrefclk"; 288 function = "avb0"; 289 }; 290 291 pins_mdio { 292 groups = "avb0_mdio"; 293 drive-strength = <21>; 294 }; 295 296 pins_mii { 297 groups = "avb0_rgmii"; 298 drive-strength = <21>; 299 }; 300 301 }; 302 303 hscif0_pins: hscif0 { 304 groups = "hscif0_data"; 305 function = "hscif0"; 306 }; 307 308 i2c0_pins: i2c0 { 309 groups = "i2c0"; 310 function = "i2c0"; 311 }; 312 313 i2c1_pins: i2c1 { 314 groups = "i2c1"; 315 function = "i2c1"; 316 }; 317 318 keys_pins: keys { 319 pins = "GP_5_0", "GP_5_1", "GP_5_2"; 320 bias-pull-up; 321 }; 322 323 mmc_pins: mmc { 324 groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 325 function = "mmc"; 326 power-source = <1800>; 327 }; 328 329 qspi0_pins: qspi0 { 330 groups = "qspi0_ctrl", "qspi0_data4"; 331 function = "qspi0"; 332 }; 333 334 scif_clk_pins: scif_clk { 335 groups = "scif_clk"; 336 function = "scif_clk"; 337 }; 338}; 339 340&rpc { 341 pinctrl-0 = <&qspi0_pins>; 342 pinctrl-names = "default"; 343 344 status = "okay"; 345 346 flash@0 { 347 compatible = "spansion,s25fs512s", "jedec,spi-nor"; 348 reg = <0>; 349 spi-max-frequency = <40000000>; 350 spi-rx-bus-width = <4>; 351 352 partitions { 353 compatible = "fixed-partitions"; 354 #address-cells = <1>; 355 #size-cells = <1>; 356 357 boot@0 { 358 reg = <0x0 0x1200000>; 359 read-only; 360 }; 361 user@1200000 { 362 reg = <0x1200000 0x2e00000>; 363 }; 364 }; 365 }; 366}; 367 368&rwdt { 369 timeout-sec = <60>; 370 status = "okay"; 371}; 372 373&scif_clk { 374 clock-frequency = <24000000>; 375}; 376