xref: /linux/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi (revision 54bf0c27380b95a220b94ea835b5e8bf58baded9) 
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the common parts shared by the White Hawk CPU and
4 * White Hawk Single boards
5 *
6 * Copyright (C) 2022 Renesas Electronics Corp.
7 */
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input.h>
11#include <dt-bindings/leds/common.h>
12
13/ {
14	aliases {
15		ethernet0 = &avb0;
16		serial0 = &hscif0;
17	};
18
19	chosen {
20		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
21		stdout-path = "serial0:921600n8";
22	};
23
24	sn65dsi86_refclk: clk-x6 {
25		compatible = "fixed-clock";
26		#clock-cells = <0>;
27		clock-frequency = <38400000>;
28	};
29
30	keys {
31		compatible = "gpio-keys";
32
33		pinctrl-0 = <&keys_pins>;
34		pinctrl-names = "default";
35
36		key-1 {
37			gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
38			linux,code = <KEY_1>;
39			label = "SW47";
40			wakeup-source;
41			debounce-interval = <20>;
42		};
43
44		key-2 {
45			gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
46			linux,code = <KEY_2>;
47			label = "SW48";
48			wakeup-source;
49			debounce-interval = <20>;
50		};
51
52		key-3 {
53			gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
54			linux,code = <KEY_3>;
55			label = "SW49";
56			wakeup-source;
57			debounce-interval = <20>;
58		};
59	};
60
61	leds {
62		compatible = "gpio-leds";
63
64		led-1 {
65			gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
66			color = <LED_COLOR_ID_GREEN>;
67			function = LED_FUNCTION_INDICATOR;
68			function-enumerator = <1>;
69		};
70
71		led-2 {
72			gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
73			color = <LED_COLOR_ID_GREEN>;
74			function = LED_FUNCTION_INDICATOR;
75			function-enumerator = <2>;
76		};
77
78		led-3 {
79			gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
80			color = <LED_COLOR_ID_GREEN>;
81			function = LED_FUNCTION_INDICATOR;
82			function-enumerator = <3>;
83		};
84	};
85
86	memory@48000000 {
87		device_type = "memory";
88		/* first 128MB is reserved for secure area. */
89		reg = <0x0 0x48000000 0x0 0x78000000>;
90	};
91
92	memory@480000000 {
93		device_type = "memory";
94		reg = <0x4 0x80000000 0x0 0x80000000>;
95	};
96
97	memory@600000000 {
98		device_type = "memory";
99		reg = <0x6 0x00000000 0x1 0x00000000>;
100	};
101
102	mini-dp-con {
103		compatible = "dp-connector";
104		label = "CN5";
105		type = "mini";
106
107		port {
108			mini_dp_con_in: endpoint {
109				remote-endpoint = <&sn65dsi86_out>;
110			};
111		};
112	};
113
114	reg_1p2v: regulator-1p2v {
115		compatible = "regulator-fixed";
116		regulator-name = "fixed-1.2V";
117		regulator-min-microvolt = <1200000>;
118		regulator-max-microvolt = <1200000>;
119		regulator-boot-on;
120		regulator-always-on;
121	};
122
123	reg_1p8v: regulator-1p8v {
124		compatible = "regulator-fixed";
125		regulator-name = "fixed-1.8V";
126		regulator-min-microvolt = <1800000>;
127		regulator-max-microvolt = <1800000>;
128		regulator-boot-on;
129		regulator-always-on;
130	};
131
132	reg_3p3v: regulator-3p3v {
133		compatible = "regulator-fixed";
134		regulator-name = "fixed-3.3V";
135		regulator-min-microvolt = <3300000>;
136		regulator-max-microvolt = <3300000>;
137		regulator-boot-on;
138		regulator-always-on;
139	};
140};
141
142&avb0 {
143	pinctrl-0 = <&avb0_pins>;
144	pinctrl-names = "default";
145	phy-handle = <&avb0_phy>;
146	tx-internal-delay-ps = <2000>;
147	status = "okay";
148
149	mdio {
150		#address-cells = <1>;
151		#size-cells = <0>;
152
153		avb0_phy: ethernet-phy@0 {
154			compatible = "ethernet-phy-id0022.1622",
155				     "ethernet-phy-ieee802.3-c22";
156			rxc-skew-ps = <1500>;
157			reg = <0>;
158			interrupt-parent = <&gpio7>;
159			interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
160			reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
161		};
162	};
163};
164
165&dsi0 {
166	status = "okay";
167
168	ports {
169		port@1 {
170			dsi0_out: endpoint {
171				remote-endpoint = <&sn65dsi86_in>;
172				data-lanes = <1 2 3 4>;
173			};
174		};
175	};
176};
177
178&du {
179	status = "okay";
180};
181
182&extal_clk {
183	clock-frequency = <16666666>;
184};
185
186&extalr_clk {
187	clock-frequency = <32768>;
188};
189
190&hscif0 {
191	pinctrl-0 = <&hscif0_pins>;
192	pinctrl-names = "default";
193
194	status = "okay";
195};
196
197&i2c0 {
198	pinctrl-0 = <&i2c0_pins>;
199	pinctrl-names = "default";
200
201	status = "okay";
202	clock-frequency = <400000>;
203
204	io_expander_a: gpio@20 {
205		compatible = "onnn,pca9654";
206		reg = <0x20>;
207		interrupt-parent = <&gpio0>;
208		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
209		gpio-controller;
210		#gpio-cells = <2>;
211		interrupt-controller;
212		#interrupt-cells = <2>;
213	};
214
215	eeprom@50 {
216		compatible = "rohm,br24g01", "atmel,24c01";
217		label = "cpu-board";
218		reg = <0x50>;
219		pagesize = <8>;
220	};
221};
222
223&i2c1 {
224	pinctrl-0 = <&i2c1_pins>;
225	pinctrl-names = "default";
226
227	status = "okay";
228	clock-frequency = <400000>;
229
230	bridge@2c {
231		compatible = "ti,sn65dsi86";
232		reg = <0x2c>;
233
234		clocks = <&sn65dsi86_refclk>;
235		clock-names = "refclk";
236
237		interrupt-parent = <&intc_ex>;
238		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
239
240		enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
241
242		vccio-supply = <&reg_1p8v>;
243		vpll-supply = <&reg_1p8v>;
244		vcca-supply = <&reg_1p2v>;
245		vcc-supply = <&reg_1p2v>;
246
247		ports {
248			#address-cells = <1>;
249			#size-cells = <0>;
250
251			port@0 {
252				reg = <0>;
253				sn65dsi86_in: endpoint {
254					remote-endpoint = <&dsi0_out>;
255				};
256			};
257
258			port@1 {
259				reg = <1>;
260				sn65dsi86_out: endpoint {
261					remote-endpoint = <&mini_dp_con_in>;
262				};
263			};
264		};
265	};
266};
267
268&mmc0 {
269	pinctrl-0 = <&mmc_pins>;
270	pinctrl-1 = <&mmc_pins>;
271	pinctrl-names = "default", "state_uhs";
272
273	vmmc-supply = <&reg_3p3v>;
274	vqmmc-supply = <&reg_1p8v>;
275	mmc-hs200-1_8v;
276	mmc-hs400-1_8v;
277	bus-width = <8>;
278	no-sd;
279	no-sdio;
280	non-removable;
281	full-pwr-cycle-in-suspend;
282	status = "okay";
283};
284
285&pfc {
286	pinctrl-0 = <&scif_clk_pins>;
287	pinctrl-names = "default";
288
289	avb0_pins: avb0 {
290		mux {
291			groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
292				 "avb0_txcrefclk";
293			function = "avb0";
294		};
295
296		pins_mdio {
297			groups = "avb0_mdio";
298			drive-strength = <21>;
299		};
300
301		pins_mii {
302			groups = "avb0_rgmii";
303			drive-strength = <21>;
304		};
305
306	};
307
308	hscif0_pins: hscif0 {
309		groups = "hscif0_data";
310		function = "hscif0";
311	};
312
313	i2c0_pins: i2c0 {
314		groups = "i2c0";
315		function = "i2c0";
316	};
317
318	i2c1_pins: i2c1 {
319		groups = "i2c1";
320		function = "i2c1";
321	};
322
323	keys_pins: keys {
324		pins = "GP_5_0", "GP_5_1", "GP_5_2";
325		bias-pull-up;
326	};
327
328	mmc_pins: mmc {
329		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
330		function = "mmc";
331		power-source = <1800>;
332	};
333
334	qspi0_pins: qspi0 {
335		groups = "qspi0_ctrl", "qspi0_data4";
336		function = "qspi0";
337	};
338
339	scif_clk_pins: scif_clk {
340		groups = "scif_clk";
341		function = "scif_clk";
342	};
343};
344
345&rpc {
346	pinctrl-0 = <&qspi0_pins>;
347	pinctrl-names = "default";
348
349	status = "okay";
350
351	flash@0 {
352		compatible = "spansion,s25fs512s", "jedec,spi-nor";
353		reg = <0>;
354		spi-max-frequency = <40000000>;
355		spi-rx-bus-width = <4>;
356
357		partitions {
358			compatible = "fixed-partitions";
359			#address-cells = <1>;
360			#size-cells = <1>;
361
362			boot@0 {
363				reg = <0x0 0x1200000>;
364				read-only;
365			};
366			user@1200000 {
367				reg = <0x1200000 0x2e00000>;
368			};
369		};
370	};
371};
372
373&rwdt {
374	timeout-sec = <60>;
375	status = "okay";
376};
377
378&scif_clk {
379	clock-frequency = <24000000>;
380};
381