xref: /linux/arch/arm64/boot/dts/renesas/ulcb.dtsi (revision 9f9b22e8c0b704c83fe4a1099ffd6f5d3971f9ac) 
1/*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2.  This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14
15/ {
16	model = "Renesas R-Car Gen3 ULCB board";
17
18	aliases {
19		serial0 = &scif2;
20		ethernet0 = &avb;
21	};
22
23	chosen {
24		stdout-path = "serial0:115200n8";
25	};
26
27	audio_clkout: audio-clkout {
28		/*
29		 * This is same as <&rcar_sound 0>
30		 * but needed to avoid cs2000/rcar_sound probe dead-lock
31		 */
32		compatible = "fixed-clock";
33		#clock-cells = <0>;
34		clock-frequency = <11289600>;
35	};
36
37	hdmi0-out {
38		compatible = "hdmi-connector";
39		type = "a";
40
41		port {
42			hdmi0_con: endpoint {
43			};
44		};
45	};
46
47	keyboard {
48		compatible = "gpio-keys";
49
50		key-1 {
51			linux,code = <KEY_1>;
52			label = "SW3";
53			wakeup-source;
54			debounce-interval = <20>;
55			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
56		};
57	};
58
59	leds {
60		compatible = "gpio-leds";
61
62		led5 {
63			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
64		};
65		led6 {
66			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
67		};
68	};
69
70	reg_1p8v: regulator0 {
71		compatible = "regulator-fixed";
72		regulator-name = "fixed-1.8V";
73		regulator-min-microvolt = <1800000>;
74		regulator-max-microvolt = <1800000>;
75		regulator-boot-on;
76		regulator-always-on;
77	};
78
79	reg_3p3v: regulator1 {
80		compatible = "regulator-fixed";
81		regulator-name = "fixed-3.3V";
82		regulator-min-microvolt = <3300000>;
83		regulator-max-microvolt = <3300000>;
84		regulator-boot-on;
85		regulator-always-on;
86	};
87
88	rsnd_ak4613: sound {
89		compatible = "simple-audio-card";
90
91		simple-audio-card,format = "left_j";
92		simple-audio-card,bitclock-master = <&sndcpu>;
93		simple-audio-card,frame-master = <&sndcpu>;
94
95		sndcpu: simple-audio-card,cpu {
96			sound-dai = <&rcar_sound>;
97		};
98
99		sndcodec: simple-audio-card,codec {
100			sound-dai = <&ak4613>;
101		};
102	};
103
104	vcc_sdhi0: regulator-vcc-sdhi0 {
105		compatible = "regulator-fixed";
106
107		regulator-name = "SDHI0 Vcc";
108		regulator-min-microvolt = <3300000>;
109		regulator-max-microvolt = <3300000>;
110
111		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
112		enable-active-high;
113	};
114
115	vccq_sdhi0: regulator-vccq-sdhi0 {
116		compatible = "regulator-gpio";
117
118		regulator-name = "SDHI0 VccQ";
119		regulator-min-microvolt = <1800000>;
120		regulator-max-microvolt = <3300000>;
121
122		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
123		gpios-states = <1>;
124		states = <3300000 1
125			  1800000 0>;
126	};
127
128	x12_clk: x12 {
129		compatible = "fixed-clock";
130		#clock-cells = <0>;
131		clock-frequency = <24576000>;
132	};
133
134	x23_clk: x23-clock {
135		compatible = "fixed-clock";
136		#clock-cells = <0>;
137		clock-frequency = <25000000>;
138	};
139};
140
141&audio_clk_a {
142	clock-frequency = <22579200>;
143};
144
145&avb {
146	pinctrl-0 = <&avb_pins>;
147	pinctrl-names = "default";
148	renesas,no-ether-link;
149	phy-handle = <&phy0>;
150	status = "okay";
151
152	phy0: ethernet-phy@0 {
153		rxc-skew-ps = <1500>;
154		reg = <0>;
155		interrupt-parent = <&gpio2>;
156		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
157	};
158};
159
160&ehci1 {
161	status = "okay";
162};
163
164&extal_clk {
165	clock-frequency = <16666666>;
166};
167
168&extalr_clk {
169	clock-frequency = <32768>;
170};
171
172&i2c2 {
173	pinctrl-0 = <&i2c2_pins>;
174	pinctrl-names = "default";
175
176	status = "okay";
177
178	clock-frequency = <100000>;
179
180	ak4613: codec@10 {
181		compatible = "asahi-kasei,ak4613";
182		#sound-dai-cells = <0>;
183		reg = <0x10>;
184		clocks = <&rcar_sound 3>;
185
186		asahi-kasei,in1-single-end;
187		asahi-kasei,in2-single-end;
188		asahi-kasei,out1-single-end;
189		asahi-kasei,out2-single-end;
190		asahi-kasei,out3-single-end;
191		asahi-kasei,out4-single-end;
192		asahi-kasei,out5-single-end;
193		asahi-kasei,out6-single-end;
194	};
195
196	cs2000: clk-multiplier@4f {
197		#clock-cells = <0>;
198		compatible = "cirrus,cs2000-cp";
199		reg = <0x4f>;
200		clocks = <&audio_clkout>, <&x12_clk>;
201		clock-names = "clk_in", "ref_clk";
202
203		assigned-clocks = <&cs2000>;
204		assigned-clock-rates = <24576000>; /* 1/1 divide */
205	};
206};
207
208&i2c4 {
209	status = "okay";
210
211	clock-frequency = <400000>;
212
213	versaclock5: clock-generator@6a {
214		compatible = "idt,5p49v5925";
215		reg = <0x6a>;
216		#clock-cells = <1>;
217		clocks = <&x23_clk>;
218		clock-names = "xin";
219	};
220};
221
222&i2c_dvfs {
223	status = "okay";
224};
225
226&ohci1 {
227	status = "okay";
228};
229
230&pfc {
231	pinctrl-0 = <&scif_clk_pins>;
232	pinctrl-names = "default";
233
234	avb_pins: avb {
235		mux {
236			groups = "avb_link", "avb_phy_int", "avb_mdc",
237				 "avb_mii";
238			function = "avb";
239		};
240
241		pins_mdc {
242			groups = "avb_mdc";
243			drive-strength = <24>;
244		};
245
246		pins_mii_tx {
247			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
248			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
249			drive-strength = <12>;
250		};
251	};
252
253	i2c2_pins: i2c2 {
254		groups = "i2c2_a";
255		function = "i2c2";
256	};
257
258	scif2_pins: scif2 {
259		groups = "scif2_data_a";
260		function = "scif2";
261	};
262
263	scif_clk_pins: scif_clk {
264		groups = "scif_clk_a";
265		function = "scif_clk";
266	};
267
268	sdhi0_pins: sd0 {
269		groups = "sdhi0_data4", "sdhi0_ctrl";
270		function = "sdhi0";
271		power-source = <3300>;
272	};
273
274	sdhi0_pins_uhs: sd0_uhs {
275		groups = "sdhi0_data4", "sdhi0_ctrl";
276		function = "sdhi0";
277		power-source = <1800>;
278	};
279
280	sdhi2_pins: sd2 {
281		groups = "sdhi2_data8", "sdhi2_ctrl";
282		function = "sdhi2";
283		power-source = <3300>;
284	};
285
286	sdhi2_pins_uhs: sd2_uhs {
287		groups = "sdhi2_data8", "sdhi2_ctrl";
288		function = "sdhi2";
289		power-source = <1800>;
290	};
291
292	sound_pins: sound {
293		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
294		function = "ssi";
295	};
296
297	sound_clk_pins: sound-clk {
298		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
299			 "audio_clkout_a", "audio_clkout3_a";
300		function = "audio_clk";
301	};
302
303	usb1_pins: usb1 {
304		groups = "usb1";
305		function = "usb1";
306	};
307};
308
309&rcar_sound {
310	pinctrl-0 = <&sound_pins &sound_clk_pins>;
311	pinctrl-names = "default";
312
313	/* Single DAI */
314	#sound-dai-cells = <0>;
315
316	/* audio_clkout0/1/2/3 */
317	#clock-cells = <1>;
318	clock-frequency = <11289600 12288000>;
319
320	status = "okay";
321
322	/* update <audio_clk_b> to <cs2000> */
323	clocks = <&cpg CPG_MOD 1005>,
324		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
325		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
326		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
327		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
328		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
329		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
330		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
331		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
332		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
333		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
334		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
335		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
336		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
337		 <&audio_clk_a>, <&cs2000>,
338		 <&audio_clk_c>,
339		 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
340
341	rcar_sound,dai {
342		dai0 {
343			playback = <&ssi0 &src0 &dvc0>;
344			capture  = <&ssi1 &src1 &dvc1>;
345		};
346	};
347};
348
349&scif2 {
350	pinctrl-0 = <&scif2_pins>;
351	pinctrl-names = "default";
352
353	status = "okay";
354};
355
356&scif_clk {
357	clock-frequency = <14745600>;
358};
359
360&sdhi0 {
361	pinctrl-0 = <&sdhi0_pins>;
362	pinctrl-1 = <&sdhi0_pins_uhs>;
363	pinctrl-names = "default", "state_uhs";
364
365	vmmc-supply = <&vcc_sdhi0>;
366	vqmmc-supply = <&vccq_sdhi0>;
367	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
368	bus-width = <4>;
369	sd-uhs-sdr50;
370	status = "okay";
371};
372
373&sdhi2 {
374	/* used for on-board 8bit eMMC */
375	pinctrl-0 = <&sdhi2_pins>;
376	pinctrl-1 = <&sdhi2_pins_uhs>;
377	pinctrl-names = "default", "state_uhs";
378
379	vmmc-supply = <&reg_3p3v>;
380	vqmmc-supply = <&reg_1p8v>;
381	bus-width = <8>;
382	mmc-hs200-1_8v;
383	non-removable;
384	status = "okay";
385};
386
387&ssi1 {
388	shared-pin;
389};
390
391&usb2_phy1 {
392	pinctrl-0 = <&usb1_pins>;
393	pinctrl-names = "default";
394
395	status = "okay";
396};
397
398&wdt0 {
399	timeout-sec = <60>;
400	status = "okay";
401};
402