1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car Gen3 ULCB board 4 * 5 * Copyright (C) 2016 Renesas Electronics Corp. 6 * Copyright (C) 2016 Cogent Embedded, Inc. 7 * 8 * Sample Audio settings: 9 * 10 * > amixer set "DVC Out" 1% 11 * > amixer set "DVC In" 20% 12 */ 13 14#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/input/input.h> 16 17/ { 18 model = "Renesas R-Car Gen3 ULCB board"; 19 20 aliases { 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 i2c3 = &i2c3; 25 i2c4 = &i2c4; 26 i2c5 = &i2c5; 27 i2c6 = &i2c6; 28 i2c7 = &i2c_dvfs; 29 serial0 = &scif2; 30 ethernet0 = &avb; 31 mmc0 = &sdhi2; 32 mmc1 = &sdhi0; 33 }; 34 35 chosen { 36 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 37 stdout-path = "serial0:115200n8"; 38 }; 39 40 audio_clkout: audio-clkout { 41 /* 42 * This is same as <&rcar_sound 0> 43 * but needed to avoid cs2000/rcar_sound probe dead-lock 44 */ 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <12288000>; 48 }; 49 50 hdmi0-out { 51 compatible = "hdmi-connector"; 52 type = "a"; 53 54 port { 55 hdmi0_con: endpoint { 56 remote-endpoint = <&rcar_dw_hdmi0_out>; 57 }; 58 }; 59 }; 60 61 keyboard { 62 compatible = "gpio-keys"; 63 64 key-1 { 65 linux,code = <KEY_1>; 66 label = "SW3"; 67 wakeup-source; 68 debounce-interval = <20>; 69 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; 70 }; 71 }; 72 73 leds { 74 compatible = "gpio-leds"; 75 76 led5 { 77 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>; 78 }; 79 led6 { 80 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; 81 }; 82 }; 83 84 reg_1p8v: regulator-1p8v { 85 compatible = "regulator-fixed"; 86 regulator-name = "fixed-1.8V"; 87 regulator-min-microvolt = <1800000>; 88 regulator-max-microvolt = <1800000>; 89 regulator-boot-on; 90 regulator-always-on; 91 }; 92 93 reg_3p3v: regulator-3p3v { 94 compatible = "regulator-fixed"; 95 regulator-name = "fixed-3.3V"; 96 regulator-min-microvolt = <3300000>; 97 regulator-max-microvolt = <3300000>; 98 regulator-boot-on; 99 regulator-always-on; 100 }; 101 102 vcc_sdhi0: regulator-vcc-sdhi0 { 103 compatible = "regulator-fixed"; 104 105 regulator-name = "SDHI0 Vcc"; 106 regulator-min-microvolt = <3300000>; 107 regulator-max-microvolt = <3300000>; 108 109 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; 110 enable-active-high; 111 }; 112 113 vccq_sdhi0: regulator-vccq-sdhi0 { 114 compatible = "regulator-gpio"; 115 116 regulator-name = "SDHI0 VccQ"; 117 regulator-min-microvolt = <1800000>; 118 regulator-max-microvolt = <3300000>; 119 120 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 121 gpios-states = <1>; 122 states = <3300000 1>, <1800000 0>; 123 }; 124 125 x12_clk: x12 { 126 compatible = "fixed-clock"; 127 #clock-cells = <0>; 128 clock-frequency = <24576000>; 129 }; 130 131 x23_clk: x23-clock { 132 compatible = "fixed-clock"; 133 #clock-cells = <0>; 134 clock-frequency = <25000000>; 135 }; 136}; 137 138&a57_0 { 139 cpu-supply = <&dvfs>; 140}; 141 142&audio_clk_a { 143 clock-frequency = <22579200>; 144}; 145 146&avb { 147 pinctrl-0 = <&avb_pins>; 148 pinctrl-names = "default"; 149 phy-handle = <&phy0>; 150 tx-internal-delay-ps = <2000>; 151 status = "okay"; 152 153 phy0: ethernet-phy@0 { 154 compatible = "ethernet-phy-id0022.1622", 155 "ethernet-phy-ieee802.3-c22"; 156 rxc-skew-ps = <1500>; 157 reg = <0>; 158 interrupts-extended = <&gpio2 11 IRQ_TYPE_LEVEL_LOW>; 159 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 160 }; 161}; 162 163&du { 164 status = "okay"; 165}; 166 167&ehci1 { 168 status = "okay"; 169}; 170 171&extal_clk { 172 clock-frequency = <16666666>; 173}; 174 175&extalr_clk { 176 clock-frequency = <32768>; 177}; 178 179&hdmi0 { 180 status = "okay"; 181 182 ports { 183 port@1 { 184 reg = <1>; 185 rcar_dw_hdmi0_out: endpoint { 186 remote-endpoint = <&hdmi0_con>; 187 }; 188 }; 189 port@2 { 190 reg = <2>; 191 }; 192 }; 193}; 194 195&i2c2 { 196 pinctrl-0 = <&i2c2_pins>; 197 pinctrl-names = "default"; 198 199 status = "okay"; 200 201 clock-frequency = <100000>; 202 203 ak4613: codec@10 { 204 compatible = "asahi-kasei,ak4613"; 205 reg = <0x10>; 206 clocks = <&rcar_sound 3>; 207 208 asahi-kasei,in1-single-end; 209 asahi-kasei,in2-single-end; 210 asahi-kasei,out1-single-end; 211 asahi-kasei,out2-single-end; 212 asahi-kasei,out3-single-end; 213 asahi-kasei,out4-single-end; 214 asahi-kasei,out5-single-end; 215 asahi-kasei,out6-single-end; 216 }; 217 218 cs2000: clk-multiplier@4f { 219 #clock-cells = <0>; 220 compatible = "cirrus,cs2000-cp"; 221 reg = <0x4f>; 222 clocks = <&audio_clkout>, <&x12_clk>; 223 clock-names = "clk_in", "ref_clk"; 224 225 assigned-clocks = <&cs2000>; 226 assigned-clock-rates = <24576000>; /* 1/1 divide */ 227 }; 228}; 229 230&i2c4 { 231 status = "okay"; 232 233 clock-frequency = <400000>; 234 235 versaclock5: clock-generator@6a { 236 compatible = "idt,5p49v5925"; 237 reg = <0x6a>; 238 #clock-cells = <1>; 239 clocks = <&x23_clk>; 240 clock-names = "xin"; 241 idt,shutdown = <0>; 242 idt,output-enable-active = <1>; 243 }; 244}; 245 246&i2c_dvfs { 247 bootph-all; 248 status = "okay"; 249 250 clock-frequency = <400000>; 251 252 pmic: pmic@30 { 253 pinctrl-0 = <&irq0_pins>; 254 pinctrl-names = "default"; 255 256 compatible = "rohm,bd9571mwv"; 257 reg = <0x30>; 258 interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_LOW>; 259 interrupt-controller; 260 #interrupt-cells = <2>; 261 gpio-controller; 262 #gpio-cells = <2>; 263 rohm,ddr-backup-power = <0xf>; 264 rohm,rstbmode-pulse; 265 266 regulators { 267 dvfs: dvfs { 268 regulator-name = "dvfs"; 269 regulator-min-microvolt = <750000>; 270 regulator-max-microvolt = <1030000>; 271 regulator-boot-on; 272 regulator-always-on; 273 }; 274 }; 275 }; 276 277 eeprom@50 { 278 compatible = "rohm,br24t01", "atmel,24c01"; 279 reg = <0x50>; 280 pagesize = <8>; 281 bootph-all; 282 }; 283}; 284 285&ohci1 { 286 status = "okay"; 287}; 288 289&pfc { 290 pinctrl-0 = <&scif_clk_pins>; 291 pinctrl-names = "default"; 292 293 avb_pins: avb { 294 mux { 295 groups = "avb_link", "avb_mdio", "avb_mii"; 296 function = "avb"; 297 }; 298 299 pins_mdio { 300 groups = "avb_mdio"; 301 drive-strength = <24>; 302 }; 303 304 pins_mii_tx { 305 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 306 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 307 drive-strength = <12>; 308 }; 309 }; 310 311 i2c2_pins: i2c2 { 312 groups = "i2c2_a"; 313 function = "i2c2"; 314 }; 315 316 irq0_pins: irq0 { 317 groups = "intc_ex_irq0"; 318 function = "intc_ex"; 319 }; 320 321 scif2_pins: scif2 { 322 groups = "scif2_data_a"; 323 function = "scif2"; 324 }; 325 326 scif_clk_pins: scif_clk { 327 groups = "scif_clk_a"; 328 function = "scif_clk"; 329 }; 330 331 sdhi0_pins: sd0 { 332 groups = "sdhi0_data4", "sdhi0_ctrl"; 333 function = "sdhi0"; 334 power-source = <3300>; 335 }; 336 337 sdhi0_pins_uhs: sd0_uhs { 338 groups = "sdhi0_data4", "sdhi0_ctrl"; 339 function = "sdhi0"; 340 power-source = <1800>; 341 }; 342 343 sdhi2_pins: sd2 { 344 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; 345 function = "sdhi2"; 346 power-source = <1800>; 347 }; 348 349 sound_pins: sound { 350 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; 351 function = "ssi"; 352 }; 353 354 sound_clk_pins: sound-clk { 355 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", 356 "audio_clkout_a", "audio_clkout3_a"; 357 function = "audio_clk"; 358 }; 359 360 usb1_pins: usb1 { 361 groups = "usb1"; 362 function = "usb1"; 363 }; 364}; 365 366&rcar_sound { 367 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>; 368 pinctrl-names = "default"; 369 370 /* audio_clkout0/1/2/3 */ 371 #clock-cells = <1>; 372 clock-frequency = <12288000 11289600>; 373 374 status = "okay"; 375 376 /* update <audio_clk_b> to <cs2000> */ 377 clocks = <&cpg CPG_MOD 1005>, 378 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 379 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 380 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 381 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 382 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 383 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 384 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 385 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 386 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 387 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 388 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 389 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 390 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 391 <&audio_clk_a>, <&cs2000>, 392 <&audio_clk_c>, 393 <&cpg CPG_MOD 922>; 394}; 395 396&rpc { 397 /* Left disabled. To be enabled by firmware when unlocked. */ 398 399 flash@0 { 400 compatible = "cypress,hyperflash", "cfi-flash"; 401 reg = <0>; 402 403 partitions { 404 compatible = "fixed-partitions"; 405 #address-cells = <1>; 406 #size-cells = <1>; 407 408 bootparam@0 { 409 reg = <0x00000000 0x040000>; 410 read-only; 411 }; 412 bl2@40000 { 413 reg = <0x00040000 0x140000>; 414 read-only; 415 }; 416 cert_header_sa6@180000 { 417 reg = <0x00180000 0x040000>; 418 read-only; 419 }; 420 bl31@1c0000 { 421 reg = <0x001c0000 0x040000>; 422 read-only; 423 }; 424 tee@200000 { 425 reg = <0x00200000 0x440000>; 426 read-only; 427 }; 428 uboot@640000 { 429 reg = <0x00640000 0x100000>; 430 read-only; 431 }; 432 dtb@740000 { 433 reg = <0x00740000 0x080000>; 434 }; 435 kernel@7c0000 { 436 reg = <0x007c0000 0x1400000>; 437 }; 438 user@1bc0000 { 439 reg = <0x01bc0000 0x2440000>; 440 }; 441 }; 442 }; 443}; 444 445&rwdt { 446 timeout-sec = <60>; 447 status = "okay"; 448}; 449 450&scif2 { 451 pinctrl-0 = <&scif2_pins>; 452 pinctrl-names = "default"; 453 bootph-all; 454 455 status = "okay"; 456}; 457 458&scif_clk { 459 clock-frequency = <14745600>; 460}; 461 462&sdhi0 { 463 pinctrl-0 = <&sdhi0_pins>; 464 pinctrl-1 = <&sdhi0_pins_uhs>; 465 pinctrl-names = "default", "state_uhs"; 466 467 vmmc-supply = <&vcc_sdhi0>; 468 vqmmc-supply = <&vccq_sdhi0>; 469 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 470 bus-width = <4>; 471 sd-uhs-sdr50; 472 sd-uhs-sdr104; 473 status = "okay"; 474}; 475 476&sdhi2 { 477 /* used for on-board 8bit eMMC */ 478 pinctrl-0 = <&sdhi2_pins>; 479 pinctrl-1 = <&sdhi2_pins>; 480 pinctrl-names = "default", "state_uhs"; 481 482 vmmc-supply = <®_3p3v>; 483 vqmmc-supply = <®_1p8v>; 484 bus-width = <8>; 485 mmc-hs200-1_8v; 486 mmc-hs400-1_8v; 487 no-sd; 488 no-sdio; 489 non-removable; 490 full-pwr-cycle-in-suspend; 491 status = "okay"; 492}; 493 494&ssi1 { 495 shared-pin; 496}; 497 498&usb2_phy1 { 499 pinctrl-0 = <&usb1_pins>; 500 pinctrl-names = "default"; 501 502 status = "okay"; 503}; 504 505 506/* 507 * For sound-test. 508 * 509 * We can switch Audio Card for testing 510 * 511 * #include "ulcb-simple-audio-card.dtsi" 512 * #include "ulcb-simple-audio-card-mix+split.dtsi" 513 * #include "ulcb-audio-graph-card.dtsi" 514 * #include "ulcb-audio-graph-card-mix+split.dtsi" 515 * #include "ulcb-audio-graph-card2-mix+split.dtsi" 516 */ 517#include "ulcb-audio-graph-card2.dtsi" 518