xref: /linux/arch/arm64/boot/dts/renesas/ulcb.dtsi (revision 4f2c0a4acffbec01079c28f839422e64ddeff004) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car Gen3 ULCB board
4 *
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
7 */
8
9/*
10 * SSI-AK4613
11 *	aplay   -D plughw:0,0 xxx.wav
12 *	arecord -D plughw:0,0 xxx.wav
13 * SSI-HDMI
14 *	aplay   -D plughw:0,1 xxx.wav
15 */
16
17#include <dt-bindings/gpio/gpio.h>
18#include <dt-bindings/input/input.h>
19
20/ {
21	model = "Renesas R-Car Gen3 ULCB board";
22
23	aliases {
24		i2c0 = &i2c0;
25		i2c1 = &i2c1;
26		i2c2 = &i2c2;
27		i2c3 = &i2c3;
28		i2c4 = &i2c4;
29		i2c5 = &i2c5;
30		i2c6 = &i2c6;
31		i2c7 = &i2c_dvfs;
32		serial0 = &scif2;
33		ethernet0 = &avb;
34		mmc0 = &sdhi2;
35		mmc1 = &sdhi0;
36	};
37
38	chosen {
39		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
40		stdout-path = "serial0:115200n8";
41	};
42
43	audio_clkout: audio-clkout {
44		/*
45		 * This is same as <&rcar_sound 0>
46		 * but needed to avoid cs2000/rcar_sound probe dead-lock
47		 */
48		compatible = "fixed-clock";
49		#clock-cells = <0>;
50		clock-frequency = <12288000>;
51	};
52
53	hdmi0-out {
54		compatible = "hdmi-connector";
55		type = "a";
56
57		port {
58			hdmi0_con: endpoint {
59				remote-endpoint = <&rcar_dw_hdmi0_out>;
60			};
61		};
62	};
63
64	keyboard {
65		compatible = "gpio-keys";
66
67		key-1 {
68			linux,code = <KEY_1>;
69			label = "SW3";
70			wakeup-source;
71			debounce-interval = <20>;
72			gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
73		};
74	};
75
76	leds {
77		compatible = "gpio-leds";
78
79		led5 {
80			gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
81		};
82		led6 {
83			gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
84		};
85	};
86
87	reg_1p8v: regulator-1p8v {
88		compatible = "regulator-fixed";
89		regulator-name = "fixed-1.8V";
90		regulator-min-microvolt = <1800000>;
91		regulator-max-microvolt = <1800000>;
92		regulator-boot-on;
93		regulator-always-on;
94	};
95
96	reg_3p3v: regulator-3p3v {
97		compatible = "regulator-fixed";
98		regulator-name = "fixed-3.3V";
99		regulator-min-microvolt = <3300000>;
100		regulator-max-microvolt = <3300000>;
101		regulator-boot-on;
102		regulator-always-on;
103	};
104
105	sound_card: sound {
106		compatible = "audio-graph-card2";
107		label = "rcar-sound";
108
109		links = <&rsnd_port0	/* ak4613 */
110			 &rsnd_port1	/* HDMI0  */
111			>;
112	};
113
114	vcc_sdhi0: regulator-vcc-sdhi0 {
115		compatible = "regulator-fixed";
116
117		regulator-name = "SDHI0 Vcc";
118		regulator-min-microvolt = <3300000>;
119		regulator-max-microvolt = <3300000>;
120
121		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
122		enable-active-high;
123	};
124
125	vccq_sdhi0: regulator-vccq-sdhi0 {
126		compatible = "regulator-gpio";
127
128		regulator-name = "SDHI0 VccQ";
129		regulator-min-microvolt = <1800000>;
130		regulator-max-microvolt = <3300000>;
131
132		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
133		gpios-states = <1>;
134		states = <3300000 1>, <1800000 0>;
135	};
136
137	x12_clk: x12 {
138		compatible = "fixed-clock";
139		#clock-cells = <0>;
140		clock-frequency = <24576000>;
141	};
142
143	x23_clk: x23-clock {
144		compatible = "fixed-clock";
145		#clock-cells = <0>;
146		clock-frequency = <25000000>;
147	};
148};
149
150&a57_0 {
151	cpu-supply = <&dvfs>;
152};
153
154&audio_clk_a {
155	clock-frequency = <22579200>;
156};
157
158&avb {
159	pinctrl-0 = <&avb_pins>;
160	pinctrl-names = "default";
161	phy-handle = <&phy0>;
162	tx-internal-delay-ps = <2000>;
163	status = "okay";
164
165	phy0: ethernet-phy@0 {
166		compatible = "ethernet-phy-id0022.1622",
167			     "ethernet-phy-ieee802.3-c22";
168		rxc-skew-ps = <1500>;
169		reg = <0>;
170		interrupt-parent = <&gpio2>;
171		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
172		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
173	};
174};
175
176&du {
177	status = "okay";
178};
179
180&ehci1 {
181	status = "okay";
182};
183
184&extal_clk {
185	clock-frequency = <16666666>;
186};
187
188&extalr_clk {
189	clock-frequency = <32768>;
190};
191
192&hdmi0 {
193	status = "okay";
194
195	ports {
196		port@1 {
197			reg = <1>;
198			rcar_dw_hdmi0_out: endpoint {
199				remote-endpoint = <&hdmi0_con>;
200			};
201		};
202		port@2 {
203			reg = <2>;
204			dw_hdmi0_snd_in: endpoint {
205				remote-endpoint = <&rsnd_for_hdmi>;
206			};
207		};
208	};
209};
210
211&i2c2 {
212	pinctrl-0 = <&i2c2_pins>;
213	pinctrl-names = "default";
214
215	status = "okay";
216
217	clock-frequency = <100000>;
218
219	ak4613: codec@10 {
220		compatible = "asahi-kasei,ak4613";
221		#sound-dai-cells = <0>;
222		reg = <0x10>;
223		clocks = <&rcar_sound 3>;
224
225		asahi-kasei,in1-single-end;
226		asahi-kasei,in2-single-end;
227		asahi-kasei,out1-single-end;
228		asahi-kasei,out2-single-end;
229		asahi-kasei,out3-single-end;
230		asahi-kasei,out4-single-end;
231		asahi-kasei,out5-single-end;
232		asahi-kasei,out6-single-end;
233
234		port {
235			ak4613_endpoint: endpoint {
236				remote-endpoint = <&rsnd_for_ak4613>;
237			};
238		};
239	};
240
241	cs2000: clk-multiplier@4f {
242		#clock-cells = <0>;
243		compatible = "cirrus,cs2000-cp";
244		reg = <0x4f>;
245		clocks = <&audio_clkout>, <&x12_clk>;
246		clock-names = "clk_in", "ref_clk";
247
248		assigned-clocks = <&cs2000>;
249		assigned-clock-rates = <24576000>; /* 1/1 divide */
250	};
251};
252
253&i2c4 {
254	status = "okay";
255
256	clock-frequency = <400000>;
257
258	versaclock5: clock-generator@6a {
259		compatible = "idt,5p49v5925";
260		reg = <0x6a>;
261		#clock-cells = <1>;
262		clocks = <&x23_clk>;
263		clock-names = "xin";
264	};
265};
266
267&i2c_dvfs {
268	status = "okay";
269
270	clock-frequency = <400000>;
271
272	pmic: pmic@30 {
273		pinctrl-0 = <&irq0_pins>;
274		pinctrl-names = "default";
275
276		compatible = "rohm,bd9571mwv";
277		reg = <0x30>;
278		interrupt-parent = <&intc_ex>;
279		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
280		interrupt-controller;
281		#interrupt-cells = <2>;
282		gpio-controller;
283		#gpio-cells = <2>;
284		rohm,ddr-backup-power = <0xf>;
285		rohm,rstbmode-pulse;
286
287		regulators {
288			dvfs: dvfs {
289				regulator-name = "dvfs";
290				regulator-min-microvolt = <750000>;
291				regulator-max-microvolt = <1030000>;
292				regulator-boot-on;
293				regulator-always-on;
294			};
295		};
296	};
297};
298
299&ohci1 {
300	status = "okay";
301};
302
303&pfc {
304	pinctrl-0 = <&scif_clk_pins>;
305	pinctrl-names = "default";
306
307	avb_pins: avb {
308		mux {
309			groups = "avb_link", "avb_mdio", "avb_mii";
310			function = "avb";
311		};
312
313		pins_mdio {
314			groups = "avb_mdio";
315			drive-strength = <24>;
316		};
317
318		pins_mii_tx {
319			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
320			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
321			drive-strength = <12>;
322		};
323	};
324
325	i2c2_pins: i2c2 {
326		groups = "i2c2_a";
327		function = "i2c2";
328	};
329
330	irq0_pins: irq0 {
331		groups = "intc_ex_irq0";
332		function = "intc_ex";
333	};
334
335	scif2_pins: scif2 {
336		groups = "scif2_data_a";
337		function = "scif2";
338	};
339
340	scif_clk_pins: scif_clk {
341		groups = "scif_clk_a";
342		function = "scif_clk";
343	};
344
345	sdhi0_pins: sd0 {
346		groups = "sdhi0_data4", "sdhi0_ctrl";
347		function = "sdhi0";
348		power-source = <3300>;
349	};
350
351	sdhi0_pins_uhs: sd0_uhs {
352		groups = "sdhi0_data4", "sdhi0_ctrl";
353		function = "sdhi0";
354		power-source = <1800>;
355	};
356
357	sdhi2_pins: sd2 {
358		groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
359		function = "sdhi2";
360		power-source = <1800>;
361	};
362
363	sound_pins: sound {
364		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
365		function = "ssi";
366	};
367
368	sound_clk_pins: sound-clk {
369		groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
370			 "audio_clkout_a", "audio_clkout3_a";
371		function = "audio_clk";
372	};
373
374	usb1_pins: usb1 {
375		groups = "usb1";
376		function = "usb1";
377	};
378};
379
380&rcar_sound {
381	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
382	pinctrl-names = "default";
383
384	/* Single DAI */
385	#sound-dai-cells = <0>;
386
387	/* audio_clkout0/1/2/3 */
388	#clock-cells = <1>;
389	clock-frequency = <12288000 11289600>;
390
391	status = "okay";
392
393	/* update <audio_clk_b> to <cs2000> */
394	clocks = <&cpg CPG_MOD 1005>,
395		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
396		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
397		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
398		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
399		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
400		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
401		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
402		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
403		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
404		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
405		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
406		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
407		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
408		 <&audio_clk_a>, <&cs2000>,
409		 <&audio_clk_c>,
410		 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
411
412	ports {
413		#address-cells = <1>;
414		#size-cells = <0>;
415		rsnd_port0: port@0 {
416			reg = <0>;
417			rsnd_for_ak4613: endpoint {
418				remote-endpoint = <&ak4613_endpoint>;
419				bitclock-master;
420				frame-master;
421				playback = <&ssi0>, <&src0>, <&dvc0>;
422				capture = <&ssi1>, <&src1>, <&dvc1>;
423			};
424		};
425		rsnd_port1: port@1 {
426			reg = <1>;
427			rsnd_for_hdmi: endpoint {
428				remote-endpoint = <&dw_hdmi0_snd_in>;
429				bitclock-master;
430				frame-master;
431				playback = <&ssi2>;
432			};
433		};
434	};
435};
436
437&rpc {
438	/* Left disabled.  To be enabled by firmware when unlocked. */
439
440	flash@0 {
441		compatible = "cypress,hyperflash", "cfi-flash";
442		reg = <0>;
443
444		partitions {
445			compatible = "fixed-partitions";
446			#address-cells = <1>;
447			#size-cells = <1>;
448
449			bootparam@0 {
450				reg = <0x00000000 0x040000>;
451				read-only;
452			};
453			bl2@40000 {
454				reg = <0x00040000 0x140000>;
455				read-only;
456			};
457			cert_header_sa6@180000 {
458				reg = <0x00180000 0x040000>;
459				read-only;
460			};
461			bl31@1c0000 {
462				reg = <0x001c0000 0x040000>;
463				read-only;
464			};
465			tee@200000 {
466				reg = <0x00200000 0x440000>;
467				read-only;
468			};
469			uboot@640000 {
470				reg = <0x00640000 0x100000>;
471				read-only;
472			};
473			dtb@740000 {
474				reg = <0x00740000 0x080000>;
475			};
476			kernel@7c0000 {
477				reg = <0x007c0000 0x1400000>;
478			};
479			user@1bc0000 {
480				reg = <0x01bc0000 0x2440000>;
481			};
482		};
483	};
484};
485
486&rwdt {
487	timeout-sec = <60>;
488	status = "okay";
489};
490
491&scif2 {
492	pinctrl-0 = <&scif2_pins>;
493	pinctrl-names = "default";
494
495	status = "okay";
496};
497
498&scif_clk {
499	clock-frequency = <14745600>;
500};
501
502&sdhi0 {
503	pinctrl-0 = <&sdhi0_pins>;
504	pinctrl-1 = <&sdhi0_pins_uhs>;
505	pinctrl-names = "default", "state_uhs";
506
507	vmmc-supply = <&vcc_sdhi0>;
508	vqmmc-supply = <&vccq_sdhi0>;
509	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
510	bus-width = <4>;
511	sd-uhs-sdr50;
512	sd-uhs-sdr104;
513	status = "okay";
514};
515
516&sdhi2 {
517	/* used for on-board 8bit eMMC */
518	pinctrl-0 = <&sdhi2_pins>;
519	pinctrl-1 = <&sdhi2_pins>;
520	pinctrl-names = "default", "state_uhs";
521
522	vmmc-supply = <&reg_3p3v>;
523	vqmmc-supply = <&reg_1p8v>;
524	bus-width = <8>;
525	mmc-hs200-1_8v;
526	mmc-hs400-1_8v;
527	no-sd;
528	no-sdio;
529	non-removable;
530	full-pwr-cycle-in-suspend;
531	status = "okay";
532};
533
534&ssi1 {
535	shared-pin;
536};
537
538&usb2_phy1 {
539	pinctrl-0 = <&usb1_pins>;
540	pinctrl-names = "default";
541
542	status = "okay";
543};
544