1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for common parts of Salvator-X board variants 4 * 5 * Copyright (C) 2015-2016 Renesas Electronics Corp. 6 */ 7 8/* 9 * SSI-AK4613 10 * 11 * This command is required when Playback/Capture 12 * 13 * amixer set "DVC Out" 100% 14 * amixer set "DVC In" 100% 15 * 16 * You can use Mute 17 * 18 * amixer set "DVC Out Mute" on 19 * amixer set "DVC In Mute" on 20 * 21 * You can use Volume Ramp 22 * 23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 25 * amixer set "DVC Out Ramp" on 26 * aplay xxx.wav & 27 * amixer set "DVC Out" 80% // Volume Down 28 * amixer set "DVC Out" 100% // Volume Up 29 */ 30 31#include <dt-bindings/gpio/gpio.h> 32#include <dt-bindings/input/input.h> 33 34/ { 35 aliases { 36 i2c0 = &i2c0; 37 i2c1 = &i2c1; 38 i2c2 = &i2c2; 39 i2c3 = &i2c3; 40 i2c4 = &i2c4; 41 i2c5 = &i2c5; 42 i2c6 = &i2c6; 43 i2c7 = &i2c_dvfs; 44 serial0 = &scif2; 45 serial1 = &hscif1; 46 ethernet0 = &avb; 47 mmc0 = &sdhi2; 48 mmc1 = &sdhi0; 49 mmc2 = &sdhi3; 50 }; 51 52 chosen { 53 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 54 stdout-path = "serial0:115200n8"; 55 }; 56 57 audio_clkout: audio-clkout { 58 /* 59 * This is same as <&rcar_sound 0> 60 * but needed to avoid cs2000/rcar_sound probe dead-lock 61 */ 62 compatible = "fixed-clock"; 63 #clock-cells = <0>; 64 clock-frequency = <12288000>; 65 }; 66 67 backlight: backlight { 68 compatible = "pwm-backlight"; 69 pwms = <&pwm1 0 50000>; 70 71 brightness-levels = <256 128 64 16 8 4 0>; 72 default-brightness-level = <6>; 73 74 power-supply = <®_12v>; 75 enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>; 76 }; 77 78 cvbs-in { 79 compatible = "composite-video-connector"; 80 label = "CVBS IN"; 81 82 port { 83 cvbs_con: endpoint { 84 remote-endpoint = <&adv7482_ain7>; 85 }; 86 }; 87 }; 88 89 hdmi-in { 90 compatible = "hdmi-connector"; 91 label = "HDMI IN"; 92 type = "a"; 93 94 port { 95 hdmi_in_con: endpoint { 96 remote-endpoint = <&adv7482_hdmi>; 97 }; 98 }; 99 }; 100 101 hdmi0-out { 102 compatible = "hdmi-connector"; 103 label = "HDMI0 OUT"; 104 type = "a"; 105 106 port { 107 hdmi0_con: endpoint { 108 remote-endpoint = <&rcar_dw_hdmi0_out>; 109 }; 110 }; 111 }; 112 113 hdmi1-out { 114 compatible = "hdmi-connector"; 115 label = "HDMI1 OUT"; 116 type = "a"; 117 118 port { 119 hdmi1_con: endpoint { 120 }; 121 }; 122 }; 123 124 keys { 125 compatible = "gpio-keys"; 126 127 pinctrl-0 = <&keys_pins>; 128 pinctrl-names = "default"; 129 130 key-1 { 131 gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; 132 linux,code = <KEY_1>; 133 label = "SW4-1"; 134 wakeup-source; 135 debounce-interval = <20>; 136 }; 137 key-2 { 138 gpios = <&gpio5 20 GPIO_ACTIVE_LOW>; 139 linux,code = <KEY_2>; 140 label = "SW4-2"; 141 wakeup-source; 142 debounce-interval = <20>; 143 }; 144 key-3 { 145 gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; 146 linux,code = <KEY_3>; 147 label = "SW4-3"; 148 wakeup-source; 149 debounce-interval = <20>; 150 }; 151 key-4 { 152 gpios = <&gpio5 23 GPIO_ACTIVE_LOW>; 153 linux,code = <KEY_4>; 154 label = "SW4-4"; 155 wakeup-source; 156 debounce-interval = <20>; 157 }; 158 key-a { 159 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; 160 linux,code = <KEY_A>; 161 label = "TSW0"; 162 wakeup-source; 163 debounce-interval = <20>; 164 }; 165 key-b { 166 gpios = <&gpio6 12 GPIO_ACTIVE_LOW>; 167 linux,code = <KEY_B>; 168 label = "TSW1"; 169 wakeup-source; 170 debounce-interval = <20>; 171 }; 172 key-c { 173 gpios = <&gpio6 13 GPIO_ACTIVE_LOW>; 174 linux,code = <KEY_C>; 175 label = "TSW2"; 176 wakeup-source; 177 debounce-interval = <20>; 178 }; 179 }; 180 181 reg_1p8v: regulator-1p8v { 182 compatible = "regulator-fixed"; 183 regulator-name = "fixed-1.8V"; 184 regulator-min-microvolt = <1800000>; 185 regulator-max-microvolt = <1800000>; 186 regulator-boot-on; 187 regulator-always-on; 188 }; 189 190 reg_3p3v: regulator-3p3v { 191 compatible = "regulator-fixed"; 192 regulator-name = "fixed-3.3V"; 193 regulator-min-microvolt = <3300000>; 194 regulator-max-microvolt = <3300000>; 195 regulator-boot-on; 196 regulator-always-on; 197 }; 198 199 reg_12v: regulator-12v { 200 compatible = "regulator-fixed"; 201 regulator-name = "fixed-12V"; 202 regulator-min-microvolt = <12000000>; 203 regulator-max-microvolt = <12000000>; 204 regulator-boot-on; 205 regulator-always-on; 206 }; 207 208 sound_card: sound { 209 compatible = "audio-graph-card"; 210 211 label = "rcar-sound"; 212 213 dais = <&rsnd_port0 /* ak4613 */ 214 &rsnd_port1 /* HDMI0 */ 215#ifdef SOC_HAS_HDMI1 216 &rsnd_port2 /* HDMI1 */ 217#endif 218 >; 219 }; 220 221 vbus0_usb2: regulator-vbus0-usb2 { 222 compatible = "regulator-fixed"; 223 224 regulator-name = "USB20_VBUS0"; 225 regulator-min-microvolt = <5000000>; 226 regulator-max-microvolt = <5000000>; 227 228 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>; 229 enable-active-high; 230 }; 231 232 vcc_sdhi0: regulator-vcc-sdhi0 { 233 compatible = "regulator-fixed"; 234 235 regulator-name = "SDHI0 Vcc"; 236 regulator-min-microvolt = <3300000>; 237 regulator-max-microvolt = <3300000>; 238 239 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; 240 enable-active-high; 241 }; 242 243 vccq_sdhi0: regulator-vccq-sdhi0 { 244 compatible = "regulator-gpio"; 245 246 regulator-name = "SDHI0 VccQ"; 247 regulator-min-microvolt = <1800000>; 248 regulator-max-microvolt = <3300000>; 249 250 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 251 gpios-states = <1>; 252 states = <3300000 1>, <1800000 0>; 253 }; 254 255 vcc_sdhi3: regulator-vcc-sdhi3 { 256 compatible = "regulator-fixed"; 257 258 regulator-name = "SDHI3 Vcc"; 259 regulator-min-microvolt = <3300000>; 260 regulator-max-microvolt = <3300000>; 261 262 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; 263 enable-active-high; 264 }; 265 266 vccq_sdhi3: regulator-vccq-sdhi3 { 267 compatible = "regulator-gpio"; 268 269 regulator-name = "SDHI3 VccQ"; 270 regulator-min-microvolt = <1800000>; 271 regulator-max-microvolt = <3300000>; 272 273 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 274 gpios-states = <1>; 275 states = <3300000 1>, <1800000 0>; 276 }; 277 278 vga { 279 compatible = "vga-connector"; 280 281 port { 282 vga_in: endpoint { 283 remote-endpoint = <&adv7123_out>; 284 }; 285 }; 286 }; 287 288 vga-encoder { 289 compatible = "adi,adv7123"; 290 291 ports { 292 #address-cells = <1>; 293 #size-cells = <0>; 294 295 port@0 { 296 reg = <0>; 297 adv7123_in: endpoint { 298 remote-endpoint = <&du_out_rgb>; 299 }; 300 }; 301 port@1 { 302 reg = <1>; 303 adv7123_out: endpoint { 304 remote-endpoint = <&vga_in>; 305 }; 306 }; 307 }; 308 }; 309 310 x12_clk: x12 { 311 compatible = "fixed-clock"; 312 #clock-cells = <0>; 313 clock-frequency = <24576000>; 314 }; 315 316 /* External DU dot clocks */ 317 x21_clk: x21-clock { 318 compatible = "fixed-clock"; 319 #clock-cells = <0>; 320 clock-frequency = <33000000>; 321 }; 322 323 x22_clk: x22-clock { 324 compatible = "fixed-clock"; 325 #clock-cells = <0>; 326 clock-frequency = <33000000>; 327 }; 328 329 x23_clk: x23-clock { 330 compatible = "fixed-clock"; 331 #clock-cells = <0>; 332 clock-frequency = <25000000>; 333 }; 334}; 335 336&a57_0 { 337 cpu-supply = <&dvfs>; 338}; 339 340&audio_clk_a { 341 clock-frequency = <22579200>; 342}; 343 344&avb { 345 pinctrl-0 = <&avb_pins>; 346 pinctrl-names = "default"; 347 phy-handle = <&phy0>; 348 tx-internal-delay-ps = <2000>; 349 status = "okay"; 350 351 phy0: ethernet-phy@0 { 352 compatible = "ethernet-phy-id0022.1622", 353 "ethernet-phy-ieee802.3-c22"; 354 rxc-skew-ps = <1500>; 355 reg = <0>; 356 interrupts-extended = <&gpio2 11 IRQ_TYPE_LEVEL_LOW>; 357 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; 358 }; 359}; 360 361&csi20 { 362 status = "okay"; 363 364 ports { 365 port@0 { 366 csi20_in: endpoint { 367 clock-lanes = <0>; 368 data-lanes = <1>; 369 remote-endpoint = <&adv7482_txb>; 370 }; 371 }; 372 }; 373}; 374 375&csi40 { 376 status = "okay"; 377 378 ports { 379 port@0 { 380 csi40_in: endpoint { 381 clock-lanes = <0>; 382 data-lanes = <1 2 3 4>; 383 remote-endpoint = <&adv7482_txa>; 384 }; 385 }; 386 }; 387}; 388 389&du { 390 pinctrl-0 = <&du_pins>; 391 pinctrl-names = "default"; 392 status = "okay"; 393 394 ports { 395 port@0 { 396 du_out_rgb: endpoint { 397 remote-endpoint = <&adv7123_in>; 398 }; 399 }; 400 }; 401}; 402 403&ehci0 { 404 dr_mode = "otg"; 405 status = "okay"; 406}; 407 408&ehci1 { 409 status = "okay"; 410}; 411 412&extalr_clk { 413 clock-frequency = <32768>; 414}; 415 416&hdmi0 { 417 status = "okay"; 418 419 ports { 420 port@1 { 421 reg = <1>; 422 rcar_dw_hdmi0_out: endpoint { 423 remote-endpoint = <&hdmi0_con>; 424 }; 425 }; 426 port@2 { 427 reg = <2>; 428 dw_hdmi0_snd_in: endpoint { 429 remote-endpoint = <&rsnd_endpoint1>; 430 }; 431 }; 432 }; 433}; 434 435#ifdef SOC_HAS_HDMI1 436&hdmi1 { 437 status = "okay"; 438 439 ports { 440 port@1 { 441 reg = <1>; 442 rcar_dw_hdmi1_out: endpoint { 443 remote-endpoint = <&hdmi1_con>; 444 }; 445 }; 446 port@2 { 447 reg = <2>; 448 dw_hdmi1_snd_in: endpoint { 449 remote-endpoint = <&rsnd_endpoint2>; 450 }; 451 }; 452 }; 453}; 454 455&hdmi1_con { 456 remote-endpoint = <&rcar_dw_hdmi1_out>; 457}; 458#endif /* SOC_HAS_HDMI1 */ 459 460&hscif1 { 461 pinctrl-0 = <&hscif1_pins>; 462 pinctrl-names = "default"; 463 464 uart-has-rtscts; 465 /* Please only enable hscif1 or scif1 */ 466 status = "okay"; 467}; 468 469&hsusb { 470 dr_mode = "otg"; 471 status = "okay"; 472}; 473 474&i2c2 { 475 pinctrl-0 = <&i2c2_pins>; 476 pinctrl-names = "default"; 477 478 status = "okay"; 479 480 clock-frequency = <100000>; 481 482 ak4613: codec@10 { 483 compatible = "asahi-kasei,ak4613"; 484 #sound-dai-cells = <0>; 485 reg = <0x10>; 486 clocks = <&rcar_sound 3>; 487 488 asahi-kasei,in1-single-end; 489 asahi-kasei,in2-single-end; 490 asahi-kasei,out1-single-end; 491 asahi-kasei,out2-single-end; 492 asahi-kasei,out3-single-end; 493 asahi-kasei,out4-single-end; 494 asahi-kasei,out5-single-end; 495 asahi-kasei,out6-single-end; 496 497 port { 498 ak4613_endpoint: endpoint { 499 remote-endpoint = <&rsnd_endpoint0>; 500 }; 501 }; 502 }; 503 504 cs2000: clk_multiplier@4f { 505 #clock-cells = <0>; 506 compatible = "cirrus,cs2000-cp"; 507 reg = <0x4f>; 508 clocks = <&audio_clkout>, <&x12_clk>; 509 clock-names = "clk_in", "ref_clk"; 510 511 assigned-clocks = <&cs2000>; 512 assigned-clock-rates = <24576000>; /* 1/1 divide */ 513 }; 514}; 515 516&i2c4 { 517 status = "okay"; 518 519 pca9654: gpio@20 { 520 compatible = "onnn,pca9654"; 521 reg = <0x20>; 522 gpio-controller; 523 #gpio-cells = <2>; 524 }; 525 526 video-receiver@70 { 527 compatible = "adi,adv7482"; 528 reg = <0x70 0x71 0x72 0x73 0x74 0x75 529 0x60 0x61 0x62 0x63 0x64 0x65>; 530 reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", 531 "infoframe", "cbus", "cec", "sdp", "txa", "txb" ; 532 533 interrupts-extended = <&gpio6 30 IRQ_TYPE_LEVEL_LOW>, 534 <&gpio6 31 IRQ_TYPE_LEVEL_LOW>; 535 interrupt-names = "intrq1", "intrq2"; 536 537 ports { 538 #address-cells = <1>; 539 #size-cells = <0>; 540 541 port@7 { 542 reg = <7>; 543 544 adv7482_ain7: endpoint { 545 remote-endpoint = <&cvbs_con>; 546 }; 547 }; 548 549 port@8 { 550 reg = <8>; 551 552 adv7482_hdmi: endpoint { 553 remote-endpoint = <&hdmi_in_con>; 554 }; 555 }; 556 557 port@a { 558 reg = <10>; 559 560 adv7482_txa: endpoint { 561 clock-lanes = <0>; 562 data-lanes = <1 2 3 4>; 563 remote-endpoint = <&csi40_in>; 564 }; 565 }; 566 567 port@b { 568 reg = <11>; 569 570 adv7482_txb: endpoint { 571 clock-lanes = <0>; 572 data-lanes = <1>; 573 remote-endpoint = <&csi20_in>; 574 }; 575 }; 576 }; 577 }; 578 579 csa_vdd: adc@7c { 580 compatible = "maxim,max9611"; 581 reg = <0x7c>; 582 583 shunt-resistor-micro-ohms = <5000>; 584 }; 585 586 csa_dvfs: adc@7f { 587 compatible = "maxim,max9611"; 588 reg = <0x7f>; 589 590 shunt-resistor-micro-ohms = <5000>; 591 }; 592}; 593 594&i2c_dvfs { 595 status = "okay"; 596 597 clock-frequency = <400000>; 598 599 pmic: pmic@30 { 600 pinctrl-0 = <&irq0_pins>; 601 pinctrl-names = "default"; 602 603 compatible = "rohm,bd9571mwv"; 604 reg = <0x30>; 605 interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_LOW>; 606 interrupt-controller; 607 #interrupt-cells = <2>; 608 gpio-controller; 609 #gpio-cells = <2>; 610 rohm,ddr-backup-power = <0xf>; 611 rohm,rstbmode-level; 612 613 regulators { 614 dvfs: dvfs { 615 regulator-name = "dvfs"; 616 regulator-min-microvolt = <750000>; 617 regulator-max-microvolt = <1030000>; 618 regulator-boot-on; 619 regulator-always-on; 620 }; 621 }; 622 }; 623 624 eeprom@50 { 625 compatible = "rohm,br24t01", "atmel,24c01"; 626 reg = <0x50>; 627 pagesize = <8>; 628 }; 629}; 630 631&ohci0 { 632 dr_mode = "otg"; 633 status = "okay"; 634}; 635 636&ohci1 { 637 status = "okay"; 638}; 639 640&pcie_bus_clk { 641 clock-frequency = <100000000>; 642}; 643 644&pciec0 { 645 status = "okay"; 646}; 647 648&pciec1 { 649 status = "okay"; 650}; 651 652&pfc { 653 pinctrl-0 = <&scif_clk_pins>; 654 pinctrl-names = "default"; 655 656 avb_pins: avb { 657 mux { 658 groups = "avb_link", "avb_mdio", "avb_mii"; 659 function = "avb"; 660 }; 661 662 pins_mdio { 663 groups = "avb_mdio"; 664 drive-strength = <24>; 665 }; 666 667 pins_mii_tx { 668 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0", 669 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3"; 670 drive-strength = <12>; 671 }; 672 }; 673 674 du_pins: du { 675 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0"; 676 function = "du"; 677 }; 678 679 hscif1_pins: hscif1 { 680 groups = "hscif1_data_a", "hscif1_ctrl_a"; 681 function = "hscif1"; 682 }; 683 684 i2c2_pins: i2c2 { 685 groups = "i2c2_a"; 686 function = "i2c2"; 687 }; 688 689 irq0_pins: irq0 { 690 groups = "intc_ex_irq0"; 691 function = "intc_ex"; 692 }; 693 694 keys_pins: keys { 695 pins = "GP_5_17", "GP_5_20", "GP_5_22"; 696 bias-pull-up; 697 }; 698 699 pwm1_pins: pwm1 { 700 groups = "pwm1_a"; 701 function = "pwm1"; 702 }; 703 704 scif1_pins: scif1 { 705 groups = "scif1_data_a", "scif1_ctrl"; 706 function = "scif1"; 707 }; 708 709 scif2_pins: scif2 { 710 groups = "scif2_data_a"; 711 function = "scif2"; 712 }; 713 714 scif_clk_pins: scif_clk { 715 groups = "scif_clk_a"; 716 function = "scif_clk"; 717 }; 718 719 sdhi0_pins: sd0 { 720 groups = "sdhi0_data4", "sdhi0_ctrl"; 721 function = "sdhi0"; 722 power-source = <3300>; 723 }; 724 725 sdhi0_pins_uhs: sd0_uhs { 726 groups = "sdhi0_data4", "sdhi0_ctrl"; 727 function = "sdhi0"; 728 power-source = <1800>; 729 }; 730 731 sdhi2_pins: sd2 { 732 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds"; 733 function = "sdhi2"; 734 power-source = <1800>; 735 }; 736 737 sdhi3_pins: sd3 { 738 groups = "sdhi3_data4", "sdhi3_ctrl"; 739 function = "sdhi3"; 740 power-source = <3300>; 741 }; 742 743 sdhi3_pins_uhs: sd3_uhs { 744 groups = "sdhi3_data4", "sdhi3_ctrl"; 745 function = "sdhi3"; 746 power-source = <1800>; 747 }; 748 749 sound_pins: sound { 750 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a"; 751 function = "ssi"; 752 }; 753 754 sound_clk_pins: sound_clk { 755 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a", 756 "audio_clkout_a", "audio_clkout3_a"; 757 function = "audio_clk"; 758 }; 759 760 usb0_pins: usb0 { 761 groups = "usb0"; 762 function = "usb0"; 763 }; 764 765 usb1_pins: usb1 { 766 mux { 767 groups = "usb1"; 768 function = "usb1"; 769 }; 770 771 ovc { 772 pins = "GP_6_27"; 773 bias-pull-up; 774 }; 775 776 pwen { 777 pins = "GP_6_26"; 778 bias-pull-down; 779 }; 780 }; 781 782 usb30_pins: usb30 { 783 groups = "usb30"; 784 function = "usb30"; 785 }; 786}; 787 788&pwm1 { 789 pinctrl-0 = <&pwm1_pins>; 790 pinctrl-names = "default"; 791 792 status = "okay"; 793}; 794 795&rcar_sound { 796 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>; 797 pinctrl-names = "default"; 798 799 /* audio_clkout0/1/2/3 */ 800 #clock-cells = <1>; 801 clock-frequency = <12288000 11289600>; 802 803 status = "okay"; 804 805 /* update <audio_clk_b> to <cs2000> */ 806 clocks = <&cpg CPG_MOD 1005>, 807 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 808 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 809 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 810 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 811 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 812 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 813 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 814 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 815 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 816 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 817 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 818 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 819 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 820 <&audio_clk_a>, <&cs2000>, 821 <&audio_clk_c>, 822 <&cpg CPG_MOD 922>; 823 824 ports { 825 #address-cells = <1>; 826 #size-cells = <0>; 827 rsnd_port0: port@0 { 828 reg = <0>; 829 rsnd_endpoint0: endpoint { 830 remote-endpoint = <&ak4613_endpoint>; 831 832 dai-format = "left_j"; 833 bitclock-master = <&rsnd_endpoint0>; 834 frame-master = <&rsnd_endpoint0>; 835 836 playback = <&ssi0>, <&src0>, <&dvc0>; 837 capture = <&ssi1>, <&src1>, <&dvc1>; 838 }; 839 }; 840 841 rsnd_port1: port@1 { 842 reg = <1>; 843 rsnd_endpoint1: endpoint { 844 remote-endpoint = <&dw_hdmi0_snd_in>; 845 846 dai-format = "i2s"; 847 bitclock-master = <&rsnd_endpoint1>; 848 frame-master = <&rsnd_endpoint1>; 849 850 playback = <&ssi2>; 851 }; 852 }; 853 854#ifdef SOC_HAS_HDMI1 855 rsnd_port2: port@2 { 856 reg = <2>; 857 rsnd_endpoint2: endpoint { 858 remote-endpoint = <&dw_hdmi1_snd_in>; 859 860 dai-format = "i2s"; 861 bitclock-master = <&rsnd_endpoint2>; 862 frame-master = <&rsnd_endpoint2>; 863 864 playback = <&ssi3>; 865 }; 866 }; 867#endif /* SOC_HAS_HDMI1 */ 868 }; 869}; 870 871&rpc { 872 /* Left disabled. To be enabled by firmware when unlocked. */ 873 874 flash@0 { 875 compatible = "cypress,hyperflash", "cfi-flash"; 876 reg = <0>; 877 878 partitions { 879 compatible = "fixed-partitions"; 880 #address-cells = <1>; 881 #size-cells = <1>; 882 883 bootparam@0 { 884 reg = <0x00000000 0x040000>; 885 read-only; 886 }; 887 bl2@40000 { 888 reg = <0x00040000 0x140000>; 889 read-only; 890 }; 891 cert_header_sa6@180000 { 892 reg = <0x00180000 0x040000>; 893 read-only; 894 }; 895 bl31@1c0000 { 896 reg = <0x001c0000 0x040000>; 897 read-only; 898 }; 899 tee@200000 { 900 reg = <0x00200000 0x440000>; 901 read-only; 902 }; 903 uboot@640000 { 904 reg = <0x00640000 0x100000>; 905 read-only; 906 }; 907 dtb@740000 { 908 reg = <0x00740000 0x080000>; 909 }; 910 kernel@7c0000 { 911 reg = <0x007c0000 0x1400000>; 912 }; 913 user@1bc0000 { 914 reg = <0x01bc0000 0x2440000>; 915 }; 916 }; 917 }; 918}; 919 920&rwdt { 921 timeout-sec = <60>; 922 status = "okay"; 923}; 924 925#ifdef SOC_HAS_SATA 926&sata { 927 status = "okay"; 928}; 929#endif /* SOC_HAS_SATA */ 930 931&scif1 { 932 pinctrl-0 = <&scif1_pins>; 933 pinctrl-names = "default"; 934 935 uart-has-rtscts; 936 /* Please only enable hscif1 or scif1 */ 937 /* status = "okay"; */ 938}; 939 940&scif2 { 941 pinctrl-0 = <&scif2_pins>; 942 pinctrl-names = "default"; 943 944 status = "okay"; 945}; 946 947&scif_clk { 948 clock-frequency = <14745600>; 949}; 950 951&sdhi0 { 952 pinctrl-0 = <&sdhi0_pins>; 953 pinctrl-1 = <&sdhi0_pins_uhs>; 954 pinctrl-names = "default", "state_uhs"; 955 956 vmmc-supply = <&vcc_sdhi0>; 957 vqmmc-supply = <&vccq_sdhi0>; 958 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; 959 wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 960 bus-width = <4>; 961 sd-uhs-sdr50; 962 sd-uhs-sdr104; 963 status = "okay"; 964}; 965 966&sdhi2 { 967 /* used for on-board 8bit eMMC */ 968 pinctrl-0 = <&sdhi2_pins>; 969 pinctrl-1 = <&sdhi2_pins>; 970 pinctrl-names = "default", "state_uhs"; 971 972 vmmc-supply = <®_3p3v>; 973 vqmmc-supply = <®_1p8v>; 974 bus-width = <8>; 975 mmc-hs200-1_8v; 976 mmc-hs400-1_8v; 977 no-sd; 978 no-sdio; 979 non-removable; 980 fixed-emmc-driver-type = <1>; 981 full-pwr-cycle-in-suspend; 982 status = "okay"; 983}; 984 985&sdhi3 { 986 pinctrl-0 = <&sdhi3_pins>; 987 pinctrl-1 = <&sdhi3_pins_uhs>; 988 pinctrl-names = "default", "state_uhs"; 989 990 vmmc-supply = <&vcc_sdhi3>; 991 vqmmc-supply = <&vccq_sdhi3>; 992 cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; 993 wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; 994 bus-width = <4>; 995 sd-uhs-sdr50; 996 sd-uhs-sdr104; 997 status = "okay"; 998}; 999 1000&ssi1 { 1001 shared-pin; 1002}; 1003 1004&usb_extal_clk { 1005 clock-frequency = <50000000>; 1006}; 1007 1008&usb2_phy0 { 1009 pinctrl-0 = <&usb0_pins>; 1010 pinctrl-names = "default"; 1011 1012 vbus-supply = <&vbus0_usb2>; 1013 status = "okay"; 1014}; 1015 1016&usb2_phy1 { 1017 pinctrl-0 = <&usb1_pins>; 1018 pinctrl-names = "default"; 1019 1020 status = "okay"; 1021}; 1022 1023&usb3_peri0 { 1024 phys = <&usb3_phy0>; 1025 phy-names = "usb"; 1026 1027 companion = <&xhci0>; 1028 1029 status = "okay"; 1030}; 1031 1032&usb3_phy0 { 1033 status = "okay"; 1034}; 1035 1036&usb3s0_clk { 1037 clock-frequency = <100000000>; 1038}; 1039 1040&vin0 { 1041 status = "okay"; 1042}; 1043 1044&vin1 { 1045 status = "okay"; 1046}; 1047 1048&vin2 { 1049 status = "okay"; 1050}; 1051 1052&vin3 { 1053 status = "okay"; 1054}; 1055 1056&vin4 { 1057 status = "okay"; 1058}; 1059 1060&vin5 { 1061 status = "okay"; 1062}; 1063 1064&vin6 { 1065 status = "okay"; 1066}; 1067 1068&vin7 { 1069 status = "okay"; 1070}; 1071 1072&xhci0 { 1073 pinctrl-0 = <&usb30_pins>; 1074 pinctrl-names = "default"; 1075 1076 status = "okay"; 1077}; 1078 1079#ifdef SOC_HAS_USB2_CH2 1080&ehci2 { 1081 status = "okay"; 1082}; 1083 1084&ohci2 { 1085 status = "okay"; 1086}; 1087 1088&pfc { 1089 usb2_pins: usb2 { 1090 groups = "usb2"; 1091 function = "usb2"; 1092 }; 1093}; 1094 1095&usb2_phy2 { 1096 pinctrl-0 = <&usb2_pins>; 1097 pinctrl-names = "default"; 1098 1099 status = "okay"; 1100}; 1101#endif /* SOC_HAS_USB2_CH2 */ 1102