1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the RZ SMARC Carrier-II Board. 4 * 5 * Copyright (C) 2023 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 11 12/ { 13 aliases { 14 i2c0 = &i2c0; 15 serial0 = &scif0; 16 mmc1 = &sdhi1; 17 }; 18 19 keys { 20 compatible = "gpio-keys"; 21 22 key-1 { 23 interrupts-extended = <&pinctrl RZG2L_GPIO(18, 0) IRQ_TYPE_EDGE_FALLING>; 24 linux,code = <KEY_1>; 25 label = "USER_SW1"; 26 wakeup-source; 27 debounce-interval = <20>; 28 }; 29 30 key-2 { 31 interrupts-extended = <&pinctrl RZG2L_GPIO(0, 1) IRQ_TYPE_EDGE_FALLING>; 32 linux,code = <KEY_2>; 33 label = "USER_SW2"; 34 wakeup-source; 35 debounce-interval = <20>; 36 }; 37 38 key-3 { 39 interrupts-extended = <&pinctrl RZG2L_GPIO(0, 3) IRQ_TYPE_EDGE_FALLING>; 40 linux,code = <KEY_3>; 41 label = "USER_SW3"; 42 wakeup-source; 43 debounce-interval = <20>; 44 }; 45 }; 46 47 vcc_sdhi1: regulator-vcc-sdhi1 { 48 compatible = "regulator-fixed"; 49 regulator-name = "SDHI1 Vcc"; 50 regulator-min-microvolt = <3300000>; 51 regulator-max-microvolt = <3300000>; 52 gpios = <&pinctrl RZG2L_GPIO(2, 3) GPIO_ACTIVE_HIGH>; 53 enable-active-high; 54 }; 55 56 vccq_sdhi1: regulator-vccq-sdhi1 { 57 compatible = "regulator-gpio"; 58 regulator-name = "SDHI1 VccQ"; 59 regulator-min-microvolt = <1800000>; 60 regulator-max-microvolt = <3300000>; 61 gpios = <&pinctrl RZG2L_GPIO(4, 2) GPIO_ACTIVE_HIGH>; 62 gpios-states = <1>; 63 states = <3300000 1>, <1800000 0>; 64 }; 65}; 66 67&i2c0 { 68 status = "okay"; 69 70 clock-frequency = <1000000>; 71}; 72 73&pinctrl { 74 key-1-gpio-hog { 75 gpio-hog; 76 gpios = <RZG2L_GPIO(18, 0) GPIO_ACTIVE_LOW>; 77 input; 78 line-name = "key-1-gpio-irq"; 79 }; 80 81 key-2-gpio-hog { 82 gpio-hog; 83 gpios = <RZG2L_GPIO(0, 1) GPIO_ACTIVE_LOW>; 84 input; 85 line-name = "key-2-gpio-irq"; 86 }; 87 88 key-3-gpio-hog { 89 gpio-hog; 90 gpios = <RZG2L_GPIO(0, 3) GPIO_ACTIVE_LOW>; 91 input; 92 line-name = "key-3-gpio-irq"; 93 }; 94 95 scif0_pins: scif0 { 96 pinmux = <RZG2L_PORT_PINMUX(6, 3, 1)>, /* RXD */ 97 <RZG2L_PORT_PINMUX(6, 4, 1)>; /* TXD */ 98 }; 99 100 sdhi1_pins: sd1 { 101 data { 102 pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 103 power-source = <3300>; 104 }; 105 106 ctrl { 107 pins = "SD1_CLK", "SD1_CMD"; 108 power-source = <3300>; 109 }; 110 111 cd { 112 pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */ 113 }; 114 }; 115 116 sdhi1_pins_uhs: sd1-uhs { 117 data { 118 pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3"; 119 power-source = <1800>; 120 }; 121 122 ctrl { 123 pins = "SD1_CLK", "SD1_CMD"; 124 power-source = <1800>; 125 }; 126 127 cd { 128 pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */ 129 }; 130 }; 131}; 132 133&scif0 { 134 pinctrl-names = "default"; 135 pinctrl-0 = <&scif0_pins>; 136 status = "okay"; 137}; 138 139&sdhi1 { 140 pinctrl-0 = <&sdhi1_pins>; 141 pinctrl-1 = <&sdhi1_pins_uhs>; 142 pinctrl-names = "default", "state_uhs"; 143 vmmc-supply = <&vcc_sdhi1>; 144 vqmmc-supply = <&vccq_sdhi1>; 145 bus-width = <4>; 146 sd-uhs-sdr50; 147 sd-uhs-sdr104; 148 max-frequency = <125000000>; 149 status = "okay"; 150}; 151