xref: /linux/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi (revision 7115816b609a491e767d8ee63ed2727048f51b5f)
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the R9A08G045S33 SMARC Carrier-II's SoM board.
4 *
5 * Copyright (C) 2023 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11/*
12 * Signals of SW_CONFIG switches:
13 * @SW_SD0_DEV_SEL:
14 *	0 - SD0 is connected to eMMC
15 *	1 - SD0 is connected to uSD0 card
16 */
17#define SW_SD0_DEV_SEL	1
18
19/ {
20	compatible = "renesas,rzg3s-smarcm", "renesas,r9a08g045s33", "renesas,r9a08g045";
21
22	aliases {
23		mmc0 = &sdhi0;
24	};
25
26	chosen {
27		bootargs = "ignore_loglevel";
28		stdout-path = "serial0:115200n8";
29	};
30
31	memory@48000000 {
32		device_type = "memory";
33		/* First 128MB is reserved for secure area. */
34		reg = <0x0 0x48000000 0x0 0x38000000>;
35	};
36
37	vcc_sdhi0: regulator0 {
38		compatible = "regulator-fixed";
39		regulator-name = "SDHI0 Vcc";
40		regulator-min-microvolt = <3300000>;
41		regulator-max-microvolt = <3300000>;
42		gpios = <&pinctrl RZG2L_GPIO(2, 1) GPIO_ACTIVE_HIGH>;
43		enable-active-high;
44	};
45
46#if SW_SD0_DEV_SEL
47	vccq_sdhi0: regulator1 {
48		compatible = "regulator-gpio";
49		regulator-name = "SDHI0 VccQ";
50		regulator-min-microvolt = <1800000>;
51		regulator-max-microvolt = <3300000>;
52		gpios = <&pinctrl RZG2L_GPIO(2, 2) GPIO_ACTIVE_HIGH>;
53		gpios-states = <1>;
54		states = <3300000 1>, <1800000 0>;
55	};
56#else
57	reg_1p8v: regulator1 {
58		compatible = "regulator-fixed";
59		regulator-name = "fixed-1.8V";
60		regulator-min-microvolt = <1800000>;
61		regulator-max-microvolt = <1800000>;
62		regulator-boot-on;
63		regulator-always-on;
64	};
65#endif
66};
67
68&extal_clk {
69	clock-frequency = <24000000>;
70};
71
72#if SW_SD0_DEV_SEL
73/* SD0 slot */
74&sdhi0 {
75	pinctrl-0 = <&sdhi0_pins>;
76	pinctrl-1 = <&sdhi0_uhs_pins>;
77	pinctrl-names = "default", "state_uhs";
78	vmmc-supply = <&vcc_sdhi0>;
79	vqmmc-supply = <&vccq_sdhi0>;
80	bus-width = <4>;
81	sd-uhs-sdr50;
82	sd-uhs-sdr104;
83	max-frequency = <125000000>;
84	status = "okay";
85};
86#else
87/* eMMC */
88&sdhi0 {
89	pinctrl-0 = <&sdhi0_emmc_pins>;
90	pinctrl-1 = <&sdhi0_emmc_pins>;
91	pinctrl-names = "default", "state_uhs";
92	vmmc-supply = <&vcc_sdhi0>;
93	vqmmc-supply = <&reg_1p8v>;
94	bus-width = <8>;
95	mmc-hs200-1_8v;
96	non-removable;
97	fixed-emmc-driver-type = <1>;
98	max-frequency = <125000000>;
99	status = "okay";
100};
101#endif
102
103&pinctrl {
104	sdhi0_pins: sd0 {
105		data {
106			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
107			power-source = <3300>;
108		};
109
110		ctrl {
111			pins = "SD0_CLK", "SD0_CMD";
112			power-source = <3300>;
113		};
114
115		cd {
116			pinmux = <RZG2L_PORT_PINMUX(0, 0, 1)>; /* SD0_CD */
117		};
118	};
119
120	sdhi0_uhs_pins: sd0-uhs {
121		data {
122			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
123			power-source = <1800>;
124		};
125
126		ctrl {
127			pins = "SD0_CLK", "SD0_CMD";
128			power-source = <1800>;
129		};
130
131		cd {
132			pinmux = <RZG2L_PORT_PINMUX(0, 0, 1)>; /* SD0_CD */
133		};
134	};
135
136	sdhi0_emmc_pins: sd0-emmc {
137		pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
138		       "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7",
139		       "SD0_CLK", "SD0_CMD", "SD0_RST#";
140		power-source = <1800>;
141	};
142};
143