xref: /linux/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi (revision ad30469a841b50dbb541df4d6971d891f703c297)
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8#include "rzg2ul-smarc-pinfunction.dtsi"
9#include "rz-smarc-common.dtsi"
10
11#if (!SW_ET0_EN_N)
12&canfd {
13	/delete-property/ pinctrl-0;
14	/delete-property/ pinctrl-names;
15	status = "disabled";
16};
17#endif
18
19&cpu_dai {
20	sound-dai = <&ssi1>;
21};
22
23&i2c0 {
24	clock-frequency = <400000>;
25
26	versa3: clock-generator@68 {
27		compatible = "renesas,5p35023";
28		reg = <0x68>;
29		#clock-cells = <1>;
30		clocks = <&x1>;
31
32		renesas,settings = [
33			80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
34			00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6
35			80 b0 45 c4 95
36		];
37
38		assigned-clocks = <&versa3 0>, <&versa3 1>,
39				  <&versa3 2>, <&versa3 3>,
40				  <&versa3 4>, <&versa3 5>;
41		assigned-clock-rates = <24000000>, <11289600>,
42				       <11289600>, <12000000>,
43				       <25000000>, <12288000>;
44	};
45};
46
47&i2c1 {
48	wm8978: codec@1a {
49		compatible = "wlf,wm8978";
50		#sound-dai-cells = <0>;
51		reg = <0x1a>;
52	};
53};
54
55#if PMOD_MTU3
56&mtu3 {
57	pinctrl-0 = <&mtu3_pins>;
58	pinctrl-names = "default";
59
60	status = "okay";
61};
62
63&spi1 {
64	status = "disabled";
65};
66#endif
67
68#if (SW_ET0_EN_N)
69&ssi1 {
70	pinctrl-0 = <&ssi1_pins>;
71	pinctrl-names = "default";
72
73	status = "okay";
74};
75#else
76&snd_rzg2l {
77	status = "disabled";
78};
79
80&spi1 {
81	/delete-property/ pinctrl-0;
82	/delete-property/ pinctrl-names;
83	status = "disabled";
84};
85
86&ssi1 {
87	/delete-property/ pinctrl-0;
88	/delete-property/ pinctrl-names;
89	status = "disabled";
90};
91#endif
92
93&vccq_sdhi1 {
94	gpios = <&pinctrl RZG2L_GPIO(6, 1) GPIO_ACTIVE_HIGH>;
95};
96