1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the RZ/G2LC SMARC EVK parts 4 * 5 * Copyright (C) 2022 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 10 11#include "rzg2lc-smarc-pinfunction.dtsi" 12#include "rz-smarc-common.dtsi" 13 14/ { 15 aliases { 16 serial1 = &scif1; 17 i2c2 = &i2c2; 18 }; 19 20 osc1: cec-clock { 21 compatible = "fixed-clock"; 22 #clock-cells = <0>; 23 clock-frequency = <12000000>; 24 }; 25 26 hdmi-out { 27 compatible = "hdmi-connector"; 28 type = "d"; 29 30 port { 31 hdmi_con_out: endpoint { 32 remote-endpoint = <&adv7535_out>; 33 }; 34 }; 35 }; 36 37#if (SW_I2S0_I2S1) 38 /delete-node/ sound; 39 40 sound_card { 41 compatible = "audio-graph-card"; 42 label = "HDMI-Audio"; 43 dais = <&i2s2_port>; 44 }; 45#endif 46}; 47 48#if (SW_SCIF_CAN || SW_RSPI_CAN) 49&canfd { 50 pinctrl-0 = <&can1_pins>; 51 /delete-node/ channel@0; 52}; 53#else 54&canfd { 55 /delete-property/ pinctrl-0; 56 /delete-property/ pinctrl-names; 57 status = "disabled"; 58}; 59#endif 60 61#if (!SW_I2S0_I2S1) 62&cpu_dai { 63 sound-dai = <&ssi0>; 64}; 65#endif 66 67&dsi { 68 status = "okay"; 69 70 ports { 71 port@1 { 72 dsi0_out: endpoint { 73 data-lanes = <1 2 3 4>; 74 remote-endpoint = <&adv7535_in>; 75 }; 76 }; 77 }; 78}; 79 80&du { 81 status = "okay"; 82}; 83 84&i2c1 { 85 adv7535: hdmi@3d { 86 compatible = "adi,adv7535"; 87 reg = <0x3d>; 88 89 interrupts-extended = <&pinctrl RZG2L_GPIO(43, 1) IRQ_TYPE_EDGE_FALLING>; 90 clocks = <&osc1>; 91 clock-names = "cec"; 92 avdd-supply = <®_1p8v>; 93 dvdd-supply = <®_1p8v>; 94 pvdd-supply = <®_1p8v>; 95 a2vdd-supply = <®_1p8v>; 96 v3p3-supply = <®_3p3v>; 97 v1p2-supply = <®_1p8v>; 98 99 adi,dsi-lanes = <4>; 100 101 ports { 102 #address-cells = <1>; 103 #size-cells = <0>; 104 105 port@0 { 106 reg = <0>; 107 adv7535_in: endpoint { 108 remote-endpoint = <&dsi0_out>; 109 }; 110 }; 111 112 port@1 { 113 reg = <1>; 114 adv7535_out: endpoint { 115 remote-endpoint = <&hdmi_con_out>; 116 }; 117 }; 118 119#if (SW_I2S0_I2S1) 120 port@2 { 121 reg = <2>; 122 codec_endpoint: endpoint { 123 remote-endpoint = <&i2s2_cpu_endpoint>; 124 }; 125 }; 126#endif 127 }; 128 }; 129}; 130 131&i2c2 { 132 pinctrl-0 = <&i2c2_pins>; 133 pinctrl-names = "default"; 134 clock-frequency = <400000>; 135 136 status = "okay"; 137 138 wm8978: codec@1a { 139 compatible = "wlf,wm8978"; 140 #sound-dai-cells = <0>; 141 reg = <0x1a>; 142 }; 143 144 versa3: clock-generator@68 { 145 compatible = "renesas,5p35023"; 146 reg = <0x68>; 147 #clock-cells = <1>; 148 clocks = <&x1>; 149 150 renesas,settings = [ 151 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf 152 00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6 153 80 b0 45 c4 95 154 ]; 155 156 assigned-clocks = <&versa3 0>, <&versa3 1>, 157 <&versa3 2>, <&versa3 3>, 158 <&versa3 4>, <&versa3 5>; 159 assigned-clock-rates = <24000000>, <11289600>, 160 <11289600>, <12000000>, 161 <25000000>, <12288000>; 162 }; 163}; 164 165#if PMOD_MTU3 166&mtu3 { 167 pinctrl-0 = <&mtu3_pins>; 168 pinctrl-names = "default"; 169 170 status = "okay"; 171}; 172 173&spi1 { 174 status = "disabled"; 175}; 176#endif 177 178/* 179 * To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board 180 * SW1 should be at position 2->3 so that SER0_CTS# line is activated 181 * SW2 should be at position 2->3 so that SER0_TX line is activated 182 * SW3 should be at position 2->3 so that SER0_RX line is activated 183 * SW4 should be at position 2->3 so that SER0_RTS# line is activated 184 */ 185#if (!SW_SCIF_CAN && PMOD1_SER0) 186&scif1 { 187 pinctrl-0 = <&scif1_pins>; 188 pinctrl-names = "default"; 189 190 uart-has-rtscts; 191 status = "okay"; 192}; 193#endif 194 195&ssi0 { 196 pinctrl-0 = <&ssi0_pins>; 197 pinctrl-names = "default"; 198 199 status = "okay"; 200 201#if (SW_I2S0_I2S1) 202 i2s2_port: port { 203 i2s2_cpu_endpoint: endpoint { 204 remote-endpoint = <&codec_endpoint>; 205 dai-format = "i2s"; 206 207 bitclock-master = <&i2s2_cpu_endpoint>; 208 frame-master = <&i2s2_cpu_endpoint>; 209 }; 210 }; 211#endif 212}; 213 214#if (SW_RSPI_CAN) 215&spi1 { 216 /delete-property/ pinctrl-0; 217 /delete-property/ pinctrl-names; 218 status = "disabled"; 219}; 220#endif 221 222&vccq_sdhi1 { 223 gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>; 224}; 225