xref: /linux/arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi (revision 34f7c6e7d4396090692a09789db231e12cb4762b)
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK common parts
4 *
5 * Copyright (C) 2021 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11/* comment the #define statement to disable SCIF2 (SER0) on PMOD1 (CN7) */
12#define PMOD1_SER0	1
13
14/ {
15	aliases {
16		serial1 = &scif2;
17	};
18};
19
20/*
21 * To enable SCIF2 (SER0) on PMOD1 (CN7)
22 * SW1 should be at position 2->3 so that SER0_CTS# line is activated
23 * SW2 should be at position 2->3 so that SER0_TX line is activated
24 * SW3 should be at position 2->3 so that SER0_RX line is activated
25 * SW4 should be at position 2->3 so that SER0_RTS# line is activated
26 */
27#if PMOD1_SER0
28&scif2 {
29	pinctrl-0 = <&scif2_pins>;
30	pinctrl-names = "default";
31
32	uart-has-rtscts;
33	status = "okay";
34};
35#endif
36