1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4M (R8A779H0) SoC 4 * 5 * Copyright (C) 2023 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/renesas,r8a779h0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/renesas,r8a779h0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779h0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* External Audio clock - to be overridden by boards that provide it */ 18 audio_clkin: audio_clkin { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <0>; 22 }; 23 24 /* External CAN clock - to be overridden by boards that provide it */ 25 can_clk: can-clk { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 cluster0_opp: opp-table-0 { 32 compatible = "operating-points-v2"; 33 34 opp-500000000 { 35 opp-hz = /bits/ 64 <500000000>; 36 opp-microvolt = <825000>; 37 clock-latency-ns = <500000>; 38 }; 39 opp-1000000000 { 40 opp-hz = /bits/ 64 <1000000000>; 41 opp-microvolt = <825000>; 42 clock-latency-ns = <500000>; 43 }; 44 }; 45 46 cpus { 47 #address-cells = <1>; 48 #size-cells = <0>; 49 50 cpu-map { 51 cluster0 { 52 core0 { 53 cpu = <&a76_0>; 54 }; 55 core1 { 56 cpu = <&a76_1>; 57 }; 58 core2 { 59 cpu = <&a76_2>; 60 }; 61 core3 { 62 cpu = <&a76_3>; 63 }; 64 }; 65 }; 66 67 a76_0: cpu@0 { 68 compatible = "arm,cortex-a76"; 69 reg = <0>; 70 device_type = "cpu"; 71 power-domains = <&sysc R8A779H0_PD_A1E0D0C0>; 72 next-level-cache = <&L3_CA76>; 73 enable-method = "psci"; 74 cpu-idle-states = <&CPU_SLEEP_0>; 75 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC0>; 76 operating-points-v2 = <&cluster0_opp>; 77 }; 78 79 a76_1: cpu@100 { 80 compatible = "arm,cortex-a76"; 81 reg = <0x100>; 82 device_type = "cpu"; 83 power-domains = <&sysc R8A779H0_PD_A1E0D0C1>; 84 next-level-cache = <&L3_CA76>; 85 enable-method = "psci"; 86 cpu-idle-states = <&CPU_SLEEP_0>; 87 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC1>; 88 operating-points-v2 = <&cluster0_opp>; 89 }; 90 91 a76_2: cpu@200 { 92 compatible = "arm,cortex-a76"; 93 reg = <0x200>; 94 device_type = "cpu"; 95 power-domains = <&sysc R8A779H0_PD_A1E0D0C2>; 96 next-level-cache = <&L3_CA76>; 97 enable-method = "psci"; 98 cpu-idle-states = <&CPU_SLEEP_0>; 99 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC2>; 100 operating-points-v2 = <&cluster0_opp>; 101 }; 102 103 a76_3: cpu@300 { 104 compatible = "arm,cortex-a76"; 105 reg = <0x300>; 106 device_type = "cpu"; 107 power-domains = <&sysc R8A779H0_PD_A1E0D0C3>; 108 next-level-cache = <&L3_CA76>; 109 enable-method = "psci"; 110 cpu-idle-states = <&CPU_SLEEP_0>; 111 clocks = <&cpg CPG_CORE R8A779H0_CLK_ZC3>; 112 operating-points-v2 = <&cluster0_opp>; 113 }; 114 115 idle-states { 116 entry-method = "psci"; 117 118 CPU_SLEEP_0: cpu-sleep-0 { 119 compatible = "arm,idle-state"; 120 arm,psci-suspend-param = <0x0010000>; 121 local-timer-stop; 122 entry-latency-us = <400>; 123 exit-latency-us = <500>; 124 min-residency-us = <4000>; 125 }; 126 }; 127 128 L3_CA76: cache-controller { 129 compatible = "cache"; 130 power-domains = <&sysc R8A779H0_PD_A2E0D0>; 131 cache-unified; 132 cache-level = <3>; 133 }; 134 }; 135 136 extal_clk: extal-clk { 137 compatible = "fixed-clock"; 138 #clock-cells = <0>; 139 /* This value must be overridden by the board */ 140 clock-frequency = <0>; 141 }; 142 143 extalr_clk: extalr-clk { 144 compatible = "fixed-clock"; 145 #clock-cells = <0>; 146 /* This value must be overridden by the board */ 147 clock-frequency = <0>; 148 }; 149 150 pcie0_clkref: pcie0-clkref { 151 compatible = "fixed-clock"; 152 #clock-cells = <0>; 153 /* This value must be overridden by the board */ 154 clock-frequency = <0>; 155 }; 156 157 pmu-a76 { 158 compatible = "arm,cortex-a76-pmu"; 159 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 160 }; 161 162 psci { 163 compatible = "arm,psci-1.0", "arm,psci-0.2"; 164 method = "smc"; 165 }; 166 167 /* External SCIF clocks - to be overridden by boards that provide them */ 168 scif_clk: scif-clk { 169 compatible = "fixed-clock"; 170 #clock-cells = <0>; 171 clock-frequency = <0>; 172 }; 173 174 scif_clk2: scif-clk2 { 175 compatible = "fixed-clock"; 176 #clock-cells = <0>; 177 clock-frequency = <0>; 178 }; 179 180 soc: soc { 181 compatible = "simple-bus"; 182 interrupt-parent = <&gic>; 183 #address-cells = <2>; 184 #size-cells = <2>; 185 ranges; 186 187 rwdt: watchdog@e6020000 { 188 compatible = "renesas,r8a779h0-wdt", 189 "renesas,rcar-gen4-wdt"; 190 reg = <0 0xe6020000 0 0x0c>; 191 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 192 clocks = <&cpg CPG_MOD 907>; 193 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 194 resets = <&cpg 907>; 195 status = "disabled"; 196 }; 197 198 pfc: pinctrl@e6050000 { 199 compatible = "renesas,pfc-r8a779h0"; 200 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 201 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 202 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 203 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>; 204 }; 205 206 gpio0: gpio@e6050180 { 207 compatible = "renesas,gpio-r8a779h0", 208 "renesas,rcar-gen4-gpio"; 209 reg = <0 0xe6050180 0 0x54>; 210 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 211 #gpio-cells = <2>; 212 gpio-controller; 213 gpio-ranges = <&pfc 0 0 19>; 214 #interrupt-cells = <2>; 215 interrupt-controller; 216 clocks = <&cpg CPG_MOD 915>; 217 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 218 resets = <&cpg 915>; 219 }; 220 221 gpio1: gpio@e6050980 { 222 compatible = "renesas,gpio-r8a779h0", 223 "renesas,rcar-gen4-gpio"; 224 reg = <0 0xe6050980 0 0x54>; 225 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 226 #gpio-cells = <2>; 227 gpio-controller; 228 gpio-ranges = <&pfc 0 32 30>; 229 #interrupt-cells = <2>; 230 interrupt-controller; 231 clocks = <&cpg CPG_MOD 915>; 232 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 233 resets = <&cpg 915>; 234 }; 235 236 gpio2: gpio@e6058180 { 237 compatible = "renesas,gpio-r8a779h0", 238 "renesas,rcar-gen4-gpio"; 239 reg = <0 0xe6058180 0 0x54>; 240 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 241 #gpio-cells = <2>; 242 gpio-controller; 243 gpio-ranges = <&pfc 0 64 20>; 244 #interrupt-cells = <2>; 245 interrupt-controller; 246 clocks = <&cpg CPG_MOD 916>; 247 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 248 resets = <&cpg 916>; 249 }; 250 251 gpio3: gpio@e6058980 { 252 compatible = "renesas,gpio-r8a779h0", 253 "renesas,rcar-gen4-gpio"; 254 reg = <0 0xe6058980 0 0x54>; 255 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 256 #gpio-cells = <2>; 257 gpio-controller; 258 gpio-ranges = <&pfc 0 96 32>; 259 #interrupt-cells = <2>; 260 interrupt-controller; 261 clocks = <&cpg CPG_MOD 916>; 262 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 263 resets = <&cpg 916>; 264 }; 265 266 gpio4: gpio@e6060180 { 267 compatible = "renesas,gpio-r8a779h0", 268 "renesas,rcar-gen4-gpio"; 269 reg = <0 0xe6060180 0 0x54>; 270 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 271 #gpio-cells = <2>; 272 gpio-controller; 273 gpio-ranges = <&pfc 0 128 25>; 274 #interrupt-cells = <2>; 275 interrupt-controller; 276 clocks = <&cpg CPG_MOD 917>; 277 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 278 resets = <&cpg 917>; 279 }; 280 281 gpio5: gpio@e6060980 { 282 compatible = "renesas,gpio-r8a779h0", 283 "renesas,rcar-gen4-gpio"; 284 reg = <0 0xe6060980 0 0x54>; 285 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 286 #gpio-cells = <2>; 287 gpio-controller; 288 gpio-ranges = <&pfc 0 160 21>; 289 #interrupt-cells = <2>; 290 interrupt-controller; 291 clocks = <&cpg CPG_MOD 917>; 292 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 293 resets = <&cpg 917>; 294 }; 295 296 gpio6: gpio@e6061180 { 297 compatible = "renesas,gpio-r8a779h0", 298 "renesas,rcar-gen4-gpio"; 299 reg = <0 0xe6061180 0 0x54>; 300 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 301 #gpio-cells = <2>; 302 gpio-controller; 303 gpio-ranges = <&pfc 0 192 21>; 304 #interrupt-cells = <2>; 305 interrupt-controller; 306 clocks = <&cpg CPG_MOD 917>; 307 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 308 resets = <&cpg 917>; 309 }; 310 311 gpio7: gpio@e6061980 { 312 compatible = "renesas,gpio-r8a779h0", 313 "renesas,rcar-gen4-gpio"; 314 reg = <0 0xe6061980 0 0x54>; 315 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 316 #gpio-cells = <2>; 317 gpio-controller; 318 gpio-ranges = <&pfc 0 224 21>; 319 #interrupt-cells = <2>; 320 interrupt-controller; 321 clocks = <&cpg CPG_MOD 917>; 322 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 323 resets = <&cpg 917>; 324 }; 325 326 cmt0: timer@e60f0000 { 327 compatible = "renesas,r8a779h0-cmt0", 328 "renesas,rcar-gen4-cmt0"; 329 reg = <0 0xe60f0000 0 0x1004>; 330 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 332 clocks = <&cpg CPG_MOD 910>; 333 clock-names = "fck"; 334 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 335 resets = <&cpg 910>; 336 status = "disabled"; 337 }; 338 339 cmt1: timer@e6130000 { 340 compatible = "renesas,r8a779h0-cmt1", 341 "renesas,rcar-gen4-cmt1"; 342 reg = <0 0xe6130000 0 0x1004>; 343 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 351 clocks = <&cpg CPG_MOD 911>; 352 clock-names = "fck"; 353 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 354 resets = <&cpg 911>; 355 status = "disabled"; 356 }; 357 358 cmt2: timer@e6140000 { 359 compatible = "renesas,r8a779h0-cmt1", 360 "renesas,rcar-gen4-cmt1"; 361 reg = <0 0xe6140000 0 0x1004>; 362 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 364 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 365 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 366 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 367 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 369 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 370 clocks = <&cpg CPG_MOD 912>; 371 clock-names = "fck"; 372 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 373 resets = <&cpg 912>; 374 status = "disabled"; 375 }; 376 377 cmt3: timer@e6148000 { 378 compatible = "renesas,r8a779h0-cmt1", 379 "renesas,rcar-gen4-cmt1"; 380 reg = <0 0xe6148000 0 0x1004>; 381 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 383 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 388 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 389 clocks = <&cpg CPG_MOD 913>; 390 clock-names = "fck"; 391 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 392 resets = <&cpg 913>; 393 status = "disabled"; 394 }; 395 396 cpg: clock-controller@e6150000 { 397 compatible = "renesas,r8a779h0-cpg-mssr"; 398 reg = <0 0xe6150000 0 0x4000>; 399 clocks = <&extal_clk>, <&extalr_clk>; 400 clock-names = "extal", "extalr"; 401 #clock-cells = <2>; 402 #power-domain-cells = <0>; 403 #reset-cells = <1>; 404 }; 405 406 rst: reset-controller@e6160000 { 407 compatible = "renesas,r8a779h0-rst"; 408 reg = <0 0xe6160000 0 0x4000>; 409 }; 410 411 sysc: system-controller@e6180000 { 412 compatible = "renesas,r8a779h0-sysc"; 413 reg = <0 0xe6180000 0 0x4000>; 414 #power-domain-cells = <1>; 415 }; 416 417 tsc: thermal@e6198000 { 418 compatible = "renesas,r8a779h0-thermal"; 419 reg = <0 0xe6198000 0 0x200>, 420 <0 0xe61a0000 0 0x200>; 421 clocks = <&cpg CPG_MOD 919>; 422 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 423 resets = <&cpg 919>; 424 #thermal-sensor-cells = <1>; 425 }; 426 427 otp: otp@e61be000 { 428 compatible = "renesas,r8a779h0-otp"; 429 reg = <0 0xe61be000 0 0x1000>, <0 0xe61bf000 0 0x1000>; 430 }; 431 432 intc_ex: interrupt-controller@e61c0000 { 433 compatible = "renesas,intc-ex-r8a779h0", "renesas,irqc"; 434 #interrupt-cells = <2>; 435 interrupt-controller; 436 reg = <0 0xe61c0000 0 0x200>; 437 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 438 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 439 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 441 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 442 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 443 clocks = <&cpg CPG_MOD 611>; 444 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 445 resets = <&cpg 611>; 446 }; 447 448 tmu0: timer@e61e0000 { 449 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 450 reg = <0 0xe61e0000 0 0x30>; 451 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 454 interrupt-names = "tuni0", "tuni1", "tuni2"; 455 clocks = <&cpg CPG_MOD 713>; 456 clock-names = "fck"; 457 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 458 resets = <&cpg 713>; 459 status = "disabled"; 460 }; 461 462 tmu1: timer@e6fc0000 { 463 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 464 reg = <0 0xe6fc0000 0 0x30>; 465 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 466 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 467 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 468 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>; 469 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 470 clocks = <&cpg CPG_MOD 714>; 471 clock-names = "fck"; 472 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 473 resets = <&cpg 714>; 474 status = "disabled"; 475 }; 476 477 tmu2: timer@e6fd0000 { 478 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 479 reg = <0 0xe6fd0000 0 0x30>; 480 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 481 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 482 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 483 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; 484 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 485 clocks = <&cpg CPG_MOD 715>; 486 clock-names = "fck"; 487 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 488 resets = <&cpg 715>; 489 status = "disabled"; 490 }; 491 492 tmu3: timer@e6fe0000 { 493 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 494 reg = <0 0xe6fe0000 0 0x30>; 495 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 496 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 497 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 498 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>; 499 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 500 clocks = <&cpg CPG_MOD 716>; 501 clock-names = "fck"; 502 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 503 resets = <&cpg 716>; 504 status = "disabled"; 505 }; 506 507 tmu4: timer@ffc00000 { 508 compatible = "renesas,tmu-r8a779h0", "renesas,tmu"; 509 reg = <0 0xffc00000 0 0x30>; 510 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 511 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 512 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 513 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 514 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 515 clocks = <&cpg CPG_MOD 717>; 516 clock-names = "fck"; 517 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 518 resets = <&cpg 717>; 519 status = "disabled"; 520 }; 521 522 i2c0: i2c@e6500000 { 523 compatible = "renesas,i2c-r8a779h0", 524 "renesas,rcar-gen4-i2c"; 525 reg = <0 0xe6500000 0 0x40>; 526 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 527 clocks = <&cpg CPG_MOD 518>; 528 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 529 resets = <&cpg 518>; 530 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 531 <&dmac2 0x91>, <&dmac2 0x90>; 532 dma-names = "tx", "rx", "tx", "rx"; 533 i2c-scl-internal-delay-ns = <110>; 534 #address-cells = <1>; 535 #size-cells = <0>; 536 status = "disabled"; 537 }; 538 539 i2c1: i2c@e6508000 { 540 compatible = "renesas,i2c-r8a779h0", 541 "renesas,rcar-gen4-i2c"; 542 reg = <0 0xe6508000 0 0x40>; 543 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 544 clocks = <&cpg CPG_MOD 519>; 545 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 546 resets = <&cpg 519>; 547 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 548 <&dmac2 0x93>, <&dmac2 0x92>; 549 dma-names = "tx", "rx", "tx", "rx"; 550 i2c-scl-internal-delay-ns = <110>; 551 #address-cells = <1>; 552 #size-cells = <0>; 553 status = "disabled"; 554 }; 555 556 i2c2: i2c@e6510000 { 557 compatible = "renesas,i2c-r8a779h0", 558 "renesas,rcar-gen4-i2c"; 559 reg = <0 0xe6510000 0 0x40>; 560 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 561 clocks = <&cpg CPG_MOD 520>; 562 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 563 resets = <&cpg 520>; 564 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 565 <&dmac2 0x95>, <&dmac2 0x94>; 566 dma-names = "tx", "rx", "tx", "rx"; 567 i2c-scl-internal-delay-ns = <110>; 568 #address-cells = <1>; 569 #size-cells = <0>; 570 status = "disabled"; 571 }; 572 573 i2c3: i2c@e66d0000 { 574 compatible = "renesas,i2c-r8a779h0", 575 "renesas,rcar-gen4-i2c"; 576 reg = <0 0xe66d0000 0 0x40>; 577 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 578 clocks = <&cpg CPG_MOD 521>; 579 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 580 resets = <&cpg 521>; 581 dmas = <&dmac1 0x97>, <&dmac1 0x96>, 582 <&dmac2 0x97>, <&dmac2 0x96>; 583 dma-names = "tx", "rx", "tx", "rx"; 584 i2c-scl-internal-delay-ns = <110>; 585 #address-cells = <1>; 586 #size-cells = <0>; 587 status = "disabled"; 588 }; 589 590 hscif0: serial@e6540000 { 591 compatible = "renesas,hscif-r8a779h0", 592 "renesas,rcar-gen4-hscif", "renesas,hscif"; 593 reg = <0 0xe6540000 0 0x60>; 594 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 514>, 596 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 597 <&scif_clk>; 598 clock-names = "fck", "brg_int", "scif_clk"; 599 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 600 resets = <&cpg 514>; 601 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 602 <&dmac2 0x31>, <&dmac2 0x30>; 603 dma-names = "tx", "rx", "tx", "rx"; 604 status = "disabled"; 605 }; 606 607 hscif1: serial@e6550000 { 608 compatible = "renesas,hscif-r8a779h0", 609 "renesas,rcar-gen4-hscif", "renesas,hscif"; 610 reg = <0 0xe6550000 0 0x60>; 611 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 515>, 613 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 614 <&scif_clk>; 615 clock-names = "fck", "brg_int", "scif_clk"; 616 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 617 resets = <&cpg 515>; 618 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 619 <&dmac2 0x33>, <&dmac2 0x32>; 620 dma-names = "tx", "rx", "tx", "rx"; 621 status = "disabled"; 622 }; 623 624 hscif2: serial@e6560000 { 625 compatible = "renesas,hscif-r8a779h0", 626 "renesas,rcar-gen4-hscif", "renesas,hscif"; 627 reg = <0 0xe6560000 0 0x60>; 628 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&cpg CPG_MOD 516>, 630 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 631 <&scif_clk2>; 632 clock-names = "fck", "brg_int", "scif_clk"; 633 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 634 resets = <&cpg 516>; 635 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 636 <&dmac2 0x35>, <&dmac2 0x34>; 637 dma-names = "tx", "rx", "tx", "rx"; 638 status = "disabled"; 639 }; 640 641 hscif3: serial@e66a0000 { 642 compatible = "renesas,hscif-r8a779h0", 643 "renesas,rcar-gen4-hscif", "renesas,hscif"; 644 reg = <0 0xe66a0000 0 0x60>; 645 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 646 clocks = <&cpg CPG_MOD 517>, 647 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 648 <&scif_clk>; 649 clock-names = "fck", "brg_int", "scif_clk"; 650 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 651 resets = <&cpg 517>; 652 dmas = <&dmac1 0x37>, <&dmac1 0x36>, 653 <&dmac2 0x37>, <&dmac2 0x36>; 654 dma-names = "tx", "rx", "tx", "rx"; 655 status = "disabled"; 656 }; 657 658 pciec0: pcie@e65d0000 { 659 compatible = "renesas,r8a779h0-pcie", 660 "renesas,rcar-gen4-pcie"; 661 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>, 662 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 663 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 664 <0 0xfe000000 0 0x400000>; 665 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 666 interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 667 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 668 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 669 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 670 interrupt-names = "msi", "dma", "sft_ce", "app"; 671 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 672 clock-names = "core", "ref"; 673 power-domains = <&sysc R8A779H0_PD_A2PCIPHY>; 674 resets = <&cpg 624>; 675 reset-names = "pwr"; 676 max-link-speed = <4>; 677 num-lanes = <2>; 678 #address-cells = <3>; 679 #size-cells = <2>; 680 bus-range = <0x00 0xff>; 681 device_type = "pci"; 682 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>, 683 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>; 684 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 685 #interrupt-cells = <1>; 686 interrupt-map-mask = <0 0 0 7>; 687 interrupt-map = <0 0 0 1 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 688 <0 0 0 2 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 689 <0 0 0 3 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 690 <0 0 0 4 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>; 691 snps,enable-cdm-check; 692 status = "disabled"; 693 }; 694 695 pciec0_ep: pcie-ep@e65d0000 { 696 compatible = "renesas,r8a779h0-pcie-ep", 697 "renesas,rcar-gen4-pcie-ep"; 698 reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>, 699 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 700 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 701 <0 0xfe000000 0 0x400000>; 702 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 703 interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 704 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 705 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 706 interrupt-names = "dma", "sft_ce", "app"; 707 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 708 clock-names = "core", "ref"; 709 power-domains = <&sysc R8A779H0_PD_A2PCIPHY>; 710 resets = <&cpg 624>; 711 reset-names = "pwr"; 712 max-link-speed = <4>; 713 num-lanes = <2>; 714 max-functions = /bits/ 8 <2>; 715 status = "disabled"; 716 }; 717 718 canfd: can@e6660000 { 719 compatible = "renesas,r8a779h0-canfd", 720 "renesas,rcar-gen4-canfd"; 721 reg = <0 0xe6660000 0 0x8500>; 722 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 723 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 724 interrupt-names = "ch_int", "g_int"; 725 clocks = <&cpg CPG_MOD 328>, 726 <&cpg CPG_CORE R8A779H0_CLK_CANFD>, 727 <&can_clk>; 728 clock-names = "fck", "canfd", "can_clk"; 729 assigned-clocks = <&cpg CPG_CORE R8A779H0_CLK_CANFD>; 730 assigned-clock-rates = <80000000>; 731 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 732 resets = <&cpg 328>; 733 status = "disabled"; 734 735 channel0 { 736 status = "disabled"; 737 }; 738 739 channel1 { 740 status = "disabled"; 741 }; 742 743 channel2 { 744 status = "disabled"; 745 }; 746 747 channel3 { 748 status = "disabled"; 749 }; 750 }; 751 752 avb0: ethernet@e6800000 { 753 compatible = "renesas,etheravb-r8a779h0", 754 "renesas,etheravb-rcar-gen4"; 755 reg = <0 0xe6800000 0 0x1000>; 756 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 757 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 760 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 761 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 781 interrupt-names = "ch0", "ch1", "ch2", "ch3", 782 "ch4", "ch5", "ch6", "ch7", 783 "ch8", "ch9", "ch10", "ch11", 784 "ch12", "ch13", "ch14", "ch15", 785 "ch16", "ch17", "ch18", "ch19", 786 "ch20", "ch21", "ch22", "ch23", 787 "ch24"; 788 clocks = <&cpg CPG_MOD 211>; 789 clock-names = "fck"; 790 power-domains = <&sysc R8A779H0_PD_C4>; 791 resets = <&cpg 211>; 792 phy-mode = "rgmii"; 793 rx-internal-delay-ps = <0>; 794 tx-internal-delay-ps = <0>; 795 iommus = <&ipmmu_hc 0>; 796 #address-cells = <1>; 797 #size-cells = <0>; 798 status = "disabled"; 799 }; 800 801 avb1: ethernet@e6810000 { 802 compatible = "renesas,etheravb-r8a779h0", 803 "renesas,etheravb-rcar-gen4"; 804 reg = <0 0xe6810000 0 0x1000>; 805 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 808 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 809 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 810 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 811 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 812 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 813 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 830 interrupt-names = "ch0", "ch1", "ch2", "ch3", 831 "ch4", "ch5", "ch6", "ch7", 832 "ch8", "ch9", "ch10", "ch11", 833 "ch12", "ch13", "ch14", "ch15", 834 "ch16", "ch17", "ch18", "ch19", 835 "ch20", "ch21", "ch22", "ch23", 836 "ch24"; 837 clocks = <&cpg CPG_MOD 212>; 838 clock-names = "fck"; 839 power-domains = <&sysc R8A779H0_PD_C4>; 840 resets = <&cpg 212>; 841 phy-mode = "rgmii"; 842 rx-internal-delay-ps = <0>; 843 tx-internal-delay-ps = <0>; 844 iommus = <&ipmmu_hc 1>; 845 #address-cells = <1>; 846 #size-cells = <0>; 847 status = "disabled"; 848 }; 849 850 avb2: ethernet@e6820000 { 851 compatible = "renesas,etheravb-r8a779h0", 852 "renesas,etheravb-rcar-gen4"; 853 reg = <0 0xe6820000 0 0x1000>; 854 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 855 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 879 interrupt-names = "ch0", "ch1", "ch2", "ch3", 880 "ch4", "ch5", "ch6", "ch7", 881 "ch8", "ch9", "ch10", "ch11", 882 "ch12", "ch13", "ch14", "ch15", 883 "ch16", "ch17", "ch18", "ch19", 884 "ch20", "ch21", "ch22", "ch23", 885 "ch24"; 886 clocks = <&cpg CPG_MOD 213>; 887 clock-names = "fck"; 888 power-domains = <&sysc R8A779H0_PD_C4>; 889 resets = <&cpg 213>; 890 phy-mode = "rgmii"; 891 rx-internal-delay-ps = <0>; 892 tx-internal-delay-ps = <0>; 893 iommus = <&ipmmu_hc 2>; 894 #address-cells = <1>; 895 #size-cells = <0>; 896 status = "disabled"; 897 }; 898 899 pwm0: pwm@e6e30000 { 900 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 901 reg = <0 0xe6e30000 0 0x10>; 902 #pwm-cells = <2>; 903 clocks = <&cpg CPG_MOD 628>; 904 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 905 resets = <&cpg 628>; 906 status = "disabled"; 907 }; 908 909 pwm1: pwm@e6e31000 { 910 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 911 reg = <0 0xe6e31000 0 0x10>; 912 #pwm-cells = <2>; 913 clocks = <&cpg CPG_MOD 628>; 914 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 915 resets = <&cpg 628>; 916 status = "disabled"; 917 }; 918 919 pwm2: pwm@e6e32000 { 920 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 921 reg = <0 0xe6e32000 0 0x10>; 922 #pwm-cells = <2>; 923 clocks = <&cpg CPG_MOD 628>; 924 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 925 resets = <&cpg 628>; 926 status = "disabled"; 927 }; 928 929 pwm3: pwm@e6e33000 { 930 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 931 reg = <0 0xe6e33000 0 0x10>; 932 #pwm-cells = <2>; 933 clocks = <&cpg CPG_MOD 628>; 934 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 935 resets = <&cpg 628>; 936 status = "disabled"; 937 }; 938 939 pwm4: pwm@e6e34000 { 940 compatible = "renesas,pwm-r8a779h0", "renesas,pwm-rcar"; 941 reg = <0 0xe6e34000 0 0x10>; 942 #pwm-cells = <2>; 943 clocks = <&cpg CPG_MOD 628>; 944 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 945 resets = <&cpg 628>; 946 status = "disabled"; 947 }; 948 949 scif0: serial@e6e60000 { 950 compatible = "renesas,scif-r8a779h0", 951 "renesas,rcar-gen4-scif", "renesas,scif"; 952 reg = <0 0xe6e60000 0 64>; 953 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 954 clocks = <&cpg CPG_MOD 702>, 955 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 956 <&scif_clk>; 957 clock-names = "fck", "brg_int", "scif_clk"; 958 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 959 resets = <&cpg 702>; 960 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 961 <&dmac2 0x51>, <&dmac2 0x50>; 962 dma-names = "tx", "rx", "tx", "rx"; 963 status = "disabled"; 964 }; 965 966 scif1: serial@e6e68000 { 967 compatible = "renesas,scif-r8a779h0", 968 "renesas,rcar-gen4-scif", "renesas,scif"; 969 reg = <0 0xe6e68000 0 64>; 970 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 971 clocks = <&cpg CPG_MOD 703>, 972 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 973 <&scif_clk>; 974 clock-names = "fck", "brg_int", "scif_clk"; 975 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 976 resets = <&cpg 703>; 977 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 978 <&dmac2 0x53>, <&dmac2 0x52>; 979 dma-names = "tx", "rx", "tx", "rx"; 980 status = "disabled"; 981 }; 982 983 scif3: serial@e6c50000 { 984 compatible = "renesas,scif-r8a779h0", 985 "renesas,rcar-gen4-scif", "renesas,scif"; 986 reg = <0 0xe6c50000 0 64>; 987 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 988 clocks = <&cpg CPG_MOD 704>, 989 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 990 <&scif_clk>; 991 clock-names = "fck", "brg_int", "scif_clk"; 992 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 993 resets = <&cpg 704>; 994 dmas = <&dmac1 0x57>, <&dmac1 0x56>, 995 <&dmac2 0x57>, <&dmac2 0x56>; 996 dma-names = "tx", "rx", "tx", "rx"; 997 status = "disabled"; 998 }; 999 1000 scif4: serial@e6c40000 { 1001 compatible = "renesas,scif-r8a779h0", 1002 "renesas,rcar-gen4-scif", "renesas,scif"; 1003 reg = <0 0xe6c40000 0 64>; 1004 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1005 clocks = <&cpg CPG_MOD 705>, 1006 <&cpg CPG_CORE R8A779H0_CLK_SASYNCPERD1>, 1007 <&scif_clk2>; 1008 clock-names = "fck", "brg_int", "scif_clk"; 1009 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1010 resets = <&cpg 705>; 1011 dmas = <&dmac1 0x59>, <&dmac1 0x58>, 1012 <&dmac2 0x59>, <&dmac2 0x58>; 1013 dma-names = "tx", "rx", "tx", "rx"; 1014 status = "disabled"; 1015 }; 1016 1017 msiof0: spi@e6e90000 { 1018 compatible = "renesas,msiof-r8a779h0", 1019 "renesas,rcar-gen4-msiof"; 1020 reg = <0 0xe6e90000 0 0x0064>; 1021 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1022 clocks = <&cpg CPG_MOD 618>; 1023 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1024 <&dmac2 0x41>, <&dmac2 0x40>; 1025 dma-names = "tx", "rx", "tx", "rx"; 1026 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1027 resets = <&cpg 618>; 1028 #address-cells = <1>; 1029 #size-cells = <0>; 1030 status = "disabled"; 1031 }; 1032 1033 msiof1: spi@e6ea0000 { 1034 compatible = "renesas,msiof-r8a779h0", 1035 "renesas,rcar-gen4-msiof"; 1036 reg = <0 0xe6ea0000 0 0x0064>; 1037 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1038 clocks = <&cpg CPG_MOD 619>; 1039 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1040 <&dmac2 0x43>, <&dmac2 0x42>; 1041 dma-names = "tx", "rx", "tx", "rx"; 1042 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1043 resets = <&cpg 619>; 1044 #address-cells = <1>; 1045 #size-cells = <0>; 1046 status = "disabled"; 1047 }; 1048 1049 msiof2: spi@e6c00000 { 1050 compatible = "renesas,msiof-r8a779h0", 1051 "renesas,rcar-gen4-msiof"; 1052 reg = <0 0xe6c00000 0 0x0064>; 1053 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1054 clocks = <&cpg CPG_MOD 620>; 1055 dmas = <&dmac1 0x45>, <&dmac1 0x44>, 1056 <&dmac2 0x45>, <&dmac2 0x44>; 1057 dma-names = "tx", "rx", "tx", "rx"; 1058 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1059 resets = <&cpg 620>; 1060 #address-cells = <1>; 1061 #size-cells = <0>; 1062 status = "disabled"; 1063 }; 1064 1065 msiof3: spi@e6c10000 { 1066 compatible = "renesas,msiof-r8a779h0", 1067 "renesas,rcar-gen4-msiof"; 1068 reg = <0 0xe6c10000 0 0x0064>; 1069 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1070 clocks = <&cpg CPG_MOD 621>; 1071 dmas = <&dmac1 0x47>, <&dmac1 0x46>, 1072 <&dmac2 0x47>, <&dmac2 0x46>; 1073 dma-names = "tx", "rx", "tx", "rx"; 1074 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1075 resets = <&cpg 621>; 1076 #address-cells = <1>; 1077 #size-cells = <0>; 1078 status = "disabled"; 1079 }; 1080 1081 msiof4: spi@e6c20000 { 1082 compatible = "renesas,msiof-r8a779h0", 1083 "renesas,rcar-gen4-msiof"; 1084 reg = <0 0xe6c20000 0 0x0064>; 1085 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1086 clocks = <&cpg CPG_MOD 622>; 1087 dmas = <&dmac1 0x49>, <&dmac1 0x48>, 1088 <&dmac2 0x49>, <&dmac2 0x48>; 1089 dma-names = "tx", "rx", "tx", "rx"; 1090 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1091 resets = <&cpg 622>; 1092 #address-cells = <1>; 1093 #size-cells = <0>; 1094 status = "disabled"; 1095 }; 1096 1097 msiof5: spi@e6c28000 { 1098 compatible = "renesas,msiof-r8a779h0", 1099 "renesas,rcar-gen4-msiof"; 1100 reg = <0 0xe6c28000 0 0x0064>; 1101 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1102 clocks = <&cpg CPG_MOD 623>; 1103 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>, 1104 <&dmac2 0x4b>, <&dmac2 0x4a>; 1105 dma-names = "tx", "rx", "tx", "rx"; 1106 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1107 resets = <&cpg 623>; 1108 #address-cells = <1>; 1109 #size-cells = <0>; 1110 status = "disabled"; 1111 }; 1112 1113 vin00: video@e6ef0000 { 1114 compatible = "renesas,vin-r8a779h0", 1115 "renesas,rcar-gen4-vin"; 1116 reg = <0 0xe6ef0000 0 0x1000>; 1117 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; 1118 clocks = <&cpg CPG_MOD 730>; 1119 power-domains = <&sysc R8A779H0_PD_C4>; 1120 resets = <&cpg 730>; 1121 renesas,id = <0>; 1122 status = "disabled"; 1123 1124 ports { 1125 #address-cells = <1>; 1126 #size-cells = <0>; 1127 1128 port@2 { 1129 #address-cells = <1>; 1130 #size-cells = <0>; 1131 1132 reg = <2>; 1133 1134 vin00isp0: endpoint@0 { 1135 reg = <0>; 1136 remote-endpoint = <&isp0vin00>; 1137 }; 1138 }; 1139 }; 1140 }; 1141 1142 vin01: video@e6ef1000 { 1143 compatible = "renesas,vin-r8a779h0", 1144 "renesas,rcar-gen4-vin"; 1145 reg = <0 0xe6ef1000 0 0x1000>; 1146 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; 1147 clocks = <&cpg CPG_MOD 731>; 1148 power-domains = <&sysc R8A779H0_PD_C4>; 1149 resets = <&cpg 731>; 1150 renesas,id = <1>; 1151 status = "disabled"; 1152 1153 ports { 1154 #address-cells = <1>; 1155 #size-cells = <0>; 1156 1157 port@2 { 1158 #address-cells = <1>; 1159 #size-cells = <0>; 1160 1161 reg = <2>; 1162 1163 vin01isp0: endpoint@0 { 1164 reg = <0>; 1165 remote-endpoint = <&isp0vin01>; 1166 }; 1167 }; 1168 }; 1169 }; 1170 1171 vin02: video@e6ef2000 { 1172 compatible = "renesas,vin-r8a779h0", 1173 "renesas,rcar-gen4-vin"; 1174 reg = <0 0xe6ef2000 0 0x1000>; 1175 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; 1176 clocks = <&cpg CPG_MOD 800>; 1177 power-domains = <&sysc R8A779H0_PD_C4>; 1178 resets = <&cpg 800>; 1179 renesas,id = <2>; 1180 status = "disabled"; 1181 1182 ports { 1183 #address-cells = <1>; 1184 #size-cells = <0>; 1185 1186 port@2 { 1187 #address-cells = <1>; 1188 #size-cells = <0>; 1189 1190 reg = <2>; 1191 1192 vin02isp0: endpoint@0 { 1193 reg = <0>; 1194 remote-endpoint = <&isp0vin02>; 1195 }; 1196 }; 1197 }; 1198 }; 1199 1200 vin03: video@e6ef3000 { 1201 compatible = "renesas,vin-r8a779h0", 1202 "renesas,rcar-gen4-vin"; 1203 reg = <0 0xe6ef3000 0 0x1000>; 1204 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; 1205 clocks = <&cpg CPG_MOD 801>; 1206 power-domains = <&sysc R8A779H0_PD_C4>; 1207 resets = <&cpg 801>; 1208 renesas,id = <3>; 1209 status = "disabled"; 1210 1211 ports { 1212 #address-cells = <1>; 1213 #size-cells = <0>; 1214 1215 port@2 { 1216 #address-cells = <1>; 1217 #size-cells = <0>; 1218 1219 reg = <2>; 1220 1221 vin03isp0: endpoint@0 { 1222 reg = <0>; 1223 remote-endpoint = <&isp0vin03>; 1224 }; 1225 }; 1226 }; 1227 }; 1228 1229 vin04: video@e6ef4000 { 1230 compatible = "renesas,vin-r8a779h0", 1231 "renesas,rcar-gen4-vin"; 1232 reg = <0 0xe6ef4000 0 0x1000>; 1233 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; 1234 clocks = <&cpg CPG_MOD 802>; 1235 power-domains = <&sysc R8A779H0_PD_C4>; 1236 resets = <&cpg 802>; 1237 renesas,id = <4>; 1238 status = "disabled"; 1239 1240 ports { 1241 #address-cells = <1>; 1242 #size-cells = <0>; 1243 1244 port@2 { 1245 #address-cells = <1>; 1246 #size-cells = <0>; 1247 1248 reg = <2>; 1249 1250 vin04isp0: endpoint@0 { 1251 reg = <0>; 1252 remote-endpoint = <&isp0vin04>; 1253 }; 1254 }; 1255 }; 1256 }; 1257 1258 vin05: video@e6ef5000 { 1259 compatible = "renesas,vin-r8a779h0", 1260 "renesas,rcar-gen4-vin"; 1261 reg = <0 0xe6ef5000 0 0x1000>; 1262 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; 1263 clocks = <&cpg CPG_MOD 803>; 1264 power-domains = <&sysc R8A779H0_PD_C4>; 1265 resets = <&cpg 803>; 1266 renesas,id = <5>; 1267 status = "disabled"; 1268 1269 ports { 1270 #address-cells = <1>; 1271 #size-cells = <0>; 1272 1273 port@2 { 1274 #address-cells = <1>; 1275 #size-cells = <0>; 1276 1277 reg = <2>; 1278 1279 vin05isp0: endpoint@0 { 1280 reg = <0>; 1281 remote-endpoint = <&isp0vin05>; 1282 }; 1283 }; 1284 }; 1285 }; 1286 1287 vin06: video@e6ef6000 { 1288 compatible = "renesas,vin-r8a779h0", 1289 "renesas,rcar-gen4-vin"; 1290 reg = <0 0xe6ef6000 0 0x1000>; 1291 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; 1292 clocks = <&cpg CPG_MOD 804>; 1293 power-domains = <&sysc R8A779H0_PD_C4>; 1294 resets = <&cpg 804>; 1295 renesas,id = <6>; 1296 status = "disabled"; 1297 1298 ports { 1299 #address-cells = <1>; 1300 #size-cells = <0>; 1301 1302 port@2 { 1303 #address-cells = <1>; 1304 #size-cells = <0>; 1305 1306 reg = <2>; 1307 1308 vin06isp0: endpoint@0 { 1309 reg = <0>; 1310 remote-endpoint = <&isp0vin06>; 1311 }; 1312 }; 1313 }; 1314 }; 1315 1316 vin07: video@e6ef7000 { 1317 compatible = "renesas,vin-r8a779h0", 1318 "renesas,rcar-gen4-vin"; 1319 reg = <0 0xe6ef7000 0 0x1000>; 1320 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; 1321 clocks = <&cpg CPG_MOD 805>; 1322 power-domains = <&sysc R8A779H0_PD_C4>; 1323 resets = <&cpg 805>; 1324 renesas,id = <7>; 1325 status = "disabled"; 1326 1327 ports { 1328 #address-cells = <1>; 1329 #size-cells = <0>; 1330 1331 port@2 { 1332 #address-cells = <1>; 1333 #size-cells = <0>; 1334 1335 reg = <2>; 1336 1337 vin07isp0: endpoint@0 { 1338 reg = <0>; 1339 remote-endpoint = <&isp0vin07>; 1340 }; 1341 }; 1342 }; 1343 }; 1344 1345 vin08: video@e6ef8000 { 1346 compatible = "renesas,vin-r8a779h0", 1347 "renesas,rcar-gen4-vin"; 1348 reg = <0 0xe6ef8000 0 0x1000>; 1349 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; 1350 clocks = <&cpg CPG_MOD 806>; 1351 power-domains = <&sysc R8A779H0_PD_C4>; 1352 resets = <&cpg 806>; 1353 renesas,id = <8>; 1354 status = "disabled"; 1355 1356 ports { 1357 #address-cells = <1>; 1358 #size-cells = <0>; 1359 1360 port@2 { 1361 #address-cells = <1>; 1362 #size-cells = <0>; 1363 1364 reg = <2>; 1365 1366 vin08isp1: endpoint@1 { 1367 reg = <1>; 1368 remote-endpoint = <&isp1vin08>; 1369 }; 1370 }; 1371 }; 1372 }; 1373 1374 vin09: video@e6ef9000 { 1375 compatible = "renesas,vin-r8a779h0", 1376 "renesas,rcar-gen4-vin"; 1377 reg = <0 0xe6ef9000 0 0x1000>; 1378 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; 1379 clocks = <&cpg CPG_MOD 807>; 1380 power-domains = <&sysc R8A779H0_PD_C4>; 1381 resets = <&cpg 807>; 1382 renesas,id = <9>; 1383 status = "disabled"; 1384 1385 ports { 1386 #address-cells = <1>; 1387 #size-cells = <0>; 1388 1389 port@2 { 1390 #address-cells = <1>; 1391 #size-cells = <0>; 1392 1393 reg = <2>; 1394 1395 vin09isp1: endpoint@1 { 1396 reg = <1>; 1397 remote-endpoint = <&isp1vin09>; 1398 }; 1399 }; 1400 }; 1401 }; 1402 1403 vin10: video@e6efa000 { 1404 compatible = "renesas,vin-r8a779h0", 1405 "renesas,rcar-gen4-vin"; 1406 reg = <0 0xe6efa000 0 0x1000>; 1407 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; 1408 clocks = <&cpg CPG_MOD 808>; 1409 power-domains = <&sysc R8A779H0_PD_C4>; 1410 resets = <&cpg 808>; 1411 renesas,id = <10>; 1412 status = "disabled"; 1413 1414 ports { 1415 #address-cells = <1>; 1416 #size-cells = <0>; 1417 1418 port@2 { 1419 #address-cells = <1>; 1420 #size-cells = <0>; 1421 1422 reg = <2>; 1423 1424 vin10isp1: endpoint@1 { 1425 reg = <1>; 1426 remote-endpoint = <&isp1vin10>; 1427 }; 1428 }; 1429 }; 1430 }; 1431 1432 vin11: video@e6efb000 { 1433 compatible = "renesas,vin-r8a779h0", 1434 "renesas,rcar-gen4-vin"; 1435 reg = <0 0xe6efb000 0 0x1000>; 1436 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; 1437 clocks = <&cpg CPG_MOD 809>; 1438 power-domains = <&sysc R8A779H0_PD_C4>; 1439 resets = <&cpg 809>; 1440 renesas,id = <11>; 1441 status = "disabled"; 1442 1443 ports { 1444 #address-cells = <1>; 1445 #size-cells = <0>; 1446 1447 port@2 { 1448 #address-cells = <1>; 1449 #size-cells = <0>; 1450 1451 reg = <2>; 1452 1453 vin11isp1: endpoint@1 { 1454 reg = <1>; 1455 remote-endpoint = <&isp1vin11>; 1456 }; 1457 }; 1458 }; 1459 }; 1460 1461 vin12: video@e6efc000 { 1462 compatible = "renesas,vin-r8a779h0", 1463 "renesas,rcar-gen4-vin"; 1464 reg = <0 0xe6efc000 0 0x1000>; 1465 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; 1466 clocks = <&cpg CPG_MOD 810>; 1467 power-domains = <&sysc R8A779H0_PD_C4>; 1468 resets = <&cpg 810>; 1469 renesas,id = <12>; 1470 status = "disabled"; 1471 1472 ports { 1473 #address-cells = <1>; 1474 #size-cells = <0>; 1475 1476 port@2 { 1477 #address-cells = <1>; 1478 #size-cells = <0>; 1479 1480 reg = <2>; 1481 1482 vin12isp1: endpoint@1 { 1483 reg = <1>; 1484 remote-endpoint = <&isp1vin12>; 1485 }; 1486 }; 1487 }; 1488 }; 1489 1490 vin13: video@e6efd000 { 1491 compatible = "renesas,vin-r8a779h0", 1492 "renesas,rcar-gen4-vin"; 1493 reg = <0 0xe6efd000 0 0x1000>; 1494 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; 1495 clocks = <&cpg CPG_MOD 811>; 1496 power-domains = <&sysc R8A779H0_PD_C4>; 1497 resets = <&cpg 811>; 1498 renesas,id = <13>; 1499 status = "disabled"; 1500 1501 ports { 1502 #address-cells = <1>; 1503 #size-cells = <0>; 1504 1505 port@2 { 1506 #address-cells = <1>; 1507 #size-cells = <0>; 1508 1509 reg = <2>; 1510 1511 vin13isp1: endpoint@1 { 1512 reg = <1>; 1513 remote-endpoint = <&isp1vin13>; 1514 }; 1515 }; 1516 }; 1517 }; 1518 1519 vin14: video@e6efe000 { 1520 compatible = "renesas,vin-r8a779h0", 1521 "renesas,rcar-gen4-vin"; 1522 reg = <0 0xe6efe000 0 0x1000>; 1523 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; 1524 clocks = <&cpg CPG_MOD 812>; 1525 power-domains = <&sysc R8A779H0_PD_C4>; 1526 resets = <&cpg 812>; 1527 renesas,id = <14>; 1528 status = "disabled"; 1529 1530 ports { 1531 #address-cells = <1>; 1532 #size-cells = <0>; 1533 1534 port@2 { 1535 #address-cells = <1>; 1536 #size-cells = <0>; 1537 1538 reg = <2>; 1539 1540 vin14isp1: endpoint@1 { 1541 reg = <1>; 1542 remote-endpoint = <&isp1vin14>; 1543 }; 1544 }; 1545 }; 1546 }; 1547 1548 vin15: video@e6eff000 { 1549 compatible = "renesas,vin-r8a779h0", 1550 "renesas,rcar-gen4-vin"; 1551 reg = <0 0xe6eff000 0 0x1000>; 1552 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; 1553 clocks = <&cpg CPG_MOD 813>; 1554 power-domains = <&sysc R8A779H0_PD_C4>; 1555 resets = <&cpg 813>; 1556 renesas,id = <15>; 1557 status = "disabled"; 1558 1559 ports { 1560 #address-cells = <1>; 1561 #size-cells = <0>; 1562 1563 port@2 { 1564 #address-cells = <1>; 1565 #size-cells = <0>; 1566 1567 reg = <2>; 1568 1569 vin15isp1: endpoint@1 { 1570 reg = <1>; 1571 remote-endpoint = <&isp1vin15>; 1572 }; 1573 }; 1574 }; 1575 }; 1576 1577 dmac1: dma-controller@e7350000 { 1578 compatible = "renesas,dmac-r8a779h0", 1579 "renesas,rcar-gen4-dmac"; 1580 reg = <0 0xe7350000 0 0x1000>, 1581 <0 0xe7300000 0 0x10000>; 1582 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 1583 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 1584 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 1585 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 1586 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 1587 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 1588 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 1589 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 1590 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 1591 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1592 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 1593 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 1594 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 1595 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1596 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1597 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1598 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 1599 interrupt-names = "error", 1600 "ch0", "ch1", "ch2", "ch3", "ch4", 1601 "ch5", "ch6", "ch7", "ch8", "ch9", 1602 "ch10", "ch11", "ch12", "ch13", 1603 "ch14", "ch15"; 1604 clocks = <&cpg CPG_MOD 709>; 1605 clock-names = "fck"; 1606 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1607 resets = <&cpg 709>; 1608 #dma-cells = <1>; 1609 dma-channels = <16>; 1610 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1611 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1612 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1613 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1614 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1615 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1616 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1617 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1618 }; 1619 1620 dmac2: dma-controller@e7351000 { 1621 compatible = "renesas,dmac-r8a779h0", 1622 "renesas,rcar-gen4-dmac"; 1623 reg = <0 0xe7351000 0 0x1000>, 1624 <0 0xe7310000 0 0x10000>; 1625 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1626 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1627 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1628 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1629 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1630 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1631 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1632 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1633 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 1634 interrupt-names = "error", 1635 "ch0", "ch1", "ch2", "ch3", "ch4", 1636 "ch5", "ch6", "ch7"; 1637 clocks = <&cpg CPG_MOD 710>; 1638 clock-names = "fck"; 1639 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1640 resets = <&cpg 710>; 1641 #dma-cells = <1>; 1642 dma-channels = <8>; 1643 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, 1644 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, 1645 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, 1646 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>; 1647 }; 1648 1649 rcar_sound: sound@ec400000 { 1650 compatible = "renesas,rcar_sound-r8a779h0", "renesas,rcar_sound-gen4"; 1651 reg = <0 0xec400000 0 0x40000>, 1652 <0 0xec540000 0 0x1000>, 1653 <0 0xec541000 0 0x050>, 1654 <0 0xec5a0000 0 0x020>; 1655 reg-names = "sdmc", "ssiu", "ssi", "adg"; 1656 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; 1657 clock-names = "ssiu.0", "ssi.0", "clkin"; 1658 /* #clock-cells is fixed */ 1659 #clock-cells = <0>; 1660 /* #sound-dai-cells is fixed */ 1661 #sound-dai-cells = <0>; 1662 1663 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1664 resets = <&cpg 2926>, <&cpg 2927>; 1665 reset-names = "ssiu.0", "ssi.0"; 1666 status = "disabled"; 1667 1668 rcar_sound,ssiu { 1669 ssiu00: ssiu-0 { 1670 dmas = <&dmac1 0x6e>, <&dmac1 0x6f>; 1671 dma-names = "tx", "rx"; 1672 }; 1673 ssiu01: ssiu-1 { 1674 dmas = <&dmac1 0x6c>, <&dmac1 0x6d>; 1675 dma-names = "tx", "rx"; 1676 }; 1677 ssiu02: ssiu-2 { 1678 dmas = <&dmac1 0x6a>, <&dmac1 0x6b>; 1679 dma-names = "tx", "rx"; 1680 }; 1681 ssiu03: ssiu-3 { 1682 dmas = <&dmac1 0x68>, <&dmac1 0x69>; 1683 dma-names = "tx", "rx"; 1684 }; 1685 ssiu04: ssiu-4 { 1686 dmas = <&dmac1 0x66>, <&dmac1 0x67>; 1687 dma-names = "tx", "rx"; 1688 }; 1689 ssiu05: ssiu-5 { 1690 dmas = <&dmac1 0x64>, <&dmac1 0x65>; 1691 dma-names = "tx", "rx"; 1692 }; 1693 ssiu06: ssiu-6 { 1694 dmas = <&dmac1 0x62>, <&dmac1 0x63>; 1695 dma-names = "tx", "rx"; 1696 }; 1697 ssiu07: ssiu-7 { 1698 dmas = <&dmac1 0x60>, <&dmac1 0x61>; 1699 dma-names = "tx", "rx"; 1700 }; 1701 }; 1702 1703 rcar_sound,ssi { 1704 ssi0: ssi-0 { 1705 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; 1706 }; 1707 }; 1708 }; 1709 1710 mmc0: mmc@ee140000 { 1711 compatible = "renesas,sdhi-r8a779h0", 1712 "renesas,rcar-gen4-sdhi"; 1713 reg = <0 0xee140000 0 0x2000>; 1714 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1715 clocks = <&cpg CPG_MOD 706>, 1716 <&cpg CPG_CORE R8A779H0_CLK_SD0H>; 1717 clock-names = "core", "clkh"; 1718 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1719 resets = <&cpg 706>; 1720 max-frequency = <200000000>; 1721 iommus = <&ipmmu_ds0 32>; 1722 status = "disabled"; 1723 }; 1724 1725 rpc: spi@ee200000 { 1726 compatible = "renesas,r8a779h0-rpc-if", 1727 "renesas,rcar-gen4-rpc-if"; 1728 reg = <0 0xee200000 0 0x200>, 1729 <0 0x08000000 0 0x04000000>, 1730 <0 0xee208000 0 0x100>; 1731 reg-names = "regs", "dirmap", "wbuf"; 1732 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1733 clocks = <&cpg CPG_MOD 629>; 1734 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1735 resets = <&cpg 629>; 1736 #address-cells = <1>; 1737 #size-cells = <0>; 1738 status = "disabled"; 1739 }; 1740 1741 ipmmu_rt0: iommu@ee480000 { 1742 compatible = "renesas,ipmmu-r8a779h0", 1743 "renesas,rcar-gen4-ipmmu-vmsa"; 1744 reg = <0 0xee480000 0 0x20000>; 1745 renesas,ipmmu-main = <&ipmmu_mm>; 1746 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1747 #iommu-cells = <1>; 1748 }; 1749 1750 ipmmu_rt1: iommu@ee4c0000 { 1751 compatible = "renesas,ipmmu-r8a779h0", 1752 "renesas,rcar-gen4-ipmmu-vmsa"; 1753 reg = <0 0xee4c0000 0 0x20000>; 1754 renesas,ipmmu-main = <&ipmmu_mm>; 1755 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1756 #iommu-cells = <1>; 1757 }; 1758 1759 ipmmu_ds0: iommu@eed00000 { 1760 compatible = "renesas,ipmmu-r8a779h0", 1761 "renesas,rcar-gen4-ipmmu-vmsa"; 1762 reg = <0 0xeed00000 0 0x20000>; 1763 renesas,ipmmu-main = <&ipmmu_mm>; 1764 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1765 #iommu-cells = <1>; 1766 }; 1767 1768 ipmmu_hc: iommu@eed40000 { 1769 compatible = "renesas,ipmmu-r8a779h0", 1770 "renesas,rcar-gen4-ipmmu-vmsa"; 1771 reg = <0 0xeed40000 0 0x20000>; 1772 renesas,ipmmu-main = <&ipmmu_mm>; 1773 power-domains = <&sysc R8A779H0_PD_C4>; 1774 #iommu-cells = <1>; 1775 }; 1776 1777 ipmmu_ir: iommu@eed80000 { 1778 compatible = "renesas,ipmmu-r8a779h0", 1779 "renesas,rcar-gen4-ipmmu-vmsa"; 1780 reg = <0 0xeed80000 0 0x20000>; 1781 renesas,ipmmu-main = <&ipmmu_mm>; 1782 power-domains = <&sysc R8A779H0_PD_C4>; 1783 #iommu-cells = <1>; 1784 }; 1785 1786 ipmmu_vc: iommu@eedc0000 { 1787 compatible = "renesas,ipmmu-r8a779h0", 1788 "renesas,rcar-gen4-ipmmu-vmsa"; 1789 reg = <0 0xeedc0000 0 0x20000>; 1790 renesas,ipmmu-main = <&ipmmu_mm>; 1791 power-domains = <&sysc R8A779H0_PD_C4>; 1792 #iommu-cells = <1>; 1793 }; 1794 1795 ipmmu_3dg: iommu@eee00000 { 1796 compatible = "renesas,ipmmu-r8a779h0", 1797 "renesas,rcar-gen4-ipmmu-vmsa"; 1798 reg = <0 0xeee00000 0 0x20000>; 1799 renesas,ipmmu-main = <&ipmmu_mm>; 1800 power-domains = <&sysc R8A779H0_PD_C4>; 1801 #iommu-cells = <1>; 1802 }; 1803 1804 ipmmu_vi0: iommu@eee80000 { 1805 compatible = "renesas,ipmmu-r8a779h0", 1806 "renesas,rcar-gen4-ipmmu-vmsa"; 1807 reg = <0 0xeee80000 0 0x20000>; 1808 renesas,ipmmu-main = <&ipmmu_mm>; 1809 power-domains = <&sysc R8A779H0_PD_C4>; 1810 #iommu-cells = <1>; 1811 }; 1812 1813 ipmmu_vi1: iommu@eeec0000 { 1814 compatible = "renesas,ipmmu-r8a779h0", 1815 "renesas,rcar-gen4-ipmmu-vmsa"; 1816 reg = <0 0xeeec0000 0 0x20000>; 1817 renesas,ipmmu-main = <&ipmmu_mm>; 1818 power-domains = <&sysc R8A779H0_PD_C4>; 1819 #iommu-cells = <1>; 1820 }; 1821 1822 ipmmu_vip0: iommu@eef00000 { 1823 compatible = "renesas,ipmmu-r8a779h0", 1824 "renesas,rcar-gen4-ipmmu-vmsa"; 1825 reg = <0 0xeef00000 0 0x20000>; 1826 renesas,ipmmu-main = <&ipmmu_mm>; 1827 power-domains = <&sysc R8A779H0_PD_C4>; 1828 #iommu-cells = <1>; 1829 }; 1830 1831 ipmmu_mm: iommu@eefc0000 { 1832 compatible = "renesas,ipmmu-r8a779h0", 1833 "renesas,rcar-gen4-ipmmu-vmsa"; 1834 reg = <0 0xeefc0000 0 0x20000>; 1835 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 1836 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 1837 power-domains = <&sysc R8A779H0_PD_ALWAYS_ON>; 1838 #iommu-cells = <1>; 1839 }; 1840 1841 gic: interrupt-controller@f1000000 { 1842 compatible = "arm,gic-v3"; 1843 #interrupt-cells = <3>; 1844 #address-cells = <0>; 1845 interrupt-controller; 1846 reg = <0x0 0xf1000000 0 0x20000>, 1847 <0x0 0xf1060000 0 0x110000>; 1848 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1849 }; 1850 1851 csi40: csi2@fe500000 { 1852 compatible = "renesas,r8a779h0-csi2"; 1853 reg = <0 0xfe500000 0 0x40000>; 1854 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; 1855 clocks = <&cpg CPG_MOD 331>; 1856 power-domains = <&sysc R8A779H0_PD_C4>; 1857 resets = <&cpg 331>; 1858 status = "disabled"; 1859 1860 ports { 1861 #address-cells = <1>; 1862 #size-cells = <0>; 1863 1864 port@0 { 1865 reg = <0>; 1866 }; 1867 1868 port@1 { 1869 reg = <1>; 1870 csi40isp0: endpoint { 1871 remote-endpoint = <&isp0csi40>; 1872 }; 1873 }; 1874 }; 1875 }; 1876 1877 csi41: csi2@fe540000 { 1878 compatible = "renesas,r8a779h0-csi2"; 1879 reg = <0 0xfe540000 0 0x40000>; 1880 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; 1881 clocks = <&cpg CPG_MOD 400>; 1882 power-domains = <&sysc R8A779H0_PD_C4>; 1883 resets = <&cpg 400>; 1884 status = "disabled"; 1885 1886 ports { 1887 #address-cells = <1>; 1888 #size-cells = <0>; 1889 1890 port@0 { 1891 reg = <0>; 1892 }; 1893 1894 port@1 { 1895 reg = <1>; 1896 csi41isp1: endpoint { 1897 remote-endpoint = <&isp1csi41>; 1898 }; 1899 }; 1900 }; 1901 }; 1902 1903 isp0: isp@fed00000 { 1904 compatible = "renesas,r8a779h0-isp", 1905 "renesas,rcar-gen4-isp"; 1906 reg = <0 0xfed00000 0 0x10000>; 1907 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>; 1908 clocks = <&cpg CPG_MOD 612>; 1909 power-domains = <&sysc R8A779H0_PD_A3ISP0>; 1910 resets = <&cpg 612>; 1911 status = "disabled"; 1912 1913 ports { 1914 #address-cells = <1>; 1915 #size-cells = <0>; 1916 1917 port@0 { 1918 #address-cells = <1>; 1919 #size-cells = <0>; 1920 1921 reg = <0>; 1922 1923 isp0csi40: endpoint@0 { 1924 reg = <0>; 1925 remote-endpoint = <&csi40isp0>; 1926 }; 1927 }; 1928 1929 port@1 { 1930 reg = <1>; 1931 isp0vin00: endpoint { 1932 remote-endpoint = <&vin00isp0>; 1933 }; 1934 }; 1935 1936 port@2 { 1937 reg = <2>; 1938 isp0vin01: endpoint { 1939 remote-endpoint = <&vin01isp0>; 1940 }; 1941 }; 1942 1943 port@3 { 1944 reg = <3>; 1945 isp0vin02: endpoint { 1946 remote-endpoint = <&vin02isp0>; 1947 }; 1948 }; 1949 1950 port@4 { 1951 reg = <4>; 1952 isp0vin03: endpoint { 1953 remote-endpoint = <&vin03isp0>; 1954 }; 1955 }; 1956 1957 port@5 { 1958 reg = <5>; 1959 isp0vin04: endpoint { 1960 remote-endpoint = <&vin04isp0>; 1961 }; 1962 }; 1963 1964 port@6 { 1965 reg = <6>; 1966 isp0vin05: endpoint { 1967 remote-endpoint = <&vin05isp0>; 1968 }; 1969 }; 1970 1971 port@7 { 1972 reg = <7>; 1973 isp0vin06: endpoint { 1974 remote-endpoint = <&vin06isp0>; 1975 }; 1976 }; 1977 1978 port@8 { 1979 reg = <8>; 1980 isp0vin07: endpoint { 1981 remote-endpoint = <&vin07isp0>; 1982 }; 1983 }; 1984 }; 1985 }; 1986 1987 isp1: isp@fed20000 { 1988 compatible = "renesas,r8a779h0-isp", 1989 "renesas,rcar-gen4-isp"; 1990 reg = <0 0xfed20000 0 0x10000>; 1991 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>; 1992 clocks = <&cpg CPG_MOD 613>; 1993 power-domains = <&sysc R8A779H0_PD_A3ISP0>; 1994 resets = <&cpg 613>; 1995 status = "disabled"; 1996 1997 ports { 1998 #address-cells = <1>; 1999 #size-cells = <0>; 2000 2001 port@0 { 2002 #address-cells = <1>; 2003 #size-cells = <0>; 2004 2005 reg = <0>; 2006 2007 isp1csi41: endpoint@1 { 2008 reg = <1>; 2009 remote-endpoint = <&csi41isp1>; 2010 }; 2011 }; 2012 2013 port@1 { 2014 reg = <1>; 2015 isp1vin08: endpoint { 2016 remote-endpoint = <&vin08isp1>; 2017 }; 2018 }; 2019 2020 port@2 { 2021 reg = <2>; 2022 isp1vin09: endpoint { 2023 remote-endpoint = <&vin09isp1>; 2024 }; 2025 }; 2026 2027 port@3 { 2028 reg = <3>; 2029 isp1vin10: endpoint { 2030 remote-endpoint = <&vin10isp1>; 2031 }; 2032 }; 2033 2034 port@4 { 2035 reg = <4>; 2036 isp1vin11: endpoint { 2037 remote-endpoint = <&vin11isp1>; 2038 }; 2039 }; 2040 2041 port@5 { 2042 reg = <5>; 2043 isp1vin12: endpoint { 2044 remote-endpoint = <&vin12isp1>; 2045 }; 2046 }; 2047 2048 port@6 { 2049 reg = <6>; 2050 isp1vin13: endpoint { 2051 remote-endpoint = <&vin13isp1>; 2052 }; 2053 }; 2054 2055 port@7 { 2056 reg = <7>; 2057 isp1vin14: endpoint { 2058 remote-endpoint = <&vin14isp1>; 2059 }; 2060 }; 2061 2062 port@8 { 2063 reg = <8>; 2064 isp1vin15: endpoint { 2065 remote-endpoint = <&vin15isp1>; 2066 }; 2067 }; 2068 }; 2069 }; 2070 2071 prr: chipid@fff00044 { 2072 compatible = "renesas,prr"; 2073 reg = <0 0xfff00044 0 4>; 2074 }; 2075 }; 2076 2077 thermal-zones { 2078 sensor_thermal_cr52: sensor1-thermal { 2079 polling-delay-passive = <250>; 2080 polling-delay = <1000>; 2081 thermal-sensors = <&tsc 0>; 2082 2083 trips { 2084 sensor1_crit: sensor1-crit { 2085 temperature = <120000>; 2086 hysteresis = <1000>; 2087 type = "critical"; 2088 }; 2089 }; 2090 }; 2091 2092 sensor_thermal_ca76: sensor2-thermal { 2093 polling-delay-passive = <250>; 2094 polling-delay = <1000>; 2095 thermal-sensors = <&tsc 1>; 2096 2097 trips { 2098 sensor2_crit: sensor2-crit { 2099 temperature = <120000>; 2100 hysteresis = <1000>; 2101 type = "critical"; 2102 }; 2103 }; 2104 }; 2105 }; 2106 2107 timer { 2108 compatible = "arm,armv8-timer"; 2109 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 2110 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 2111 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 2112 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, 2113 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; 2114 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", 2115 "hyp-virt"; 2116 }; 2117}; 2118