1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4M Gray Hawk Single board 4 * 5 * Copyright (C) 2023 Renesas Electronics Corp. 6 * Copyright (C) 2024 Glider bv 7 */ 8/* 9 * [How to use Sound] 10 * 11 * Because R-Car V4M has only 1 SSI, it cannot handle both Playback/Capture 12 * at the same time. You need to switch the direction which is controlled 13 * by the GP0_01 pin via amixer. 14 * 15 * Playback (CN9500) 16 * > amixer set "MUX" "Playback" // for GP0_01 17 * > amixer set "DAC 1" 85% 18 * > aplay xxx.wav 19 * 20 * Capture (CN9501) 21 * > amixer set "MUX" "Capture" // for GP0_01 22 * > amixer set "Mic 1" 80% 23 * > amixer set "ADC 1" on 24 * > amixer set 'ADC 1' 80% 25 * > arecord xxx hoge.wav 26 */ 27 28/dts-v1/; 29 30#include <dt-bindings/gpio/gpio.h> 31#include <dt-bindings/input/input.h> 32#include <dt-bindings/leds/common.h> 33#include <dt-bindings/media/video-interfaces.h> 34 35#include "r8a779h0.dtsi" 36 37/ { 38 model = "Renesas Gray Hawk Single board based on r8a779h0"; 39 compatible = "renesas,gray-hawk-single", "renesas,r8a779h0"; 40 41 aliases { 42 i2c0 = &i2c0; 43 i2c1 = &i2c1; 44 i2c2 = &i2c2; 45 i2c3 = &i2c3; 46 serial0 = &hscif0; 47 serial1 = &hscif2; 48 ethernet0 = &avb0; 49 ethernet1 = &avb1; 50 ethernet2 = &avb2; 51 }; 52 53 can_transceiver0: can-phy0 { 54 compatible = "nxp,tjr1443"; 55 #phy-cells = <0>; 56 enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 57 max-bitrate = <5000000>; 58 }; 59 60 chosen { 61 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 62 stdout-path = "serial0:921600n8"; 63 }; 64 65 sn65dsi86_refclk: clk-x6 { 66 compatible = "fixed-clock"; 67 #clock-cells = <0>; 68 clock-frequency = <38400000>; 69 }; 70 71 keys { 72 compatible = "gpio-keys"; 73 74 pinctrl-0 = <&keys_pins>; 75 pinctrl-names = "default"; 76 77 key-1 { 78 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 79 linux,code = <KEY_1>; 80 label = "SW47"; 81 wakeup-source; 82 debounce-interval = <20>; 83 }; 84 85 key-2 { 86 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; 87 linux,code = <KEY_2>; 88 label = "SW48"; 89 wakeup-source; 90 debounce-interval = <20>; 91 }; 92 93 key-3 { 94 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; 95 linux,code = <KEY_3>; 96 label = "SW49"; 97 wakeup-source; 98 debounce-interval = <20>; 99 }; 100 }; 101 102 leds { 103 compatible = "gpio-leds"; 104 105 led-1 { 106 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; 107 color = <LED_COLOR_ID_GREEN>; 108 function = LED_FUNCTION_INDICATOR; 109 function-enumerator = <1>; 110 }; 111 112 led-2 { 113 gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; 114 color = <LED_COLOR_ID_GREEN>; 115 function = LED_FUNCTION_INDICATOR; 116 function-enumerator = <2>; 117 }; 118 119 led-3 { 120 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; 121 color = <LED_COLOR_ID_GREEN>; 122 function = LED_FUNCTION_INDICATOR; 123 function-enumerator = <3>; 124 }; 125 }; 126 127 memory@48000000 { 128 device_type = "memory"; 129 /* first 128MB is reserved for secure area. */ 130 reg = <0x0 0x48000000 0x0 0x78000000>; 131 }; 132 133 memory@480000000 { 134 device_type = "memory"; 135 reg = <0x4 0x80000000 0x1 0x80000000>; 136 }; 137 138 pcie_clk: clk-9fgv0841-pci { 139 compatible = "fixed-clock"; 140 clock-frequency = <100000000>; 141 #clock-cells = <0>; 142 }; 143 144 mini-dp-con { 145 compatible = "dp-connector"; 146 label = "CN5"; 147 type = "mini"; 148 149 port { 150 mini_dp_con_in: endpoint { 151 remote-endpoint = <&sn65dsi86_out0>; 152 }; 153 }; 154 }; 155 156 reg_1p2v: regulator-1p2v { 157 compatible = "regulator-fixed"; 158 regulator-name = "fixed-1.2V"; 159 regulator-min-microvolt = <1200000>; 160 regulator-max-microvolt = <1200000>; 161 regulator-boot-on; 162 regulator-always-on; 163 }; 164 165 reg_1p8v: regulator-1p8v { 166 compatible = "regulator-fixed"; 167 regulator-name = "fixed-1.8V"; 168 regulator-min-microvolt = <1800000>; 169 regulator-max-microvolt = <1800000>; 170 regulator-boot-on; 171 regulator-always-on; 172 }; 173 174 reg_3p3v: regulator-3p3v { 175 compatible = "regulator-fixed"; 176 regulator-name = "fixed-3.3V"; 177 regulator-min-microvolt = <3300000>; 178 regulator-max-microvolt = <3300000>; 179 regulator-boot-on; 180 regulator-always-on; 181 }; 182 183 sound_mux: sound-mux { 184 compatible = "simple-audio-mux"; 185 mux-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; 186 state-labels = "Playback", "Capture"; 187 }; 188 189 sound_card: sound { 190 compatible = "audio-graph-card2"; 191 label = "rcar-sound"; 192 aux-devs = <&sound_mux>; // for GP0_01 193 194 links = <&rsnd_port>; // AK4619 Audio Codec 195 }; 196}; 197 198&audio_clkin { 199 clock-frequency = <24576000>; 200}; 201 202&avb0 { 203 pinctrl-0 = <&avb0_pins>; 204 pinctrl-names = "default"; 205 phy-handle = <&avb0_phy>; 206 tx-internal-delay-ps = <2000>; 207 status = "okay"; 208 209 mdio { 210 #address-cells = <1>; 211 #size-cells = <0>; 212 213 avb0_phy: ethernet-phy@0 { 214 compatible = "ethernet-phy-id0022.1622", 215 "ethernet-phy-ieee802.3-c22"; 216 rxc-skew-ps = <1500>; 217 reg = <0>; 218 interrupts-extended = <&gpio7 5 IRQ_TYPE_LEVEL_LOW>; 219 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; 220 }; 221 }; 222}; 223 224&avb1 { 225 pinctrl-0 = <&avb1_pins>; 226 pinctrl-names = "default"; 227 phy-handle = <&avb1_phy>; 228 status = "okay"; 229 230 mdio { 231 #address-cells = <1>; 232 #size-cells = <0>; 233 234 reset-gpios = <&gpio6 1 GPIO_ACTIVE_LOW>; 235 reset-post-delay-us = <4000>; 236 237 avb1_phy: ethernet-phy@0 { 238 compatible = "ethernet-phy-ieee802.3-c45"; 239 reg = <0>; 240 interrupts-extended = <&gpio6 3 IRQ_TYPE_LEVEL_LOW>; 241 }; 242 }; 243}; 244 245&avb2 { 246 pinctrl-0 = <&avb2_pins>; 247 pinctrl-names = "default"; 248 phy-handle = <&avb2_phy>; 249 status = "okay"; 250 251 mdio { 252 #address-cells = <1>; 253 #size-cells = <0>; 254 255 reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; 256 reset-post-delay-us = <4000>; 257 258 avb2_phy: ethernet-phy@0 { 259 compatible = "ethernet-phy-ieee802.3-c45"; 260 reg = <0>; 261 interrupts-extended = <&gpio5 4 IRQ_TYPE_LEVEL_LOW>; 262 }; 263 }; 264}; 265 266&can_clk { 267 clock-frequency = <40000000>; 268}; 269 270&canfd { 271 pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; 272 pinctrl-names = "default"; 273 status = "okay"; 274 275 channel0 { 276 status = "okay"; 277 phys = <&can_transceiver0>; 278 }; 279 280 channel1 { 281 status = "okay"; 282 }; 283}; 284 285&csi40 { 286 status = "okay"; 287 288 ports { 289 #address-cells = <1>; 290 #size-cells = <0>; 291 292 port@0 { 293 reg = <0>; 294 295 csi40_in: endpoint { 296 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; 297 clock-lanes = <0>; 298 data-lanes = <1 2 3 4>; 299 remote-endpoint = <&max96724_out0>; 300 }; 301 }; 302 }; 303}; 304 305&csi41 { 306 status = "okay"; 307 308 ports { 309 #address-cells = <1>; 310 #size-cells = <0>; 311 312 port@0 { 313 reg = <0>; 314 315 csi41_in: endpoint { 316 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; 317 clock-lanes = <0>; 318 data-lanes = <1 2 3 4>; 319 remote-endpoint = <&max96724_out1>; 320 }; 321 }; 322 }; 323}; 324 325&dsi0 { 326 status = "okay"; 327 328 ports { 329 port@1 { 330 reg = <1>; 331 332 dsi0_out: endpoint { 333 remote-endpoint = <&sn65dsi86_in0>; 334 data-lanes = <1 2 3 4>; 335 }; 336 }; 337 }; 338}; 339 340&du { 341 status = "okay"; 342}; 343 344&extal_clk { 345 clock-frequency = <16666666>; 346}; 347 348&extalr_clk { 349 clock-frequency = <32768>; 350}; 351 352&gpio1 { 353 audio-power-hog { 354 gpio-hog; 355 gpios = <8 GPIO_ACTIVE_HIGH>; 356 output-high; 357 line-name = "Audio-Power"; 358 }; 359}; 360 361&hscif0 { 362 pinctrl-0 = <&hscif0_pins>; 363 pinctrl-names = "default"; 364 bootph-all; 365 366 uart-has-rtscts; 367 status = "okay"; 368}; 369 370&hscif2 { 371 pinctrl-0 = <&hscif2_pins>; 372 pinctrl-names = "default"; 373 374 uart-has-rtscts; 375 status = "okay"; 376}; 377 378&i2c0 { 379 pinctrl-0 = <&i2c0_pins>; 380 pinctrl-names = "default"; 381 382 status = "okay"; 383 clock-frequency = <400000>; 384 385 io_expander_a: gpio@20 { 386 compatible = "onnn,pca9654"; 387 reg = <0x20>; 388 interrupts-extended = <&gpio0 0 IRQ_TYPE_LEVEL_LOW>; 389 gpio-controller; 390 #gpio-cells = <2>; 391 interrupt-controller; 392 #interrupt-cells = <2>; 393 }; 394 395 io_expander_b: gpio@21 { 396 compatible = "onnn,pca9654"; 397 reg = <0x21>; 398 gpio-controller; 399 #gpio-cells = <2>; 400 }; 401 402 io_expander_c: gpio@22 { 403 compatible = "onnn,pca9654"; 404 reg = <0x22>; 405 gpio-controller; 406 #gpio-cells = <2>; 407 }; 408 409 eeprom@50 { 410 compatible = "rohm,br24g01", "atmel,24c01"; 411 label = "cpu-board"; 412 reg = <0x50>; 413 pagesize = <8>; 414 }; 415 416 eeprom@51 { 417 compatible = "rohm,br24g01", "atmel,24c01"; 418 label = "breakout-board"; 419 reg = <0x51>; 420 pagesize = <8>; 421 }; 422 423 eeprom@52 { 424 compatible = "rohm,br24g01", "atmel,24c01"; 425 label = "csi-dsi-sub-board-id"; 426 reg = <0x52>; 427 pagesize = <8>; 428 }; 429 430 eeprom@53 { 431 compatible = "rohm,br24g01", "atmel,24c01"; 432 label = "ethernet-sub-board-id"; 433 reg = <0x53>; 434 pagesize = <8>; 435 }; 436}; 437 438&i2c1 { 439 pinctrl-0 = <&i2c1_pins>; 440 pinctrl-names = "default"; 441 442 status = "okay"; 443 clock-frequency = <400000>; 444 445 bridge@2c { 446 pinctrl-0 = <&irq0_pins>; 447 pinctrl-names = "default"; 448 449 compatible = "ti,sn65dsi86"; 450 reg = <0x2c>; 451 452 clocks = <&sn65dsi86_refclk>; 453 clock-names = "refclk"; 454 455 interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_HIGH>; 456 457 enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 458 459 vccio-supply = <®_1p8v>; 460 vpll-supply = <®_1p8v>; 461 vcca-supply = <®_1p2v>; 462 vcc-supply = <®_1p2v>; 463 464 ports { 465 #address-cells = <1>; 466 #size-cells = <0>; 467 468 port@0 { 469 reg = <0>; 470 471 sn65dsi86_in0: endpoint { 472 remote-endpoint = <&dsi0_out>; 473 }; 474 }; 475 476 port@1 { 477 reg = <1>; 478 479 sn65dsi86_out0: endpoint { 480 remote-endpoint = <&mini_dp_con_in>; 481 }; 482 }; 483 }; 484 }; 485 486 gmsl0: gmsl-deserializer@4e { 487 compatible = "maxim,max96724"; 488 reg = <0x4e>; 489 enable-gpios = <&io_expander_b 0 GPIO_ACTIVE_HIGH>; 490 491 ports { 492 #address-cells = <1>; 493 #size-cells = <0>; 494 495 port@4 { 496 reg = <4>; 497 max96724_out0: endpoint { 498 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; 499 clock-lanes = <0>; 500 data-lanes = <1 2 3 4>; 501 remote-endpoint = <&csi40_in>; 502 }; 503 }; 504 }; 505 }; 506 507 gmsl1: gmsl-deserializer@4f { 508 compatible = "maxim,max96724"; 509 reg = <0x4f>; 510 enable-gpios = <&io_expander_c 0 GPIO_ACTIVE_HIGH>; 511 512 ports { 513 #address-cells = <1>; 514 #size-cells = <0>; 515 516 port@4 { 517 reg = <4>; 518 max96724_out1: endpoint { 519 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; 520 clock-lanes = <0>; 521 data-lanes = <1 2 3 4>; 522 remote-endpoint = <&csi41_in>; 523 }; 524 }; 525 }; 526 }; 527}; 528 529&i2c3 { 530 pinctrl-0 = <&i2c3_pins>; 531 pinctrl-names = "default"; 532 533 status = "okay"; 534 clock-frequency = <400000>; 535 536 codec@10 { 537 compatible = "asahi-kasei,ak4619"; 538 reg = <0x10>; 539 540 clocks = <&rcar_sound>; 541 clock-names = "mclk"; 542 543 #sound-dai-cells = <0>; 544 port { 545 ak4619_endpoint: endpoint { 546 remote-endpoint = <&rsnd_endpoint>; 547 }; 548 }; 549 }; 550}; 551 552&isp0 { 553 status = "okay"; 554}; 555 556&isp1 { 557 status = "okay"; 558}; 559 560&mmc0 { 561 pinctrl-0 = <&mmc_pins>; 562 pinctrl-1 = <&mmc_pins>; 563 pinctrl-names = "default", "state_uhs"; 564 565 vmmc-supply = <®_3p3v>; 566 vqmmc-supply = <®_1p8v>; 567 mmc-hs200-1_8v; 568 mmc-hs400-1_8v; 569 bus-width = <8>; 570 no-sd; 571 no-sdio; 572 non-removable; 573 full-pwr-cycle-in-suspend; 574 status = "okay"; 575}; 576 577&pcie0_clkref { 578 compatible = "gpio-gate-clock"; 579 clocks = <&pcie_clk>; 580 enable-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; 581 /delete-property/ clock-frequency; 582}; 583 584&pciec0 { 585 reset-gpios = <&io_expander_a 0 GPIO_ACTIVE_LOW>; 586 status = "okay"; 587}; 588 589&pfc { 590 pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>; 591 pinctrl-names = "default"; 592 593 avb0_pins: avb0 { 594 mux { 595 groups = "avb0_link", "avb0_mdio", "avb0_rgmii", 596 "avb0_txcrefclk"; 597 function = "avb0"; 598 }; 599 600 pins_mdio { 601 groups = "avb0_mdio"; 602 drive-strength = <21>; 603 }; 604 605 pins_mii { 606 groups = "avb0_rgmii"; 607 drive-strength = <21>; 608 }; 609 }; 610 611 avb1_pins: avb1 { 612 mux { 613 groups = "avb1_link", "avb1_mdio", "avb1_rgmii", 614 "avb1_txcrefclk"; 615 function = "avb1"; 616 }; 617 618 link { 619 groups = "avb1_link"; 620 bias-disable; 621 }; 622 623 mdio { 624 groups = "avb1_mdio"; 625 drive-strength = <24>; 626 bias-disable; 627 }; 628 629 rgmii { 630 groups = "avb1_rgmii"; 631 drive-strength = <24>; 632 bias-disable; 633 }; 634 }; 635 636 avb2_pins: avb2 { 637 mux { 638 groups = "avb2_link", "avb2_mdio", "avb2_rgmii", 639 "avb2_txcrefclk"; 640 function = "avb2"; 641 }; 642 643 link { 644 groups = "avb2_link"; 645 bias-disable; 646 }; 647 648 mdio { 649 groups = "avb2_mdio"; 650 drive-strength = <24>; 651 bias-disable; 652 }; 653 654 rgmii { 655 groups = "avb2_rgmii"; 656 drive-strength = <24>; 657 bias-disable; 658 }; 659 }; 660 661 can_clk_pins: can-clk { 662 groups = "can_clk"; 663 function = "can_clk"; 664 }; 665 666 canfd0_pins: canfd0 { 667 groups = "canfd0_data"; 668 function = "canfd0"; 669 }; 670 671 canfd1_pins: canfd1 { 672 groups = "canfd1_data"; 673 function = "canfd1"; 674 }; 675 676 hscif0_pins: hscif0 { 677 groups = "hscif0_data", "hscif0_ctrl"; 678 function = "hscif0"; 679 }; 680 681 hscif2_pins: hscif2 { 682 groups = "hscif2_data", "hscif2_ctrl"; 683 function = "hscif2"; 684 }; 685 686 i2c0_pins: i2c0 { 687 groups = "i2c0"; 688 function = "i2c0"; 689 }; 690 691 i2c1_pins: i2c1 { 692 groups = "i2c1"; 693 function = "i2c1"; 694 }; 695 696 i2c3_pins: i2c3 { 697 groups = "i2c3"; 698 function = "i2c3"; 699 }; 700 701 irq0_pins: irq0_pins { 702 groups = "intc_ex_irq0_a"; 703 function = "intc_ex"; 704 }; 705 706 keys_pins: keys { 707 pins = "GP_5_0", "GP_5_1", "GP_5_2"; 708 bias-pull-up; 709 }; 710 711 mmc_pins: mmc { 712 groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 713 function = "mmc"; 714 power-source = <1800>; 715 }; 716 717 qspi0_pins: qspi0 { 718 groups = "qspi0_ctrl", "qspi0_data4"; 719 function = "qspi0"; 720 }; 721 722 scif_clk_pins: scif-clk { 723 groups = "scif_clk"; 724 function = "scif_clk"; 725 }; 726 727 scif_clk2_pins: scif-clk2 { 728 groups = "scif_clk2"; 729 function = "scif_clk2"; 730 }; 731 732 sound_clk_pins: sound_clk { 733 groups = "audio_clkin", "audio_clkout"; 734 function = "audio_clk"; 735 }; 736 737 sound_pins: sound { 738 groups = "ssi_ctrl", "ssi_data"; 739 function = "ssi"; 740 }; 741}; 742 743&rcar_sound { 744 pinctrl-0 = <&sound_clk_pins>, <&sound_pins>; 745 pinctrl-names = "default"; 746 747 status = "okay"; 748 749 /* audio_clkout */ 750 clock-frequency = <12288000>; 751 752 ports { 753 rsnd_port: port { 754 rsnd_endpoint: endpoint { 755 remote-endpoint = <&ak4619_endpoint>; 756 bitclock-master; 757 frame-master; 758 759 /* see above [How to use Sound] */ 760 playback = <&ssi0>; 761 capture = <&ssi0>; 762 }; 763 }; 764 }; 765}; 766 767&rpc { 768 pinctrl-0 = <&qspi0_pins>; 769 pinctrl-names = "default"; 770 771 status = "okay"; 772 773 flash@0 { 774 compatible = "spansion,s25fs512s", "jedec,spi-nor"; 775 reg = <0>; 776 spi-max-frequency = <40000000>; 777 spi-rx-bus-width = <4>; 778 779 partitions { 780 compatible = "fixed-partitions"; 781 #address-cells = <1>; 782 #size-cells = <1>; 783 784 boot@0 { 785 reg = <0x0 0x1200000>; 786 read-only; 787 }; 788 user@1200000 { 789 reg = <0x1200000 0x2e00000>; 790 }; 791 }; 792 }; 793}; 794 795&rwdt { 796 timeout-sec = <60>; 797 status = "okay"; 798}; 799 800&scif_clk { 801 clock-frequency = <24000000>; 802}; 803 804&scif_clk2 { 805 clock-frequency = <24000000>; 806}; 807 808&vin00 { 809 status = "okay"; 810}; 811 812&vin01 { 813 status = "okay"; 814}; 815 816&vin02 { 817 status = "okay"; 818}; 819 820&vin03 { 821 status = "okay"; 822}; 823 824&vin04 { 825 status = "okay"; 826}; 827 828&vin05 { 829 status = "okay"; 830}; 831 832&vin06 { 833 status = "okay"; 834}; 835 836&vin07 { 837 status = "okay"; 838}; 839 840&vin08 { 841 status = "okay"; 842}; 843 844&vin09 { 845 status = "okay"; 846}; 847 848&vin10 { 849 status = "okay"; 850}; 851 852&vin11 { 853 status = "okay"; 854}; 855 856&vin12 { 857 status = "okay"; 858}; 859 860&vin13 { 861 status = "okay"; 862}; 863 864&vin14 { 865 status = "okay"; 866}; 867 868&vin15 { 869 status = "okay"; 870}; 871