155cda67bSGeert Uytterhoeven// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 255cda67bSGeert Uytterhoeven/* 355cda67bSGeert Uytterhoeven * Device Tree Source for the R-Car V4H ES2.0 White Hawk Single board 455cda67bSGeert Uytterhoeven * 555cda67bSGeert Uytterhoeven * Copyright (C) 2023 Glider bv 655cda67bSGeert Uytterhoeven */ 755cda67bSGeert Uytterhoeven 855cda67bSGeert Uytterhoeven/dts-v1/; 955cda67bSGeert Uytterhoeven#include "r8a779g2.dtsi" 1055cda67bSGeert Uytterhoeven#include "white-hawk-cpu-common.dtsi" 1155cda67bSGeert Uytterhoeven#include "white-hawk-common.dtsi" 1255cda67bSGeert Uytterhoeven 1355cda67bSGeert Uytterhoeven/ { 1455cda67bSGeert Uytterhoeven model = "Renesas White Hawk Single board based on r8a779g2"; 1555cda67bSGeert Uytterhoeven compatible = "renesas,white-hawk-single", "renesas,r8a779g2", 1655cda67bSGeert Uytterhoeven "renesas,r8a779g0"; 1755cda67bSGeert Uytterhoeven}; 1855cda67bSGeert Uytterhoeven 1955cda67bSGeert Uytterhoeven&hscif0 { 2055cda67bSGeert Uytterhoeven uart-has-rtscts; 2155cda67bSGeert Uytterhoeven}; 2255cda67bSGeert Uytterhoeven 2355cda67bSGeert Uytterhoeven&hscif0_pins { 2455cda67bSGeert Uytterhoeven groups = "hscif0_data", "hscif0_ctrl"; 2555cda67bSGeert Uytterhoeven function = "hscif0"; 2655cda67bSGeert Uytterhoeven}; 27*3d8e475bSNiklas Söderlund 28*3d8e475bSNiklas Söderlund&pfc { 29*3d8e475bSNiklas Söderlund tsn0_pins: tsn0 { 30*3d8e475bSNiklas Söderlund mux { 31*3d8e475bSNiklas Söderlund groups = "tsn0_link", "tsn0_mdio", "tsn0_rgmii", 32*3d8e475bSNiklas Söderlund "tsn0_txcrefclk"; 33*3d8e475bSNiklas Söderlund function = "tsn0"; 34*3d8e475bSNiklas Söderlund }; 35*3d8e475bSNiklas Söderlund 36*3d8e475bSNiklas Söderlund link { 37*3d8e475bSNiklas Söderlund groups = "tsn0_link"; 38*3d8e475bSNiklas Söderlund bias-disable; 39*3d8e475bSNiklas Söderlund }; 40*3d8e475bSNiklas Söderlund 41*3d8e475bSNiklas Söderlund mdio { 42*3d8e475bSNiklas Söderlund groups = "tsn0_mdio"; 43*3d8e475bSNiklas Söderlund drive-strength = <24>; 44*3d8e475bSNiklas Söderlund bias-disable; 45*3d8e475bSNiklas Söderlund }; 46*3d8e475bSNiklas Söderlund 47*3d8e475bSNiklas Söderlund rgmii { 48*3d8e475bSNiklas Söderlund groups = "tsn0_rgmii"; 49*3d8e475bSNiklas Söderlund drive-strength = <24>; 50*3d8e475bSNiklas Söderlund bias-disable; 51*3d8e475bSNiklas Söderlund }; 52*3d8e475bSNiklas Söderlund }; 53*3d8e475bSNiklas Söderlund}; 54*3d8e475bSNiklas Söderlund 55*3d8e475bSNiklas Söderlund&tsn0 { 56*3d8e475bSNiklas Söderlund pinctrl-0 = <&tsn0_pins>; 57*3d8e475bSNiklas Söderlund pinctrl-names = "default"; 58*3d8e475bSNiklas Söderlund phy-mode = "rgmii"; 59*3d8e475bSNiklas Söderlund phy-handle = <&phy3>; 60*3d8e475bSNiklas Söderlund status = "okay"; 61*3d8e475bSNiklas Söderlund 62*3d8e475bSNiklas Söderlund mdio { 63*3d8e475bSNiklas Söderlund #address-cells = <1>; 64*3d8e475bSNiklas Söderlund #size-cells = <0>; 65*3d8e475bSNiklas Söderlund 66*3d8e475bSNiklas Söderlund reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 67*3d8e475bSNiklas Söderlund reset-post-delay-us = <4000>; 68*3d8e475bSNiklas Söderlund 69*3d8e475bSNiklas Söderlund phy3: ethernet-phy@0 { 70*3d8e475bSNiklas Söderlund compatible = "ethernet-phy-id002b.0980", 71*3d8e475bSNiklas Söderlund "ethernet-phy-ieee802.3-c22"; 72*3d8e475bSNiklas Söderlund reg = <0>; 73*3d8e475bSNiklas Söderlund interrupt-parent = <&gpio4>; 74*3d8e475bSNiklas Söderlund interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 75*3d8e475bSNiklas Söderlund }; 76*3d8e475bSNiklas Söderlund }; 77*3d8e475bSNiklas Söderlund}; 78