1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4 * 5 * Copyright (C) 2022 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779g0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779g0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* External Audio clock - to be overridden by boards that provide it */ 18 audio_clkin: audio_clkin { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <0>; 22 }; 23 24 /* External CAN clock - to be overridden by boards that provide it */ 25 can_clk: can { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 cluster0_opp: opp-table-0 { 32 compatible = "operating-points-v2"; 33 opp-shared; 34 35 opp-500000000 { 36 opp-hz = /bits/ 64 <500000000>; 37 opp-microvolt = <825000>; 38 clock-latency-ns = <500000>; 39 }; 40 opp-1000000000 { 41 opp-hz = /bits/ 64 <1000000000>; 42 opp-microvolt = <825000>; 43 clock-latency-ns = <500000>; 44 }; 45 opp-1500000000 { 46 opp-hz = /bits/ 64 <1500000000>; 47 opp-microvolt = <825000>; 48 clock-latency-ns = <500000>; 49 }; 50 opp-1700000000 { 51 opp-hz = /bits/ 64 <1700000000>; 52 opp-microvolt = <825000>; 53 clock-latency-ns = <500000>; 54 opp-suspend; 55 }; 56 opp-1800000000 { 57 opp-hz = /bits/ 64 <1800000000>; 58 opp-microvolt = <880000>; 59 clock-latency-ns = <500000>; 60 turbo-mode; 61 }; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 68 cpu-map { 69 cluster0 { 70 core0 { 71 cpu = <&a76_0>; 72 }; 73 core1 { 74 cpu = <&a76_1>; 75 }; 76 }; 77 78 cluster1 { 79 core0 { 80 cpu = <&a76_2>; 81 }; 82 core1 { 83 cpu = <&a76_3>; 84 }; 85 }; 86 }; 87 88 a76_0: cpu@0 { 89 compatible = "arm,cortex-a76"; 90 reg = <0>; 91 device_type = "cpu"; 92 power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 93 next-level-cache = <&L3_CA76_0>; 94 enable-method = "psci"; 95 cpu-idle-states = <&CPU_SLEEP_0>; 96 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 97 operating-points-v2 = <&cluster0_opp>; 98 }; 99 100 a76_1: cpu@100 { 101 compatible = "arm,cortex-a76"; 102 reg = <0x100>; 103 device_type = "cpu"; 104 power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 105 next-level-cache = <&L3_CA76_0>; 106 enable-method = "psci"; 107 cpu-idle-states = <&CPU_SLEEP_0>; 108 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 109 operating-points-v2 = <&cluster0_opp>; 110 }; 111 112 a76_2: cpu@10000 { 113 compatible = "arm,cortex-a76"; 114 reg = <0x10000>; 115 device_type = "cpu"; 116 power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 117 next-level-cache = <&L3_CA76_1>; 118 enable-method = "psci"; 119 cpu-idle-states = <&CPU_SLEEP_0>; 120 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 121 operating-points-v2 = <&cluster0_opp>; 122 }; 123 124 a76_3: cpu@10100 { 125 compatible = "arm,cortex-a76"; 126 reg = <0x10100>; 127 device_type = "cpu"; 128 power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 129 next-level-cache = <&L3_CA76_1>; 130 enable-method = "psci"; 131 cpu-idle-states = <&CPU_SLEEP_0>; 132 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 133 operating-points-v2 = <&cluster0_opp>; 134 }; 135 136 idle-states { 137 entry-method = "psci"; 138 139 CPU_SLEEP_0: cpu-sleep-0 { 140 compatible = "arm,idle-state"; 141 arm,psci-suspend-param = <0x0010000>; 142 local-timer-stop; 143 entry-latency-us = <400>; 144 exit-latency-us = <500>; 145 min-residency-us = <4000>; 146 }; 147 }; 148 149 L3_CA76_0: cache-controller-0 { 150 compatible = "cache"; 151 power-domains = <&sysc R8A779G0_PD_A2E0D0>; 152 cache-unified; 153 cache-level = <3>; 154 }; 155 156 L3_CA76_1: cache-controller-1 { 157 compatible = "cache"; 158 power-domains = <&sysc R8A779G0_PD_A2E0D1>; 159 cache-unified; 160 cache-level = <3>; 161 }; 162 }; 163 164 extal_clk: extal { 165 compatible = "fixed-clock"; 166 #clock-cells = <0>; 167 /* This value must be overridden by the board */ 168 clock-frequency = <0>; 169 }; 170 171 extalr_clk: extalr { 172 compatible = "fixed-clock"; 173 #clock-cells = <0>; 174 /* This value must be overridden by the board */ 175 clock-frequency = <0>; 176 }; 177 178 pcie0_clkref: pcie0-clkref { 179 compatible = "fixed-clock"; 180 #clock-cells = <0>; 181 /* This value must be overridden by the board */ 182 clock-frequency = <0>; 183 }; 184 185 pcie1_clkref: pcie1-clkref { 186 compatible = "fixed-clock"; 187 #clock-cells = <0>; 188 /* This value must be overridden by the board */ 189 clock-frequency = <0>; 190 }; 191 192 pmu_a76 { 193 compatible = "arm,cortex-a76-pmu"; 194 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 195 }; 196 197 psci { 198 compatible = "arm,psci-1.0", "arm,psci-0.2"; 199 method = "smc"; 200 }; 201 202 /* External SCIF clocks - to be overridden by boards that provide them */ 203 scif_clk: scif { 204 compatible = "fixed-clock"; 205 #clock-cells = <0>; 206 clock-frequency = <0>; 207 }; 208 209 scif_clk2: scif2 { 210 compatible = "fixed-clock"; 211 #clock-cells = <0>; 212 clock-frequency = <0>; 213 }; 214 215 soc: soc { 216 compatible = "simple-bus"; 217 interrupt-parent = <&gic>; 218 #address-cells = <2>; 219 #size-cells = <2>; 220 ranges; 221 222 rwdt: watchdog@e6020000 { 223 compatible = "renesas,r8a779g0-wdt", 224 "renesas,rcar-gen4-wdt"; 225 reg = <0 0xe6020000 0 0x0c>; 226 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 227 clocks = <&cpg CPG_MOD 907>; 228 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 229 resets = <&cpg 907>; 230 status = "disabled"; 231 }; 232 233 pfc: pinctrl@e6050000 { 234 compatible = "renesas,pfc-r8a779g0"; 235 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 236 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 237 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 238 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 239 <0 0xe6068000 0 0x16c>; 240 }; 241 242 gpio0: gpio@e6050180 { 243 compatible = "renesas,gpio-r8a779g0", 244 "renesas,rcar-gen4-gpio"; 245 reg = <0 0xe6050180 0 0x54>; 246 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 247 clocks = <&cpg CPG_MOD 915>; 248 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 249 resets = <&cpg 915>; 250 gpio-controller; 251 #gpio-cells = <2>; 252 gpio-ranges = <&pfc 0 0 19>; 253 interrupt-controller; 254 #interrupt-cells = <2>; 255 }; 256 257 gpio1: gpio@e6050980 { 258 compatible = "renesas,gpio-r8a779g0", 259 "renesas,rcar-gen4-gpio"; 260 reg = <0 0xe6050980 0 0x54>; 261 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 262 clocks = <&cpg CPG_MOD 915>; 263 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 264 resets = <&cpg 915>; 265 gpio-controller; 266 #gpio-cells = <2>; 267 gpio-ranges = <&pfc 0 32 29>; 268 interrupt-controller; 269 #interrupt-cells = <2>; 270 }; 271 272 gpio2: gpio@e6058180 { 273 compatible = "renesas,gpio-r8a779g0", 274 "renesas,rcar-gen4-gpio"; 275 reg = <0 0xe6058180 0 0x54>; 276 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 277 clocks = <&cpg CPG_MOD 916>; 278 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 279 resets = <&cpg 916>; 280 gpio-controller; 281 #gpio-cells = <2>; 282 gpio-ranges = <&pfc 0 64 20>; 283 interrupt-controller; 284 #interrupt-cells = <2>; 285 }; 286 287 gpio3: gpio@e6058980 { 288 compatible = "renesas,gpio-r8a779g0", 289 "renesas,rcar-gen4-gpio"; 290 reg = <0 0xe6058980 0 0x54>; 291 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 292 clocks = <&cpg CPG_MOD 916>; 293 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 294 resets = <&cpg 916>; 295 gpio-controller; 296 #gpio-cells = <2>; 297 gpio-ranges = <&pfc 0 96 30>; 298 interrupt-controller; 299 #interrupt-cells = <2>; 300 }; 301 302 gpio4: gpio@e6060180 { 303 compatible = "renesas,gpio-r8a779g0", 304 "renesas,rcar-gen4-gpio"; 305 reg = <0 0xe6060180 0 0x54>; 306 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 307 clocks = <&cpg CPG_MOD 917>; 308 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 309 resets = <&cpg 917>; 310 gpio-controller; 311 #gpio-cells = <2>; 312 gpio-ranges = <&pfc 0 128 25>; 313 interrupt-controller; 314 #interrupt-cells = <2>; 315 }; 316 317 gpio5: gpio@e6060980 { 318 compatible = "renesas,gpio-r8a779g0", 319 "renesas,rcar-gen4-gpio"; 320 reg = <0 0xe6060980 0 0x54>; 321 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 322 clocks = <&cpg CPG_MOD 917>; 323 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 324 resets = <&cpg 917>; 325 gpio-controller; 326 #gpio-cells = <2>; 327 gpio-ranges = <&pfc 0 160 21>; 328 interrupt-controller; 329 #interrupt-cells = <2>; 330 }; 331 332 gpio6: gpio@e6061180 { 333 compatible = "renesas,gpio-r8a779g0", 334 "renesas,rcar-gen4-gpio"; 335 reg = <0 0xe6061180 0 0x54>; 336 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 337 clocks = <&cpg CPG_MOD 917>; 338 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 339 resets = <&cpg 917>; 340 gpio-controller; 341 #gpio-cells = <2>; 342 gpio-ranges = <&pfc 0 192 21>; 343 interrupt-controller; 344 #interrupt-cells = <2>; 345 }; 346 347 gpio7: gpio@e6061980 { 348 compatible = "renesas,gpio-r8a779g0", 349 "renesas,rcar-gen4-gpio"; 350 reg = <0 0xe6061980 0 0x54>; 351 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 917>; 353 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 354 resets = <&cpg 917>; 355 gpio-controller; 356 #gpio-cells = <2>; 357 gpio-ranges = <&pfc 0 224 21>; 358 interrupt-controller; 359 #interrupt-cells = <2>; 360 }; 361 362 gpio8: gpio@e6068180 { 363 compatible = "renesas,gpio-r8a779g0", 364 "renesas,rcar-gen4-gpio"; 365 reg = <0 0xe6068180 0 0x54>; 366 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 367 clocks = <&cpg CPG_MOD 918>; 368 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 369 resets = <&cpg 918>; 370 gpio-controller; 371 #gpio-cells = <2>; 372 gpio-ranges = <&pfc 0 256 14>; 373 interrupt-controller; 374 #interrupt-cells = <2>; 375 }; 376 377 cmt0: timer@e60f0000 { 378 compatible = "renesas,r8a779g0-cmt0", 379 "renesas,rcar-gen4-cmt0"; 380 reg = <0 0xe60f0000 0 0x1004>; 381 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 383 clocks = <&cpg CPG_MOD 910>; 384 clock-names = "fck"; 385 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 386 resets = <&cpg 910>; 387 status = "disabled"; 388 }; 389 390 cmt1: timer@e6130000 { 391 compatible = "renesas,r8a779g0-cmt1", 392 "renesas,rcar-gen4-cmt1"; 393 reg = <0 0xe6130000 0 0x1004>; 394 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 395 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 402 clocks = <&cpg CPG_MOD 911>; 403 clock-names = "fck"; 404 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 405 resets = <&cpg 911>; 406 status = "disabled"; 407 }; 408 409 cmt2: timer@e6140000 { 410 compatible = "renesas,r8a779g0-cmt1", 411 "renesas,rcar-gen4-cmt1"; 412 reg = <0 0xe6140000 0 0x1004>; 413 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 415 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 416 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 417 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 418 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 419 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 421 clocks = <&cpg CPG_MOD 912>; 422 clock-names = "fck"; 423 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 424 resets = <&cpg 912>; 425 status = "disabled"; 426 }; 427 428 cmt3: timer@e6148000 { 429 compatible = "renesas,r8a779g0-cmt1", 430 "renesas,rcar-gen4-cmt1"; 431 reg = <0 0xe6148000 0 0x1004>; 432 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 433 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 434 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 435 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 436 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 437 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 438 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 439 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 440 clocks = <&cpg CPG_MOD 913>; 441 clock-names = "fck"; 442 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 443 resets = <&cpg 913>; 444 status = "disabled"; 445 }; 446 447 cpg: clock-controller@e6150000 { 448 compatible = "renesas,r8a779g0-cpg-mssr"; 449 reg = <0 0xe6150000 0 0x4000>; 450 clocks = <&extal_clk>, <&extalr_clk>; 451 clock-names = "extal", "extalr"; 452 #clock-cells = <2>; 453 #power-domain-cells = <0>; 454 #reset-cells = <1>; 455 }; 456 457 rst: reset-controller@e6160000 { 458 compatible = "renesas,r8a779g0-rst"; 459 reg = <0 0xe6160000 0 0x4000>; 460 }; 461 462 sysc: system-controller@e6180000 { 463 compatible = "renesas,r8a779g0-sysc"; 464 reg = <0 0xe6180000 0 0x4000>; 465 #power-domain-cells = <1>; 466 }; 467 468 tsc: thermal@e6198000 { 469 compatible = "renesas,r8a779g0-thermal"; 470 reg = <0 0xe6198000 0 0x200>, 471 <0 0xe61a0000 0 0x200>, 472 <0 0xe61a8000 0 0x200>, 473 <0 0xe61b0000 0 0x200>; 474 clocks = <&cpg CPG_MOD 919>; 475 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 476 resets = <&cpg 919>; 477 #thermal-sensor-cells = <1>; 478 }; 479 480 otp: otp@e61be000 { 481 compatible = "renesas,r8a779g0-otp"; 482 reg = <0 0xe61be000 0 0x1000>, <0 0xe61bf000 0 0x1000>; 483 }; 484 485 intc_ex: interrupt-controller@e61c0000 { 486 compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 487 #interrupt-cells = <2>; 488 interrupt-controller; 489 reg = <0 0xe61c0000 0 0x200>; 490 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 492 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 493 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 494 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 495 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 496 clocks = <&cpg CPG_MOD 611>; 497 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 498 resets = <&cpg 611>; 499 }; 500 501 tmu0: timer@e61e0000 { 502 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 503 reg = <0 0xe61e0000 0 0x30>; 504 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 505 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 506 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 507 interrupt-names = "tuni0", "tuni1", "tuni2"; 508 clocks = <&cpg CPG_MOD 713>; 509 clock-names = "fck"; 510 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 511 resets = <&cpg 713>; 512 status = "disabled"; 513 }; 514 515 tmu1: timer@e6fc0000 { 516 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 517 reg = <0 0xe6fc0000 0 0x30>; 518 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 519 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 520 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 521 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>; 522 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 523 clocks = <&cpg CPG_MOD 714>; 524 clock-names = "fck"; 525 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 526 resets = <&cpg 714>; 527 status = "disabled"; 528 }; 529 530 tmu2: timer@e6fd0000 { 531 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 532 reg = <0 0xe6fd0000 0 0x30>; 533 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 534 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 535 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 536 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; 537 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 538 clocks = <&cpg CPG_MOD 715>; 539 clock-names = "fck"; 540 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 541 resets = <&cpg 715>; 542 status = "disabled"; 543 }; 544 545 tmu3: timer@e6fe0000 { 546 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 547 reg = <0 0xe6fe0000 0 0x30>; 548 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 549 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 550 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 551 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>; 552 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 553 clocks = <&cpg CPG_MOD 716>; 554 clock-names = "fck"; 555 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 556 resets = <&cpg 716>; 557 status = "disabled"; 558 }; 559 560 tmu4: timer@ffc00000 { 561 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 562 reg = <0 0xffc00000 0 0x30>; 563 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 564 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 565 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 566 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 567 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 568 clocks = <&cpg CPG_MOD 717>; 569 clock-names = "fck"; 570 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 571 resets = <&cpg 717>; 572 status = "disabled"; 573 }; 574 575 tsn0: ethernet@e6460000 { 576 compatible = "renesas,r8a779g0-ethertsn", "renesas,rcar-gen4-ethertsn"; 577 reg = <0 0xe6460000 0 0x7000>, 578 <0 0xe6449000 0 0x500>; 579 reg-names = "tsnes", "gptp"; 580 interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 581 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; 582 interrupt-names = "tx", "rx"; 583 clocks = <&cpg CPG_MOD 2723>; 584 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 585 resets = <&cpg 2723>; 586 status = "disabled"; 587 }; 588 589 i2c0: i2c@e6500000 { 590 compatible = "renesas,i2c-r8a779g0", 591 "renesas,rcar-gen4-i2c"; 592 reg = <0 0xe6500000 0 0x40>; 593 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 594 clocks = <&cpg CPG_MOD 518>; 595 dmas = <&dmac0 0x91>, <&dmac0 0x90>, 596 <&dmac1 0x91>, <&dmac1 0x90>; 597 dma-names = "tx", "rx", "tx", "rx"; 598 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 599 resets = <&cpg 518>; 600 i2c-scl-internal-delay-ns = <110>; 601 #address-cells = <1>; 602 #size-cells = <0>; 603 status = "disabled"; 604 }; 605 606 i2c1: i2c@e6508000 { 607 compatible = "renesas,i2c-r8a779g0", 608 "renesas,rcar-gen4-i2c"; 609 reg = <0 0xe6508000 0 0x40>; 610 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 611 clocks = <&cpg CPG_MOD 519>; 612 dmas = <&dmac0 0x93>, <&dmac0 0x92>, 613 <&dmac1 0x93>, <&dmac1 0x92>; 614 dma-names = "tx", "rx", "tx", "rx"; 615 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 616 resets = <&cpg 519>; 617 i2c-scl-internal-delay-ns = <110>; 618 #address-cells = <1>; 619 #size-cells = <0>; 620 status = "disabled"; 621 }; 622 623 i2c2: i2c@e6510000 { 624 compatible = "renesas,i2c-r8a779g0", 625 "renesas,rcar-gen4-i2c"; 626 reg = <0 0xe6510000 0 0x40>; 627 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 628 clocks = <&cpg CPG_MOD 520>; 629 dmas = <&dmac0 0x95>, <&dmac0 0x94>, 630 <&dmac1 0x95>, <&dmac1 0x94>; 631 dma-names = "tx", "rx", "tx", "rx"; 632 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 633 resets = <&cpg 520>; 634 i2c-scl-internal-delay-ns = <110>; 635 #address-cells = <1>; 636 #size-cells = <0>; 637 status = "disabled"; 638 }; 639 640 i2c3: i2c@e66d0000 { 641 compatible = "renesas,i2c-r8a779g0", 642 "renesas,rcar-gen4-i2c"; 643 reg = <0 0xe66d0000 0 0x40>; 644 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 645 clocks = <&cpg CPG_MOD 521>; 646 dmas = <&dmac0 0x97>, <&dmac0 0x96>, 647 <&dmac1 0x97>, <&dmac1 0x96>; 648 dma-names = "tx", "rx", "tx", "rx"; 649 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 650 resets = <&cpg 521>; 651 i2c-scl-internal-delay-ns = <110>; 652 #address-cells = <1>; 653 #size-cells = <0>; 654 status = "disabled"; 655 }; 656 657 i2c4: i2c@e66d8000 { 658 compatible = "renesas,i2c-r8a779g0", 659 "renesas,rcar-gen4-i2c"; 660 reg = <0 0xe66d8000 0 0x40>; 661 interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 522>; 663 dma-names = "tx", "rx", "tx", "rx"; 664 dmas = <&dmac0 0x99>, <&dmac0 0x98>, 665 <&dmac1 0x99>, <&dmac1 0x98>; 666 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 667 resets = <&cpg 522>; 668 i2c-scl-internal-delay-ns = <110>; 669 #address-cells = <1>; 670 #size-cells = <0>; 671 status = "disabled"; 672 }; 673 674 i2c5: i2c@e66e0000 { 675 compatible = "renesas,i2c-r8a779g0", 676 "renesas,rcar-gen4-i2c"; 677 reg = <0 0xe66e0000 0 0x40>; 678 interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 679 clocks = <&cpg CPG_MOD 523>; 680 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 681 <&dmac1 0x9b>, <&dmac1 0x9a>; 682 dma-names = "tx", "rx", "tx", "rx"; 683 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 684 resets = <&cpg 523>; 685 i2c-scl-internal-delay-ns = <110>; 686 #address-cells = <1>; 687 #size-cells = <0>; 688 status = "disabled"; 689 }; 690 691 hscif0: serial@e6540000 { 692 compatible = "renesas,hscif-r8a779g0", 693 "renesas,rcar-gen4-hscif", "renesas,hscif"; 694 reg = <0 0xe6540000 0 0x60>; 695 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 696 clocks = <&cpg CPG_MOD 514>, 697 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 698 <&scif_clk>; 699 clock-names = "fck", "brg_int", "scif_clk"; 700 dmas = <&dmac0 0x31>, <&dmac0 0x30>, 701 <&dmac1 0x31>, <&dmac1 0x30>; 702 dma-names = "tx", "rx", "tx", "rx"; 703 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 704 resets = <&cpg 514>; 705 status = "disabled"; 706 }; 707 708 hscif1: serial@e6550000 { 709 compatible = "renesas,hscif-r8a779g0", 710 "renesas,rcar-gen4-hscif", "renesas,hscif"; 711 reg = <0 0xe6550000 0 0x60>; 712 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 713 clocks = <&cpg CPG_MOD 515>, 714 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 715 <&scif_clk>; 716 clock-names = "fck", "brg_int", "scif_clk"; 717 dmas = <&dmac0 0x33>, <&dmac0 0x32>, 718 <&dmac1 0x33>, <&dmac1 0x32>; 719 dma-names = "tx", "rx", "tx", "rx"; 720 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 721 resets = <&cpg 515>; 722 status = "disabled"; 723 }; 724 725 hscif2: serial@e6560000 { 726 compatible = "renesas,hscif-r8a779g0", 727 "renesas,rcar-gen4-hscif", "renesas,hscif"; 728 reg = <0 0xe6560000 0 0x60>; 729 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 730 clocks = <&cpg CPG_MOD 516>, 731 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 732 <&scif_clk2>; 733 clock-names = "fck", "brg_int", "scif_clk"; 734 dmas = <&dmac0 0x35>, <&dmac0 0x34>, 735 <&dmac1 0x35>, <&dmac1 0x34>; 736 dma-names = "tx", "rx", "tx", "rx"; 737 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 738 resets = <&cpg 516>; 739 status = "disabled"; 740 }; 741 742 hscif3: serial@e66a0000 { 743 compatible = "renesas,hscif-r8a779g0", 744 "renesas,rcar-gen4-hscif", "renesas,hscif"; 745 reg = <0 0xe66a0000 0 0x60>; 746 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 747 clocks = <&cpg CPG_MOD 517>, 748 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 749 <&scif_clk>; 750 clock-names = "fck", "brg_int", "scif_clk"; 751 dmas = <&dmac0 0x37>, <&dmac0 0x36>, 752 <&dmac1 0x37>, <&dmac1 0x36>; 753 dma-names = "tx", "rx", "tx", "rx"; 754 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 755 resets = <&cpg 517>; 756 status = "disabled"; 757 }; 758 759 pciec0: pcie@e65d0000 { 760 compatible = "renesas,r8a779g0-pcie", 761 "renesas,rcar-gen4-pcie"; 762 reg = <0 0xe65d0000 0 0x1000>, <0 0xe65d2000 0 0x0800>, 763 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 764 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 765 <0 0xfe000000 0 0x400000>; 766 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 767 interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 771 interrupt-names = "msi", "dma", "sft_ce", "app"; 772 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 773 clock-names = "core", "ref"; 774 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 775 resets = <&cpg 624>; 776 reset-names = "pwr"; 777 max-link-speed = <4>; 778 num-lanes = <2>; 779 #address-cells = <3>; 780 #size-cells = <2>; 781 bus-range = <0x00 0xff>; 782 device_type = "pci"; 783 ranges = <0x01000000 0 0x00000000 0 0xfe000000 0 0x00400000>, 784 <0x02000000 0 0x30000000 0 0x30000000 0 0x10000000>; 785 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 786 #interrupt-cells = <1>; 787 interrupt-map-mask = <0 0 0 7>; 788 interrupt-map = <0 0 0 1 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 789 <0 0 0 2 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 790 <0 0 0 3 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 791 <0 0 0 4 &gic GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>; 792 snps,enable-cdm-check; 793 status = "disabled"; 794 }; 795 796 pciec1: pcie@e65d8000 { 797 compatible = "renesas,r8a779g0-pcie", 798 "renesas,rcar-gen4-pcie"; 799 reg = <0 0xe65d8000 0 0x1000>, <0 0xe65da000 0 0x0800>, 800 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 801 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 802 <0 0xee900000 0 0x400000>; 803 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "config"; 804 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 805 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 806 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 807 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 808 interrupt-names = "msi", "dma", "sft_ce", "app"; 809 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 810 clock-names = "core", "ref"; 811 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 812 resets = <&cpg 625>; 813 reset-names = "pwr"; 814 max-link-speed = <4>; 815 num-lanes = <2>; 816 #address-cells = <3>; 817 #size-cells = <2>; 818 bus-range = <0x00 0xff>; 819 device_type = "pci"; 820 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00400000>, 821 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x10000000>; 822 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 823 #interrupt-cells = <1>; 824 interrupt-map-mask = <0 0 0 7>; 825 interrupt-map = <0 0 0 1 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 826 <0 0 0 2 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 827 <0 0 0 3 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, 828 <0 0 0 4 &gic GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>; 829 snps,enable-cdm-check; 830 status = "disabled"; 831 }; 832 833 pciec0_ep: pcie-ep@e65d0000 { 834 compatible = "renesas,r8a779g0-pcie-ep", 835 "renesas,rcar-gen4-pcie-ep"; 836 reg = <0 0xe65d0000 0 0x2000>, <0 0xe65d2000 0 0x1000>, 837 <0 0xe65d3000 0 0x2000>, <0 0xe65d5000 0 0x1200>, 838 <0 0xe65d6200 0 0x0e00>, <0 0xe65d7000 0 0x0400>, 839 <0 0xfe000000 0 0x400000>; 840 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 841 interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 842 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 843 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>; 844 interrupt-names = "dma", "sft_ce", "app"; 845 clocks = <&cpg CPG_MOD 624>, <&pcie0_clkref>; 846 clock-names = "core", "ref"; 847 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 848 resets = <&cpg 624>; 849 reset-names = "pwr"; 850 max-link-speed = <4>; 851 num-lanes = <2>; 852 max-functions = /bits/ 8 <2>; 853 status = "disabled"; 854 }; 855 856 pciec1_ep: pcie-ep@e65d8000 { 857 compatible = "renesas,r8a779g0-pcie-ep", 858 "renesas,rcar-gen4-pcie-ep"; 859 reg = <0 0xe65d8000 0 0x2000>, <0 0xe65da000 0 0x1000>, 860 <0 0xe65db000 0 0x2000>, <0 0xe65dd000 0 0x1200>, 861 <0 0xe65de200 0 0x0e00>, <0 0xe65df000 0 0x0400>, 862 <0 0xee900000 0 0x400000>; 863 reg-names = "dbi", "dbi2", "atu", "dma", "app", "phy", "addr_space"; 864 interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; 867 interrupt-names = "dma", "sft_ce", "app"; 868 clocks = <&cpg CPG_MOD 625>, <&pcie1_clkref>; 869 clock-names = "core", "ref"; 870 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 871 resets = <&cpg 625>; 872 reset-names = "pwr"; 873 max-link-speed = <4>; 874 num-lanes = <2>; 875 max-functions = /bits/ 8 <2>; 876 status = "disabled"; 877 }; 878 879 canfd: can@e6660000 { 880 compatible = "renesas,r8a779g0-canfd", 881 "renesas,rcar-gen4-canfd"; 882 reg = <0 0xe6660000 0 0x8500>; 883 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 885 interrupt-names = "ch_int", "g_int"; 886 clocks = <&cpg CPG_MOD 328>, 887 <&cpg CPG_CORE R8A779G0_CLK_CANFD>, 888 <&can_clk>; 889 clock-names = "fck", "canfd", "can_clk"; 890 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>; 891 assigned-clock-rates = <80000000>; 892 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 893 resets = <&cpg 328>; 894 status = "disabled"; 895 896 channel0 { 897 status = "disabled"; 898 }; 899 900 channel1 { 901 status = "disabled"; 902 }; 903 904 channel2 { 905 status = "disabled"; 906 }; 907 908 channel3 { 909 status = "disabled"; 910 }; 911 912 channel4 { 913 status = "disabled"; 914 }; 915 916 channel5 { 917 status = "disabled"; 918 }; 919 920 channel6 { 921 status = "disabled"; 922 }; 923 924 channel7 { 925 status = "disabled"; 926 }; 927 }; 928 929 avb0: ethernet@e6800000 { 930 compatible = "renesas,etheravb-r8a779g0", 931 "renesas,etheravb-rcar-gen4"; 932 reg = <0 0xe6800000 0 0x1000>; 933 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 936 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 937 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 938 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 939 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 940 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 941 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 942 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 943 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 944 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 945 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 949 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 950 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 951 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 952 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 953 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 954 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 958 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 959 "ch5", "ch6", "ch7", "ch8", "ch9", 960 "ch10", "ch11", "ch12", "ch13", 961 "ch14", "ch15", "ch16", "ch17", 962 "ch18", "ch19", "ch20", "ch21", 963 "ch22", "ch23", "ch24"; 964 clocks = <&cpg CPG_MOD 211>; 965 clock-names = "fck"; 966 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 967 resets = <&cpg 211>; 968 phy-mode = "rgmii"; 969 rx-internal-delay-ps = <0>; 970 tx-internal-delay-ps = <0>; 971 iommus = <&ipmmu_hc 0>; 972 status = "disabled"; 973 }; 974 975 avb1: ethernet@e6810000 { 976 compatible = "renesas,etheravb-r8a779g0", 977 "renesas,etheravb-rcar-gen4"; 978 reg = <0 0xe6810000 0 0x1000>; 979 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 1004 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1005 "ch5", "ch6", "ch7", "ch8", "ch9", 1006 "ch10", "ch11", "ch12", "ch13", 1007 "ch14", "ch15", "ch16", "ch17", 1008 "ch18", "ch19", "ch20", "ch21", 1009 "ch22", "ch23", "ch24"; 1010 clocks = <&cpg CPG_MOD 212>; 1011 clock-names = "fck"; 1012 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1013 resets = <&cpg 212>; 1014 phy-mode = "rgmii"; 1015 rx-internal-delay-ps = <0>; 1016 tx-internal-delay-ps = <0>; 1017 iommus = <&ipmmu_hc 1>; 1018 status = "disabled"; 1019 }; 1020 1021 avb2: ethernet@e6820000 { 1022 compatible = "renesas,etheravb-r8a779g0", 1023 "renesas,etheravb-rcar-gen4"; 1024 reg = <0 0xe6820000 0 0x1000>; 1025 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 1046 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 1047 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 1048 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 1049 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 1050 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 1051 "ch5", "ch6", "ch7", "ch8", "ch9", 1052 "ch10", "ch11", "ch12", "ch13", 1053 "ch14", "ch15", "ch16", "ch17", 1054 "ch18", "ch19", "ch20", "ch21", 1055 "ch22", "ch23", "ch24"; 1056 clocks = <&cpg CPG_MOD 213>; 1057 clock-names = "fck"; 1058 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1059 resets = <&cpg 213>; 1060 phy-mode = "rgmii"; 1061 rx-internal-delay-ps = <0>; 1062 tx-internal-delay-ps = <0>; 1063 iommus = <&ipmmu_hc 2>; 1064 status = "disabled"; 1065 }; 1066 1067 pwm0: pwm@e6e30000 { 1068 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1069 reg = <0 0xe6e30000 0 0x10>; 1070 #pwm-cells = <2>; 1071 clocks = <&cpg CPG_MOD 628>; 1072 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1073 resets = <&cpg 628>; 1074 status = "disabled"; 1075 }; 1076 1077 pwm1: pwm@e6e31000 { 1078 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1079 reg = <0 0xe6e31000 0 0x10>; 1080 #pwm-cells = <2>; 1081 clocks = <&cpg CPG_MOD 628>; 1082 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1083 resets = <&cpg 628>; 1084 status = "disabled"; 1085 }; 1086 1087 pwm2: pwm@e6e32000 { 1088 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1089 reg = <0 0xe6e32000 0 0x10>; 1090 #pwm-cells = <2>; 1091 clocks = <&cpg CPG_MOD 628>; 1092 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1093 resets = <&cpg 628>; 1094 status = "disabled"; 1095 }; 1096 1097 pwm3: pwm@e6e33000 { 1098 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1099 reg = <0 0xe6e33000 0 0x10>; 1100 #pwm-cells = <2>; 1101 clocks = <&cpg CPG_MOD 628>; 1102 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1103 resets = <&cpg 628>; 1104 status = "disabled"; 1105 }; 1106 1107 pwm4: pwm@e6e34000 { 1108 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1109 reg = <0 0xe6e34000 0 0x10>; 1110 #pwm-cells = <2>; 1111 clocks = <&cpg CPG_MOD 628>; 1112 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1113 resets = <&cpg 628>; 1114 status = "disabled"; 1115 }; 1116 1117 pwm5: pwm@e6e35000 { 1118 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1119 reg = <0 0xe6e35000 0 0x10>; 1120 #pwm-cells = <2>; 1121 clocks = <&cpg CPG_MOD 628>; 1122 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1123 resets = <&cpg 628>; 1124 status = "disabled"; 1125 }; 1126 1127 pwm6: pwm@e6e36000 { 1128 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1129 reg = <0 0xe6e36000 0 0x10>; 1130 #pwm-cells = <2>; 1131 clocks = <&cpg CPG_MOD 628>; 1132 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1133 resets = <&cpg 628>; 1134 status = "disabled"; 1135 }; 1136 1137 pwm7: pwm@e6e37000 { 1138 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1139 reg = <0 0xe6e37000 0 0x10>; 1140 #pwm-cells = <2>; 1141 clocks = <&cpg CPG_MOD 628>; 1142 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1143 resets = <&cpg 628>; 1144 status = "disabled"; 1145 }; 1146 1147 pwm8: pwm@e6e38000 { 1148 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1149 reg = <0 0xe6e38000 0 0x10>; 1150 #pwm-cells = <2>; 1151 clocks = <&cpg CPG_MOD 628>; 1152 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1153 resets = <&cpg 628>; 1154 status = "disabled"; 1155 }; 1156 1157 pwm9: pwm@e6e39000 { 1158 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1159 reg = <0 0xe6e39000 0 0x10>; 1160 #pwm-cells = <2>; 1161 clocks = <&cpg CPG_MOD 628>; 1162 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1163 resets = <&cpg 628>; 1164 status = "disabled"; 1165 }; 1166 1167 scif0: serial@e6e60000 { 1168 compatible = "renesas,scif-r8a779g0", 1169 "renesas,rcar-gen4-scif", "renesas,scif"; 1170 reg = <0 0xe6e60000 0 64>; 1171 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 1172 clocks = <&cpg CPG_MOD 702>, 1173 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1174 <&scif_clk>; 1175 clock-names = "fck", "brg_int", "scif_clk"; 1176 dmas = <&dmac0 0x51>, <&dmac0 0x50>, 1177 <&dmac1 0x51>, <&dmac1 0x50>; 1178 dma-names = "tx", "rx", "tx", "rx"; 1179 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1180 resets = <&cpg 702>; 1181 status = "disabled"; 1182 }; 1183 1184 scif1: serial@e6e68000 { 1185 compatible = "renesas,scif-r8a779g0", 1186 "renesas,rcar-gen4-scif", "renesas,scif"; 1187 reg = <0 0xe6e68000 0 64>; 1188 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 1189 clocks = <&cpg CPG_MOD 703>, 1190 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1191 <&scif_clk>; 1192 clock-names = "fck", "brg_int", "scif_clk"; 1193 dmas = <&dmac0 0x53>, <&dmac0 0x52>, 1194 <&dmac1 0x53>, <&dmac1 0x52>; 1195 dma-names = "tx", "rx", "tx", "rx"; 1196 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1197 resets = <&cpg 703>; 1198 status = "disabled"; 1199 }; 1200 1201 scif3: serial@e6c50000 { 1202 compatible = "renesas,scif-r8a779g0", 1203 "renesas,rcar-gen4-scif", "renesas,scif"; 1204 reg = <0 0xe6c50000 0 64>; 1205 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 1206 clocks = <&cpg CPG_MOD 704>, 1207 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1208 <&scif_clk>; 1209 clock-names = "fck", "brg_int", "scif_clk"; 1210 dmas = <&dmac0 0x57>, <&dmac0 0x56>, 1211 <&dmac1 0x57>, <&dmac1 0x56>; 1212 dma-names = "tx", "rx", "tx", "rx"; 1213 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1214 resets = <&cpg 704>; 1215 status = "disabled"; 1216 }; 1217 1218 scif4: serial@e6c40000 { 1219 compatible = "renesas,scif-r8a779g0", 1220 "renesas,rcar-gen4-scif", "renesas,scif"; 1221 reg = <0 0xe6c40000 0 64>; 1222 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1223 clocks = <&cpg CPG_MOD 705>, 1224 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1225 <&scif_clk2>; 1226 clock-names = "fck", "brg_int", "scif_clk"; 1227 dmas = <&dmac0 0x59>, <&dmac0 0x58>, 1228 <&dmac1 0x59>, <&dmac1 0x58>; 1229 dma-names = "tx", "rx", "tx", "rx"; 1230 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1231 resets = <&cpg 705>; 1232 status = "disabled"; 1233 }; 1234 1235 tpu: pwm@e6e80000 { 1236 compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 1237 reg = <0 0xe6e80000 0 0x148>; 1238 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 1239 clocks = <&cpg CPG_MOD 718>; 1240 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1241 resets = <&cpg 718>; 1242 #pwm-cells = <3>; 1243 status = "disabled"; 1244 }; 1245 1246 msiof0: spi@e6e90000 { 1247 compatible = "renesas,msiof-r8a779g0", 1248 "renesas,rcar-gen4-msiof"; 1249 reg = <0 0xe6e90000 0 0x0064>; 1250 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1251 clocks = <&cpg CPG_MOD 618>; 1252 dmas = <&dmac0 0x41>, <&dmac0 0x40>, 1253 <&dmac1 0x41>, <&dmac1 0x40>; 1254 dma-names = "tx", "rx", "tx", "rx"; 1255 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1256 resets = <&cpg 618>; 1257 #address-cells = <1>; 1258 #size-cells = <0>; 1259 status = "disabled"; 1260 }; 1261 1262 msiof1: spi@e6ea0000 { 1263 compatible = "renesas,msiof-r8a779g0", 1264 "renesas,rcar-gen4-msiof"; 1265 reg = <0 0xe6ea0000 0 0x0064>; 1266 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1267 clocks = <&cpg CPG_MOD 619>; 1268 dmas = <&dmac0 0x43>, <&dmac0 0x42>, 1269 <&dmac1 0x43>, <&dmac1 0x42>; 1270 dma-names = "tx", "rx", "tx", "rx"; 1271 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1272 resets = <&cpg 619>; 1273 #address-cells = <1>; 1274 #size-cells = <0>; 1275 status = "disabled"; 1276 }; 1277 1278 msiof2: spi@e6c00000 { 1279 compatible = "renesas,msiof-r8a779g0", 1280 "renesas,rcar-gen4-msiof"; 1281 reg = <0 0xe6c00000 0 0x0064>; 1282 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1283 clocks = <&cpg CPG_MOD 620>; 1284 dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1285 <&dmac1 0x45>, <&dmac1 0x44>; 1286 dma-names = "tx", "rx", "tx", "rx"; 1287 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1288 resets = <&cpg 620>; 1289 #address-cells = <1>; 1290 #size-cells = <0>; 1291 status = "disabled"; 1292 }; 1293 1294 msiof3: spi@e6c10000 { 1295 compatible = "renesas,msiof-r8a779g0", 1296 "renesas,rcar-gen4-msiof"; 1297 reg = <0 0xe6c10000 0 0x0064>; 1298 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1299 clocks = <&cpg CPG_MOD 621>; 1300 dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1301 <&dmac1 0x47>, <&dmac1 0x46>; 1302 dma-names = "tx", "rx", "tx", "rx"; 1303 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1304 resets = <&cpg 621>; 1305 #address-cells = <1>; 1306 #size-cells = <0>; 1307 status = "disabled"; 1308 }; 1309 1310 msiof4: spi@e6c20000 { 1311 compatible = "renesas,msiof-r8a779g0", 1312 "renesas,rcar-gen4-msiof"; 1313 reg = <0 0xe6c20000 0 0x0064>; 1314 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1315 clocks = <&cpg CPG_MOD 622>; 1316 dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1317 <&dmac1 0x49>, <&dmac1 0x48>; 1318 dma-names = "tx", "rx", "tx", "rx"; 1319 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1320 resets = <&cpg 622>; 1321 #address-cells = <1>; 1322 #size-cells = <0>; 1323 status = "disabled"; 1324 }; 1325 1326 msiof5: spi@e6c28000 { 1327 compatible = "renesas,msiof-r8a779g0", 1328 "renesas,rcar-gen4-msiof"; 1329 reg = <0 0xe6c28000 0 0x0064>; 1330 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1331 clocks = <&cpg CPG_MOD 623>; 1332 dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1333 <&dmac1 0x4b>, <&dmac1 0x4a>; 1334 dma-names = "tx", "rx", "tx", "rx"; 1335 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1336 resets = <&cpg 623>; 1337 #address-cells = <1>; 1338 #size-cells = <0>; 1339 status = "disabled"; 1340 }; 1341 1342 vin00: video@e6ef0000 { 1343 compatible = "renesas,vin-r8a779g0", 1344 "renesas,rcar-gen4-vin"; 1345 reg = <0 0xe6ef0000 0 0x1000>; 1346 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; 1347 clocks = <&cpg CPG_MOD 730>; 1348 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1349 resets = <&cpg 730>; 1350 renesas,id = <0>; 1351 status = "disabled"; 1352 1353 ports { 1354 #address-cells = <1>; 1355 #size-cells = <0>; 1356 1357 port@2 { 1358 #address-cells = <1>; 1359 #size-cells = <0>; 1360 1361 reg = <2>; 1362 1363 vin00isp0: endpoint@0 { 1364 reg = <0>; 1365 remote-endpoint = <&isp0vin00>; 1366 }; 1367 }; 1368 }; 1369 }; 1370 1371 vin01: video@e6ef1000 { 1372 compatible = "renesas,vin-r8a779g0", 1373 "renesas,rcar-gen4-vin"; 1374 reg = <0 0xe6ef1000 0 0x1000>; 1375 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; 1376 clocks = <&cpg CPG_MOD 731>; 1377 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1378 resets = <&cpg 731>; 1379 renesas,id = <1>; 1380 status = "disabled"; 1381 1382 ports { 1383 #address-cells = <1>; 1384 #size-cells = <0>; 1385 1386 port@2 { 1387 #address-cells = <1>; 1388 #size-cells = <0>; 1389 1390 reg = <2>; 1391 1392 vin01isp0: endpoint@0 { 1393 reg = <0>; 1394 remote-endpoint = <&isp0vin01>; 1395 }; 1396 }; 1397 }; 1398 }; 1399 1400 vin02: video@e6ef2000 { 1401 compatible = "renesas,vin-r8a779g0", 1402 "renesas,rcar-gen4-vin"; 1403 reg = <0 0xe6ef2000 0 0x1000>; 1404 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; 1405 clocks = <&cpg CPG_MOD 800>; 1406 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1407 resets = <&cpg 800>; 1408 renesas,id = <2>; 1409 status = "disabled"; 1410 1411 ports { 1412 #address-cells = <1>; 1413 #size-cells = <0>; 1414 1415 port@2 { 1416 #address-cells = <1>; 1417 #size-cells = <0>; 1418 1419 reg = <2>; 1420 1421 vin02isp0: endpoint@0 { 1422 reg = <0>; 1423 remote-endpoint = <&isp0vin02>; 1424 }; 1425 }; 1426 }; 1427 }; 1428 1429 vin03: video@e6ef3000 { 1430 compatible = "renesas,vin-r8a779g0", 1431 "renesas,rcar-gen4-vin"; 1432 reg = <0 0xe6ef3000 0 0x1000>; 1433 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; 1434 clocks = <&cpg CPG_MOD 801>; 1435 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1436 resets = <&cpg 801>; 1437 renesas,id = <3>; 1438 status = "disabled"; 1439 1440 ports { 1441 #address-cells = <1>; 1442 #size-cells = <0>; 1443 1444 port@2 { 1445 #address-cells = <1>; 1446 #size-cells = <0>; 1447 1448 reg = <2>; 1449 1450 vin03isp0: endpoint@0 { 1451 reg = <0>; 1452 remote-endpoint = <&isp0vin03>; 1453 }; 1454 }; 1455 }; 1456 }; 1457 1458 vin04: video@e6ef4000 { 1459 compatible = "renesas,vin-r8a779g0", 1460 "renesas,rcar-gen4-vin"; 1461 reg = <0 0xe6ef4000 0 0x1000>; 1462 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; 1463 clocks = <&cpg CPG_MOD 802>; 1464 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1465 resets = <&cpg 802>; 1466 renesas,id = <4>; 1467 status = "disabled"; 1468 1469 ports { 1470 #address-cells = <1>; 1471 #size-cells = <0>; 1472 1473 port@2 { 1474 #address-cells = <1>; 1475 #size-cells = <0>; 1476 1477 reg = <2>; 1478 1479 vin04isp0: endpoint@0 { 1480 reg = <0>; 1481 remote-endpoint = <&isp0vin04>; 1482 }; 1483 }; 1484 }; 1485 }; 1486 1487 vin05: video@e6ef5000 { 1488 compatible = "renesas,vin-r8a779g0", 1489 "renesas,rcar-gen4-vin"; 1490 reg = <0 0xe6ef5000 0 0x1000>; 1491 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; 1492 clocks = <&cpg CPG_MOD 803>; 1493 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1494 resets = <&cpg 803>; 1495 renesas,id = <5>; 1496 status = "disabled"; 1497 1498 ports { 1499 #address-cells = <1>; 1500 #size-cells = <0>; 1501 1502 port@2 { 1503 #address-cells = <1>; 1504 #size-cells = <0>; 1505 1506 reg = <2>; 1507 1508 vin05isp0: endpoint@0 { 1509 reg = <0>; 1510 remote-endpoint = <&isp0vin05>; 1511 }; 1512 }; 1513 }; 1514 }; 1515 1516 vin06: video@e6ef6000 { 1517 compatible = "renesas,vin-r8a779g0", 1518 "renesas,rcar-gen4-vin"; 1519 reg = <0 0xe6ef6000 0 0x1000>; 1520 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; 1521 clocks = <&cpg CPG_MOD 804>; 1522 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1523 resets = <&cpg 804>; 1524 renesas,id = <6>; 1525 status = "disabled"; 1526 1527 ports { 1528 #address-cells = <1>; 1529 #size-cells = <0>; 1530 1531 port@2 { 1532 #address-cells = <1>; 1533 #size-cells = <0>; 1534 1535 reg = <2>; 1536 1537 vin06isp0: endpoint@0 { 1538 reg = <0>; 1539 remote-endpoint = <&isp0vin06>; 1540 }; 1541 }; 1542 }; 1543 }; 1544 1545 vin07: video@e6ef7000 { 1546 compatible = "renesas,vin-r8a779g0", 1547 "renesas,rcar-gen4-vin"; 1548 reg = <0 0xe6ef7000 0 0x1000>; 1549 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; 1550 clocks = <&cpg CPG_MOD 805>; 1551 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1552 resets = <&cpg 805>; 1553 renesas,id = <7>; 1554 status = "disabled"; 1555 1556 ports { 1557 #address-cells = <1>; 1558 #size-cells = <0>; 1559 1560 port@2 { 1561 #address-cells = <1>; 1562 #size-cells = <0>; 1563 1564 reg = <2>; 1565 1566 vin07isp0: endpoint@0 { 1567 reg = <0>; 1568 remote-endpoint = <&isp0vin07>; 1569 }; 1570 }; 1571 }; 1572 }; 1573 1574 vin08: video@e6ef8000 { 1575 compatible = "renesas,vin-r8a779g0", 1576 "renesas,rcar-gen4-vin"; 1577 reg = <0 0xe6ef8000 0 0x1000>; 1578 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; 1579 clocks = <&cpg CPG_MOD 806>; 1580 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1581 resets = <&cpg 806>; 1582 renesas,id = <8>; 1583 status = "disabled"; 1584 1585 ports { 1586 #address-cells = <1>; 1587 #size-cells = <0>; 1588 1589 port@2 { 1590 #address-cells = <1>; 1591 #size-cells = <0>; 1592 1593 reg = <2>; 1594 1595 vin08isp1: endpoint@1 { 1596 reg = <1>; 1597 remote-endpoint = <&isp1vin08>; 1598 }; 1599 }; 1600 }; 1601 }; 1602 1603 vin09: video@e6ef9000 { 1604 compatible = "renesas,vin-r8a779g0", 1605 "renesas,rcar-gen4-vin"; 1606 reg = <0 0xe6ef9000 0 0x1000>; 1607 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; 1608 clocks = <&cpg CPG_MOD 807>; 1609 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1610 resets = <&cpg 807>; 1611 renesas,id = <9>; 1612 status = "disabled"; 1613 1614 ports { 1615 #address-cells = <1>; 1616 #size-cells = <0>; 1617 1618 port@2 { 1619 #address-cells = <1>; 1620 #size-cells = <0>; 1621 1622 reg = <2>; 1623 1624 vin09isp1: endpoint@1 { 1625 reg = <1>; 1626 remote-endpoint = <&isp1vin09>; 1627 }; 1628 }; 1629 }; 1630 }; 1631 1632 vin10: video@e6efa000 { 1633 compatible = "renesas,vin-r8a779g0", 1634 "renesas,rcar-gen4-vin"; 1635 reg = <0 0xe6efa000 0 0x1000>; 1636 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; 1637 clocks = <&cpg CPG_MOD 808>; 1638 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1639 resets = <&cpg 808>; 1640 renesas,id = <10>; 1641 status = "disabled"; 1642 1643 ports { 1644 #address-cells = <1>; 1645 #size-cells = <0>; 1646 1647 port@2 { 1648 #address-cells = <1>; 1649 #size-cells = <0>; 1650 1651 reg = <2>; 1652 1653 vin10isp1: endpoint@1 { 1654 reg = <1>; 1655 remote-endpoint = <&isp1vin10>; 1656 }; 1657 }; 1658 }; 1659 }; 1660 1661 vin11: video@e6efb000 { 1662 compatible = "renesas,vin-r8a779g0", 1663 "renesas,rcar-gen4-vin"; 1664 reg = <0 0xe6efb000 0 0x1000>; 1665 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; 1666 clocks = <&cpg CPG_MOD 809>; 1667 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1668 resets = <&cpg 809>; 1669 renesas,id = <11>; 1670 status = "disabled"; 1671 1672 ports { 1673 #address-cells = <1>; 1674 #size-cells = <0>; 1675 1676 port@2 { 1677 #address-cells = <1>; 1678 #size-cells = <0>; 1679 1680 reg = <2>; 1681 1682 vin11isp1: endpoint@1 { 1683 reg = <1>; 1684 remote-endpoint = <&isp1vin11>; 1685 }; 1686 }; 1687 }; 1688 }; 1689 1690 vin12: video@e6efc000 { 1691 compatible = "renesas,vin-r8a779g0", 1692 "renesas,rcar-gen4-vin"; 1693 reg = <0 0xe6efc000 0 0x1000>; 1694 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; 1695 clocks = <&cpg CPG_MOD 810>; 1696 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1697 resets = <&cpg 810>; 1698 renesas,id = <12>; 1699 status = "disabled"; 1700 1701 ports { 1702 #address-cells = <1>; 1703 #size-cells = <0>; 1704 1705 port@2 { 1706 #address-cells = <1>; 1707 #size-cells = <0>; 1708 1709 reg = <2>; 1710 1711 vin12isp1: endpoint@1 { 1712 reg = <1>; 1713 remote-endpoint = <&isp1vin12>; 1714 }; 1715 }; 1716 }; 1717 }; 1718 1719 vin13: video@e6efd000 { 1720 compatible = "renesas,vin-r8a779g0", 1721 "renesas,rcar-gen4-vin"; 1722 reg = <0 0xe6efd000 0 0x1000>; 1723 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; 1724 clocks = <&cpg CPG_MOD 811>; 1725 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1726 resets = <&cpg 811>; 1727 renesas,id = <13>; 1728 status = "disabled"; 1729 1730 ports { 1731 #address-cells = <1>; 1732 #size-cells = <0>; 1733 1734 port@2 { 1735 #address-cells = <1>; 1736 #size-cells = <0>; 1737 1738 reg = <2>; 1739 1740 vin13isp1: endpoint@1 { 1741 reg = <1>; 1742 remote-endpoint = <&isp1vin13>; 1743 }; 1744 }; 1745 }; 1746 }; 1747 1748 vin14: video@e6efe000 { 1749 compatible = "renesas,vin-r8a779g0", 1750 "renesas,rcar-gen4-vin"; 1751 reg = <0 0xe6efe000 0 0x1000>; 1752 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; 1753 clocks = <&cpg CPG_MOD 812>; 1754 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1755 resets = <&cpg 812>; 1756 renesas,id = <14>; 1757 status = "disabled"; 1758 1759 ports { 1760 #address-cells = <1>; 1761 #size-cells = <0>; 1762 1763 port@2 { 1764 #address-cells = <1>; 1765 #size-cells = <0>; 1766 1767 reg = <2>; 1768 1769 vin14isp1: endpoint@1 { 1770 reg = <1>; 1771 remote-endpoint = <&isp1vin14>; 1772 }; 1773 }; 1774 }; 1775 }; 1776 1777 vin15: video@e6eff000 { 1778 compatible = "renesas,vin-r8a779g0", 1779 "renesas,rcar-gen4-vin"; 1780 reg = <0 0xe6eff000 0 0x1000>; 1781 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; 1782 clocks = <&cpg CPG_MOD 813>; 1783 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1784 resets = <&cpg 813>; 1785 renesas,id = <15>; 1786 status = "disabled"; 1787 1788 ports { 1789 #address-cells = <1>; 1790 #size-cells = <0>; 1791 1792 port@2 { 1793 #address-cells = <1>; 1794 #size-cells = <0>; 1795 1796 reg = <2>; 1797 1798 vin15isp1: endpoint@1 { 1799 reg = <1>; 1800 remote-endpoint = <&isp1vin15>; 1801 }; 1802 }; 1803 }; 1804 }; 1805 1806 dmac0: dma-controller@e7350000 { 1807 compatible = "renesas,dmac-r8a779g0", 1808 "renesas,rcar-gen4-dmac"; 1809 reg = <0 0xe7350000 0 0x1000>, 1810 <0 0xe7300000 0 0x10000>; 1811 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 1812 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 1813 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 1814 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 1815 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 1816 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 1817 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 1818 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 1819 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 1820 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1821 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 1822 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 1823 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 1824 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1825 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1826 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1827 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 1828 interrupt-names = "error", 1829 "ch0", "ch1", "ch2", "ch3", "ch4", 1830 "ch5", "ch6", "ch7", "ch8", "ch9", 1831 "ch10", "ch11", "ch12", "ch13", 1832 "ch14", "ch15"; 1833 clocks = <&cpg CPG_MOD 709>; 1834 clock-names = "fck"; 1835 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1836 resets = <&cpg 709>; 1837 #dma-cells = <1>; 1838 dma-channels = <16>; 1839 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1840 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1841 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1842 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1843 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1844 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1845 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1846 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1847 }; 1848 1849 dmac1: dma-controller@e7351000 { 1850 compatible = "renesas,dmac-r8a779g0", 1851 "renesas,rcar-gen4-dmac"; 1852 reg = <0 0xe7351000 0 0x1000>, 1853 <0 0xe7310000 0 0x10000>; 1854 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1855 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1856 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1857 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1858 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1859 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1860 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1861 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1862 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1863 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1864 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1865 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1866 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1867 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1868 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1869 <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1870 <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 1871 interrupt-names = "error", 1872 "ch0", "ch1", "ch2", "ch3", "ch4", 1873 "ch5", "ch6", "ch7", "ch8", "ch9", 1874 "ch10", "ch11", "ch12", "ch13", 1875 "ch14", "ch15"; 1876 clocks = <&cpg CPG_MOD 710>; 1877 clock-names = "fck"; 1878 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1879 resets = <&cpg 710>; 1880 #dma-cells = <1>; 1881 dma-channels = <16>; 1882 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, 1883 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, 1884 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, 1885 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>, 1886 <&ipmmu_ds0 24>, <&ipmmu_ds0 25>, 1887 <&ipmmu_ds0 26>, <&ipmmu_ds0 27>, 1888 <&ipmmu_ds0 28>, <&ipmmu_ds0 29>, 1889 <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; 1890 }; 1891 1892 rcar_sound: sound@ec5a0000 { 1893 compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4"; 1894 reg = <0 0xec5a0000 0 0x020>, 1895 <0 0xec540000 0 0x1000>, 1896 <0 0xec541000 0 0x050>, 1897 <0 0xec400000 0 0x40000>; 1898 reg-names = "adg", "ssiu", "ssi", "sdmc"; 1899 1900 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; 1901 clock-names = "ssiu.0", "ssi.0", "clkin"; 1902 /* #clock-cells is fixed */ 1903 #clock-cells = <0>; 1904 /* #sound-dai-cells is fixed */ 1905 #sound-dai-cells = <0>; 1906 1907 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1908 resets = <&cpg 2926>, <&cpg 2927>; 1909 reset-names = "ssiu.0", "ssi.0"; 1910 status = "disabled"; 1911 1912 rcar_sound,ssiu { 1913 ssiu00: ssiu-0 { 1914 dmas = <&dmac0 0x6e>, <&dmac0 0x6f>; 1915 dma-names = "tx", "rx"; 1916 }; 1917 ssiu01: ssiu-1 { 1918 dmas = <&dmac0 0x6c>, <&dmac0 0x6d>; 1919 dma-names = "tx", "rx"; 1920 }; 1921 ssiu02: ssiu-2 { 1922 dmas = <&dmac0 0x6a>, <&dmac0 0x6b>; 1923 dma-names = "tx", "rx"; 1924 }; 1925 ssiu03: ssiu-3 { 1926 dmas = <&dmac0 0x68>, <&dmac0 0x69>; 1927 dma-names = "tx", "rx"; 1928 }; 1929 ssiu04: ssiu-4 { 1930 dmas = <&dmac0 0x66>, <&dmac0 0x67>; 1931 dma-names = "tx", "rx"; 1932 }; 1933 ssiu05: ssiu-5 { 1934 dmas = <&dmac0 0x64>, <&dmac0 0x65>; 1935 dma-names = "tx", "rx"; 1936 }; 1937 ssiu06: ssiu-6 { 1938 dmas = <&dmac0 0x62>, <&dmac0 0x63>; 1939 dma-names = "tx", "rx"; 1940 }; 1941 ssiu07: ssiu-7 { 1942 dmas = <&dmac0 0x60>, <&dmac0 0x61>; 1943 dma-names = "tx", "rx"; 1944 }; 1945 }; 1946 1947 rcar_sound,ssi { 1948 ssi0: ssi-0 { 1949 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; 1950 }; 1951 }; 1952 }; 1953 1954 mmc0: mmc@ee140000 { 1955 compatible = "renesas,sdhi-r8a779g0", 1956 "renesas,rcar-gen4-sdhi"; 1957 reg = <0 0xee140000 0 0x2000>; 1958 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1959 clocks = <&cpg CPG_MOD 706>, 1960 <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1961 clock-names = "core", "clkh"; 1962 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1963 resets = <&cpg 706>; 1964 max-frequency = <200000000>; 1965 iommus = <&ipmmu_ds0 32>; 1966 status = "disabled"; 1967 }; 1968 1969 rpc: spi@ee200000 { 1970 compatible = "renesas,r8a779g0-rpc-if", 1971 "renesas,rcar-gen4-rpc-if"; 1972 reg = <0 0xee200000 0 0x200>, 1973 <0 0x08000000 0 0x04000000>, 1974 <0 0xee208000 0 0x100>; 1975 reg-names = "regs", "dirmap", "wbuf"; 1976 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1977 clocks = <&cpg CPG_MOD 629>; 1978 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1979 resets = <&cpg 629>; 1980 #address-cells = <1>; 1981 #size-cells = <0>; 1982 status = "disabled"; 1983 }; 1984 1985 ipmmu_rt0: iommu@ee480000 { 1986 compatible = "renesas,ipmmu-r8a779g0", 1987 "renesas,rcar-gen4-ipmmu-vmsa"; 1988 reg = <0 0xee480000 0 0x20000>; 1989 renesas,ipmmu-main = <&ipmmu_mm>; 1990 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1991 #iommu-cells = <1>; 1992 }; 1993 1994 ipmmu_rt1: iommu@ee4c0000 { 1995 compatible = "renesas,ipmmu-r8a779g0", 1996 "renesas,rcar-gen4-ipmmu-vmsa"; 1997 reg = <0 0xee4c0000 0 0x20000>; 1998 renesas,ipmmu-main = <&ipmmu_mm>; 1999 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2000 #iommu-cells = <1>; 2001 }; 2002 2003 ipmmu_ds0: iommu@eed00000 { 2004 compatible = "renesas,ipmmu-r8a779g0", 2005 "renesas,rcar-gen4-ipmmu-vmsa"; 2006 reg = <0 0xeed00000 0 0x20000>; 2007 renesas,ipmmu-main = <&ipmmu_mm>; 2008 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2009 #iommu-cells = <1>; 2010 }; 2011 2012 ipmmu_hc: iommu@eed40000 { 2013 compatible = "renesas,ipmmu-r8a779g0", 2014 "renesas,rcar-gen4-ipmmu-vmsa"; 2015 reg = <0 0xeed40000 0 0x20000>; 2016 renesas,ipmmu-main = <&ipmmu_mm>; 2017 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2018 #iommu-cells = <1>; 2019 }; 2020 2021 ipmmu_ir: iommu@eed80000 { 2022 compatible = "renesas,ipmmu-r8a779g0", 2023 "renesas,rcar-gen4-ipmmu-vmsa"; 2024 reg = <0 0xeed80000 0 0x20000>; 2025 renesas,ipmmu-main = <&ipmmu_mm>; 2026 power-domains = <&sysc R8A779G0_PD_A3IR>; 2027 #iommu-cells = <1>; 2028 }; 2029 2030 ipmmu_vc: iommu@eedc0000 { 2031 compatible = "renesas,ipmmu-r8a779g0", 2032 "renesas,rcar-gen4-ipmmu-vmsa"; 2033 reg = <0 0xeedc0000 0 0x20000>; 2034 renesas,ipmmu-main = <&ipmmu_mm>; 2035 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2036 #iommu-cells = <1>; 2037 }; 2038 2039 ipmmu_3dg: iommu@eee00000 { 2040 compatible = "renesas,ipmmu-r8a779g0", 2041 "renesas,rcar-gen4-ipmmu-vmsa"; 2042 reg = <0 0xeee00000 0 0x20000>; 2043 renesas,ipmmu-main = <&ipmmu_mm>; 2044 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2045 #iommu-cells = <1>; 2046 }; 2047 2048 ipmmu_vi0: iommu@eee80000 { 2049 compatible = "renesas,ipmmu-r8a779g0", 2050 "renesas,rcar-gen4-ipmmu-vmsa"; 2051 reg = <0 0xeee80000 0 0x20000>; 2052 renesas,ipmmu-main = <&ipmmu_mm>; 2053 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2054 #iommu-cells = <1>; 2055 }; 2056 2057 ipmmu_vi1: iommu@eeec0000 { 2058 compatible = "renesas,ipmmu-r8a779g0", 2059 "renesas,rcar-gen4-ipmmu-vmsa"; 2060 reg = <0 0xeeec0000 0 0x20000>; 2061 renesas,ipmmu-main = <&ipmmu_mm>; 2062 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2063 #iommu-cells = <1>; 2064 }; 2065 2066 ipmmu_vip0: iommu@eef00000 { 2067 compatible = "renesas,ipmmu-r8a779g0", 2068 "renesas,rcar-gen4-ipmmu-vmsa"; 2069 reg = <0 0xeef00000 0 0x20000>; 2070 renesas,ipmmu-main = <&ipmmu_mm>; 2071 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2072 #iommu-cells = <1>; 2073 }; 2074 2075 ipmmu_vip1: iommu@eef40000 { 2076 compatible = "renesas,ipmmu-r8a779g0", 2077 "renesas,rcar-gen4-ipmmu-vmsa"; 2078 reg = <0 0xeef40000 0 0x20000>; 2079 renesas,ipmmu-main = <&ipmmu_mm>; 2080 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2081 #iommu-cells = <1>; 2082 }; 2083 2084 ipmmu_mm: iommu@eefc0000 { 2085 compatible = "renesas,ipmmu-r8a779g0", 2086 "renesas,rcar-gen4-ipmmu-vmsa"; 2087 reg = <0 0xeefc0000 0 0x20000>; 2088 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 2089 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 2090 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2091 #iommu-cells = <1>; 2092 }; 2093 2094 gic: interrupt-controller@f1000000 { 2095 compatible = "arm,gic-v3"; 2096 #interrupt-cells = <3>; 2097 #address-cells = <0>; 2098 interrupt-controller; 2099 reg = <0x0 0xf1000000 0 0x20000>, 2100 <0x0 0xf1060000 0 0x110000>; 2101 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 2102 }; 2103 2104 csi40: csi2@fe500000 { 2105 compatible = "renesas,r8a779g0-csi2"; 2106 reg = <0 0xfe500000 0 0x40000>; 2107 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; 2108 clocks = <&cpg CPG_MOD 331>; 2109 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2110 resets = <&cpg 331>; 2111 status = "disabled"; 2112 2113 ports { 2114 #address-cells = <1>; 2115 #size-cells = <0>; 2116 2117 port@0 { 2118 reg = <0>; 2119 }; 2120 2121 port@1 { 2122 reg = <1>; 2123 csi40isp0: endpoint { 2124 remote-endpoint = <&isp0csi40>; 2125 }; 2126 }; 2127 }; 2128 }; 2129 2130 csi41: csi2@fe540000 { 2131 compatible = "renesas,r8a779g0-csi2"; 2132 reg = <0 0xfe540000 0 0x40000>; 2133 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; 2134 clocks = <&cpg CPG_MOD 400>; 2135 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2136 resets = <&cpg 400>; 2137 status = "disabled"; 2138 2139 ports { 2140 #address-cells = <1>; 2141 #size-cells = <0>; 2142 2143 port@0 { 2144 reg = <0>; 2145 }; 2146 2147 port@1 { 2148 reg = <1>; 2149 csi41isp1: endpoint { 2150 remote-endpoint = <&isp1csi41>; 2151 }; 2152 }; 2153 }; 2154 }; 2155 2156 fcpvd0: fcp@fea10000 { 2157 compatible = "renesas,fcpv"; 2158 reg = <0 0xfea10000 0 0x200>; 2159 clocks = <&cpg CPG_MOD 508>; 2160 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2161 resets = <&cpg 508>; 2162 iommus = <&ipmmu_vi1 6>; 2163 }; 2164 2165 fcpvd1: fcp@fea11000 { 2166 compatible = "renesas,fcpv"; 2167 reg = <0 0xfea11000 0 0x200>; 2168 clocks = <&cpg CPG_MOD 509>; 2169 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2170 resets = <&cpg 509>; 2171 iommus = <&ipmmu_vi1 7>; 2172 }; 2173 2174 vspd0: vsp@fea20000 { 2175 compatible = "renesas,vsp2"; 2176 reg = <0 0xfea20000 0 0x7000>; 2177 interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; 2178 clocks = <&cpg CPG_MOD 830>; 2179 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2180 resets = <&cpg 830>; 2181 2182 renesas,fcp = <&fcpvd0>; 2183 }; 2184 2185 vspd1: vsp@fea28000 { 2186 compatible = "renesas,vsp2"; 2187 reg = <0 0xfea28000 0 0x7000>; 2188 interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; 2189 clocks = <&cpg CPG_MOD 831>; 2190 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2191 resets = <&cpg 831>; 2192 2193 renesas,fcp = <&fcpvd1>; 2194 }; 2195 2196 du: display@feb00000 { 2197 compatible = "renesas,du-r8a779g0"; 2198 reg = <0 0xfeb00000 0 0x40000>; 2199 interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, 2200 <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; 2201 clocks = <&cpg CPG_MOD 411>; 2202 clock-names = "du.0"; 2203 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2204 resets = <&cpg 411>; 2205 reset-names = "du.0"; 2206 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2207 2208 status = "disabled"; 2209 2210 ports { 2211 #address-cells = <1>; 2212 #size-cells = <0>; 2213 2214 port@0 { 2215 reg = <0>; 2216 du_out_dsi0: endpoint { 2217 remote-endpoint = <&dsi0_in>; 2218 }; 2219 }; 2220 2221 port@1 { 2222 reg = <1>; 2223 du_out_dsi1: endpoint { 2224 remote-endpoint = <&dsi1_in>; 2225 }; 2226 }; 2227 }; 2228 }; 2229 2230 isp0: isp@fed00000 { 2231 compatible = "renesas,r8a779g0-isp", 2232 "renesas,rcar-gen4-isp"; 2233 reg = <0 0xfed00000 0 0x10000>; 2234 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>; 2235 clocks = <&cpg CPG_MOD 612>; 2236 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2237 resets = <&cpg 612>; 2238 status = "disabled"; 2239 2240 ports { 2241 #address-cells = <1>; 2242 #size-cells = <0>; 2243 2244 port@0 { 2245 #address-cells = <1>; 2246 #size-cells = <0>; 2247 2248 reg = <0>; 2249 2250 isp0csi40: endpoint@0 { 2251 reg = <0>; 2252 remote-endpoint = <&csi40isp0>; 2253 }; 2254 }; 2255 2256 port@1 { 2257 reg = <1>; 2258 isp0vin00: endpoint { 2259 remote-endpoint = <&vin00isp0>; 2260 }; 2261 }; 2262 2263 port@2 { 2264 reg = <2>; 2265 isp0vin01: endpoint { 2266 remote-endpoint = <&vin01isp0>; 2267 }; 2268 }; 2269 2270 port@3 { 2271 reg = <3>; 2272 isp0vin02: endpoint { 2273 remote-endpoint = <&vin02isp0>; 2274 }; 2275 }; 2276 2277 port@4 { 2278 reg = <4>; 2279 isp0vin03: endpoint { 2280 remote-endpoint = <&vin03isp0>; 2281 }; 2282 }; 2283 2284 port@5 { 2285 reg = <5>; 2286 isp0vin04: endpoint { 2287 remote-endpoint = <&vin04isp0>; 2288 }; 2289 }; 2290 2291 port@6 { 2292 reg = <6>; 2293 isp0vin05: endpoint { 2294 remote-endpoint = <&vin05isp0>; 2295 }; 2296 }; 2297 2298 port@7 { 2299 reg = <7>; 2300 isp0vin06: endpoint { 2301 remote-endpoint = <&vin06isp0>; 2302 }; 2303 }; 2304 2305 port@8 { 2306 reg = <8>; 2307 isp0vin07: endpoint { 2308 remote-endpoint = <&vin07isp0>; 2309 }; 2310 }; 2311 }; 2312 }; 2313 2314 isp1: isp@fed20000 { 2315 compatible = "renesas,r8a779g0-isp", 2316 "renesas,rcar-gen4-isp"; 2317 reg = <0 0xfed20000 0 0x10000>; 2318 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>; 2319 clocks = <&cpg CPG_MOD 613>; 2320 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2321 resets = <&cpg 613>; 2322 status = "disabled"; 2323 2324 ports { 2325 #address-cells = <1>; 2326 #size-cells = <0>; 2327 2328 port@0 { 2329 #address-cells = <1>; 2330 #size-cells = <0>; 2331 2332 reg = <0>; 2333 2334 isp1csi41: endpoint@1 { 2335 reg = <1>; 2336 remote-endpoint = <&csi41isp1>; 2337 }; 2338 }; 2339 2340 port@1 { 2341 reg = <1>; 2342 isp1vin08: endpoint { 2343 remote-endpoint = <&vin08isp1>; 2344 }; 2345 }; 2346 2347 port@2 { 2348 reg = <2>; 2349 isp1vin09: endpoint { 2350 remote-endpoint = <&vin09isp1>; 2351 }; 2352 }; 2353 2354 port@3 { 2355 reg = <3>; 2356 isp1vin10: endpoint { 2357 remote-endpoint = <&vin10isp1>; 2358 }; 2359 }; 2360 2361 port@4 { 2362 reg = <4>; 2363 isp1vin11: endpoint { 2364 remote-endpoint = <&vin11isp1>; 2365 }; 2366 }; 2367 2368 port@5 { 2369 reg = <5>; 2370 isp1vin12: endpoint { 2371 remote-endpoint = <&vin12isp1>; 2372 }; 2373 }; 2374 2375 port@6 { 2376 reg = <6>; 2377 isp1vin13: endpoint { 2378 remote-endpoint = <&vin13isp1>; 2379 }; 2380 }; 2381 2382 port@7 { 2383 reg = <7>; 2384 isp1vin14: endpoint { 2385 remote-endpoint = <&vin14isp1>; 2386 }; 2387 }; 2388 2389 port@8 { 2390 reg = <8>; 2391 isp1vin15: endpoint { 2392 remote-endpoint = <&vin15isp1>; 2393 }; 2394 }; 2395 }; 2396 }; 2397 2398 dsi0: dsi-encoder@fed80000 { 2399 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2400 reg = <0 0xfed80000 0 0x10000>; 2401 clocks = <&cpg CPG_MOD 415>, 2402 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2403 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2404 clock-names = "fck", "dsi", "pll"; 2405 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2406 resets = <&cpg 415>; 2407 2408 status = "disabled"; 2409 2410 ports { 2411 #address-cells = <1>; 2412 #size-cells = <0>; 2413 2414 port@0 { 2415 reg = <0>; 2416 dsi0_in: endpoint { 2417 remote-endpoint = <&du_out_dsi0>; 2418 }; 2419 }; 2420 2421 port@1 { 2422 reg = <1>; 2423 }; 2424 }; 2425 }; 2426 2427 dsi1: dsi-encoder@fed90000 { 2428 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2429 reg = <0 0xfed90000 0 0x10000>; 2430 clocks = <&cpg CPG_MOD 416>, 2431 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2432 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2433 clock-names = "fck", "dsi", "pll"; 2434 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2435 resets = <&cpg 416>; 2436 2437 status = "disabled"; 2438 2439 ports { 2440 #address-cells = <1>; 2441 #size-cells = <0>; 2442 2443 port@0 { 2444 reg = <0>; 2445 dsi1_in: endpoint { 2446 remote-endpoint = <&du_out_dsi1>; 2447 }; 2448 }; 2449 2450 port@1 { 2451 reg = <1>; 2452 }; 2453 }; 2454 }; 2455 2456 prr: chipid@fff00044 { 2457 compatible = "renesas,prr"; 2458 reg = <0 0xfff00044 0 4>; 2459 }; 2460 }; 2461 2462 thermal-zones { 2463 sensor_thermal_cr52: sensor1-thermal { 2464 polling-delay-passive = <250>; 2465 polling-delay = <1000>; 2466 thermal-sensors = <&tsc 0>; 2467 2468 trips { 2469 sensor1_crit: sensor1-crit { 2470 temperature = <120000>; 2471 hysteresis = <1000>; 2472 type = "critical"; 2473 }; 2474 }; 2475 }; 2476 2477 sensor_thermal_cnn: sensor2-thermal { 2478 polling-delay-passive = <250>; 2479 polling-delay = <1000>; 2480 thermal-sensors = <&tsc 1>; 2481 2482 trips { 2483 sensor2_crit: sensor2-crit { 2484 temperature = <120000>; 2485 hysteresis = <1000>; 2486 type = "critical"; 2487 }; 2488 }; 2489 }; 2490 2491 sensor_thermal_ca76: sensor3-thermal { 2492 polling-delay-passive = <250>; 2493 polling-delay = <1000>; 2494 thermal-sensors = <&tsc 2>; 2495 2496 trips { 2497 sensor3_crit: sensor3-crit { 2498 temperature = <120000>; 2499 hysteresis = <1000>; 2500 type = "critical"; 2501 }; 2502 }; 2503 }; 2504 2505 sensor_thermal_ddr1: sensor4-thermal { 2506 polling-delay-passive = <250>; 2507 polling-delay = <1000>; 2508 thermal-sensors = <&tsc 3>; 2509 2510 trips { 2511 sensor4_crit: sensor4-crit { 2512 temperature = <120000>; 2513 hysteresis = <1000>; 2514 type = "critical"; 2515 }; 2516 }; 2517 }; 2518 }; 2519 2520 timer { 2521 compatible = "arm,armv8-timer"; 2522 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 2523 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 2524 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 2525 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, 2526 <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; 2527 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", 2528 "hyp-virt"; 2529 }; 2530}; 2531