1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC 4 * 5 * Copyright (C) 2022 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a779g0-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a779g0-sysc.h> 11 12/ { 13 compatible = "renesas,r8a779g0"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* External Audio clock - to be overridden by boards that provide it */ 18 audio_clkin: audio_clkin { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; 21 clock-frequency = <0>; 22 }; 23 24 /* External CAN clock - to be overridden by boards that provide it */ 25 can_clk: can { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 cluster0_opp: opp-table-0 { 32 compatible = "operating-points-v2"; 33 opp-shared; 34 35 opp-500000000 { 36 opp-hz = /bits/ 64 <500000000>; 37 opp-microvolt = <825000>; 38 clock-latency-ns = <500000>; 39 }; 40 opp-1000000000 { 41 opp-hz = /bits/ 64 <1000000000>; 42 opp-microvolt = <825000>; 43 clock-latency-ns = <500000>; 44 }; 45 opp-1500000000 { 46 opp-hz = /bits/ 64 <1500000000>; 47 opp-microvolt = <825000>; 48 clock-latency-ns = <500000>; 49 }; 50 opp-1700000000 { 51 opp-hz = /bits/ 64 <1700000000>; 52 opp-microvolt = <825000>; 53 clock-latency-ns = <500000>; 54 opp-suspend; 55 }; 56 opp-1800000000 { 57 opp-hz = /bits/ 64 <1800000000>; 58 opp-microvolt = <880000>; 59 clock-latency-ns = <500000>; 60 turbo-mode; 61 }; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 68 cpu-map { 69 cluster0 { 70 core0 { 71 cpu = <&a76_0>; 72 }; 73 core1 { 74 cpu = <&a76_1>; 75 }; 76 }; 77 78 cluster1 { 79 core0 { 80 cpu = <&a76_2>; 81 }; 82 core1 { 83 cpu = <&a76_3>; 84 }; 85 }; 86 }; 87 88 a76_0: cpu@0 { 89 compatible = "arm,cortex-a76"; 90 reg = <0>; 91 device_type = "cpu"; 92 power-domains = <&sysc R8A779G0_PD_A1E0D0C0>; 93 next-level-cache = <&L3_CA76_0>; 94 enable-method = "psci"; 95 cpu-idle-states = <&CPU_SLEEP_0>; 96 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 97 operating-points-v2 = <&cluster0_opp>; 98 }; 99 100 a76_1: cpu@100 { 101 compatible = "arm,cortex-a76"; 102 reg = <0x100>; 103 device_type = "cpu"; 104 power-domains = <&sysc R8A779G0_PD_A1E0D0C1>; 105 next-level-cache = <&L3_CA76_0>; 106 enable-method = "psci"; 107 cpu-idle-states = <&CPU_SLEEP_0>; 108 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 109 operating-points-v2 = <&cluster0_opp>; 110 }; 111 112 a76_2: cpu@10000 { 113 compatible = "arm,cortex-a76"; 114 reg = <0x10000>; 115 device_type = "cpu"; 116 power-domains = <&sysc R8A779G0_PD_A1E0D1C0>; 117 next-level-cache = <&L3_CA76_1>; 118 enable-method = "psci"; 119 cpu-idle-states = <&CPU_SLEEP_0>; 120 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 121 operating-points-v2 = <&cluster0_opp>; 122 }; 123 124 a76_3: cpu@10100 { 125 compatible = "arm,cortex-a76"; 126 reg = <0x10100>; 127 device_type = "cpu"; 128 power-domains = <&sysc R8A779G0_PD_A1E0D1C1>; 129 next-level-cache = <&L3_CA76_1>; 130 enable-method = "psci"; 131 cpu-idle-states = <&CPU_SLEEP_0>; 132 clocks = <&cpg CPG_CORE R8A779G0_CLK_Z0>; 133 operating-points-v2 = <&cluster0_opp>; 134 }; 135 136 idle-states { 137 entry-method = "psci"; 138 139 CPU_SLEEP_0: cpu-sleep-0 { 140 compatible = "arm,idle-state"; 141 arm,psci-suspend-param = <0x0010000>; 142 local-timer-stop; 143 entry-latency-us = <400>; 144 exit-latency-us = <500>; 145 min-residency-us = <4000>; 146 }; 147 }; 148 149 L3_CA76_0: cache-controller-0 { 150 compatible = "cache"; 151 power-domains = <&sysc R8A779G0_PD_A2E0D0>; 152 cache-unified; 153 cache-level = <3>; 154 }; 155 156 L3_CA76_1: cache-controller-1 { 157 compatible = "cache"; 158 power-domains = <&sysc R8A779G0_PD_A2E0D1>; 159 cache-unified; 160 cache-level = <3>; 161 }; 162 }; 163 164 extal_clk: extal { 165 compatible = "fixed-clock"; 166 #clock-cells = <0>; 167 /* This value must be overridden by the board */ 168 clock-frequency = <0>; 169 }; 170 171 extalr_clk: extalr { 172 compatible = "fixed-clock"; 173 #clock-cells = <0>; 174 /* This value must be overridden by the board */ 175 clock-frequency = <0>; 176 }; 177 178 pmu_a76 { 179 compatible = "arm,cortex-a76-pmu"; 180 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; 181 }; 182 183 psci { 184 compatible = "arm,psci-1.0", "arm,psci-0.2"; 185 method = "smc"; 186 }; 187 188 /* External SCIF clocks - to be overridden by boards that provide them */ 189 scif_clk: scif { 190 compatible = "fixed-clock"; 191 #clock-cells = <0>; 192 clock-frequency = <0>; 193 }; 194 195 scif_clk2: scif2 { 196 compatible = "fixed-clock"; 197 #clock-cells = <0>; 198 clock-frequency = <0>; 199 }; 200 201 soc: soc { 202 compatible = "simple-bus"; 203 interrupt-parent = <&gic>; 204 #address-cells = <2>; 205 #size-cells = <2>; 206 ranges; 207 208 rwdt: watchdog@e6020000 { 209 compatible = "renesas,r8a779g0-wdt", 210 "renesas,rcar-gen4-wdt"; 211 reg = <0 0xe6020000 0 0x0c>; 212 interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; 213 clocks = <&cpg CPG_MOD 907>; 214 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 215 resets = <&cpg 907>; 216 status = "disabled"; 217 }; 218 219 pfc: pinctrl@e6050000 { 220 compatible = "renesas,pfc-r8a779g0"; 221 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>, 222 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>, 223 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>, 224 <0 0xe6061000 0 0x16c>, <0 0xe6061800 0 0x16c>, 225 <0 0xe6068000 0 0x16c>; 226 }; 227 228 gpio0: gpio@e6050180 { 229 compatible = "renesas,gpio-r8a779g0", 230 "renesas,rcar-gen4-gpio"; 231 reg = <0 0xe6050180 0 0x54>; 232 interrupts = <GIC_SPI 619 IRQ_TYPE_LEVEL_HIGH>; 233 clocks = <&cpg CPG_MOD 915>; 234 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 235 resets = <&cpg 915>; 236 gpio-controller; 237 #gpio-cells = <2>; 238 gpio-ranges = <&pfc 0 0 19>; 239 interrupt-controller; 240 #interrupt-cells = <2>; 241 }; 242 243 gpio1: gpio@e6050980 { 244 compatible = "renesas,gpio-r8a779g0", 245 "renesas,rcar-gen4-gpio"; 246 reg = <0 0xe6050980 0 0x54>; 247 interrupts = <GIC_SPI 623 IRQ_TYPE_LEVEL_HIGH>; 248 clocks = <&cpg CPG_MOD 915>; 249 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 250 resets = <&cpg 915>; 251 gpio-controller; 252 #gpio-cells = <2>; 253 gpio-ranges = <&pfc 0 32 29>; 254 interrupt-controller; 255 #interrupt-cells = <2>; 256 }; 257 258 gpio2: gpio@e6058180 { 259 compatible = "renesas,gpio-r8a779g0", 260 "renesas,rcar-gen4-gpio"; 261 reg = <0 0xe6058180 0 0x54>; 262 interrupts = <GIC_SPI 627 IRQ_TYPE_LEVEL_HIGH>; 263 clocks = <&cpg CPG_MOD 916>; 264 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 265 resets = <&cpg 916>; 266 gpio-controller; 267 #gpio-cells = <2>; 268 gpio-ranges = <&pfc 0 64 20>; 269 interrupt-controller; 270 #interrupt-cells = <2>; 271 }; 272 273 gpio3: gpio@e6058980 { 274 compatible = "renesas,gpio-r8a779g0", 275 "renesas,rcar-gen4-gpio"; 276 reg = <0 0xe6058980 0 0x54>; 277 interrupts = <GIC_SPI 631 IRQ_TYPE_LEVEL_HIGH>; 278 clocks = <&cpg CPG_MOD 916>; 279 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 280 resets = <&cpg 916>; 281 gpio-controller; 282 #gpio-cells = <2>; 283 gpio-ranges = <&pfc 0 96 30>; 284 interrupt-controller; 285 #interrupt-cells = <2>; 286 }; 287 288 gpio4: gpio@e6060180 { 289 compatible = "renesas,gpio-r8a779g0", 290 "renesas,rcar-gen4-gpio"; 291 reg = <0 0xe6060180 0 0x54>; 292 interrupts = <GIC_SPI 635 IRQ_TYPE_LEVEL_HIGH>; 293 clocks = <&cpg CPG_MOD 917>; 294 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 295 resets = <&cpg 917>; 296 gpio-controller; 297 #gpio-cells = <2>; 298 gpio-ranges = <&pfc 0 128 25>; 299 interrupt-controller; 300 #interrupt-cells = <2>; 301 }; 302 303 gpio5: gpio@e6060980 { 304 compatible = "renesas,gpio-r8a779g0", 305 "renesas,rcar-gen4-gpio"; 306 reg = <0 0xe6060980 0 0x54>; 307 interrupts = <GIC_SPI 639 IRQ_TYPE_LEVEL_HIGH>; 308 clocks = <&cpg CPG_MOD 917>; 309 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 310 resets = <&cpg 917>; 311 gpio-controller; 312 #gpio-cells = <2>; 313 gpio-ranges = <&pfc 0 160 21>; 314 interrupt-controller; 315 #interrupt-cells = <2>; 316 }; 317 318 gpio6: gpio@e6061180 { 319 compatible = "renesas,gpio-r8a779g0", 320 "renesas,rcar-gen4-gpio"; 321 reg = <0 0xe6061180 0 0x54>; 322 interrupts = <GIC_SPI 643 IRQ_TYPE_LEVEL_HIGH>; 323 clocks = <&cpg CPG_MOD 917>; 324 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 325 resets = <&cpg 917>; 326 gpio-controller; 327 #gpio-cells = <2>; 328 gpio-ranges = <&pfc 0 192 21>; 329 interrupt-controller; 330 #interrupt-cells = <2>; 331 }; 332 333 gpio7: gpio@e6061980 { 334 compatible = "renesas,gpio-r8a779g0", 335 "renesas,rcar-gen4-gpio"; 336 reg = <0 0xe6061980 0 0x54>; 337 interrupts = <GIC_SPI 647 IRQ_TYPE_LEVEL_HIGH>; 338 clocks = <&cpg CPG_MOD 917>; 339 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 340 resets = <&cpg 917>; 341 gpio-controller; 342 #gpio-cells = <2>; 343 gpio-ranges = <&pfc 0 224 21>; 344 interrupt-controller; 345 #interrupt-cells = <2>; 346 }; 347 348 gpio8: gpio@e6068180 { 349 compatible = "renesas,gpio-r8a779g0", 350 "renesas,rcar-gen4-gpio"; 351 reg = <0 0xe6068180 0 0x54>; 352 interrupts = <GIC_SPI 651 IRQ_TYPE_LEVEL_HIGH>; 353 clocks = <&cpg CPG_MOD 918>; 354 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 355 resets = <&cpg 918>; 356 gpio-controller; 357 #gpio-cells = <2>; 358 gpio-ranges = <&pfc 0 256 14>; 359 interrupt-controller; 360 #interrupt-cells = <2>; 361 }; 362 363 cmt0: timer@e60f0000 { 364 compatible = "renesas,r8a779g0-cmt0", 365 "renesas,rcar-gen4-cmt0"; 366 reg = <0 0xe60f0000 0 0x1004>; 367 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 368 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 369 clocks = <&cpg CPG_MOD 910>; 370 clock-names = "fck"; 371 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 372 resets = <&cpg 910>; 373 status = "disabled"; 374 }; 375 376 cmt1: timer@e6130000 { 377 compatible = "renesas,r8a779g0-cmt1", 378 "renesas,rcar-gen4-cmt1"; 379 reg = <0 0xe6130000 0 0x1004>; 380 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 381 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, 383 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 388 clocks = <&cpg CPG_MOD 911>; 389 clock-names = "fck"; 390 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 391 resets = <&cpg 911>; 392 status = "disabled"; 393 }; 394 395 cmt2: timer@e6140000 { 396 compatible = "renesas,r8a779g0-cmt1", 397 "renesas,rcar-gen4-cmt1"; 398 reg = <0 0xe6140000 0 0x1004>; 399 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, 404 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>, 405 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>, 406 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>; 407 clocks = <&cpg CPG_MOD 912>; 408 clock-names = "fck"; 409 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 410 resets = <&cpg 912>; 411 status = "disabled"; 412 }; 413 414 cmt3: timer@e6148000 { 415 compatible = "renesas,r8a779g0-cmt1", 416 "renesas,rcar-gen4-cmt1"; 417 reg = <0 0xe6148000 0 0x1004>; 418 interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, 419 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, 421 <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, 422 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, 423 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, 424 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, 425 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; 426 clocks = <&cpg CPG_MOD 913>; 427 clock-names = "fck"; 428 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 429 resets = <&cpg 913>; 430 status = "disabled"; 431 }; 432 433 cpg: clock-controller@e6150000 { 434 compatible = "renesas,r8a779g0-cpg-mssr"; 435 reg = <0 0xe6150000 0 0x4000>; 436 clocks = <&extal_clk>, <&extalr_clk>; 437 clock-names = "extal", "extalr"; 438 #clock-cells = <2>; 439 #power-domain-cells = <0>; 440 #reset-cells = <1>; 441 }; 442 443 rst: reset-controller@e6160000 { 444 compatible = "renesas,r8a779g0-rst"; 445 reg = <0 0xe6160000 0 0x4000>; 446 }; 447 448 sysc: system-controller@e6180000 { 449 compatible = "renesas,r8a779g0-sysc"; 450 reg = <0 0xe6180000 0 0x4000>; 451 #power-domain-cells = <1>; 452 }; 453 454 tsc: thermal@e6198000 { 455 compatible = "renesas,r8a779g0-thermal"; 456 reg = <0 0xe6198000 0 0x200>, 457 <0 0xe61a0000 0 0x200>, 458 <0 0xe61a8000 0 0x200>, 459 <0 0xe61b0000 0 0x200>; 460 clocks = <&cpg CPG_MOD 919>; 461 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 462 resets = <&cpg 919>; 463 #thermal-sensor-cells = <1>; 464 }; 465 466 intc_ex: interrupt-controller@e61c0000 { 467 compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; 468 #interrupt-cells = <2>; 469 interrupt-controller; 470 reg = <0 0xe61c0000 0 0x200>; 471 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 472 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 473 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 474 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 475 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 476 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 477 clocks = <&cpg CPG_MOD 611>; 478 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 479 resets = <&cpg 611>; 480 }; 481 482 tmu0: timer@e61e0000 { 483 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 484 reg = <0 0xe61e0000 0 0x30>; 485 interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, 486 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 488 interrupt-names = "tuni0", "tuni1", "tuni2"; 489 clocks = <&cpg CPG_MOD 713>; 490 clock-names = "fck"; 491 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 492 resets = <&cpg 713>; 493 status = "disabled"; 494 }; 495 496 tmu1: timer@e6fc0000 { 497 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 498 reg = <0 0xe6fc0000 0 0x30>; 499 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>, 500 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>, 501 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>, 502 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>; 503 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 504 clocks = <&cpg CPG_MOD 714>; 505 clock-names = "fck"; 506 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 507 resets = <&cpg 714>; 508 status = "disabled"; 509 }; 510 511 tmu2: timer@e6fd0000 { 512 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 513 reg = <0 0xe6fd0000 0 0x30>; 514 interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; 518 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 519 clocks = <&cpg CPG_MOD 715>; 520 clock-names = "fck"; 521 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 522 resets = <&cpg 715>; 523 status = "disabled"; 524 }; 525 526 tmu3: timer@e6fe0000 { 527 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 528 reg = <0 0xe6fe0000 0 0x30>; 529 interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>, 530 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>, 531 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, 532 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>; 533 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 534 clocks = <&cpg CPG_MOD 716>; 535 clock-names = "fck"; 536 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 537 resets = <&cpg 716>; 538 status = "disabled"; 539 }; 540 541 tmu4: timer@ffc00000 { 542 compatible = "renesas,tmu-r8a779g0", "renesas,tmu"; 543 reg = <0 0xffc00000 0 0x30>; 544 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 545 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 546 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, 547 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; 548 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 549 clocks = <&cpg CPG_MOD 717>; 550 clock-names = "fck"; 551 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 552 resets = <&cpg 717>; 553 status = "disabled"; 554 }; 555 556 i2c0: i2c@e6500000 { 557 compatible = "renesas,i2c-r8a779g0", 558 "renesas,rcar-gen4-i2c"; 559 reg = <0 0xe6500000 0 0x40>; 560 interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>; 561 clocks = <&cpg CPG_MOD 518>; 562 dmas = <&dmac0 0x91>, <&dmac0 0x90>, 563 <&dmac1 0x91>, <&dmac1 0x90>; 564 dma-names = "tx", "rx", "tx", "rx"; 565 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 566 resets = <&cpg 518>; 567 i2c-scl-internal-delay-ns = <110>; 568 #address-cells = <1>; 569 #size-cells = <0>; 570 status = "disabled"; 571 }; 572 573 i2c1: i2c@e6508000 { 574 compatible = "renesas,i2c-r8a779g0", 575 "renesas,rcar-gen4-i2c"; 576 reg = <0 0xe6508000 0 0x40>; 577 interrupts = <GIC_SPI 611 IRQ_TYPE_LEVEL_HIGH>; 578 clocks = <&cpg CPG_MOD 519>; 579 dmas = <&dmac0 0x93>, <&dmac0 0x92>, 580 <&dmac1 0x93>, <&dmac1 0x92>; 581 dma-names = "tx", "rx", "tx", "rx"; 582 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 583 resets = <&cpg 519>; 584 i2c-scl-internal-delay-ns = <110>; 585 #address-cells = <1>; 586 #size-cells = <0>; 587 status = "disabled"; 588 }; 589 590 i2c2: i2c@e6510000 { 591 compatible = "renesas,i2c-r8a779g0", 592 "renesas,rcar-gen4-i2c"; 593 reg = <0 0xe6510000 0 0x40>; 594 interrupts = <GIC_SPI 612 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 520>; 596 dmas = <&dmac0 0x95>, <&dmac0 0x94>, 597 <&dmac1 0x95>, <&dmac1 0x94>; 598 dma-names = "tx", "rx", "tx", "rx"; 599 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 600 resets = <&cpg 520>; 601 i2c-scl-internal-delay-ns = <110>; 602 #address-cells = <1>; 603 #size-cells = <0>; 604 status = "disabled"; 605 }; 606 607 i2c3: i2c@e66d0000 { 608 compatible = "renesas,i2c-r8a779g0", 609 "renesas,rcar-gen4-i2c"; 610 reg = <0 0xe66d0000 0 0x40>; 611 interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 521>; 613 dmas = <&dmac0 0x97>, <&dmac0 0x96>, 614 <&dmac1 0x97>, <&dmac1 0x96>; 615 dma-names = "tx", "rx", "tx", "rx"; 616 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 617 resets = <&cpg 521>; 618 i2c-scl-internal-delay-ns = <110>; 619 #address-cells = <1>; 620 #size-cells = <0>; 621 status = "disabled"; 622 }; 623 624 i2c4: i2c@e66d8000 { 625 compatible = "renesas,i2c-r8a779g0", 626 "renesas,rcar-gen4-i2c"; 627 reg = <0 0xe66d8000 0 0x40>; 628 interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&cpg CPG_MOD 522>; 630 dma-names = "tx", "rx", "tx", "rx"; 631 dmas = <&dmac0 0x99>, <&dmac0 0x98>, 632 <&dmac1 0x99>, <&dmac1 0x98>; 633 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 634 resets = <&cpg 522>; 635 i2c-scl-internal-delay-ns = <110>; 636 #address-cells = <1>; 637 #size-cells = <0>; 638 status = "disabled"; 639 }; 640 641 i2c5: i2c@e66e0000 { 642 compatible = "renesas,i2c-r8a779g0", 643 "renesas,rcar-gen4-i2c"; 644 reg = <0 0xe66e0000 0 0x40>; 645 interrupts = <GIC_SPI 615 IRQ_TYPE_LEVEL_HIGH>; 646 clocks = <&cpg CPG_MOD 523>; 647 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>, 648 <&dmac1 0x9b>, <&dmac1 0x9a>; 649 dma-names = "tx", "rx", "tx", "rx"; 650 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 651 resets = <&cpg 523>; 652 i2c-scl-internal-delay-ns = <110>; 653 #address-cells = <1>; 654 #size-cells = <0>; 655 status = "disabled"; 656 }; 657 658 hscif0: serial@e6540000 { 659 compatible = "renesas,hscif-r8a779g0", 660 "renesas,rcar-gen4-hscif", "renesas,hscif"; 661 reg = <0 0xe6540000 0 0x60>; 662 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 663 clocks = <&cpg CPG_MOD 514>, 664 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 665 <&scif_clk>; 666 clock-names = "fck", "brg_int", "scif_clk"; 667 dmas = <&dmac0 0x31>, <&dmac0 0x30>, 668 <&dmac1 0x31>, <&dmac1 0x30>; 669 dma-names = "tx", "rx", "tx", "rx"; 670 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 671 resets = <&cpg 514>; 672 status = "disabled"; 673 }; 674 675 hscif1: serial@e6550000 { 676 compatible = "renesas,hscif-r8a779g0", 677 "renesas,rcar-gen4-hscif", "renesas,hscif"; 678 reg = <0 0xe6550000 0 0x60>; 679 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 680 clocks = <&cpg CPG_MOD 515>, 681 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 682 <&scif_clk>; 683 clock-names = "fck", "brg_int", "scif_clk"; 684 dmas = <&dmac0 0x33>, <&dmac0 0x32>, 685 <&dmac1 0x33>, <&dmac1 0x32>; 686 dma-names = "tx", "rx", "tx", "rx"; 687 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 688 resets = <&cpg 515>; 689 status = "disabled"; 690 }; 691 692 hscif2: serial@e6560000 { 693 compatible = "renesas,hscif-r8a779g0", 694 "renesas,rcar-gen4-hscif", "renesas,hscif"; 695 reg = <0 0xe6560000 0 0x60>; 696 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 697 clocks = <&cpg CPG_MOD 516>, 698 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 699 <&scif_clk2>; 700 clock-names = "fck", "brg_int", "scif_clk"; 701 dmas = <&dmac0 0x35>, <&dmac0 0x34>, 702 <&dmac1 0x35>, <&dmac1 0x34>; 703 dma-names = "tx", "rx", "tx", "rx"; 704 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 705 resets = <&cpg 516>; 706 status = "disabled"; 707 }; 708 709 hscif3: serial@e66a0000 { 710 compatible = "renesas,hscif-r8a779g0", 711 "renesas,rcar-gen4-hscif", "renesas,hscif"; 712 reg = <0 0xe66a0000 0 0x60>; 713 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 714 clocks = <&cpg CPG_MOD 517>, 715 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 716 <&scif_clk>; 717 clock-names = "fck", "brg_int", "scif_clk"; 718 dmas = <&dmac0 0x37>, <&dmac0 0x36>, 719 <&dmac1 0x37>, <&dmac1 0x36>; 720 dma-names = "tx", "rx", "tx", "rx"; 721 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 722 resets = <&cpg 517>; 723 status = "disabled"; 724 }; 725 726 canfd: can@e6660000 { 727 compatible = "renesas,r8a779g0-canfd", 728 "renesas,rcar-gen4-canfd"; 729 reg = <0 0xe6660000 0 0x8500>; 730 interrupts = <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>; 732 interrupt-names = "ch_int", "g_int"; 733 clocks = <&cpg CPG_MOD 328>, 734 <&cpg CPG_CORE R8A779G0_CLK_CANFD>, 735 <&can_clk>; 736 clock-names = "fck", "canfd", "can_clk"; 737 assigned-clocks = <&cpg CPG_CORE R8A779G0_CLK_CANFD>; 738 assigned-clock-rates = <80000000>; 739 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 740 resets = <&cpg 328>; 741 status = "disabled"; 742 743 channel0 { 744 status = "disabled"; 745 }; 746 747 channel1 { 748 status = "disabled"; 749 }; 750 751 channel2 { 752 status = "disabled"; 753 }; 754 755 channel3 { 756 status = "disabled"; 757 }; 758 759 channel4 { 760 status = "disabled"; 761 }; 762 763 channel5 { 764 status = "disabled"; 765 }; 766 767 channel6 { 768 status = "disabled"; 769 }; 770 771 channel7 { 772 status = "disabled"; 773 }; 774 }; 775 776 avb0: ethernet@e6800000 { 777 compatible = "renesas,etheravb-r8a779g0", 778 "renesas,etheravb-rcar-gen4"; 779 reg = <0 0xe6800000 0 0x1000>; 780 interrupts = <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 797 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>, 798 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>, 799 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>, 801 <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>, 802 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>, 803 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>, 804 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 805 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 806 "ch5", "ch6", "ch7", "ch8", "ch9", 807 "ch10", "ch11", "ch12", "ch13", 808 "ch14", "ch15", "ch16", "ch17", 809 "ch18", "ch19", "ch20", "ch21", 810 "ch22", "ch23", "ch24"; 811 clocks = <&cpg CPG_MOD 211>; 812 clock-names = "fck"; 813 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 814 resets = <&cpg 211>; 815 phy-mode = "rgmii"; 816 rx-internal-delay-ps = <0>; 817 tx-internal-delay-ps = <0>; 818 #address-cells = <1>; 819 #size-cells = <0>; 820 status = "disabled"; 821 }; 822 823 avb1: ethernet@e6810000 { 824 compatible = "renesas,etheravb-r8a779g0", 825 "renesas,etheravb-rcar-gen4"; 826 reg = <0 0xe6810000 0 0x1000>; 827 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>, 839 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>, 840 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>, 841 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, 842 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, 843 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>, 844 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, 845 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, 846 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>, 847 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 848 <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 849 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 850 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 851 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 852 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 853 "ch5", "ch6", "ch7", "ch8", "ch9", 854 "ch10", "ch11", "ch12", "ch13", 855 "ch14", "ch15", "ch16", "ch17", 856 "ch18", "ch19", "ch20", "ch21", 857 "ch22", "ch23", "ch24"; 858 clocks = <&cpg CPG_MOD 212>; 859 clock-names = "fck"; 860 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 861 resets = <&cpg 212>; 862 phy-mode = "rgmii"; 863 rx-internal-delay-ps = <0>; 864 tx-internal-delay-ps = <0>; 865 #address-cells = <1>; 866 #size-cells = <0>; 867 status = "disabled"; 868 }; 869 870 avb2: ethernet@e6820000 { 871 compatible = "renesas,etheravb-r8a779g0", 872 "renesas,etheravb-rcar-gen4"; 873 reg = <0 0xe6820000 0 0x1000>; 874 interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 896 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 897 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 898 <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>; 899 interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", 900 "ch5", "ch6", "ch7", "ch8", "ch9", 901 "ch10", "ch11", "ch12", "ch13", 902 "ch14", "ch15", "ch16", "ch17", 903 "ch18", "ch19", "ch20", "ch21", 904 "ch22", "ch23", "ch24"; 905 clocks = <&cpg CPG_MOD 213>; 906 clock-names = "fck"; 907 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 908 resets = <&cpg 213>; 909 phy-mode = "rgmii"; 910 rx-internal-delay-ps = <0>; 911 tx-internal-delay-ps = <0>; 912 #address-cells = <1>; 913 #size-cells = <0>; 914 status = "disabled"; 915 }; 916 917 pwm0: pwm@e6e30000 { 918 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 919 reg = <0 0xe6e30000 0 0x10>; 920 #pwm-cells = <2>; 921 clocks = <&cpg CPG_MOD 628>; 922 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 923 resets = <&cpg 628>; 924 status = "disabled"; 925 }; 926 927 pwm1: pwm@e6e31000 { 928 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 929 reg = <0 0xe6e31000 0 0x10>; 930 #pwm-cells = <2>; 931 clocks = <&cpg CPG_MOD 628>; 932 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 933 resets = <&cpg 628>; 934 status = "disabled"; 935 }; 936 937 pwm2: pwm@e6e32000 { 938 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 939 reg = <0 0xe6e32000 0 0x10>; 940 #pwm-cells = <2>; 941 clocks = <&cpg CPG_MOD 628>; 942 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 943 resets = <&cpg 628>; 944 status = "disabled"; 945 }; 946 947 pwm3: pwm@e6e33000 { 948 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 949 reg = <0 0xe6e33000 0 0x10>; 950 #pwm-cells = <2>; 951 clocks = <&cpg CPG_MOD 628>; 952 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 953 resets = <&cpg 628>; 954 status = "disabled"; 955 }; 956 957 pwm4: pwm@e6e34000 { 958 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 959 reg = <0 0xe6e34000 0 0x10>; 960 #pwm-cells = <2>; 961 clocks = <&cpg CPG_MOD 628>; 962 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 963 resets = <&cpg 628>; 964 status = "disabled"; 965 }; 966 967 pwm5: pwm@e6e35000 { 968 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 969 reg = <0 0xe6e35000 0 0x10>; 970 #pwm-cells = <2>; 971 clocks = <&cpg CPG_MOD 628>; 972 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 973 resets = <&cpg 628>; 974 status = "disabled"; 975 }; 976 977 pwm6: pwm@e6e36000 { 978 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 979 reg = <0 0xe6e36000 0 0x10>; 980 #pwm-cells = <2>; 981 clocks = <&cpg CPG_MOD 628>; 982 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 983 resets = <&cpg 628>; 984 status = "disabled"; 985 }; 986 987 pwm7: pwm@e6e37000 { 988 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 989 reg = <0 0xe6e37000 0 0x10>; 990 #pwm-cells = <2>; 991 clocks = <&cpg CPG_MOD 628>; 992 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 993 resets = <&cpg 628>; 994 status = "disabled"; 995 }; 996 997 pwm8: pwm@e6e38000 { 998 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 999 reg = <0 0xe6e38000 0 0x10>; 1000 #pwm-cells = <2>; 1001 clocks = <&cpg CPG_MOD 628>; 1002 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1003 resets = <&cpg 628>; 1004 status = "disabled"; 1005 }; 1006 1007 pwm9: pwm@e6e39000 { 1008 compatible = "renesas,pwm-r8a779g0", "renesas,pwm-rcar"; 1009 reg = <0 0xe6e39000 0 0x10>; 1010 #pwm-cells = <2>; 1011 clocks = <&cpg CPG_MOD 628>; 1012 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1013 resets = <&cpg 628>; 1014 status = "disabled"; 1015 }; 1016 1017 scif0: serial@e6e60000 { 1018 compatible = "renesas,scif-r8a779g0", 1019 "renesas,rcar-gen4-scif", "renesas,scif"; 1020 reg = <0 0xe6e60000 0 64>; 1021 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>; 1022 clocks = <&cpg CPG_MOD 702>, 1023 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1024 <&scif_clk>; 1025 clock-names = "fck", "brg_int", "scif_clk"; 1026 dmas = <&dmac0 0x51>, <&dmac0 0x50>, 1027 <&dmac1 0x51>, <&dmac1 0x50>; 1028 dma-names = "tx", "rx", "tx", "rx"; 1029 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1030 resets = <&cpg 702>; 1031 status = "disabled"; 1032 }; 1033 1034 scif1: serial@e6e68000 { 1035 compatible = "renesas,scif-r8a779g0", 1036 "renesas,rcar-gen4-scif", "renesas,scif"; 1037 reg = <0 0xe6e68000 0 64>; 1038 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>; 1039 clocks = <&cpg CPG_MOD 703>, 1040 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1041 <&scif_clk>; 1042 clock-names = "fck", "brg_int", "scif_clk"; 1043 dmas = <&dmac0 0x53>, <&dmac0 0x52>, 1044 <&dmac1 0x53>, <&dmac1 0x52>; 1045 dma-names = "tx", "rx", "tx", "rx"; 1046 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1047 resets = <&cpg 703>; 1048 status = "disabled"; 1049 }; 1050 1051 scif3: serial@e6c50000 { 1052 compatible = "renesas,scif-r8a779g0", 1053 "renesas,rcar-gen4-scif", "renesas,scif"; 1054 reg = <0 0xe6c50000 0 64>; 1055 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; 1056 clocks = <&cpg CPG_MOD 704>, 1057 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1058 <&scif_clk>; 1059 clock-names = "fck", "brg_int", "scif_clk"; 1060 dmas = <&dmac0 0x57>, <&dmac0 0x56>, 1061 <&dmac1 0x57>, <&dmac1 0x56>; 1062 dma-names = "tx", "rx", "tx", "rx"; 1063 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1064 resets = <&cpg 704>; 1065 status = "disabled"; 1066 }; 1067 1068 scif4: serial@e6c40000 { 1069 compatible = "renesas,scif-r8a779g0", 1070 "renesas,rcar-gen4-scif", "renesas,scif"; 1071 reg = <0 0xe6c40000 0 64>; 1072 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; 1073 clocks = <&cpg CPG_MOD 705>, 1074 <&cpg CPG_CORE R8A779G0_CLK_SASYNCPERD1>, 1075 <&scif_clk2>; 1076 clock-names = "fck", "brg_int", "scif_clk"; 1077 dmas = <&dmac0 0x59>, <&dmac0 0x58>, 1078 <&dmac1 0x59>, <&dmac1 0x58>; 1079 dma-names = "tx", "rx", "tx", "rx"; 1080 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1081 resets = <&cpg 705>; 1082 status = "disabled"; 1083 }; 1084 1085 tpu: pwm@e6e80000 { 1086 compatible = "renesas,tpu-r8a779g0", "renesas,tpu"; 1087 reg = <0 0xe6e80000 0 0x148>; 1088 interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; 1089 clocks = <&cpg CPG_MOD 718>; 1090 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1091 resets = <&cpg 718>; 1092 #pwm-cells = <3>; 1093 status = "disabled"; 1094 }; 1095 1096 msiof0: spi@e6e90000 { 1097 compatible = "renesas,msiof-r8a779g0", 1098 "renesas,rcar-gen4-msiof"; 1099 reg = <0 0xe6e90000 0 0x0064>; 1100 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 1101 clocks = <&cpg CPG_MOD 618>; 1102 dmas = <&dmac0 0x41>, <&dmac0 0x40>, 1103 <&dmac1 0x41>, <&dmac1 0x40>; 1104 dma-names = "tx", "rx", "tx", "rx"; 1105 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1106 resets = <&cpg 618>; 1107 #address-cells = <1>; 1108 #size-cells = <0>; 1109 status = "disabled"; 1110 }; 1111 1112 msiof1: spi@e6ea0000 { 1113 compatible = "renesas,msiof-r8a779g0", 1114 "renesas,rcar-gen4-msiof"; 1115 reg = <0 0xe6ea0000 0 0x0064>; 1116 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>; 1117 clocks = <&cpg CPG_MOD 619>; 1118 dmas = <&dmac0 0x43>, <&dmac0 0x42>, 1119 <&dmac1 0x43>, <&dmac1 0x42>; 1120 dma-names = "tx", "rx", "tx", "rx"; 1121 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1122 resets = <&cpg 619>; 1123 #address-cells = <1>; 1124 #size-cells = <0>; 1125 status = "disabled"; 1126 }; 1127 1128 msiof2: spi@e6c00000 { 1129 compatible = "renesas,msiof-r8a779g0", 1130 "renesas,rcar-gen4-msiof"; 1131 reg = <0 0xe6c00000 0 0x0064>; 1132 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>; 1133 clocks = <&cpg CPG_MOD 620>; 1134 dmas = <&dmac0 0x45>, <&dmac0 0x44>, 1135 <&dmac1 0x45>, <&dmac1 0x44>; 1136 dma-names = "tx", "rx", "tx", "rx"; 1137 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1138 resets = <&cpg 620>; 1139 #address-cells = <1>; 1140 #size-cells = <0>; 1141 status = "disabled"; 1142 }; 1143 1144 msiof3: spi@e6c10000 { 1145 compatible = "renesas,msiof-r8a779g0", 1146 "renesas,rcar-gen4-msiof"; 1147 reg = <0 0xe6c10000 0 0x0064>; 1148 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 1149 clocks = <&cpg CPG_MOD 621>; 1150 dmas = <&dmac0 0x47>, <&dmac0 0x46>, 1151 <&dmac1 0x47>, <&dmac1 0x46>; 1152 dma-names = "tx", "rx", "tx", "rx"; 1153 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1154 resets = <&cpg 621>; 1155 #address-cells = <1>; 1156 #size-cells = <0>; 1157 status = "disabled"; 1158 }; 1159 1160 msiof4: spi@e6c20000 { 1161 compatible = "renesas,msiof-r8a779g0", 1162 "renesas,rcar-gen4-msiof"; 1163 reg = <0 0xe6c20000 0 0x0064>; 1164 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>; 1165 clocks = <&cpg CPG_MOD 622>; 1166 dmas = <&dmac0 0x49>, <&dmac0 0x48>, 1167 <&dmac1 0x49>, <&dmac1 0x48>; 1168 dma-names = "tx", "rx", "tx", "rx"; 1169 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1170 resets = <&cpg 622>; 1171 #address-cells = <1>; 1172 #size-cells = <0>; 1173 status = "disabled"; 1174 }; 1175 1176 msiof5: spi@e6c28000 { 1177 compatible = "renesas,msiof-r8a779g0", 1178 "renesas,rcar-gen4-msiof"; 1179 reg = <0 0xe6c28000 0 0x0064>; 1180 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>; 1181 clocks = <&cpg CPG_MOD 623>; 1182 dmas = <&dmac0 0x4b>, <&dmac0 0x4a>, 1183 <&dmac1 0x4b>, <&dmac1 0x4a>; 1184 dma-names = "tx", "rx", "tx", "rx"; 1185 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1186 resets = <&cpg 623>; 1187 #address-cells = <1>; 1188 #size-cells = <0>; 1189 status = "disabled"; 1190 }; 1191 1192 vin00: video@e6ef0000 { 1193 compatible = "renesas,vin-r8a779g0"; 1194 reg = <0 0xe6ef0000 0 0x1000>; 1195 interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>; 1196 clocks = <&cpg CPG_MOD 730>; 1197 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1198 resets = <&cpg 730>; 1199 renesas,id = <0>; 1200 status = "disabled"; 1201 1202 ports { 1203 #address-cells = <1>; 1204 #size-cells = <0>; 1205 1206 port@2 { 1207 #address-cells = <1>; 1208 #size-cells = <0>; 1209 1210 reg = <2>; 1211 1212 vin00isp0: endpoint@0 { 1213 reg = <0>; 1214 remote-endpoint = <&isp0vin00>; 1215 }; 1216 }; 1217 }; 1218 }; 1219 1220 vin01: video@e6ef1000 { 1221 compatible = "renesas,vin-r8a779g0"; 1222 reg = <0 0xe6ef1000 0 0x1000>; 1223 interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>; 1224 clocks = <&cpg CPG_MOD 731>; 1225 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1226 resets = <&cpg 731>; 1227 renesas,id = <1>; 1228 status = "disabled"; 1229 1230 ports { 1231 #address-cells = <1>; 1232 #size-cells = <0>; 1233 1234 port@2 { 1235 #address-cells = <1>; 1236 #size-cells = <0>; 1237 1238 reg = <2>; 1239 1240 vin01isp0: endpoint@0 { 1241 reg = <0>; 1242 remote-endpoint = <&isp0vin01>; 1243 }; 1244 }; 1245 }; 1246 }; 1247 1248 vin02: video@e6ef2000 { 1249 compatible = "renesas,vin-r8a779g0"; 1250 reg = <0 0xe6ef2000 0 0x1000>; 1251 interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; 1252 clocks = <&cpg CPG_MOD 800>; 1253 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1254 resets = <&cpg 800>; 1255 renesas,id = <2>; 1256 status = "disabled"; 1257 1258 ports { 1259 #address-cells = <1>; 1260 #size-cells = <0>; 1261 1262 port@2 { 1263 #address-cells = <1>; 1264 #size-cells = <0>; 1265 1266 reg = <2>; 1267 1268 vin02isp0: endpoint@0 { 1269 reg = <0>; 1270 remote-endpoint = <&isp0vin02>; 1271 }; 1272 }; 1273 }; 1274 }; 1275 1276 vin03: video@e6ef3000 { 1277 compatible = "renesas,vin-r8a779g0"; 1278 reg = <0 0xe6ef3000 0 0x1000>; 1279 interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>; 1280 clocks = <&cpg CPG_MOD 801>; 1281 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1282 resets = <&cpg 801>; 1283 renesas,id = <3>; 1284 status = "disabled"; 1285 1286 ports { 1287 #address-cells = <1>; 1288 #size-cells = <0>; 1289 1290 port@2 { 1291 #address-cells = <1>; 1292 #size-cells = <0>; 1293 1294 reg = <2>; 1295 1296 vin03isp0: endpoint@0 { 1297 reg = <0>; 1298 remote-endpoint = <&isp0vin03>; 1299 }; 1300 }; 1301 }; 1302 }; 1303 1304 vin04: video@e6ef4000 { 1305 compatible = "renesas,vin-r8a779g0"; 1306 reg = <0 0xe6ef4000 0 0x1000>; 1307 interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>; 1308 clocks = <&cpg CPG_MOD 802>; 1309 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1310 resets = <&cpg 802>; 1311 renesas,id = <4>; 1312 status = "disabled"; 1313 1314 ports { 1315 #address-cells = <1>; 1316 #size-cells = <0>; 1317 1318 port@2 { 1319 #address-cells = <1>; 1320 #size-cells = <0>; 1321 1322 reg = <2>; 1323 1324 vin04isp0: endpoint@0 { 1325 reg = <0>; 1326 remote-endpoint = <&isp0vin04>; 1327 }; 1328 }; 1329 }; 1330 }; 1331 1332 vin05: video@e6ef5000 { 1333 compatible = "renesas,vin-r8a779g0"; 1334 reg = <0 0xe6ef5000 0 0x1000>; 1335 interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>; 1336 clocks = <&cpg CPG_MOD 803>; 1337 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1338 resets = <&cpg 803>; 1339 renesas,id = <5>; 1340 status = "disabled"; 1341 1342 ports { 1343 #address-cells = <1>; 1344 #size-cells = <0>; 1345 1346 port@2 { 1347 #address-cells = <1>; 1348 #size-cells = <0>; 1349 1350 reg = <2>; 1351 1352 vin05isp0: endpoint@0 { 1353 reg = <0>; 1354 remote-endpoint = <&isp0vin05>; 1355 }; 1356 }; 1357 }; 1358 }; 1359 1360 vin06: video@e6ef6000 { 1361 compatible = "renesas,vin-r8a779g0"; 1362 reg = <0 0xe6ef6000 0 0x1000>; 1363 interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>; 1364 clocks = <&cpg CPG_MOD 804>; 1365 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1366 resets = <&cpg 804>; 1367 renesas,id = <6>; 1368 status = "disabled"; 1369 1370 ports { 1371 #address-cells = <1>; 1372 #size-cells = <0>; 1373 1374 port@2 { 1375 #address-cells = <1>; 1376 #size-cells = <0>; 1377 1378 reg = <2>; 1379 1380 vin06isp0: endpoint@0 { 1381 reg = <0>; 1382 remote-endpoint = <&isp0vin06>; 1383 }; 1384 }; 1385 }; 1386 }; 1387 1388 vin07: video@e6ef7000 { 1389 compatible = "renesas,vin-r8a779g0"; 1390 reg = <0 0xe6ef7000 0 0x1000>; 1391 interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>; 1392 clocks = <&cpg CPG_MOD 805>; 1393 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1394 resets = <&cpg 805>; 1395 renesas,id = <7>; 1396 status = "disabled"; 1397 1398 ports { 1399 #address-cells = <1>; 1400 #size-cells = <0>; 1401 1402 port@2 { 1403 #address-cells = <1>; 1404 #size-cells = <0>; 1405 1406 reg = <2>; 1407 1408 vin07isp0: endpoint@0 { 1409 reg = <0>; 1410 remote-endpoint = <&isp0vin07>; 1411 }; 1412 }; 1413 }; 1414 }; 1415 1416 vin08: video@e6ef8000 { 1417 compatible = "renesas,vin-r8a779g0"; 1418 reg = <0 0xe6ef8000 0 0x1000>; 1419 interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>; 1420 clocks = <&cpg CPG_MOD 806>; 1421 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1422 resets = <&cpg 806>; 1423 renesas,id = <8>; 1424 status = "disabled"; 1425 1426 ports { 1427 #address-cells = <1>; 1428 #size-cells = <0>; 1429 1430 port@2 { 1431 #address-cells = <1>; 1432 #size-cells = <0>; 1433 1434 reg = <2>; 1435 1436 vin08isp1: endpoint@1 { 1437 reg = <1>; 1438 remote-endpoint = <&isp1vin08>; 1439 }; 1440 }; 1441 }; 1442 }; 1443 1444 vin09: video@e6ef9000 { 1445 compatible = "renesas,vin-r8a779g0"; 1446 reg = <0 0xe6ef9000 0 0x1000>; 1447 interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>; 1448 clocks = <&cpg CPG_MOD 807>; 1449 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1450 resets = <&cpg 807>; 1451 renesas,id = <9>; 1452 status = "disabled"; 1453 1454 ports { 1455 #address-cells = <1>; 1456 #size-cells = <0>; 1457 1458 port@2 { 1459 #address-cells = <1>; 1460 #size-cells = <0>; 1461 1462 reg = <2>; 1463 1464 vin09isp1: endpoint@1 { 1465 reg = <1>; 1466 remote-endpoint = <&isp1vin09>; 1467 }; 1468 }; 1469 }; 1470 }; 1471 1472 vin10: video@e6efa000 { 1473 compatible = "renesas,vin-r8a779g0"; 1474 reg = <0 0xe6efa000 0 0x1000>; 1475 interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>; 1476 clocks = <&cpg CPG_MOD 808>; 1477 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1478 resets = <&cpg 808>; 1479 renesas,id = <10>; 1480 status = "disabled"; 1481 1482 ports { 1483 #address-cells = <1>; 1484 #size-cells = <0>; 1485 1486 port@2 { 1487 #address-cells = <1>; 1488 #size-cells = <0>; 1489 1490 reg = <2>; 1491 1492 vin10isp1: endpoint@1 { 1493 reg = <1>; 1494 remote-endpoint = <&isp1vin10>; 1495 }; 1496 }; 1497 }; 1498 }; 1499 1500 vin11: video@e6efb000 { 1501 compatible = "renesas,vin-r8a779g0"; 1502 reg = <0 0xe6efb000 0 0x1000>; 1503 interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>; 1504 clocks = <&cpg CPG_MOD 809>; 1505 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1506 resets = <&cpg 809>; 1507 renesas,id = <11>; 1508 status = "disabled"; 1509 1510 ports { 1511 #address-cells = <1>; 1512 #size-cells = <0>; 1513 1514 port@2 { 1515 #address-cells = <1>; 1516 #size-cells = <0>; 1517 1518 reg = <2>; 1519 1520 vin11isp1: endpoint@1 { 1521 reg = <1>; 1522 remote-endpoint = <&isp1vin11>; 1523 }; 1524 }; 1525 }; 1526 }; 1527 1528 vin12: video@e6efc000 { 1529 compatible = "renesas,vin-r8a779g0"; 1530 reg = <0 0xe6efc000 0 0x1000>; 1531 interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>; 1532 clocks = <&cpg CPG_MOD 810>; 1533 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1534 resets = <&cpg 810>; 1535 renesas,id = <12>; 1536 status = "disabled"; 1537 1538 ports { 1539 #address-cells = <1>; 1540 #size-cells = <0>; 1541 1542 port@2 { 1543 #address-cells = <1>; 1544 #size-cells = <0>; 1545 1546 reg = <2>; 1547 1548 vin12isp1: endpoint@1 { 1549 reg = <1>; 1550 remote-endpoint = <&isp1vin12>; 1551 }; 1552 }; 1553 }; 1554 }; 1555 1556 vin13: video@e6efd000 { 1557 compatible = "renesas,vin-r8a779g0"; 1558 reg = <0 0xe6efd000 0 0x1000>; 1559 interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>; 1560 clocks = <&cpg CPG_MOD 811>; 1561 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1562 resets = <&cpg 811>; 1563 renesas,id = <13>; 1564 status = "disabled"; 1565 1566 ports { 1567 #address-cells = <1>; 1568 #size-cells = <0>; 1569 1570 port@2 { 1571 #address-cells = <1>; 1572 #size-cells = <0>; 1573 1574 reg = <2>; 1575 1576 vin13isp1: endpoint@1 { 1577 reg = <1>; 1578 remote-endpoint = <&isp1vin13>; 1579 }; 1580 }; 1581 }; 1582 }; 1583 1584 vin14: video@e6efe000 { 1585 compatible = "renesas,vin-r8a779g0"; 1586 reg = <0 0xe6efe000 0 0x1000>; 1587 interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>; 1588 clocks = <&cpg CPG_MOD 812>; 1589 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1590 resets = <&cpg 812>; 1591 renesas,id = <14>; 1592 status = "disabled"; 1593 1594 ports { 1595 #address-cells = <1>; 1596 #size-cells = <0>; 1597 1598 port@2 { 1599 #address-cells = <1>; 1600 #size-cells = <0>; 1601 1602 reg = <2>; 1603 1604 vin14isp1: endpoint@1 { 1605 reg = <1>; 1606 remote-endpoint = <&isp1vin14>; 1607 }; 1608 }; 1609 }; 1610 }; 1611 1612 vin15: video@e6eff000 { 1613 compatible = "renesas,vin-r8a779g0"; 1614 reg = <0 0xe6eff000 0 0x1000>; 1615 interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>; 1616 clocks = <&cpg CPG_MOD 813>; 1617 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1618 resets = <&cpg 813>; 1619 renesas,id = <15>; 1620 status = "disabled"; 1621 1622 ports { 1623 #address-cells = <1>; 1624 #size-cells = <0>; 1625 1626 port@2 { 1627 #address-cells = <1>; 1628 #size-cells = <0>; 1629 1630 reg = <2>; 1631 1632 vin15isp1: endpoint@1 { 1633 reg = <1>; 1634 remote-endpoint = <&isp1vin15>; 1635 }; 1636 }; 1637 }; 1638 }; 1639 1640 dmac0: dma-controller@e7350000 { 1641 compatible = "renesas,dmac-r8a779g0", 1642 "renesas,rcar-gen4-dmac"; 1643 reg = <0 0xe7350000 0 0x1000>, 1644 <0 0xe7300000 0 0x10000>; 1645 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 1646 <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 1647 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 1648 <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 1649 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 1650 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 1651 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 1652 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 1653 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 1654 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 1655 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 1656 <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 1657 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 1658 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1659 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1660 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1661 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 1662 interrupt-names = "error", 1663 "ch0", "ch1", "ch2", "ch3", "ch4", 1664 "ch5", "ch6", "ch7", "ch8", "ch9", 1665 "ch10", "ch11", "ch12", "ch13", 1666 "ch14", "ch15"; 1667 clocks = <&cpg CPG_MOD 709>; 1668 clock-names = "fck"; 1669 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1670 resets = <&cpg 709>; 1671 #dma-cells = <1>; 1672 dma-channels = <16>; 1673 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1674 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1675 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1676 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1677 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1678 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1679 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1680 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1681 }; 1682 1683 dmac1: dma-controller@e7351000 { 1684 compatible = "renesas,dmac-r8a779g0", 1685 "renesas,rcar-gen4-dmac"; 1686 reg = <0 0xe7351000 0 0x1000>, 1687 <0 0xe7310000 0 0x10000>; 1688 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1689 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1690 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1691 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1692 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1693 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1694 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1695 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1696 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1697 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1698 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1699 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1700 <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1701 <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1702 <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1703 <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1704 <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 1705 interrupt-names = "error", 1706 "ch0", "ch1", "ch2", "ch3", "ch4", 1707 "ch5", "ch6", "ch7", "ch8", "ch9", 1708 "ch10", "ch11", "ch12", "ch13", 1709 "ch14", "ch15"; 1710 clocks = <&cpg CPG_MOD 710>; 1711 clock-names = "fck"; 1712 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1713 resets = <&cpg 710>; 1714 #dma-cells = <1>; 1715 dma-channels = <16>; 1716 iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>, 1717 <&ipmmu_ds0 18>, <&ipmmu_ds0 19>, 1718 <&ipmmu_ds0 20>, <&ipmmu_ds0 21>, 1719 <&ipmmu_ds0 22>, <&ipmmu_ds0 23>, 1720 <&ipmmu_ds0 24>, <&ipmmu_ds0 25>, 1721 <&ipmmu_ds0 26>, <&ipmmu_ds0 27>, 1722 <&ipmmu_ds0 28>, <&ipmmu_ds0 29>, 1723 <&ipmmu_ds0 30>, <&ipmmu_ds0 31>; 1724 }; 1725 1726 rcar_sound: sound@ec5a0000 { 1727 /* 1728 * #sound-dai-cells is required 1729 * 1730 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1731 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1732 */ 1733 /* 1734 * #clock-cells is required 1735 * 1736 * clkout : #clock-cells = <0>; <&rcar_sound>; 1737 * audio_clkout0/1/2/3 : #clock-cells = <1>; <&rcar_sound N>; 1738 */ 1739 compatible = "renesas,rcar_sound-r8a779g0", "renesas,rcar_sound-gen4"; 1740 reg = <0 0xec5a0000 0 0x020>, 1741 <0 0xec540000 0 0x1000>, 1742 <0 0xec541000 0 0x050>, 1743 <0 0xec400000 0 0x40000>; 1744 reg-names = "adg", "ssiu", "ssi", "sdmc"; 1745 1746 clocks = <&cpg CPG_MOD 2926>, <&cpg CPG_MOD 2927>, <&audio_clkin>; 1747 clock-names = "ssiu.0", "ssi.0", "clkin"; 1748 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1749 resets = <&cpg 2926>, <&cpg 2927>; 1750 reset-names = "ssiu.0", "ssi.0"; 1751 status = "disabled"; 1752 1753 rcar_sound,ssiu { 1754 ssiu00: ssiu-0 { 1755 dmas = <&dmac0 0x6e>, <&dmac0 0x6f>; 1756 dma-names = "tx", "rx"; 1757 }; 1758 ssiu01: ssiu-1 { 1759 dmas = <&dmac0 0x6c>, <&dmac0 0x6d>; 1760 dma-names = "tx", "rx"; 1761 }; 1762 ssiu02: ssiu-2 { 1763 dmas = <&dmac0 0x6a>, <&dmac0 0x6b>; 1764 dma-names = "tx", "rx"; 1765 }; 1766 ssiu03: ssiu-3 { 1767 dmas = <&dmac0 0x68>, <&dmac0 0x69>; 1768 dma-names = "tx", "rx"; 1769 }; 1770 ssiu04: ssiu-4 { 1771 dmas = <&dmac0 0x66>, <&dmac0 0x67>; 1772 dma-names = "tx", "rx"; 1773 }; 1774 ssiu05: ssiu-5 { 1775 dmas = <&dmac0 0x64>, <&dmac0 0x65>; 1776 dma-names = "tx", "rx"; 1777 }; 1778 ssiu06: ssiu-6 { 1779 dmas = <&dmac0 0x62>, <&dmac0 0x63>; 1780 dma-names = "tx", "rx"; 1781 }; 1782 ssiu07: ssiu-7 { 1783 dmas = <&dmac0 0x60>, <&dmac0 0x61>; 1784 dma-names = "tx", "rx"; 1785 }; 1786 }; 1787 1788 rcar_sound,ssi { 1789 ssi0: ssi-0 { 1790 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>; 1791 }; 1792 }; 1793 }; 1794 1795 mmc0: mmc@ee140000 { 1796 compatible = "renesas,sdhi-r8a779g0", 1797 "renesas,rcar-gen4-sdhi"; 1798 reg = <0 0xee140000 0 0x2000>; 1799 interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>; 1800 clocks = <&cpg CPG_MOD 706>, 1801 <&cpg CPG_CORE R8A779G0_CLK_SD0H>; 1802 clock-names = "core", "clkh"; 1803 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1804 resets = <&cpg 706>; 1805 max-frequency = <200000000>; 1806 iommus = <&ipmmu_ds0 32>; 1807 status = "disabled"; 1808 }; 1809 1810 rpc: spi@ee200000 { 1811 compatible = "renesas,r8a779g0-rpc-if", 1812 "renesas,rcar-gen4-rpc-if"; 1813 reg = <0 0xee200000 0 0x200>, 1814 <0 0x08000000 0 0x04000000>, 1815 <0 0xee208000 0 0x100>; 1816 reg-names = "regs", "dirmap", "wbuf"; 1817 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 1818 clocks = <&cpg CPG_MOD 629>; 1819 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1820 resets = <&cpg 629>; 1821 #address-cells = <1>; 1822 #size-cells = <0>; 1823 status = "disabled"; 1824 }; 1825 1826 ipmmu_rt0: iommu@ee480000 { 1827 compatible = "renesas,ipmmu-r8a779g0", 1828 "renesas,rcar-gen4-ipmmu-vmsa"; 1829 reg = <0 0xee480000 0 0x20000>; 1830 renesas,ipmmu-main = <&ipmmu_mm>; 1831 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1832 #iommu-cells = <1>; 1833 }; 1834 1835 ipmmu_rt1: iommu@ee4c0000 { 1836 compatible = "renesas,ipmmu-r8a779g0", 1837 "renesas,rcar-gen4-ipmmu-vmsa"; 1838 reg = <0 0xee4c0000 0 0x20000>; 1839 renesas,ipmmu-main = <&ipmmu_mm>; 1840 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1841 #iommu-cells = <1>; 1842 }; 1843 1844 ipmmu_ds0: iommu@eed00000 { 1845 compatible = "renesas,ipmmu-r8a779g0", 1846 "renesas,rcar-gen4-ipmmu-vmsa"; 1847 reg = <0 0xeed00000 0 0x20000>; 1848 renesas,ipmmu-main = <&ipmmu_mm>; 1849 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1850 #iommu-cells = <1>; 1851 }; 1852 1853 ipmmu_hc: iommu@eed40000 { 1854 compatible = "renesas,ipmmu-r8a779g0", 1855 "renesas,rcar-gen4-ipmmu-vmsa"; 1856 reg = <0 0xeed40000 0 0x20000>; 1857 renesas,ipmmu-main = <&ipmmu_mm>; 1858 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1859 #iommu-cells = <1>; 1860 }; 1861 1862 ipmmu_ir: iommu@eed80000 { 1863 compatible = "renesas,ipmmu-r8a779g0", 1864 "renesas,rcar-gen4-ipmmu-vmsa"; 1865 reg = <0 0xeed80000 0 0x20000>; 1866 renesas,ipmmu-main = <&ipmmu_mm>; 1867 power-domains = <&sysc R8A779G0_PD_A3IR>; 1868 #iommu-cells = <1>; 1869 }; 1870 1871 ipmmu_vc: iommu@eedc0000 { 1872 compatible = "renesas,ipmmu-r8a779g0", 1873 "renesas,rcar-gen4-ipmmu-vmsa"; 1874 reg = <0 0xeedc0000 0 0x20000>; 1875 renesas,ipmmu-main = <&ipmmu_mm>; 1876 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1877 #iommu-cells = <1>; 1878 }; 1879 1880 ipmmu_3dg: iommu@eee00000 { 1881 compatible = "renesas,ipmmu-r8a779g0", 1882 "renesas,rcar-gen4-ipmmu-vmsa"; 1883 reg = <0 0xeee00000 0 0x20000>; 1884 renesas,ipmmu-main = <&ipmmu_mm>; 1885 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1886 #iommu-cells = <1>; 1887 }; 1888 1889 ipmmu_vi0: iommu@eee80000 { 1890 compatible = "renesas,ipmmu-r8a779g0", 1891 "renesas,rcar-gen4-ipmmu-vmsa"; 1892 reg = <0 0xeee80000 0 0x20000>; 1893 renesas,ipmmu-main = <&ipmmu_mm>; 1894 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1895 #iommu-cells = <1>; 1896 }; 1897 1898 ipmmu_vi1: iommu@eeec0000 { 1899 compatible = "renesas,ipmmu-r8a779g0", 1900 "renesas,rcar-gen4-ipmmu-vmsa"; 1901 reg = <0 0xeeec0000 0 0x20000>; 1902 renesas,ipmmu-main = <&ipmmu_mm>; 1903 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1904 #iommu-cells = <1>; 1905 }; 1906 1907 ipmmu_vip0: iommu@eef00000 { 1908 compatible = "renesas,ipmmu-r8a779g0", 1909 "renesas,rcar-gen4-ipmmu-vmsa"; 1910 reg = <0 0xeef00000 0 0x20000>; 1911 renesas,ipmmu-main = <&ipmmu_mm>; 1912 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1913 #iommu-cells = <1>; 1914 }; 1915 1916 ipmmu_vip1: iommu@eef40000 { 1917 compatible = "renesas,ipmmu-r8a779g0", 1918 "renesas,rcar-gen4-ipmmu-vmsa"; 1919 reg = <0 0xeef40000 0 0x20000>; 1920 renesas,ipmmu-main = <&ipmmu_mm>; 1921 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1922 #iommu-cells = <1>; 1923 }; 1924 1925 ipmmu_mm: iommu@eefc0000 { 1926 compatible = "renesas,ipmmu-r8a779g0", 1927 "renesas,rcar-gen4-ipmmu-vmsa"; 1928 reg = <0 0xeefc0000 0 0x20000>; 1929 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 1930 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>; 1931 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1932 #iommu-cells = <1>; 1933 }; 1934 1935 gic: interrupt-controller@f1000000 { 1936 compatible = "arm,gic-v3"; 1937 #interrupt-cells = <3>; 1938 #address-cells = <0>; 1939 interrupt-controller; 1940 reg = <0x0 0xf1000000 0 0x20000>, 1941 <0x0 0xf1060000 0 0x110000>; 1942 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1943 }; 1944 1945 csi40: csi2@fe500000 { 1946 compatible = "renesas,r8a779g0-csi2"; 1947 reg = <0 0xfe500000 0 0x40000>; 1948 interrupts = <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>; 1949 clocks = <&cpg CPG_MOD 331>; 1950 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1951 resets = <&cpg 331>; 1952 status = "disabled"; 1953 1954 ports { 1955 #address-cells = <1>; 1956 #size-cells = <0>; 1957 1958 port@0 { 1959 reg = <0>; 1960 }; 1961 1962 port@1 { 1963 reg = <1>; 1964 csi40isp0: endpoint { 1965 remote-endpoint = <&isp0csi40>; 1966 }; 1967 }; 1968 }; 1969 }; 1970 1971 csi41: csi2@fe540000 { 1972 compatible = "renesas,r8a779g0-csi2"; 1973 reg = <0 0xfe540000 0 0x40000>; 1974 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>; 1975 clocks = <&cpg CPG_MOD 400>; 1976 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 1977 resets = <&cpg 400>; 1978 status = "disabled"; 1979 1980 ports { 1981 #address-cells = <1>; 1982 #size-cells = <0>; 1983 1984 port@0 { 1985 reg = <0>; 1986 }; 1987 1988 port@1 { 1989 reg = <1>; 1990 csi41isp1: endpoint { 1991 remote-endpoint = <&isp1csi41>; 1992 }; 1993 }; 1994 }; 1995 }; 1996 1997 fcpvd0: fcp@fea10000 { 1998 compatible = "renesas,fcpv"; 1999 reg = <0 0xfea10000 0 0x200>; 2000 clocks = <&cpg CPG_MOD 508>; 2001 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2002 resets = <&cpg 508>; 2003 }; 2004 2005 fcpvd1: fcp@fea11000 { 2006 compatible = "renesas,fcpv"; 2007 reg = <0 0xfea11000 0 0x200>; 2008 clocks = <&cpg CPG_MOD 509>; 2009 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2010 resets = <&cpg 509>; 2011 }; 2012 2013 vspd0: vsp@fea20000 { 2014 compatible = "renesas,vsp2"; 2015 reg = <0 0xfea20000 0 0x7000>; 2016 interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>; 2017 clocks = <&cpg CPG_MOD 830>; 2018 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2019 resets = <&cpg 830>; 2020 2021 renesas,fcp = <&fcpvd0>; 2022 }; 2023 2024 vspd1: vsp@fea28000 { 2025 compatible = "renesas,vsp2"; 2026 reg = <0 0xfea28000 0 0x7000>; 2027 interrupts = <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>; 2028 clocks = <&cpg CPG_MOD 831>; 2029 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2030 resets = <&cpg 831>; 2031 2032 renesas,fcp = <&fcpvd1>; 2033 }; 2034 2035 du: display@feb00000 { 2036 compatible = "renesas,du-r8a779g0"; 2037 reg = <0 0xfeb00000 0 0x40000>; 2038 interrupts = <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>, 2039 <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>; 2040 clocks = <&cpg CPG_MOD 411>; 2041 clock-names = "du.0"; 2042 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2043 resets = <&cpg 411>; 2044 reset-names = "du.0"; 2045 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 2046 2047 status = "disabled"; 2048 2049 ports { 2050 #address-cells = <1>; 2051 #size-cells = <0>; 2052 2053 port@0 { 2054 reg = <0>; 2055 du_out_dsi0: endpoint { 2056 remote-endpoint = <&dsi0_in>; 2057 }; 2058 }; 2059 2060 port@1 { 2061 reg = <1>; 2062 du_out_dsi1: endpoint { 2063 remote-endpoint = <&dsi1_in>; 2064 }; 2065 }; 2066 }; 2067 }; 2068 2069 isp0: isp@fed00000 { 2070 compatible = "renesas,r8a779g0-isp"; 2071 reg = <0 0xfed00000 0 0x10000>; 2072 interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_LOW>; 2073 clocks = <&cpg CPG_MOD 612>; 2074 power-domains = <&sysc R8A779G0_PD_A3ISP0>; 2075 resets = <&cpg 612>; 2076 status = "disabled"; 2077 2078 ports { 2079 #address-cells = <1>; 2080 #size-cells = <0>; 2081 2082 port@0 { 2083 #address-cells = <1>; 2084 #size-cells = <0>; 2085 2086 reg = <0>; 2087 2088 isp0csi40: endpoint@0 { 2089 reg = <0>; 2090 remote-endpoint = <&csi40isp0>; 2091 }; 2092 }; 2093 2094 port@1 { 2095 reg = <1>; 2096 isp0vin00: endpoint { 2097 remote-endpoint = <&vin00isp0>; 2098 }; 2099 }; 2100 2101 port@2 { 2102 reg = <2>; 2103 isp0vin01: endpoint { 2104 remote-endpoint = <&vin01isp0>; 2105 }; 2106 }; 2107 2108 port@3 { 2109 reg = <3>; 2110 isp0vin02: endpoint { 2111 remote-endpoint = <&vin02isp0>; 2112 }; 2113 }; 2114 2115 port@4 { 2116 reg = <4>; 2117 isp0vin03: endpoint { 2118 remote-endpoint = <&vin03isp0>; 2119 }; 2120 }; 2121 2122 port@5 { 2123 reg = <5>; 2124 isp0vin04: endpoint { 2125 remote-endpoint = <&vin04isp0>; 2126 }; 2127 }; 2128 2129 port@6 { 2130 reg = <6>; 2131 isp0vin05: endpoint { 2132 remote-endpoint = <&vin05isp0>; 2133 }; 2134 }; 2135 2136 port@7 { 2137 reg = <7>; 2138 isp0vin06: endpoint { 2139 remote-endpoint = <&vin06isp0>; 2140 }; 2141 }; 2142 2143 port@8 { 2144 reg = <8>; 2145 isp0vin07: endpoint { 2146 remote-endpoint = <&vin07isp0>; 2147 }; 2148 }; 2149 }; 2150 }; 2151 2152 isp1: isp@fed20000 { 2153 compatible = "renesas,r8a779g0-isp"; 2154 reg = <0 0xfed20000 0 0x10000>; 2155 interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_LOW>; 2156 clocks = <&cpg CPG_MOD 613>; 2157 power-domains = <&sysc R8A779G0_PD_A3ISP1>; 2158 resets = <&cpg 613>; 2159 status = "disabled"; 2160 2161 ports { 2162 #address-cells = <1>; 2163 #size-cells = <0>; 2164 2165 port@0 { 2166 #address-cells = <1>; 2167 #size-cells = <0>; 2168 2169 reg = <0>; 2170 2171 isp1csi41: endpoint@1 { 2172 reg = <1>; 2173 remote-endpoint = <&csi41isp1>; 2174 }; 2175 }; 2176 2177 port@1 { 2178 reg = <1>; 2179 isp1vin08: endpoint { 2180 remote-endpoint = <&vin08isp1>; 2181 }; 2182 }; 2183 2184 port@2 { 2185 reg = <2>; 2186 isp1vin09: endpoint { 2187 remote-endpoint = <&vin09isp1>; 2188 }; 2189 }; 2190 2191 port@3 { 2192 reg = <3>; 2193 isp1vin10: endpoint { 2194 remote-endpoint = <&vin10isp1>; 2195 }; 2196 }; 2197 2198 port@4 { 2199 reg = <4>; 2200 isp1vin11: endpoint { 2201 remote-endpoint = <&vin11isp1>; 2202 }; 2203 }; 2204 2205 port@5 { 2206 reg = <5>; 2207 isp1vin12: endpoint { 2208 remote-endpoint = <&vin12isp1>; 2209 }; 2210 }; 2211 2212 port@6 { 2213 reg = <6>; 2214 isp1vin13: endpoint { 2215 remote-endpoint = <&vin13isp1>; 2216 }; 2217 }; 2218 2219 port@7 { 2220 reg = <7>; 2221 isp1vin14: endpoint { 2222 remote-endpoint = <&vin14isp1>; 2223 }; 2224 }; 2225 2226 port@8 { 2227 reg = <8>; 2228 isp1vin15: endpoint { 2229 remote-endpoint = <&vin15isp1>; 2230 }; 2231 }; 2232 }; 2233 }; 2234 2235 dsi0: dsi-encoder@fed80000 { 2236 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2237 reg = <0 0xfed80000 0 0x10000>; 2238 clocks = <&cpg CPG_MOD 415>, 2239 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2240 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2241 clock-names = "fck", "dsi", "pll"; 2242 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2243 resets = <&cpg 415>; 2244 2245 status = "disabled"; 2246 2247 ports { 2248 #address-cells = <1>; 2249 #size-cells = <0>; 2250 2251 port@0 { 2252 reg = <0>; 2253 dsi0_in: endpoint { 2254 remote-endpoint = <&du_out_dsi0>; 2255 }; 2256 }; 2257 2258 port@1 { 2259 reg = <1>; 2260 }; 2261 }; 2262 }; 2263 2264 dsi1: dsi-encoder@fed90000 { 2265 compatible = "renesas,r8a779g0-dsi-csi2-tx"; 2266 reg = <0 0xfed90000 0 0x10000>; 2267 clocks = <&cpg CPG_MOD 416>, 2268 <&cpg CPG_CORE R8A779G0_CLK_DSIEXT>, 2269 <&cpg CPG_CORE R8A779G0_CLK_DSIREF>; 2270 clock-names = "fck", "dsi", "pll"; 2271 power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; 2272 resets = <&cpg 416>; 2273 2274 status = "disabled"; 2275 2276 ports { 2277 #address-cells = <1>; 2278 #size-cells = <0>; 2279 2280 port@0 { 2281 reg = <0>; 2282 dsi1_in: endpoint { 2283 remote-endpoint = <&du_out_dsi1>; 2284 }; 2285 }; 2286 2287 port@1 { 2288 reg = <1>; 2289 }; 2290 }; 2291 }; 2292 2293 prr: chipid@fff00044 { 2294 compatible = "renesas,prr"; 2295 reg = <0 0xfff00044 0 4>; 2296 }; 2297 }; 2298 2299 thermal-zones { 2300 sensor_thermal_cr52: sensor1-thermal { 2301 polling-delay-passive = <250>; 2302 polling-delay = <1000>; 2303 thermal-sensors = <&tsc 0>; 2304 2305 trips { 2306 sensor1_crit: sensor1-crit { 2307 temperature = <120000>; 2308 hysteresis = <1000>; 2309 type = "critical"; 2310 }; 2311 }; 2312 }; 2313 2314 sensor_thermal_cnn: sensor2-thermal { 2315 polling-delay-passive = <250>; 2316 polling-delay = <1000>; 2317 thermal-sensors = <&tsc 1>; 2318 2319 trips { 2320 sensor2_crit: sensor2-crit { 2321 temperature = <120000>; 2322 hysteresis = <1000>; 2323 type = "critical"; 2324 }; 2325 }; 2326 }; 2327 2328 sensor_thermal_ca76: sensor3-thermal { 2329 polling-delay-passive = <250>; 2330 polling-delay = <1000>; 2331 thermal-sensors = <&tsc 2>; 2332 2333 trips { 2334 sensor3_crit: sensor3-crit { 2335 temperature = <120000>; 2336 hysteresis = <1000>; 2337 type = "critical"; 2338 }; 2339 }; 2340 }; 2341 2342 sensor_thermal_ddr1: sensor4-thermal { 2343 polling-delay-passive = <250>; 2344 polling-delay = <1000>; 2345 thermal-sensors = <&tsc 3>; 2346 2347 trips { 2348 sensor4_crit: sensor4-crit { 2349 temperature = <120000>; 2350 hysteresis = <1000>; 2351 type = "critical"; 2352 }; 2353 }; 2354 }; 2355 }; 2356 2357 timer { 2358 compatible = "arm,armv8-timer"; 2359 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 2360 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 2361 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 2362 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 2363 }; 2364}; 2365