1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Device Tree Source for the Spider CPU board 4 * 5 * Copyright (C) 2021 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/leds/common.h> 10 11#include "r8a779f0.dtsi" 12 13/ { 14 model = "Renesas Spider CPU board"; 15 compatible = "renesas,spider-cpu", "renesas,r8a779f0"; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 serial0 = &hscif0; 25 serial1 = &scif0; 26 }; 27 28 chosen { 29 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 30 stdout-path = "serial0:1843200n8"; 31 }; 32 33 leds { 34 compatible = "gpio-leds"; 35 36 led-7 { 37 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; 38 color = <LED_COLOR_ID_GREEN>; 39 function = LED_FUNCTION_INDICATOR; 40 function-enumerator = <7>; 41 }; 42 43 led-8 { 44 gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; 45 color = <LED_COLOR_ID_GREEN>; 46 function = LED_FUNCTION_INDICATOR; 47 function-enumerator = <8>; 48 }; 49 }; 50 51 memory@48000000 { 52 device_type = "memory"; 53 /* first 128MB is reserved for secure area. */ 54 reg = <0x0 0x48000000 0x0 0x78000000>; 55 }; 56 57 memory@480000000 { 58 device_type = "memory"; 59 reg = <0x4 0x80000000 0x0 0x80000000>; 60 }; 61 62 rc21012_pci: clk-rc21012-pci { 63 compatible = "fixed-clock"; 64 clock-frequency = <100000000>; 65 #clock-cells = <0>; 66 }; 67 68 rc21012_ufs: clk-rc21012-ufs { 69 compatible = "fixed-clock"; 70 clock-frequency = <38400000>; 71 #clock-cells = <0>; 72 }; 73 74 reg_1p8v: regulator-1p8v { 75 compatible = "regulator-fixed"; 76 regulator-name = "fixed-1.8V"; 77 regulator-min-microvolt = <1800000>; 78 regulator-max-microvolt = <1800000>; 79 regulator-boot-on; 80 regulator-always-on; 81 }; 82 83 reg_3p3v: regulator-3p3v { 84 compatible = "regulator-fixed"; 85 regulator-name = "fixed-3.3V"; 86 regulator-min-microvolt = <3300000>; 87 regulator-max-microvolt = <3300000>; 88 regulator-boot-on; 89 regulator-always-on; 90 }; 91}; 92 93&extal_clk { 94 clock-frequency = <20000000>; 95}; 96 97&extalr_clk { 98 clock-frequency = <32768>; 99}; 100 101&hscif0 { 102 pinctrl-0 = <&hscif0_pins>; 103 pinctrl-names = "default"; 104 105 uart-has-rtscts; 106 status = "okay"; 107}; 108 109&i2c0 { 110 pinctrl-0 = <&i2c0_pins>; 111 pinctrl-names = "default"; 112 113 status = "okay"; 114 clock-frequency = <400000>; 115 116 gpio_exp_20: gpio@20 { 117 compatible = "ti,tca9554"; 118 reg = <0x20>; 119 gpio-controller; 120 #gpio-cells = <2>; 121 122 rc21012-gpio2-hog { 123 gpio-hog; 124 gpios = <5 GPIO_ACTIVE_LOW>; 125 output-high; 126 }; 127 }; 128}; 129 130&i2c4 { 131 pinctrl-0 = <&i2c4_pins>; 132 pinctrl-names = "default"; 133 134 status = "okay"; 135 clock-frequency = <400000>; 136 137 eeprom@50 { 138 compatible = "rohm,br24g01", "atmel,24c01"; 139 label = "cpu-board"; 140 reg = <0x50>; 141 pagesize = <8>; 142 }; 143}; 144 145/* 146 * This board also has a microSD slot which we will not support upstream 147 * because we cannot directly switch voltages in software. 148 */ 149&mmc0 { 150 pinctrl-0 = <&mmc_pins>; 151 pinctrl-1 = <&mmc_pins>; 152 pinctrl-names = "default", "state_uhs"; 153 154 vmmc-supply = <®_3p3v>; 155 vqmmc-supply = <®_1p8v>; 156 mmc-hs200-1_8v; 157 mmc-hs400-1_8v; 158 bus-width = <8>; 159 no-sd; 160 no-sdio; 161 non-removable; 162 full-pwr-cycle-in-suspend; 163 status = "okay"; 164}; 165 166&pcie0_clkref { 167 compatible = "gpio-gate-clock"; 168 clocks = <&rc21012_pci>; 169 enable-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; 170 /delete-property/ clock-frequency; 171}; 172 173&pciec0 { 174 reset-gpios = <&gpio_exp_20 0 GPIO_ACTIVE_LOW>; 175 status = "okay"; 176}; 177 178&pfc { 179 pinctrl-0 = <&scif_clk_pins>; 180 pinctrl-names = "default"; 181 182 hscif0_pins: hscif0 { 183 groups = "hscif0_data", "hscif0_ctrl"; 184 function = "hscif0"; 185 }; 186 187 i2c0_pins: i2c0 { 188 groups = "i2c0"; 189 function = "i2c0"; 190 }; 191 192 i2c4_pins: i2c4 { 193 groups = "i2c4"; 194 function = "i2c4"; 195 }; 196 197 mmc_pins: mmc { 198 groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 199 function = "mmc"; 200 power-source = <1800>; 201 }; 202 203 scif0_pins: scif0 { 204 groups = "scif0_data", "scif0_ctrl"; 205 function = "scif0"; 206 }; 207 208 scif_clk_pins: scif_clk { 209 groups = "scif_clk"; 210 function = "scif_clk"; 211 }; 212}; 213 214&rwdt { 215 timeout-sec = <60>; 216 status = "okay"; 217}; 218 219&scif0 { 220 pinctrl-0 = <&scif0_pins>; 221 pinctrl-names = "default"; 222 223 uart-has-rtscts; 224 status = "okay"; 225}; 226 227&scif_clk { 228 clock-frequency = <24000000>; 229}; 230 231&ufs { 232 status = "okay"; 233}; 234 235&ufs30_clk { 236 compatible = "gpio-gate-clock"; 237 clocks = <&rc21012_ufs>; 238 enable-gpios = <&gpio_exp_20 4 GPIO_ACTIVE_LOW>; 239 /delete-property/ clock-frequency; 240}; 241