xref: /linux/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi (revision 34dc1baba215b826e454b8d19e4f24adbeb7d00d)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Device Tree Source for the Spider CPU board
4 *
5 * Copyright (C) 2021 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10
11#include "r8a779f0.dtsi"
12
13/ {
14	model = "Renesas Spider CPU board";
15	compatible = "renesas,spider-cpu", "renesas,r8a779f0";
16
17	aliases {
18		serial0 = &hscif0;
19		serial1 = &scif0;
20	};
21
22	chosen {
23		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
24		stdout-path = "serial0:1843200n8";
25	};
26
27	leds {
28		compatible = "gpio-leds";
29
30		led-7 {
31			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
32			color = <LED_COLOR_ID_GREEN>;
33			function = LED_FUNCTION_INDICATOR;
34			function-enumerator = <7>;
35		};
36
37		led-8 {
38			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
39			color = <LED_COLOR_ID_GREEN>;
40			function = LED_FUNCTION_INDICATOR;
41			function-enumerator = <8>;
42		};
43	};
44
45	memory@48000000 {
46		device_type = "memory";
47		/* first 128MB is reserved for secure area. */
48		reg = <0x0 0x48000000 0x0 0x78000000>;
49	};
50
51	memory@480000000 {
52		device_type = "memory";
53		reg = <0x4 0x80000000 0x0 0x80000000>;
54	};
55
56	rc21012_ufs: clk-rc21012-ufs {
57		compatible = "fixed-clock";
58		clock-frequency = <38400000>;
59		#clock-cells = <0>;
60	};
61
62	reg_1p8v: regulator-1p8v {
63		compatible = "regulator-fixed";
64		regulator-name = "fixed-1.8V";
65		regulator-min-microvolt = <1800000>;
66		regulator-max-microvolt = <1800000>;
67		regulator-boot-on;
68		regulator-always-on;
69	};
70
71	reg_3p3v: regulator-3p3v {
72		compatible = "regulator-fixed";
73		regulator-name = "fixed-3.3V";
74		regulator-min-microvolt = <3300000>;
75		regulator-max-microvolt = <3300000>;
76		regulator-boot-on;
77		regulator-always-on;
78	};
79};
80
81&extal_clk {
82	clock-frequency = <20000000>;
83};
84
85&extalr_clk {
86	clock-frequency = <32768>;
87};
88
89&hscif0 {
90	pinctrl-0 = <&hscif0_pins>;
91	pinctrl-names = "default";
92
93	uart-has-rtscts;
94	status = "okay";
95};
96
97&i2c0 {
98	pinctrl-0 = <&i2c0_pins>;
99	pinctrl-names = "default";
100
101	status = "okay";
102	clock-frequency = <400000>;
103
104	gpio_exp_20: gpio@20 {
105		compatible = "ti,tca9554";
106		reg = <0x20>;
107		gpio-controller;
108		#gpio-cells = <2>;
109	};
110};
111
112&i2c4 {
113	pinctrl-0 = <&i2c4_pins>;
114	pinctrl-names = "default";
115
116	status = "okay";
117	clock-frequency = <400000>;
118
119	eeprom@50 {
120		compatible = "rohm,br24g01", "atmel,24c01";
121		label = "cpu-board";
122		reg = <0x50>;
123		pagesize = <8>;
124	};
125};
126
127/*
128 * This board also has a microSD slot which we will not support upstream
129 * because we cannot directly switch voltages in software.
130 */
131&mmc0 {
132	pinctrl-0 = <&mmc_pins>;
133	pinctrl-1 = <&mmc_pins>;
134	pinctrl-names = "default", "state_uhs";
135
136	vmmc-supply = <&reg_3p3v>;
137	vqmmc-supply = <&reg_1p8v>;
138	mmc-hs200-1_8v;
139	mmc-hs400-1_8v;
140	bus-width = <8>;
141	no-sd;
142	no-sdio;
143	non-removable;
144	full-pwr-cycle-in-suspend;
145	status = "okay";
146};
147
148&pfc {
149	pinctrl-0 = <&scif_clk_pins>;
150	pinctrl-names = "default";
151
152	hscif0_pins: hscif0 {
153		groups = "hscif0_data", "hscif0_ctrl";
154		function = "hscif0";
155	};
156
157	i2c0_pins: i2c0 {
158		groups = "i2c0";
159		function = "i2c0";
160	};
161
162	i2c4_pins: i2c4 {
163		groups = "i2c4";
164		function = "i2c4";
165	};
166
167	mmc_pins: mmc {
168		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
169		function = "mmc";
170		power-source = <1800>;
171	};
172
173	scif0_pins: scif0 {
174		groups = "scif0_data", "scif0_ctrl";
175		function = "scif0";
176	};
177
178	scif_clk_pins: scif_clk {
179		groups = "scif_clk";
180		function = "scif_clk";
181	};
182};
183
184&rwdt {
185	timeout-sec = <60>;
186	status = "okay";
187};
188
189&scif0 {
190	pinctrl-0 = <&scif0_pins>;
191	pinctrl-names = "default";
192
193	uart-has-rtscts;
194	status = "okay";
195};
196
197&scif_clk {
198	clock-frequency = <24000000>;
199};
200
201&ufs {
202	status = "okay";
203};
204
205&ufs30_clk {
206	compatible = "gpio-gate-clock";
207	clocks = <&rc21012_ufs>;
208	enable-gpios = <&gpio_exp_20 4 GPIO_ACTIVE_LOW>;
209	/delete-property/ clock-frequency;
210};
211