1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Device Tree Source for the Spider CPU board 4 * 5 * Copyright (C) 2021 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/leds/common.h> 10 11#include "r8a779f0.dtsi" 12 13/ { 14 model = "Renesas Spider CPU board"; 15 compatible = "renesas,spider-cpu", "renesas,r8a779f0"; 16 17 aliases { 18 serial0 = &hscif0; 19 serial1 = &scif0; 20 }; 21 22 chosen { 23 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 24 stdout-path = "serial0:1843200n8"; 25 }; 26 27 leds { 28 compatible = "gpio-leds"; 29 30 led-7 { 31 gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; 32 color = <LED_COLOR_ID_GREEN>; 33 function = LED_FUNCTION_INDICATOR; 34 function-enumerator = <7>; 35 }; 36 37 led-8 { 38 gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; 39 color = <LED_COLOR_ID_GREEN>; 40 function = LED_FUNCTION_INDICATOR; 41 function-enumerator = <8>; 42 }; 43 }; 44 45 memory@48000000 { 46 device_type = "memory"; 47 /* first 128MB is reserved for secure area. */ 48 reg = <0x0 0x48000000 0x0 0x78000000>; 49 }; 50 51 memory@480000000 { 52 device_type = "memory"; 53 reg = <0x4 0x80000000 0x0 0x80000000>; 54 }; 55 56 rc21012_pci: clk-rc21012-pci { 57 compatible = "fixed-clock"; 58 clock-frequency = <100000000>; 59 #clock-cells = <0>; 60 }; 61 62 rc21012_ufs: clk-rc21012-ufs { 63 compatible = "fixed-clock"; 64 clock-frequency = <38400000>; 65 #clock-cells = <0>; 66 }; 67 68 reg_1p8v: regulator-1p8v { 69 compatible = "regulator-fixed"; 70 regulator-name = "fixed-1.8V"; 71 regulator-min-microvolt = <1800000>; 72 regulator-max-microvolt = <1800000>; 73 regulator-boot-on; 74 regulator-always-on; 75 }; 76 77 reg_3p3v: regulator-3p3v { 78 compatible = "regulator-fixed"; 79 regulator-name = "fixed-3.3V"; 80 regulator-min-microvolt = <3300000>; 81 regulator-max-microvolt = <3300000>; 82 regulator-boot-on; 83 regulator-always-on; 84 }; 85}; 86 87&extal_clk { 88 clock-frequency = <20000000>; 89}; 90 91&extalr_clk { 92 clock-frequency = <32768>; 93}; 94 95&hscif0 { 96 pinctrl-0 = <&hscif0_pins>; 97 pinctrl-names = "default"; 98 99 uart-has-rtscts; 100 status = "okay"; 101}; 102 103&i2c0 { 104 pinctrl-0 = <&i2c0_pins>; 105 pinctrl-names = "default"; 106 107 status = "okay"; 108 clock-frequency = <400000>; 109 110 gpio_exp_20: gpio@20 { 111 compatible = "ti,tca9554"; 112 reg = <0x20>; 113 gpio-controller; 114 #gpio-cells = <2>; 115 116 rc21012-gpio2-hog { 117 gpio-hog; 118 gpios = <5 GPIO_ACTIVE_LOW>; 119 output-high; 120 }; 121 }; 122}; 123 124&i2c4 { 125 pinctrl-0 = <&i2c4_pins>; 126 pinctrl-names = "default"; 127 128 status = "okay"; 129 clock-frequency = <400000>; 130 131 eeprom@50 { 132 compatible = "rohm,br24g01", "atmel,24c01"; 133 label = "cpu-board"; 134 reg = <0x50>; 135 pagesize = <8>; 136 }; 137}; 138 139/* 140 * This board also has a microSD slot which we will not support upstream 141 * because we cannot directly switch voltages in software. 142 */ 143&mmc0 { 144 pinctrl-0 = <&mmc_pins>; 145 pinctrl-1 = <&mmc_pins>; 146 pinctrl-names = "default", "state_uhs"; 147 148 vmmc-supply = <®_3p3v>; 149 vqmmc-supply = <®_1p8v>; 150 mmc-hs200-1_8v; 151 mmc-hs400-1_8v; 152 bus-width = <8>; 153 no-sd; 154 no-sdio; 155 non-removable; 156 full-pwr-cycle-in-suspend; 157 status = "okay"; 158}; 159 160&pcie0_clkref { 161 compatible = "gpio-gate-clock"; 162 clocks = <&rc21012_pci>; 163 enable-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; 164 /delete-property/ clock-frequency; 165}; 166 167&pciec0 { 168 reset-gpio = <&gpio_exp_20 0 GPIO_ACTIVE_LOW>; 169 status = "okay"; 170}; 171 172&pfc { 173 pinctrl-0 = <&scif_clk_pins>; 174 pinctrl-names = "default"; 175 176 hscif0_pins: hscif0 { 177 groups = "hscif0_data", "hscif0_ctrl"; 178 function = "hscif0"; 179 }; 180 181 i2c0_pins: i2c0 { 182 groups = "i2c0"; 183 function = "i2c0"; 184 }; 185 186 i2c4_pins: i2c4 { 187 groups = "i2c4"; 188 function = "i2c4"; 189 }; 190 191 mmc_pins: mmc { 192 groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 193 function = "mmc"; 194 power-source = <1800>; 195 }; 196 197 scif0_pins: scif0 { 198 groups = "scif0_data", "scif0_ctrl"; 199 function = "scif0"; 200 }; 201 202 scif_clk_pins: scif_clk { 203 groups = "scif_clk"; 204 function = "scif_clk"; 205 }; 206}; 207 208&rwdt { 209 timeout-sec = <60>; 210 status = "okay"; 211}; 212 213&scif0 { 214 pinctrl-0 = <&scif0_pins>; 215 pinctrl-names = "default"; 216 217 uart-has-rtscts; 218 status = "okay"; 219}; 220 221&scif_clk { 222 clock-frequency = <24000000>; 223}; 224 225&ufs { 226 status = "okay"; 227}; 228 229&ufs30_clk { 230 compatible = "gpio-gate-clock"; 231 clocks = <&rc21012_ufs>; 232 enable-gpios = <&gpio_exp_20 4 GPIO_ACTIVE_LOW>; 233 /delete-property/ clock-frequency; 234}; 235