163070d7cSYoshihiro Shimoda// SPDX-License-Identifier: GPL-2.0 263070d7cSYoshihiro Shimoda/* 363070d7cSYoshihiro Shimoda * Device Tree Source for the Falcon CPU board 463070d7cSYoshihiro Shimoda * 563070d7cSYoshihiro Shimoda * Copyright (C) 2020 Renesas Electronics Corp. 663070d7cSYoshihiro Shimoda */ 763070d7cSYoshihiro Shimoda 8e8ac55a5SWolfram Sang#include <dt-bindings/gpio/gpio.h> 963070d7cSYoshihiro Shimoda#include "r8a779a0.dtsi" 1063070d7cSYoshihiro Shimoda 1163070d7cSYoshihiro Shimoda/ { 1263070d7cSYoshihiro Shimoda model = "Renesas Falcon CPU board"; 1363070d7cSYoshihiro Shimoda compatible = "renesas,falcon-cpu", "renesas,r8a779a0"; 1463070d7cSYoshihiro Shimoda 1563070d7cSYoshihiro Shimoda memory@48000000 { 1663070d7cSYoshihiro Shimoda device_type = "memory"; 1763070d7cSYoshihiro Shimoda /* first 128MB is reserved for secure area. */ 1863070d7cSYoshihiro Shimoda reg = <0x0 0x48000000 0x0 0x78000000>; 1963070d7cSYoshihiro Shimoda }; 2063070d7cSYoshihiro Shimoda 2163070d7cSYoshihiro Shimoda memory@500000000 { 2263070d7cSYoshihiro Shimoda device_type = "memory"; 2363070d7cSYoshihiro Shimoda reg = <0x5 0x00000000 0x0 0x80000000>; 2463070d7cSYoshihiro Shimoda }; 2563070d7cSYoshihiro Shimoda 2663070d7cSYoshihiro Shimoda memory@600000000 { 2763070d7cSYoshihiro Shimoda device_type = "memory"; 2863070d7cSYoshihiro Shimoda reg = <0x6 0x00000000 0x0 0x80000000>; 2963070d7cSYoshihiro Shimoda }; 3063070d7cSYoshihiro Shimoda 3163070d7cSYoshihiro Shimoda memory@700000000 { 3263070d7cSYoshihiro Shimoda device_type = "memory"; 3363070d7cSYoshihiro Shimoda reg = <0x7 0x00000000 0x0 0x80000000>; 3463070d7cSYoshihiro Shimoda }; 3563070d7cSYoshihiro Shimoda}; 3663070d7cSYoshihiro Shimoda 37e8ac55a5SWolfram Sang&avb0 { 38e8ac55a5SWolfram Sang pinctrl-0 = <&avb0_pins>; 39e8ac55a5SWolfram Sang pinctrl-names = "default"; 40e8ac55a5SWolfram Sang phy-handle = <&phy0>; 41e8ac55a5SWolfram Sang tx-internal-delay-ps = <2000>; 42e8ac55a5SWolfram Sang status = "okay"; 43e8ac55a5SWolfram Sang 44e8ac55a5SWolfram Sang phy0: ethernet-phy@0 { 45e8ac55a5SWolfram Sang rxc-skew-ps = <1500>; 46e8ac55a5SWolfram Sang reg = <0>; 47e8ac55a5SWolfram Sang interrupt-parent = <&gpio4>; 48e8ac55a5SWolfram Sang interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 49e8ac55a5SWolfram Sang reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; 50e8ac55a5SWolfram Sang }; 51e8ac55a5SWolfram Sang}; 52e8ac55a5SWolfram Sang 5363070d7cSYoshihiro Shimoda&extal_clk { 5463070d7cSYoshihiro Shimoda clock-frequency = <16666666>; 5563070d7cSYoshihiro Shimoda}; 5663070d7cSYoshihiro Shimoda 5763070d7cSYoshihiro Shimoda&extalr_clk { 5863070d7cSYoshihiro Shimoda clock-frequency = <32768>; 5963070d7cSYoshihiro Shimoda}; 6063070d7cSYoshihiro Shimoda 610e6fb83eSWolfram Sang&i2c0 { 620e6fb83eSWolfram Sang pinctrl-0 = <&i2c0_pins>; 630e6fb83eSWolfram Sang pinctrl-names = "default"; 640e6fb83eSWolfram Sang 650e6fb83eSWolfram Sang status = "okay"; 660e6fb83eSWolfram Sang clock-frequency = <400000>; 670e6fb83eSWolfram Sang}; 680e6fb83eSWolfram Sang 690e6fb83eSWolfram Sang&i2c1 { 700e6fb83eSWolfram Sang pinctrl-0 = <&i2c1_pins>; 710e6fb83eSWolfram Sang pinctrl-names = "default"; 720e6fb83eSWolfram Sang 730e6fb83eSWolfram Sang status = "okay"; 740e6fb83eSWolfram Sang clock-frequency = <400000>; 750e6fb83eSWolfram Sang}; 760e6fb83eSWolfram Sang 770e6fb83eSWolfram Sang&i2c6 { 780e6fb83eSWolfram Sang pinctrl-0 = <&i2c6_pins>; 790e6fb83eSWolfram Sang pinctrl-names = "default"; 800e6fb83eSWolfram Sang 810e6fb83eSWolfram Sang status = "okay"; 820e6fb83eSWolfram Sang clock-frequency = <400000>; 830e6fb83eSWolfram Sang}; 840e6fb83eSWolfram Sang 850e6fb83eSWolfram Sang&pfc { 86*9e921faaSWolfram Sang pinctrl-0 = <&scif_clk_pins>; 87*9e921faaSWolfram Sang pinctrl-names = "default"; 88*9e921faaSWolfram Sang 89e8ac55a5SWolfram Sang avb0_pins: avb0 { 90e8ac55a5SWolfram Sang mux { 91e8ac55a5SWolfram Sang groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; 92e8ac55a5SWolfram Sang function = "avb0"; 93e8ac55a5SWolfram Sang }; 94e8ac55a5SWolfram Sang 95e8ac55a5SWolfram Sang pins_mdio { 96e8ac55a5SWolfram Sang groups = "avb0_mdio"; 97e8ac55a5SWolfram Sang drive-strength = <21>; 98e8ac55a5SWolfram Sang }; 99e8ac55a5SWolfram Sang 100e8ac55a5SWolfram Sang pins_mii { 101e8ac55a5SWolfram Sang groups = "avb0_rgmii"; 102e8ac55a5SWolfram Sang drive-strength = <21>; 103e8ac55a5SWolfram Sang }; 104e8ac55a5SWolfram Sang 105e8ac55a5SWolfram Sang }; 106e8ac55a5SWolfram Sang 1070e6fb83eSWolfram Sang i2c0_pins: i2c0 { 1080e6fb83eSWolfram Sang groups = "i2c0"; 1090e6fb83eSWolfram Sang function = "i2c0"; 1100e6fb83eSWolfram Sang }; 1110e6fb83eSWolfram Sang 1120e6fb83eSWolfram Sang i2c1_pins: i2c1 { 1130e6fb83eSWolfram Sang groups = "i2c1"; 1140e6fb83eSWolfram Sang function = "i2c1"; 1150e6fb83eSWolfram Sang }; 1160e6fb83eSWolfram Sang 1170e6fb83eSWolfram Sang i2c6_pins: i2c6 { 1180e6fb83eSWolfram Sang groups = "i2c6"; 1190e6fb83eSWolfram Sang function = "i2c6"; 1200e6fb83eSWolfram Sang }; 121*9e921faaSWolfram Sang 122*9e921faaSWolfram Sang scif0_pins: scif0 { 123*9e921faaSWolfram Sang groups = "scif0_data", "scif0_ctrl"; 124*9e921faaSWolfram Sang function = "scif0"; 125*9e921faaSWolfram Sang }; 126*9e921faaSWolfram Sang 127*9e921faaSWolfram Sang scif_clk_pins: scif_clk { 128*9e921faaSWolfram Sang groups = "scif_clk"; 129*9e921faaSWolfram Sang function = "scif_clk"; 130*9e921faaSWolfram Sang }; 1310e6fb83eSWolfram Sang}; 1320e6fb83eSWolfram Sang 13363070d7cSYoshihiro Shimoda&scif0 { 134*9e921faaSWolfram Sang pinctrl-0 = <&scif0_pins>; 135*9e921faaSWolfram Sang pinctrl-names = "default"; 136*9e921faaSWolfram Sang 137*9e921faaSWolfram Sang uart-has-rtscts; 13863070d7cSYoshihiro Shimoda status = "okay"; 13963070d7cSYoshihiro Shimoda}; 140*9e921faaSWolfram Sang 141*9e921faaSWolfram Sang&scif_clk { 142*9e921faaSWolfram Sang clock-frequency = <24000000>; 143*9e921faaSWolfram Sang}; 144