1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 cpus { 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 a53_0: cpu@0 { 56 compatible = "arm,cortex-a53", "arm,armv8"; 57 reg = <0>; 58 device_type = "cpu"; 59 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 60 next-level-cache = <&L2_CA53>; 61 enable-method = "psci"; 62 }; 63 64 a53_1: cpu@1 { 65 compatible = "arm,cortex-a53", "arm,armv8"; 66 reg = <1>; 67 device_type = "cpu"; 68 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 69 next-level-cache = <&L2_CA53>; 70 enable-method = "psci"; 71 }; 72 73 L2_CA53: cache-controller-0 { 74 compatible = "cache"; 75 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 76 cache-unified; 77 cache-level = <2>; 78 }; 79 }; 80 81 extal_clk: extal { 82 compatible = "fixed-clock"; 83 #clock-cells = <0>; 84 /* This value must be overridden by the board */ 85 clock-frequency = <0>; 86 }; 87 88 /* External PCIe clock - can be overridden by the board */ 89 pcie_bus_clk: pcie_bus { 90 compatible = "fixed-clock"; 91 #clock-cells = <0>; 92 clock-frequency = <0>; 93 }; 94 95 pmu_a53 { 96 compatible = "arm,cortex-a53-pmu"; 97 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 98 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 99 interrupt-affinity = <&a53_0>, <&a53_1>; 100 }; 101 102 psci { 103 compatible = "arm,psci-1.0", "arm,psci-0.2"; 104 method = "smc"; 105 }; 106 107 /* External SCIF clock - to be overridden by boards that provide it */ 108 scif_clk: scif { 109 compatible = "fixed-clock"; 110 #clock-cells = <0>; 111 clock-frequency = <0>; 112 }; 113 114 soc: soc { 115 compatible = "simple-bus"; 116 interrupt-parent = <&gic>; 117 #address-cells = <2>; 118 #size-cells = <2>; 119 ranges; 120 121 rwdt: watchdog@e6020000 { 122 compatible = "renesas,r8a77990-wdt", 123 "renesas,rcar-gen3-wdt"; 124 reg = <0 0xe6020000 0 0x0c>; 125 clocks = <&cpg CPG_MOD 402>; 126 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 127 resets = <&cpg 402>; 128 status = "disabled"; 129 }; 130 131 gpio0: gpio@e6050000 { 132 compatible = "renesas,gpio-r8a77990", 133 "renesas,rcar-gen3-gpio"; 134 reg = <0 0xe6050000 0 0x50>; 135 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 136 #gpio-cells = <2>; 137 gpio-controller; 138 gpio-ranges = <&pfc 0 0 18>; 139 #interrupt-cells = <2>; 140 interrupt-controller; 141 clocks = <&cpg CPG_MOD 912>; 142 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 143 resets = <&cpg 912>; 144 }; 145 146 gpio1: gpio@e6051000 { 147 compatible = "renesas,gpio-r8a77990", 148 "renesas,rcar-gen3-gpio"; 149 reg = <0 0xe6051000 0 0x50>; 150 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 151 #gpio-cells = <2>; 152 gpio-controller; 153 gpio-ranges = <&pfc 0 32 23>; 154 #interrupt-cells = <2>; 155 interrupt-controller; 156 clocks = <&cpg CPG_MOD 911>; 157 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 158 resets = <&cpg 911>; 159 }; 160 161 gpio2: gpio@e6052000 { 162 compatible = "renesas,gpio-r8a77990", 163 "renesas,rcar-gen3-gpio"; 164 reg = <0 0xe6052000 0 0x50>; 165 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 166 #gpio-cells = <2>; 167 gpio-controller; 168 gpio-ranges = <&pfc 0 64 26>; 169 #interrupt-cells = <2>; 170 interrupt-controller; 171 clocks = <&cpg CPG_MOD 910>; 172 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 173 resets = <&cpg 910>; 174 }; 175 176 gpio3: gpio@e6053000 { 177 compatible = "renesas,gpio-r8a77990", 178 "renesas,rcar-gen3-gpio"; 179 reg = <0 0xe6053000 0 0x50>; 180 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 181 #gpio-cells = <2>; 182 gpio-controller; 183 gpio-ranges = <&pfc 0 96 16>; 184 #interrupt-cells = <2>; 185 interrupt-controller; 186 clocks = <&cpg CPG_MOD 909>; 187 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 188 resets = <&cpg 909>; 189 }; 190 191 gpio4: gpio@e6054000 { 192 compatible = "renesas,gpio-r8a77990", 193 "renesas,rcar-gen3-gpio"; 194 reg = <0 0xe6054000 0 0x50>; 195 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 196 #gpio-cells = <2>; 197 gpio-controller; 198 gpio-ranges = <&pfc 0 128 11>; 199 #interrupt-cells = <2>; 200 interrupt-controller; 201 clocks = <&cpg CPG_MOD 908>; 202 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 203 resets = <&cpg 908>; 204 }; 205 206 gpio5: gpio@e6055000 { 207 compatible = "renesas,gpio-r8a77990", 208 "renesas,rcar-gen3-gpio"; 209 reg = <0 0xe6055000 0 0x50>; 210 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 211 #gpio-cells = <2>; 212 gpio-controller; 213 gpio-ranges = <&pfc 0 160 20>; 214 #interrupt-cells = <2>; 215 interrupt-controller; 216 clocks = <&cpg CPG_MOD 907>; 217 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 218 resets = <&cpg 907>; 219 }; 220 221 gpio6: gpio@e6055400 { 222 compatible = "renesas,gpio-r8a77990", 223 "renesas,rcar-gen3-gpio"; 224 reg = <0 0xe6055400 0 0x50>; 225 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 226 #gpio-cells = <2>; 227 gpio-controller; 228 gpio-ranges = <&pfc 0 192 18>; 229 #interrupt-cells = <2>; 230 interrupt-controller; 231 clocks = <&cpg CPG_MOD 906>; 232 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 233 resets = <&cpg 906>; 234 }; 235 236 i2c0: i2c@e6500000 { 237 #address-cells = <1>; 238 #size-cells = <0>; 239 compatible = "renesas,i2c-r8a77990", 240 "renesas,rcar-gen3-i2c"; 241 reg = <0 0xe6500000 0 0x40>; 242 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 243 clocks = <&cpg CPG_MOD 931>; 244 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 245 resets = <&cpg 931>; 246 i2c-scl-internal-delay-ns = <110>; 247 status = "disabled"; 248 }; 249 250 i2c1: i2c@e6508000 { 251 #address-cells = <1>; 252 #size-cells = <0>; 253 compatible = "renesas,i2c-r8a77990", 254 "renesas,rcar-gen3-i2c"; 255 reg = <0 0xe6508000 0 0x40>; 256 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 257 clocks = <&cpg CPG_MOD 930>; 258 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 259 resets = <&cpg 930>; 260 i2c-scl-internal-delay-ns = <6>; 261 status = "disabled"; 262 }; 263 264 i2c2: i2c@e6510000 { 265 #address-cells = <1>; 266 #size-cells = <0>; 267 compatible = "renesas,i2c-r8a77990", 268 "renesas,rcar-gen3-i2c"; 269 reg = <0 0xe6510000 0 0x40>; 270 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 271 clocks = <&cpg CPG_MOD 929>; 272 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 273 resets = <&cpg 929>; 274 i2c-scl-internal-delay-ns = <6>; 275 status = "disabled"; 276 }; 277 278 i2c3: i2c@e66d0000 { 279 #address-cells = <1>; 280 #size-cells = <0>; 281 compatible = "renesas,i2c-r8a77990", 282 "renesas,rcar-gen3-i2c"; 283 reg = <0 0xe66d0000 0 0x40>; 284 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 285 clocks = <&cpg CPG_MOD 928>; 286 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 287 resets = <&cpg 928>; 288 i2c-scl-internal-delay-ns = <110>; 289 status = "disabled"; 290 }; 291 292 i2c4: i2c@e66d8000 { 293 #address-cells = <1>; 294 #size-cells = <0>; 295 compatible = "renesas,i2c-r8a77990", 296 "renesas,rcar-gen3-i2c"; 297 reg = <0 0xe66d8000 0 0x40>; 298 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 299 clocks = <&cpg CPG_MOD 927>; 300 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 301 resets = <&cpg 927>; 302 i2c-scl-internal-delay-ns = <6>; 303 status = "disabled"; 304 }; 305 306 i2c5: i2c@e66e0000 { 307 #address-cells = <1>; 308 #size-cells = <0>; 309 compatible = "renesas,i2c-r8a77990", 310 "renesas,rcar-gen3-i2c"; 311 reg = <0 0xe66e0000 0 0x40>; 312 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 313 clocks = <&cpg CPG_MOD 919>; 314 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 315 resets = <&cpg 919>; 316 i2c-scl-internal-delay-ns = <6>; 317 status = "disabled"; 318 }; 319 320 i2c6: i2c@e66e8000 { 321 #address-cells = <1>; 322 #size-cells = <0>; 323 compatible = "renesas,i2c-r8a77990", 324 "renesas,rcar-gen3-i2c"; 325 reg = <0 0xe66e8000 0 0x40>; 326 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 327 clocks = <&cpg CPG_MOD 918>; 328 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 329 resets = <&cpg 918>; 330 i2c-scl-internal-delay-ns = <6>; 331 status = "disabled"; 332 }; 333 334 i2c7: i2c@e6690000 { 335 #address-cells = <1>; 336 #size-cells = <0>; 337 compatible = "renesas,i2c-r8a77990", 338 "renesas,rcar-gen3-i2c"; 339 reg = <0 0xe6690000 0 0x40>; 340 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 341 clocks = <&cpg CPG_MOD 1003>; 342 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 343 resets = <&cpg 1003>; 344 i2c-scl-internal-delay-ns = <6>; 345 status = "disabled"; 346 }; 347 348 pfc: pin-controller@e6060000 { 349 compatible = "renesas,pfc-r8a77990"; 350 reg = <0 0xe6060000 0 0x508>; 351 }; 352 353 cpg: clock-controller@e6150000 { 354 compatible = "renesas,r8a77990-cpg-mssr"; 355 reg = <0 0xe6150000 0 0x1000>; 356 clocks = <&extal_clk>; 357 clock-names = "extal"; 358 #clock-cells = <2>; 359 #power-domain-cells = <0>; 360 #reset-cells = <1>; 361 }; 362 363 rst: reset-controller@e6160000 { 364 compatible = "renesas,r8a77990-rst"; 365 reg = <0 0xe6160000 0 0x0200>; 366 }; 367 368 sysc: system-controller@e6180000 { 369 compatible = "renesas,r8a77990-sysc"; 370 reg = <0 0xe6180000 0 0x0400>; 371 #power-domain-cells = <1>; 372 }; 373 374 intc_ex: interrupt-controller@e61c0000 { 375 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 376 #interrupt-cells = <2>; 377 interrupt-controller; 378 reg = <0 0xe61c0000 0 0x200>; 379 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 380 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 381 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 382 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 383 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 384 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 385 clocks = <&cpg CPG_MOD 407>; 386 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 387 resets = <&cpg 407>; 388 }; 389 390 hscif0: serial@e6540000 { 391 compatible = "renesas,hscif-r8a77990", 392 "renesas,rcar-gen3-hscif", 393 "renesas,hscif"; 394 reg = <0 0xe6540000 0 0x60>; 395 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 396 clocks = <&cpg CPG_MOD 520>, 397 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 398 <&scif_clk>; 399 clock-names = "fck", "brg_int", "scif_clk"; 400 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 401 <&dmac2 0x31>, <&dmac2 0x30>; 402 dma-names = "tx", "rx", "tx", "rx"; 403 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 404 resets = <&cpg 520>; 405 status = "disabled"; 406 }; 407 408 hscif1: serial@e6550000 { 409 compatible = "renesas,hscif-r8a77990", 410 "renesas,rcar-gen3-hscif", 411 "renesas,hscif"; 412 reg = <0 0xe6550000 0 0x60>; 413 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 414 clocks = <&cpg CPG_MOD 519>, 415 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 416 <&scif_clk>; 417 clock-names = "fck", "brg_int", "scif_clk"; 418 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 419 <&dmac2 0x33>, <&dmac2 0x32>; 420 dma-names = "tx", "rx", "tx", "rx"; 421 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 422 resets = <&cpg 519>; 423 status = "disabled"; 424 }; 425 426 hscif2: serial@e6560000 { 427 compatible = "renesas,hscif-r8a77990", 428 "renesas,rcar-gen3-hscif", 429 "renesas,hscif"; 430 reg = <0 0xe6560000 0 0x60>; 431 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 432 clocks = <&cpg CPG_MOD 518>, 433 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 434 <&scif_clk>; 435 clock-names = "fck", "brg_int", "scif_clk"; 436 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 437 <&dmac2 0x35>, <&dmac2 0x34>; 438 dma-names = "tx", "rx", "tx", "rx"; 439 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 440 resets = <&cpg 518>; 441 status = "disabled"; 442 }; 443 444 hscif3: serial@e66a0000 { 445 compatible = "renesas,hscif-r8a77990", 446 "renesas,rcar-gen3-hscif", 447 "renesas,hscif"; 448 reg = <0 0xe66a0000 0 0x60>; 449 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 450 clocks = <&cpg CPG_MOD 517>, 451 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 452 <&scif_clk>; 453 clock-names = "fck", "brg_int", "scif_clk"; 454 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 455 dma-names = "tx", "rx"; 456 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 457 resets = <&cpg 517>; 458 status = "disabled"; 459 }; 460 461 hscif4: serial@e66b0000 { 462 compatible = "renesas,hscif-r8a77990", 463 "renesas,rcar-gen3-hscif", 464 "renesas,hscif"; 465 reg = <0 0xe66b0000 0 0x60>; 466 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 467 clocks = <&cpg CPG_MOD 516>, 468 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 469 <&scif_clk>; 470 clock-names = "fck", "brg_int", "scif_clk"; 471 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 472 dma-names = "tx", "rx"; 473 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 474 resets = <&cpg 516>; 475 status = "disabled"; 476 }; 477 478 hsusb: usb@e6590000 { 479 compatible = "renesas,usbhs-r8a77990", 480 "renesas,rcar-gen3-usbhs"; 481 reg = <0 0xe6590000 0 0x200>; 482 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 483 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 484 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 485 <&usb_dmac1 0>, <&usb_dmac1 1>; 486 dma-names = "ch0", "ch1", "ch2", "ch3"; 487 renesas,buswait = <11>; 488 phys = <&usb2_phy0>; 489 phy-names = "usb"; 490 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 491 resets = <&cpg 704>, <&cpg 703>; 492 status = "disabled"; 493 }; 494 495 usb_dmac0: dma-controller@e65a0000 { 496 compatible = "renesas,r8a77990-usb-dmac", 497 "renesas,usb-dmac"; 498 reg = <0 0xe65a0000 0 0x100>; 499 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 500 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 501 interrupt-names = "ch0", "ch1"; 502 clocks = <&cpg CPG_MOD 330>; 503 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 504 resets = <&cpg 330>; 505 #dma-cells = <1>; 506 dma-channels = <2>; 507 }; 508 509 usb_dmac1: dma-controller@e65b0000 { 510 compatible = "renesas,r8a77990-usb-dmac", 511 "renesas,usb-dmac"; 512 reg = <0 0xe65b0000 0 0x100>; 513 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 514 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 515 interrupt-names = "ch0", "ch1"; 516 clocks = <&cpg CPG_MOD 331>; 517 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 518 resets = <&cpg 331>; 519 #dma-cells = <1>; 520 dma-channels = <2>; 521 }; 522 523 dmac0: dma-controller@e6700000 { 524 compatible = "renesas,dmac-r8a77990", 525 "renesas,rcar-dmac"; 526 reg = <0 0xe6700000 0 0x10000>; 527 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 528 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 529 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 530 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 531 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 532 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 533 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 534 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 535 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 536 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 537 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 538 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 539 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 540 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 541 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 542 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 543 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 544 interrupt-names = "error", 545 "ch0", "ch1", "ch2", "ch3", 546 "ch4", "ch5", "ch6", "ch7", 547 "ch8", "ch9", "ch10", "ch11", 548 "ch12", "ch13", "ch14", "ch15"; 549 clocks = <&cpg CPG_MOD 219>; 550 clock-names = "fck"; 551 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 552 resets = <&cpg 219>; 553 #dma-cells = <1>; 554 dma-channels = <16>; 555 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 556 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 557 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 558 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 559 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 560 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 561 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 562 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 563 }; 564 565 dmac1: dma-controller@e7300000 { 566 compatible = "renesas,dmac-r8a77990", 567 "renesas,rcar-dmac"; 568 reg = <0 0xe7300000 0 0x10000>; 569 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 570 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 571 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 572 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 573 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 574 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 575 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 576 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 577 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 578 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 579 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 580 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 581 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 582 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 583 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 584 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 585 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 586 interrupt-names = "error", 587 "ch0", "ch1", "ch2", "ch3", 588 "ch4", "ch5", "ch6", "ch7", 589 "ch8", "ch9", "ch10", "ch11", 590 "ch12", "ch13", "ch14", "ch15"; 591 clocks = <&cpg CPG_MOD 218>; 592 clock-names = "fck"; 593 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 594 resets = <&cpg 218>; 595 #dma-cells = <1>; 596 dma-channels = <16>; 597 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 598 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 599 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 600 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 601 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 602 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 603 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 604 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 605 }; 606 607 dmac2: dma-controller@e7310000 { 608 compatible = "renesas,dmac-r8a77990", 609 "renesas,rcar-dmac"; 610 reg = <0 0xe7310000 0 0x10000>; 611 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 612 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 613 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 614 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 615 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 616 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 617 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 618 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 619 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 620 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 621 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 622 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 623 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 624 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 625 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 626 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 627 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 628 interrupt-names = "error", 629 "ch0", "ch1", "ch2", "ch3", 630 "ch4", "ch5", "ch6", "ch7", 631 "ch8", "ch9", "ch10", "ch11", 632 "ch12", "ch13", "ch14", "ch15"; 633 clocks = <&cpg CPG_MOD 217>; 634 clock-names = "fck"; 635 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 636 resets = <&cpg 217>; 637 #dma-cells = <1>; 638 dma-channels = <16>; 639 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 640 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 641 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 642 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 643 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 644 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 645 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 646 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 647 }; 648 649 ipmmu_ds0: mmu@e6740000 { 650 compatible = "renesas,ipmmu-r8a77990"; 651 reg = <0 0xe6740000 0 0x1000>; 652 renesas,ipmmu-main = <&ipmmu_mm 0>; 653 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 654 #iommu-cells = <1>; 655 }; 656 657 ipmmu_ds1: mmu@e7740000 { 658 compatible = "renesas,ipmmu-r8a77990"; 659 reg = <0 0xe7740000 0 0x1000>; 660 renesas,ipmmu-main = <&ipmmu_mm 1>; 661 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 662 #iommu-cells = <1>; 663 }; 664 665 ipmmu_hc: mmu@e6570000 { 666 compatible = "renesas,ipmmu-r8a77990"; 667 reg = <0 0xe6570000 0 0x1000>; 668 renesas,ipmmu-main = <&ipmmu_mm 2>; 669 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 670 #iommu-cells = <1>; 671 }; 672 673 ipmmu_mm: mmu@e67b0000 { 674 compatible = "renesas,ipmmu-r8a77990"; 675 reg = <0 0xe67b0000 0 0x1000>; 676 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 678 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 679 #iommu-cells = <1>; 680 }; 681 682 ipmmu_mp: mmu@ec670000 { 683 compatible = "renesas,ipmmu-r8a77990"; 684 reg = <0 0xec670000 0 0x1000>; 685 renesas,ipmmu-main = <&ipmmu_mm 4>; 686 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 687 #iommu-cells = <1>; 688 }; 689 690 ipmmu_pv0: mmu@fd800000 { 691 compatible = "renesas,ipmmu-r8a77990"; 692 reg = <0 0xfd800000 0 0x1000>; 693 renesas,ipmmu-main = <&ipmmu_mm 6>; 694 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 695 #iommu-cells = <1>; 696 }; 697 698 ipmmu_rt: mmu@ffc80000 { 699 compatible = "renesas,ipmmu-r8a77990"; 700 reg = <0 0xffc80000 0 0x1000>; 701 renesas,ipmmu-main = <&ipmmu_mm 10>; 702 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 703 #iommu-cells = <1>; 704 }; 705 706 ipmmu_vc0: mmu@fe6b0000 { 707 compatible = "renesas,ipmmu-r8a77990"; 708 reg = <0 0xfe6b0000 0 0x1000>; 709 renesas,ipmmu-main = <&ipmmu_mm 12>; 710 power-domains = <&sysc R8A77990_PD_A3VC>; 711 #iommu-cells = <1>; 712 }; 713 714 ipmmu_vi0: mmu@febd0000 { 715 compatible = "renesas,ipmmu-r8a77990"; 716 reg = <0 0xfebd0000 0 0x1000>; 717 renesas,ipmmu-main = <&ipmmu_mm 14>; 718 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 719 #iommu-cells = <1>; 720 }; 721 722 ipmmu_vp0: mmu@fe990000 { 723 compatible = "renesas,ipmmu-r8a77990"; 724 reg = <0 0xfe990000 0 0x1000>; 725 renesas,ipmmu-main = <&ipmmu_mm 16>; 726 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 727 #iommu-cells = <1>; 728 }; 729 730 avb: ethernet@e6800000 { 731 compatible = "renesas,etheravb-r8a77990", 732 "renesas,etheravb-rcar-gen3"; 733 reg = <0 0xe6800000 0 0x800>; 734 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 735 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 736 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 737 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 738 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 739 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 740 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 742 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 743 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 744 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 745 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 746 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 747 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 748 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 749 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 750 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 751 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 752 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 753 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 754 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 755 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 756 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 757 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 759 interrupt-names = "ch0", "ch1", "ch2", "ch3", 760 "ch4", "ch5", "ch6", "ch7", 761 "ch8", "ch9", "ch10", "ch11", 762 "ch12", "ch13", "ch14", "ch15", 763 "ch16", "ch17", "ch18", "ch19", 764 "ch20", "ch21", "ch22", "ch23", 765 "ch24"; 766 clocks = <&cpg CPG_MOD 812>; 767 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 768 resets = <&cpg 812>; 769 phy-mode = "rgmii"; 770 iommus = <&ipmmu_ds0 16>; 771 #address-cells = <1>; 772 #size-cells = <0>; 773 status = "disabled"; 774 }; 775 776 pwm0: pwm@e6e30000 { 777 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 778 reg = <0 0xe6e30000 0 0x8>; 779 clocks = <&cpg CPG_MOD 523>; 780 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 781 resets = <&cpg 523>; 782 #pwm-cells = <2>; 783 status = "disabled"; 784 }; 785 786 pwm1: pwm@e6e31000 { 787 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 788 reg = <0 0xe6e31000 0 0x8>; 789 clocks = <&cpg CPG_MOD 523>; 790 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 791 resets = <&cpg 523>; 792 #pwm-cells = <2>; 793 status = "disabled"; 794 }; 795 796 pwm2: pwm@e6e32000 { 797 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 798 reg = <0 0xe6e32000 0 0x8>; 799 clocks = <&cpg CPG_MOD 523>; 800 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 801 resets = <&cpg 523>; 802 #pwm-cells = <2>; 803 status = "disabled"; 804 }; 805 806 pwm3: pwm@e6e33000 { 807 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 808 reg = <0 0xe6e33000 0 0x8>; 809 clocks = <&cpg CPG_MOD 523>; 810 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 811 resets = <&cpg 523>; 812 #pwm-cells = <2>; 813 status = "disabled"; 814 }; 815 816 pwm4: pwm@e6e34000 { 817 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 818 reg = <0 0xe6e34000 0 0x8>; 819 clocks = <&cpg CPG_MOD 523>; 820 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 821 resets = <&cpg 523>; 822 #pwm-cells = <2>; 823 status = "disabled"; 824 }; 825 826 pwm5: pwm@e6e35000 { 827 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 828 reg = <0 0xe6e35000 0 0x8>; 829 clocks = <&cpg CPG_MOD 523>; 830 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 831 resets = <&cpg 523>; 832 #pwm-cells = <2>; 833 status = "disabled"; 834 }; 835 836 pwm6: pwm@e6e36000 { 837 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 838 reg = <0 0xe6e36000 0 0x8>; 839 clocks = <&cpg CPG_MOD 523>; 840 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 841 resets = <&cpg 523>; 842 #pwm-cells = <2>; 843 status = "disabled"; 844 }; 845 846 scif0: serial@e6e60000 { 847 compatible = "renesas,scif-r8a77990", 848 "renesas,rcar-gen3-scif", "renesas,scif"; 849 reg = <0 0xe6e60000 0 64>; 850 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 851 clocks = <&cpg CPG_MOD 207>, 852 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 853 <&scif_clk>; 854 clock-names = "fck", "brg_int", "scif_clk"; 855 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 856 <&dmac2 0x51>, <&dmac2 0x50>; 857 dma-names = "tx", "rx", "tx", "rx"; 858 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 859 resets = <&cpg 207>; 860 status = "disabled"; 861 }; 862 863 scif1: serial@e6e68000 { 864 compatible = "renesas,scif-r8a77990", 865 "renesas,rcar-gen3-scif", "renesas,scif"; 866 reg = <0 0xe6e68000 0 64>; 867 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 868 clocks = <&cpg CPG_MOD 206>, 869 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 870 <&scif_clk>; 871 clock-names = "fck", "brg_int", "scif_clk"; 872 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 873 <&dmac2 0x53>, <&dmac2 0x52>; 874 dma-names = "tx", "rx", "tx", "rx"; 875 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 876 resets = <&cpg 206>; 877 status = "disabled"; 878 }; 879 880 scif2: serial@e6e88000 { 881 compatible = "renesas,scif-r8a77990", 882 "renesas,rcar-gen3-scif", "renesas,scif"; 883 reg = <0 0xe6e88000 0 64>; 884 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 885 clocks = <&cpg CPG_MOD 310>, 886 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 887 <&scif_clk>; 888 clock-names = "fck", "brg_int", "scif_clk"; 889 890 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 891 resets = <&cpg 310>; 892 status = "disabled"; 893 }; 894 895 scif3: serial@e6c50000 { 896 compatible = "renesas,scif-r8a77990", 897 "renesas,rcar-gen3-scif", "renesas,scif"; 898 reg = <0 0xe6c50000 0 64>; 899 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 900 clocks = <&cpg CPG_MOD 204>, 901 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 902 <&scif_clk>; 903 clock-names = "fck", "brg_int", "scif_clk"; 904 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 905 dma-names = "tx", "rx"; 906 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 907 resets = <&cpg 204>; 908 status = "disabled"; 909 }; 910 911 scif4: serial@e6c40000 { 912 compatible = "renesas,scif-r8a77990", 913 "renesas,rcar-gen3-scif", "renesas,scif"; 914 reg = <0 0xe6c40000 0 64>; 915 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 916 clocks = <&cpg CPG_MOD 203>, 917 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 918 <&scif_clk>; 919 clock-names = "fck", "brg_int", "scif_clk"; 920 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 921 dma-names = "tx", "rx"; 922 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 923 resets = <&cpg 203>; 924 status = "disabled"; 925 }; 926 927 scif5: serial@e6f30000 { 928 compatible = "renesas,scif-r8a77990", 929 "renesas,rcar-gen3-scif", "renesas,scif"; 930 reg = <0 0xe6f30000 0 64>; 931 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 932 clocks = <&cpg CPG_MOD 202>, 933 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 934 <&scif_clk>; 935 clock-names = "fck", "brg_int", "scif_clk"; 936 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 937 <&dmac2 0x5b>, <&dmac2 0x5a>; 938 dma-names = "tx", "rx", "tx", "rx"; 939 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 940 resets = <&cpg 202>; 941 status = "disabled"; 942 }; 943 944 msiof0: spi@e6e90000 { 945 compatible = "renesas,msiof-r8a77990", 946 "renesas,rcar-gen3-msiof"; 947 reg = <0 0xe6e90000 0 0x0064>; 948 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 949 clocks = <&cpg CPG_MOD 211>; 950 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 951 <&dmac2 0x41>, <&dmac2 0x40>; 952 dma-names = "tx", "rx", "tx", "rx"; 953 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 954 resets = <&cpg 211>; 955 #address-cells = <1>; 956 #size-cells = <0>; 957 status = "disabled"; 958 }; 959 960 msiof1: spi@e6ea0000 { 961 compatible = "renesas,msiof-r8a77990", 962 "renesas,rcar-gen3-msiof"; 963 reg = <0 0xe6ea0000 0 0x0064>; 964 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 965 clocks = <&cpg CPG_MOD 210>; 966 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 967 <&dmac2 0x43>, <&dmac2 0x42>; 968 dma-names = "tx", "rx", "tx", "rx"; 969 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 970 resets = <&cpg 210>; 971 #address-cells = <1>; 972 #size-cells = <0>; 973 status = "disabled"; 974 }; 975 976 msiof2: spi@e6c00000 { 977 compatible = "renesas,msiof-r8a77990", 978 "renesas,rcar-gen3-msiof"; 979 reg = <0 0xe6c00000 0 0x0064>; 980 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 981 clocks = <&cpg CPG_MOD 209>; 982 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 983 dma-names = "tx", "rx"; 984 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 985 resets = <&cpg 209>; 986 #address-cells = <1>; 987 #size-cells = <0>; 988 status = "disabled"; 989 }; 990 991 msiof3: spi@e6c10000 { 992 compatible = "renesas,msiof-r8a77990", 993 "renesas,rcar-gen3-msiof"; 994 reg = <0 0xe6c10000 0 0x0064>; 995 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 996 clocks = <&cpg CPG_MOD 208>; 997 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 998 dma-names = "tx", "rx"; 999 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1000 resets = <&cpg 208>; 1001 #address-cells = <1>; 1002 #size-cells = <0>; 1003 status = "disabled"; 1004 }; 1005 1006 vin4: video@e6ef4000 { 1007 compatible = "renesas,vin-r8a77990"; 1008 reg = <0 0xe6ef4000 0 0x1000>; 1009 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1010 clocks = <&cpg CPG_MOD 807>; 1011 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1012 resets = <&cpg 807>; 1013 renesas,id = <4>; 1014 status = "disabled"; 1015 1016 ports { 1017 #address-cells = <1>; 1018 #size-cells = <0>; 1019 1020 port@1 { 1021 #address-cells = <1>; 1022 #size-cells = <0>; 1023 1024 reg = <1>; 1025 1026 vin4csi40: endpoint@2 { 1027 reg = <2>; 1028 remote-endpoint= <&csi40vin4>; 1029 }; 1030 }; 1031 }; 1032 }; 1033 1034 vin5: video@e6ef5000 { 1035 compatible = "renesas,vin-r8a77990"; 1036 reg = <0 0xe6ef5000 0 0x1000>; 1037 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1038 clocks = <&cpg CPG_MOD 806>; 1039 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1040 resets = <&cpg 806>; 1041 renesas,id = <5>; 1042 status = "disabled"; 1043 1044 ports { 1045 #address-cells = <1>; 1046 #size-cells = <0>; 1047 1048 port@1 { 1049 #address-cells = <1>; 1050 #size-cells = <0>; 1051 1052 reg = <1>; 1053 1054 vin5csi40: endpoint@2 { 1055 reg = <2>; 1056 remote-endpoint= <&csi40vin5>; 1057 }; 1058 }; 1059 }; 1060 }; 1061 1062 rcar_sound: sound@ec500000 { 1063 /* 1064 * #sound-dai-cells is required 1065 * 1066 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1067 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1068 */ 1069 /* 1070 * #clock-cells is required for audio_clkout0/1/2/3 1071 * 1072 * clkout : #clock-cells = <0>; <&rcar_sound>; 1073 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1074 */ 1075 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1076 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1077 <0 0xec5a0000 0 0x100>, /* ADG */ 1078 <0 0xec540000 0 0x1000>, /* SSIU */ 1079 <0 0xec541000 0 0x280>, /* SSI */ 1080 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1081 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1082 1083 clocks = <&cpg CPG_MOD 1005>, 1084 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1085 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1086 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1087 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1088 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1089 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1090 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1091 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1092 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1093 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1094 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1095 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1096 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1097 <&audio_clk_a>, <&audio_clk_b>, 1098 <&audio_clk_c>, 1099 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1100 clock-names = "ssi-all", 1101 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1102 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1103 "ssi.1", "ssi.0", 1104 "src.9", "src.8", "src.7", "src.6", 1105 "src.5", "src.4", "src.3", "src.2", 1106 "src.1", "src.0", 1107 "mix.1", "mix.0", 1108 "ctu.1", "ctu.0", 1109 "dvc.0", "dvc.1", 1110 "clk_a", "clk_b", "clk_c", "clk_i"; 1111 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1112 resets = <&cpg 1005>, 1113 <&cpg 1006>, <&cpg 1007>, 1114 <&cpg 1008>, <&cpg 1009>, 1115 <&cpg 1010>, <&cpg 1011>, 1116 <&cpg 1012>, <&cpg 1013>, 1117 <&cpg 1014>, <&cpg 1015>; 1118 reset-names = "ssi-all", 1119 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1120 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1121 "ssi.1", "ssi.0"; 1122 status = "disabled"; 1123 1124 rcar_sound,dvc { 1125 dvc0: dvc-0 { 1126 dmas = <&audma0 0xbc>; 1127 dma-names = "tx"; 1128 }; 1129 dvc1: dvc-1 { 1130 dmas = <&audma0 0xbe>; 1131 dma-names = "tx"; 1132 }; 1133 }; 1134 1135 rcar_sound,mix { 1136 mix0: mix-0 { }; 1137 mix1: mix-1 { }; 1138 }; 1139 1140 rcar_sound,ctu { 1141 ctu00: ctu-0 { }; 1142 ctu01: ctu-1 { }; 1143 ctu02: ctu-2 { }; 1144 ctu03: ctu-3 { }; 1145 ctu10: ctu-4 { }; 1146 ctu11: ctu-5 { }; 1147 ctu12: ctu-6 { }; 1148 ctu13: ctu-7 { }; 1149 }; 1150 1151 rcar_sound,src { 1152 src0: src-0 { 1153 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1154 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1155 dma-names = "rx", "tx"; 1156 }; 1157 src1: src-1 { 1158 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1159 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1160 dma-names = "rx", "tx"; 1161 }; 1162 src2: src-2 { 1163 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1164 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1165 dma-names = "rx", "tx"; 1166 }; 1167 src3: src-3 { 1168 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1169 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1170 dma-names = "rx", "tx"; 1171 }; 1172 src4: src-4 { 1173 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1174 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1175 dma-names = "rx", "tx"; 1176 }; 1177 src5: src-5 { 1178 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1179 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1180 dma-names = "rx", "tx"; 1181 }; 1182 src6: src-6 { 1183 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1184 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1185 dma-names = "rx", "tx"; 1186 }; 1187 src7: src-7 { 1188 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1189 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1190 dma-names = "rx", "tx"; 1191 }; 1192 src8: src-8 { 1193 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1194 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1195 dma-names = "rx", "tx"; 1196 }; 1197 src9: src-9 { 1198 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1199 dmas = <&audma0 0x97>, <&audma0 0xba>; 1200 dma-names = "rx", "tx"; 1201 }; 1202 }; 1203 1204 rcar_sound,ssi { 1205 ssi0: ssi-0 { 1206 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1207 dmas = <&audma0 0x01>, <&audma0 0x02>, 1208 <&audma0 0x15>, <&audma0 0x16>; 1209 dma-names = "rx", "tx", "rxu", "txu"; 1210 }; 1211 ssi1: ssi-1 { 1212 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1213 dmas = <&audma0 0x03>, <&audma0 0x04>, 1214 <&audma0 0x49>, <&audma0 0x4a>; 1215 dma-names = "rx", "tx", "rxu", "txu"; 1216 }; 1217 ssi2: ssi-2 { 1218 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1219 dmas = <&audma0 0x05>, <&audma0 0x06>, 1220 <&audma0 0x63>, <&audma0 0x64>; 1221 dma-names = "rx", "tx", "rxu", "txu"; 1222 }; 1223 ssi3: ssi-3 { 1224 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1225 dmas = <&audma0 0x07>, <&audma0 0x08>, 1226 <&audma0 0x6f>, <&audma0 0x70>; 1227 dma-names = "rx", "tx", "rxu", "txu"; 1228 }; 1229 ssi4: ssi-4 { 1230 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1231 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1232 <&audma0 0x71>, <&audma0 0x72>; 1233 dma-names = "rx", "tx", "rxu", "txu"; 1234 }; 1235 ssi5: ssi-5 { 1236 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1237 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1238 <&audma0 0x73>, <&audma0 0x74>; 1239 dma-names = "rx", "tx", "rxu", "txu"; 1240 }; 1241 ssi6: ssi-6 { 1242 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1243 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1244 <&audma0 0x75>, <&audma0 0x76>; 1245 dma-names = "rx", "tx", "rxu", "txu"; 1246 }; 1247 ssi7: ssi-7 { 1248 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1249 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1250 <&audma0 0x79>, <&audma0 0x7a>; 1251 dma-names = "rx", "tx", "rxu", "txu"; 1252 }; 1253 ssi8: ssi-8 { 1254 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1255 dmas = <&audma0 0x11>, <&audma0 0x12>, 1256 <&audma0 0x7b>, <&audma0 0x7c>; 1257 dma-names = "rx", "tx", "rxu", "txu"; 1258 }; 1259 ssi9: ssi-9 { 1260 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1261 dmas = <&audma0 0x13>, <&audma0 0x14>, 1262 <&audma0 0x7d>, <&audma0 0x7e>; 1263 dma-names = "rx", "tx", "rxu", "txu"; 1264 }; 1265 }; 1266 }; 1267 1268 audma0: dma-controller@ec700000 { 1269 compatible = "renesas,dmac-r8a77990", 1270 "renesas,rcar-dmac"; 1271 reg = <0 0xec700000 0 0x10000>; 1272 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1273 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1274 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1275 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1276 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1277 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1278 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1279 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1280 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1281 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1282 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1283 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1284 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1285 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1286 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1287 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1288 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1289 interrupt-names = "error", 1290 "ch0", "ch1", "ch2", "ch3", 1291 "ch4", "ch5", "ch6", "ch7", 1292 "ch8", "ch9", "ch10", "ch11", 1293 "ch12", "ch13", "ch14", "ch15"; 1294 clocks = <&cpg CPG_MOD 502>; 1295 clock-names = "fck"; 1296 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1297 resets = <&cpg 502>; 1298 #dma-cells = <1>; 1299 dma-channels = <16>; 1300 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1301 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1302 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1303 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1304 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1305 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1306 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1307 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1308 }; 1309 1310 xhci0: usb@ee000000 { 1311 compatible = "renesas,xhci-r8a77990", 1312 "renesas,rcar-gen3-xhci"; 1313 reg = <0 0xee000000 0 0xc00>; 1314 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1315 clocks = <&cpg CPG_MOD 328>; 1316 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1317 resets = <&cpg 328>; 1318 status = "disabled"; 1319 }; 1320 1321 usb3_peri0: usb@ee020000 { 1322 compatible = "renesas,r8a77990-usb3-peri", 1323 "renesas,rcar-gen3-usb3-peri"; 1324 reg = <0 0xee020000 0 0x400>; 1325 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1326 clocks = <&cpg CPG_MOD 328>; 1327 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1328 resets = <&cpg 328>; 1329 status = "disabled"; 1330 }; 1331 1332 ohci0: usb@ee080000 { 1333 compatible = "generic-ohci"; 1334 reg = <0 0xee080000 0 0x100>; 1335 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1336 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1337 phys = <&usb2_phy0>; 1338 phy-names = "usb"; 1339 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1340 resets = <&cpg 703>, <&cpg 704>; 1341 status = "disabled"; 1342 }; 1343 1344 ehci0: usb@ee080100 { 1345 compatible = "generic-ehci"; 1346 reg = <0 0xee080100 0 0x100>; 1347 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1348 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1349 phys = <&usb2_phy0>; 1350 phy-names = "usb"; 1351 companion = <&ohci0>; 1352 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1353 resets = <&cpg 703>, <&cpg 704>; 1354 status = "disabled"; 1355 }; 1356 1357 usb2_phy0: usb-phy@ee080200 { 1358 compatible = "renesas,usb2-phy-r8a77990", 1359 "renesas,rcar-gen3-usb2-phy"; 1360 reg = <0 0xee080200 0 0x700>; 1361 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1362 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1363 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1364 resets = <&cpg 703>, <&cpg 704>; 1365 #phy-cells = <0>; 1366 status = "disabled"; 1367 }; 1368 1369 sdhi0: sd@ee100000 { 1370 compatible = "renesas,sdhi-r8a77990", 1371 "renesas,rcar-gen3-sdhi"; 1372 reg = <0 0xee100000 0 0x2000>; 1373 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1374 clocks = <&cpg CPG_MOD 314>; 1375 max-frequency = <200000000>; 1376 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1377 resets = <&cpg 314>; 1378 status = "disabled"; 1379 }; 1380 1381 sdhi1: sd@ee120000 { 1382 compatible = "renesas,sdhi-r8a77990", 1383 "renesas,rcar-gen3-sdhi"; 1384 reg = <0 0xee120000 0 0x2000>; 1385 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1386 clocks = <&cpg CPG_MOD 313>; 1387 max-frequency = <200000000>; 1388 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1389 resets = <&cpg 313>; 1390 status = "disabled"; 1391 }; 1392 1393 sdhi3: sd@ee160000 { 1394 compatible = "renesas,sdhi-r8a77990", 1395 "renesas,rcar-gen3-sdhi"; 1396 reg = <0 0xee160000 0 0x2000>; 1397 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1398 clocks = <&cpg CPG_MOD 311>; 1399 max-frequency = <200000000>; 1400 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1401 resets = <&cpg 311>; 1402 status = "disabled"; 1403 }; 1404 1405 gic: interrupt-controller@f1010000 { 1406 compatible = "arm,gic-400"; 1407 #interrupt-cells = <3>; 1408 #address-cells = <0>; 1409 interrupt-controller; 1410 reg = <0x0 0xf1010000 0 0x1000>, 1411 <0x0 0xf1020000 0 0x20000>, 1412 <0x0 0xf1040000 0 0x20000>, 1413 <0x0 0xf1060000 0 0x20000>; 1414 interrupts = <GIC_PPI 9 1415 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1416 clocks = <&cpg CPG_MOD 408>; 1417 clock-names = "clk"; 1418 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1419 resets = <&cpg 408>; 1420 }; 1421 1422 vspb0: vsp@fe960000 { 1423 compatible = "renesas,vsp2"; 1424 reg = <0 0xfe960000 0 0x8000>; 1425 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1426 clocks = <&cpg CPG_MOD 626>; 1427 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1428 resets = <&cpg 626>; 1429 renesas,fcp = <&fcpvb0>; 1430 }; 1431 1432 fcpvb0: fcp@fe96f000 { 1433 compatible = "renesas,fcpv"; 1434 reg = <0 0xfe96f000 0 0x200>; 1435 clocks = <&cpg CPG_MOD 607>; 1436 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1437 resets = <&cpg 607>; 1438 iommus = <&ipmmu_vp0 5>; 1439 }; 1440 1441 vspi0: vsp@fe9a0000 { 1442 compatible = "renesas,vsp2"; 1443 reg = <0 0xfe9a0000 0 0x8000>; 1444 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1445 clocks = <&cpg CPG_MOD 631>; 1446 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1447 resets = <&cpg 631>; 1448 renesas,fcp = <&fcpvi0>; 1449 }; 1450 1451 fcpvi0: fcp@fe9af000 { 1452 compatible = "renesas,fcpv"; 1453 reg = <0 0xfe9af000 0 0x200>; 1454 clocks = <&cpg CPG_MOD 611>; 1455 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1456 resets = <&cpg 611>; 1457 iommus = <&ipmmu_vp0 8>; 1458 }; 1459 1460 vspd0: vsp@fea20000 { 1461 compatible = "renesas,vsp2"; 1462 reg = <0 0xfea20000 0 0x7000>; 1463 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1464 clocks = <&cpg CPG_MOD 623>; 1465 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1466 resets = <&cpg 623>; 1467 renesas,fcp = <&fcpvd0>; 1468 }; 1469 1470 fcpvd0: fcp@fea27000 { 1471 compatible = "renesas,fcpv"; 1472 reg = <0 0xfea27000 0 0x200>; 1473 clocks = <&cpg CPG_MOD 603>; 1474 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1475 resets = <&cpg 603>; 1476 iommus = <&ipmmu_vi0 8>; 1477 }; 1478 1479 vspd1: vsp@fea28000 { 1480 compatible = "renesas,vsp2"; 1481 reg = <0 0xfea28000 0 0x7000>; 1482 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1483 clocks = <&cpg CPG_MOD 622>; 1484 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1485 resets = <&cpg 622>; 1486 renesas,fcp = <&fcpvd1>; 1487 }; 1488 1489 fcpvd1: fcp@fea2f000 { 1490 compatible = "renesas,fcpv"; 1491 reg = <0 0xfea2f000 0 0x200>; 1492 clocks = <&cpg CPG_MOD 602>; 1493 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1494 resets = <&cpg 602>; 1495 iommus = <&ipmmu_vi0 9>; 1496 }; 1497 1498 csi40: csi2@feaa0000 { 1499 compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; 1500 reg = <0 0xfeaa0000 0 0x10000>; 1501 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1502 clocks = <&cpg CPG_MOD 716>; 1503 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1504 resets = <&cpg 716>; 1505 status = "disabled"; 1506 1507 ports { 1508 #address-cells = <1>; 1509 #size-cells = <0>; 1510 1511 port@1 { 1512 #address-cells = <1>; 1513 #size-cells = <0>; 1514 1515 reg = <1>; 1516 1517 csi40vin4: endpoint@0 { 1518 reg = <0>; 1519 remote-endpoint = <&vin4csi40>; 1520 }; 1521 csi40vin5: endpoint@1 { 1522 reg = <1>; 1523 remote-endpoint = <&vin5csi40>; 1524 }; 1525 }; 1526 }; 1527 }; 1528 1529 du: display@feb00000 { 1530 compatible = "renesas,du-r8a77990"; 1531 reg = <0 0xfeb00000 0 0x80000>; 1532 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1533 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1534 clocks = <&cpg CPG_MOD 724>, 1535 <&cpg CPG_MOD 723>; 1536 clock-names = "du.0", "du.1"; 1537 vsps = <&vspd0 0 &vspd1 0>; 1538 status = "disabled"; 1539 1540 ports { 1541 #address-cells = <1>; 1542 #size-cells = <0>; 1543 1544 port@0 { 1545 reg = <0>; 1546 du_out_rgb: endpoint { 1547 }; 1548 }; 1549 1550 port@1 { 1551 reg = <1>; 1552 du_out_lvds0: endpoint { 1553 remote-endpoint = <&lvds0_in>; 1554 }; 1555 }; 1556 1557 port@2 { 1558 reg = <2>; 1559 du_out_lvds1: endpoint { 1560 remote-endpoint = <&lvds1_in>; 1561 }; 1562 }; 1563 }; 1564 }; 1565 1566 lvds0: lvds-encoder@feb90000 { 1567 compatible = "renesas,r8a77990-lvds"; 1568 reg = <0 0xfeb90000 0 0x20>; 1569 clocks = <&cpg CPG_MOD 727>; 1570 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1571 resets = <&cpg 727>; 1572 status = "disabled"; 1573 1574 ports { 1575 #address-cells = <1>; 1576 #size-cells = <0>; 1577 1578 port@0 { 1579 reg = <0>; 1580 lvds0_in: endpoint { 1581 remote-endpoint = <&du_out_lvds0>; 1582 }; 1583 }; 1584 1585 port@1 { 1586 reg = <1>; 1587 lvds0_out: endpoint { 1588 }; 1589 }; 1590 }; 1591 }; 1592 1593 lvds1: lvds-encoder@feb90100 { 1594 compatible = "renesas,r8a77990-lvds"; 1595 reg = <0 0xfeb90100 0 0x20>; 1596 clocks = <&cpg CPG_MOD 727>; 1597 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1598 resets = <&cpg 726>; 1599 status = "disabled"; 1600 1601 ports { 1602 #address-cells = <1>; 1603 #size-cells = <0>; 1604 1605 port@0 { 1606 reg = <0>; 1607 lvds1_in: endpoint { 1608 remote-endpoint = <&du_out_lvds1>; 1609 }; 1610 }; 1611 1612 port@1 { 1613 reg = <1>; 1614 lvds1_out: endpoint { 1615 }; 1616 }; 1617 }; 1618 }; 1619 1620 pciec0: pcie@fe000000 { 1621 compatible = "renesas,pcie-r8a77990", 1622 "renesas,pcie-rcar-gen3"; 1623 reg = <0 0xfe000000 0 0x80000>; 1624 #address-cells = <3>; 1625 #size-cells = <2>; 1626 bus-range = <0x00 0xff>; 1627 device_type = "pci"; 1628 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1629 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1630 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1631 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1632 /* Map all possible DDR as inbound ranges */ 1633 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1634 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1635 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1636 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1637 #interrupt-cells = <1>; 1638 interrupt-map-mask = <0 0 0 0>; 1639 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1640 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1641 clock-names = "pcie", "pcie_bus"; 1642 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1643 resets = <&cpg 319>; 1644 status = "disabled"; 1645 }; 1646 1647 prr: chipid@fff00044 { 1648 compatible = "renesas,prr"; 1649 reg = <0 0xfff00044 0 4>; 1650 }; 1651 }; 1652 1653 timer { 1654 compatible = "arm,armv8-timer"; 1655 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1656 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1657 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1658 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1659 }; 1660}; 1661