1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 cpus { 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 a53_0: cpu@0 { 56 compatible = "arm,cortex-a53", "arm,armv8"; 57 reg = <0>; 58 device_type = "cpu"; 59 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 60 next-level-cache = <&L2_CA53>; 61 enable-method = "psci"; 62 }; 63 64 a53_1: cpu@1 { 65 compatible = "arm,cortex-a53", "arm,armv8"; 66 reg = <1>; 67 device_type = "cpu"; 68 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 69 next-level-cache = <&L2_CA53>; 70 enable-method = "psci"; 71 }; 72 73 L2_CA53: cache-controller-0 { 74 compatible = "cache"; 75 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 76 cache-unified; 77 cache-level = <2>; 78 }; 79 }; 80 81 extal_clk: extal { 82 compatible = "fixed-clock"; 83 #clock-cells = <0>; 84 /* This value must be overridden by the board */ 85 clock-frequency = <0>; 86 }; 87 88 pmu_a53 { 89 compatible = "arm,cortex-a53-pmu"; 90 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 91 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 92 interrupt-affinity = <&a53_0>, <&a53_1>; 93 }; 94 95 psci { 96 compatible = "arm,psci-1.0", "arm,psci-0.2"; 97 method = "smc"; 98 }; 99 100 /* External SCIF clock - to be overridden by boards that provide it */ 101 scif_clk: scif { 102 compatible = "fixed-clock"; 103 #clock-cells = <0>; 104 clock-frequency = <0>; 105 }; 106 107 soc: soc { 108 compatible = "simple-bus"; 109 interrupt-parent = <&gic>; 110 #address-cells = <2>; 111 #size-cells = <2>; 112 ranges; 113 114 rwdt: watchdog@e6020000 { 115 compatible = "renesas,r8a77990-wdt", 116 "renesas,rcar-gen3-wdt"; 117 reg = <0 0xe6020000 0 0x0c>; 118 clocks = <&cpg CPG_MOD 402>; 119 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 120 resets = <&cpg 402>; 121 status = "disabled"; 122 }; 123 124 gpio0: gpio@e6050000 { 125 compatible = "renesas,gpio-r8a77990", 126 "renesas,rcar-gen3-gpio"; 127 reg = <0 0xe6050000 0 0x50>; 128 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 129 #gpio-cells = <2>; 130 gpio-controller; 131 gpio-ranges = <&pfc 0 0 18>; 132 #interrupt-cells = <2>; 133 interrupt-controller; 134 clocks = <&cpg CPG_MOD 912>; 135 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 136 resets = <&cpg 912>; 137 }; 138 139 gpio1: gpio@e6051000 { 140 compatible = "renesas,gpio-r8a77990", 141 "renesas,rcar-gen3-gpio"; 142 reg = <0 0xe6051000 0 0x50>; 143 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 144 #gpio-cells = <2>; 145 gpio-controller; 146 gpio-ranges = <&pfc 0 32 23>; 147 #interrupt-cells = <2>; 148 interrupt-controller; 149 clocks = <&cpg CPG_MOD 911>; 150 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 151 resets = <&cpg 911>; 152 }; 153 154 gpio2: gpio@e6052000 { 155 compatible = "renesas,gpio-r8a77990", 156 "renesas,rcar-gen3-gpio"; 157 reg = <0 0xe6052000 0 0x50>; 158 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 159 #gpio-cells = <2>; 160 gpio-controller; 161 gpio-ranges = <&pfc 0 64 26>; 162 #interrupt-cells = <2>; 163 interrupt-controller; 164 clocks = <&cpg CPG_MOD 910>; 165 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 166 resets = <&cpg 910>; 167 }; 168 169 gpio3: gpio@e6053000 { 170 compatible = "renesas,gpio-r8a77990", 171 "renesas,rcar-gen3-gpio"; 172 reg = <0 0xe6053000 0 0x50>; 173 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 174 #gpio-cells = <2>; 175 gpio-controller; 176 gpio-ranges = <&pfc 0 96 16>; 177 #interrupt-cells = <2>; 178 interrupt-controller; 179 clocks = <&cpg CPG_MOD 909>; 180 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 181 resets = <&cpg 909>; 182 }; 183 184 gpio4: gpio@e6054000 { 185 compatible = "renesas,gpio-r8a77990", 186 "renesas,rcar-gen3-gpio"; 187 reg = <0 0xe6054000 0 0x50>; 188 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 189 #gpio-cells = <2>; 190 gpio-controller; 191 gpio-ranges = <&pfc 0 128 11>; 192 #interrupt-cells = <2>; 193 interrupt-controller; 194 clocks = <&cpg CPG_MOD 908>; 195 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 196 resets = <&cpg 908>; 197 }; 198 199 gpio5: gpio@e6055000 { 200 compatible = "renesas,gpio-r8a77990", 201 "renesas,rcar-gen3-gpio"; 202 reg = <0 0xe6055000 0 0x50>; 203 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 204 #gpio-cells = <2>; 205 gpio-controller; 206 gpio-ranges = <&pfc 0 160 20>; 207 #interrupt-cells = <2>; 208 interrupt-controller; 209 clocks = <&cpg CPG_MOD 907>; 210 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 211 resets = <&cpg 907>; 212 }; 213 214 gpio6: gpio@e6055400 { 215 compatible = "renesas,gpio-r8a77990", 216 "renesas,rcar-gen3-gpio"; 217 reg = <0 0xe6055400 0 0x50>; 218 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 219 #gpio-cells = <2>; 220 gpio-controller; 221 gpio-ranges = <&pfc 0 192 18>; 222 #interrupt-cells = <2>; 223 interrupt-controller; 224 clocks = <&cpg CPG_MOD 906>; 225 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 226 resets = <&cpg 906>; 227 }; 228 229 i2c0: i2c@e6500000 { 230 #address-cells = <1>; 231 #size-cells = <0>; 232 compatible = "renesas,i2c-r8a77990", 233 "renesas,rcar-gen3-i2c"; 234 reg = <0 0xe6500000 0 0x40>; 235 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 236 clocks = <&cpg CPG_MOD 931>; 237 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 238 resets = <&cpg 931>; 239 i2c-scl-internal-delay-ns = <110>; 240 status = "disabled"; 241 }; 242 243 i2c1: i2c@e6508000 { 244 #address-cells = <1>; 245 #size-cells = <0>; 246 compatible = "renesas,i2c-r8a77990", 247 "renesas,rcar-gen3-i2c"; 248 reg = <0 0xe6508000 0 0x40>; 249 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&cpg CPG_MOD 930>; 251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 252 resets = <&cpg 930>; 253 i2c-scl-internal-delay-ns = <6>; 254 status = "disabled"; 255 }; 256 257 i2c2: i2c@e6510000 { 258 #address-cells = <1>; 259 #size-cells = <0>; 260 compatible = "renesas,i2c-r8a77990", 261 "renesas,rcar-gen3-i2c"; 262 reg = <0 0xe6510000 0 0x40>; 263 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 264 clocks = <&cpg CPG_MOD 929>; 265 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 266 resets = <&cpg 929>; 267 i2c-scl-internal-delay-ns = <6>; 268 status = "disabled"; 269 }; 270 271 i2c3: i2c@e66d0000 { 272 #address-cells = <1>; 273 #size-cells = <0>; 274 compatible = "renesas,i2c-r8a77990", 275 "renesas,rcar-gen3-i2c"; 276 reg = <0 0xe66d0000 0 0x40>; 277 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 278 clocks = <&cpg CPG_MOD 928>; 279 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 280 resets = <&cpg 928>; 281 i2c-scl-internal-delay-ns = <110>; 282 status = "disabled"; 283 }; 284 285 i2c4: i2c@e66d8000 { 286 #address-cells = <1>; 287 #size-cells = <0>; 288 compatible = "renesas,i2c-r8a77990", 289 "renesas,rcar-gen3-i2c"; 290 reg = <0 0xe66d8000 0 0x40>; 291 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 292 clocks = <&cpg CPG_MOD 927>; 293 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 294 resets = <&cpg 927>; 295 i2c-scl-internal-delay-ns = <6>; 296 status = "disabled"; 297 }; 298 299 i2c5: i2c@e66e0000 { 300 #address-cells = <1>; 301 #size-cells = <0>; 302 compatible = "renesas,i2c-r8a77990", 303 "renesas,rcar-gen3-i2c"; 304 reg = <0 0xe66e0000 0 0x40>; 305 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 306 clocks = <&cpg CPG_MOD 919>; 307 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 308 resets = <&cpg 919>; 309 i2c-scl-internal-delay-ns = <6>; 310 status = "disabled"; 311 }; 312 313 i2c6: i2c@e66e8000 { 314 #address-cells = <1>; 315 #size-cells = <0>; 316 compatible = "renesas,i2c-r8a77990", 317 "renesas,rcar-gen3-i2c"; 318 reg = <0 0xe66e8000 0 0x40>; 319 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 320 clocks = <&cpg CPG_MOD 918>; 321 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 322 resets = <&cpg 918>; 323 i2c-scl-internal-delay-ns = <6>; 324 status = "disabled"; 325 }; 326 327 i2c7: i2c@e6690000 { 328 #address-cells = <1>; 329 #size-cells = <0>; 330 compatible = "renesas,i2c-r8a77990", 331 "renesas,rcar-gen3-i2c"; 332 reg = <0 0xe6690000 0 0x40>; 333 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 334 clocks = <&cpg CPG_MOD 1003>; 335 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 336 resets = <&cpg 1003>; 337 i2c-scl-internal-delay-ns = <6>; 338 status = "disabled"; 339 }; 340 341 pfc: pin-controller@e6060000 { 342 compatible = "renesas,pfc-r8a77990"; 343 reg = <0 0xe6060000 0 0x508>; 344 }; 345 346 cpg: clock-controller@e6150000 { 347 compatible = "renesas,r8a77990-cpg-mssr"; 348 reg = <0 0xe6150000 0 0x1000>; 349 clocks = <&extal_clk>; 350 clock-names = "extal"; 351 #clock-cells = <2>; 352 #power-domain-cells = <0>; 353 #reset-cells = <1>; 354 }; 355 356 rst: reset-controller@e6160000 { 357 compatible = "renesas,r8a77990-rst"; 358 reg = <0 0xe6160000 0 0x0200>; 359 }; 360 361 sysc: system-controller@e6180000 { 362 compatible = "renesas,r8a77990-sysc"; 363 reg = <0 0xe6180000 0 0x0400>; 364 #power-domain-cells = <1>; 365 }; 366 367 intc_ex: interrupt-controller@e61c0000 { 368 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 369 #interrupt-cells = <2>; 370 interrupt-controller; 371 reg = <0 0xe61c0000 0 0x200>; 372 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 373 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 374 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 375 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 376 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 377 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 378 clocks = <&cpg CPG_MOD 407>; 379 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 380 resets = <&cpg 407>; 381 }; 382 383 hscif0: serial@e6540000 { 384 compatible = "renesas,hscif-r8a77990", 385 "renesas,rcar-gen3-hscif", 386 "renesas,hscif"; 387 reg = <0 0xe6540000 0 0x60>; 388 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 389 clocks = <&cpg CPG_MOD 520>, 390 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 391 <&scif_clk>; 392 clock-names = "fck", "brg_int", "scif_clk"; 393 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 394 <&dmac2 0x31>, <&dmac2 0x30>; 395 dma-names = "tx", "rx", "tx", "rx"; 396 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 397 resets = <&cpg 520>; 398 status = "disabled"; 399 }; 400 401 hscif1: serial@e6550000 { 402 compatible = "renesas,hscif-r8a77990", 403 "renesas,rcar-gen3-hscif", 404 "renesas,hscif"; 405 reg = <0 0xe6550000 0 0x60>; 406 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 407 clocks = <&cpg CPG_MOD 519>, 408 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 409 <&scif_clk>; 410 clock-names = "fck", "brg_int", "scif_clk"; 411 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 412 <&dmac2 0x33>, <&dmac2 0x32>; 413 dma-names = "tx", "rx", "tx", "rx"; 414 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 415 resets = <&cpg 519>; 416 status = "disabled"; 417 }; 418 419 hscif2: serial@e6560000 { 420 compatible = "renesas,hscif-r8a77990", 421 "renesas,rcar-gen3-hscif", 422 "renesas,hscif"; 423 reg = <0 0xe6560000 0 0x60>; 424 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 425 clocks = <&cpg CPG_MOD 518>, 426 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 427 <&scif_clk>; 428 clock-names = "fck", "brg_int", "scif_clk"; 429 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 430 <&dmac2 0x35>, <&dmac2 0x34>; 431 dma-names = "tx", "rx", "tx", "rx"; 432 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 433 resets = <&cpg 518>; 434 status = "disabled"; 435 }; 436 437 hscif3: serial@e66a0000 { 438 compatible = "renesas,hscif-r8a77990", 439 "renesas,rcar-gen3-hscif", 440 "renesas,hscif"; 441 reg = <0 0xe66a0000 0 0x60>; 442 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 443 clocks = <&cpg CPG_MOD 517>, 444 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 445 <&scif_clk>; 446 clock-names = "fck", "brg_int", "scif_clk"; 447 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 448 dma-names = "tx", "rx"; 449 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 450 resets = <&cpg 517>; 451 status = "disabled"; 452 }; 453 454 hscif4: serial@e66b0000 { 455 compatible = "renesas,hscif-r8a77990", 456 "renesas,rcar-gen3-hscif", 457 "renesas,hscif"; 458 reg = <0 0xe66b0000 0 0x60>; 459 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 460 clocks = <&cpg CPG_MOD 516>, 461 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 462 <&scif_clk>; 463 clock-names = "fck", "brg_int", "scif_clk"; 464 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 465 dma-names = "tx", "rx"; 466 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 467 resets = <&cpg 516>; 468 status = "disabled"; 469 }; 470 471 hsusb: usb@e6590000 { 472 compatible = "renesas,usbhs-r8a77990", 473 "renesas,rcar-gen3-usbhs"; 474 reg = <0 0xe6590000 0 0x200>; 475 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 476 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 477 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 478 <&usb_dmac1 0>, <&usb_dmac1 1>; 479 dma-names = "ch0", "ch1", "ch2", "ch3"; 480 renesas,buswait = <11>; 481 phys = <&usb2_phy0>; 482 phy-names = "usb"; 483 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 484 resets = <&cpg 704>, <&cpg 703>; 485 status = "disabled"; 486 }; 487 488 usb_dmac0: dma-controller@e65a0000 { 489 compatible = "renesas,r8a77990-usb-dmac", 490 "renesas,usb-dmac"; 491 reg = <0 0xe65a0000 0 0x100>; 492 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 493 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 494 interrupt-names = "ch0", "ch1"; 495 clocks = <&cpg CPG_MOD 330>; 496 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 497 resets = <&cpg 330>; 498 #dma-cells = <1>; 499 dma-channels = <2>; 500 }; 501 502 usb_dmac1: dma-controller@e65b0000 { 503 compatible = "renesas,r8a77990-usb-dmac", 504 "renesas,usb-dmac"; 505 reg = <0 0xe65b0000 0 0x100>; 506 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 507 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 508 interrupt-names = "ch0", "ch1"; 509 clocks = <&cpg CPG_MOD 331>; 510 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 511 resets = <&cpg 331>; 512 #dma-cells = <1>; 513 dma-channels = <2>; 514 }; 515 516 dmac0: dma-controller@e6700000 { 517 compatible = "renesas,dmac-r8a77990", 518 "renesas,rcar-dmac"; 519 reg = <0 0xe6700000 0 0x10000>; 520 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 521 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 522 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 523 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 524 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 525 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 526 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 527 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 528 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 529 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 530 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 531 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 532 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 533 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 534 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 535 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 536 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 537 interrupt-names = "error", 538 "ch0", "ch1", "ch2", "ch3", 539 "ch4", "ch5", "ch6", "ch7", 540 "ch8", "ch9", "ch10", "ch11", 541 "ch12", "ch13", "ch14", "ch15"; 542 clocks = <&cpg CPG_MOD 219>; 543 clock-names = "fck"; 544 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 545 resets = <&cpg 219>; 546 #dma-cells = <1>; 547 dma-channels = <16>; 548 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 549 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 550 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 551 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 552 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 553 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 554 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 555 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 556 }; 557 558 dmac1: dma-controller@e7300000 { 559 compatible = "renesas,dmac-r8a77990", 560 "renesas,rcar-dmac"; 561 reg = <0 0xe7300000 0 0x10000>; 562 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 563 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 564 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 565 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 566 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 567 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 568 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 569 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 570 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 571 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 572 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 573 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 574 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 575 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 576 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 577 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 578 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 579 interrupt-names = "error", 580 "ch0", "ch1", "ch2", "ch3", 581 "ch4", "ch5", "ch6", "ch7", 582 "ch8", "ch9", "ch10", "ch11", 583 "ch12", "ch13", "ch14", "ch15"; 584 clocks = <&cpg CPG_MOD 218>; 585 clock-names = "fck"; 586 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 587 resets = <&cpg 218>; 588 #dma-cells = <1>; 589 dma-channels = <16>; 590 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 591 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 592 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 593 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 594 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 595 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 596 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 597 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 598 }; 599 600 dmac2: dma-controller@e7310000 { 601 compatible = "renesas,dmac-r8a77990", 602 "renesas,rcar-dmac"; 603 reg = <0 0xe7310000 0 0x10000>; 604 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 605 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 606 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 607 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 608 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 609 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 610 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 611 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 612 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 613 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 614 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 615 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 616 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 617 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 618 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 619 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 620 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 621 interrupt-names = "error", 622 "ch0", "ch1", "ch2", "ch3", 623 "ch4", "ch5", "ch6", "ch7", 624 "ch8", "ch9", "ch10", "ch11", 625 "ch12", "ch13", "ch14", "ch15"; 626 clocks = <&cpg CPG_MOD 217>; 627 clock-names = "fck"; 628 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 629 resets = <&cpg 217>; 630 #dma-cells = <1>; 631 dma-channels = <16>; 632 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 633 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 634 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 635 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 636 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 637 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 638 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 639 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 640 }; 641 642 ipmmu_ds0: mmu@e6740000 { 643 compatible = "renesas,ipmmu-r8a77990"; 644 reg = <0 0xe6740000 0 0x1000>; 645 renesas,ipmmu-main = <&ipmmu_mm 0>; 646 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 647 #iommu-cells = <1>; 648 }; 649 650 ipmmu_ds1: mmu@e7740000 { 651 compatible = "renesas,ipmmu-r8a77990"; 652 reg = <0 0xe7740000 0 0x1000>; 653 renesas,ipmmu-main = <&ipmmu_mm 1>; 654 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 655 #iommu-cells = <1>; 656 }; 657 658 ipmmu_hc: mmu@e6570000 { 659 compatible = "renesas,ipmmu-r8a77990"; 660 reg = <0 0xe6570000 0 0x1000>; 661 renesas,ipmmu-main = <&ipmmu_mm 2>; 662 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 663 #iommu-cells = <1>; 664 }; 665 666 ipmmu_mm: mmu@e67b0000 { 667 compatible = "renesas,ipmmu-r8a77990"; 668 reg = <0 0xe67b0000 0 0x1000>; 669 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 670 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 671 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 672 #iommu-cells = <1>; 673 }; 674 675 ipmmu_mp: mmu@ec670000 { 676 compatible = "renesas,ipmmu-r8a77990"; 677 reg = <0 0xec670000 0 0x1000>; 678 renesas,ipmmu-main = <&ipmmu_mm 4>; 679 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 680 #iommu-cells = <1>; 681 }; 682 683 ipmmu_pv0: mmu@fd800000 { 684 compatible = "renesas,ipmmu-r8a77990"; 685 reg = <0 0xfd800000 0 0x1000>; 686 renesas,ipmmu-main = <&ipmmu_mm 6>; 687 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 688 #iommu-cells = <1>; 689 }; 690 691 ipmmu_rt: mmu@ffc80000 { 692 compatible = "renesas,ipmmu-r8a77990"; 693 reg = <0 0xffc80000 0 0x1000>; 694 renesas,ipmmu-main = <&ipmmu_mm 10>; 695 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 696 #iommu-cells = <1>; 697 }; 698 699 ipmmu_vc0: mmu@fe6b0000 { 700 compatible = "renesas,ipmmu-r8a77990"; 701 reg = <0 0xfe6b0000 0 0x1000>; 702 renesas,ipmmu-main = <&ipmmu_mm 12>; 703 power-domains = <&sysc R8A77990_PD_A3VC>; 704 #iommu-cells = <1>; 705 }; 706 707 ipmmu_vi0: mmu@febd0000 { 708 compatible = "renesas,ipmmu-r8a77990"; 709 reg = <0 0xfebd0000 0 0x1000>; 710 renesas,ipmmu-main = <&ipmmu_mm 14>; 711 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 712 #iommu-cells = <1>; 713 }; 714 715 ipmmu_vp0: mmu@fe990000 { 716 compatible = "renesas,ipmmu-r8a77990"; 717 reg = <0 0xfe990000 0 0x1000>; 718 renesas,ipmmu-main = <&ipmmu_mm 16>; 719 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 720 #iommu-cells = <1>; 721 }; 722 723 avb: ethernet@e6800000 { 724 compatible = "renesas,etheravb-r8a77990", 725 "renesas,etheravb-rcar-gen3"; 726 reg = <0 0xe6800000 0 0x800>; 727 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 728 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 729 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 732 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 734 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 735 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 736 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 737 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 738 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 739 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 740 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 742 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 743 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 744 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 745 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 746 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 747 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 748 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 749 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 750 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 751 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 752 interrupt-names = "ch0", "ch1", "ch2", "ch3", 753 "ch4", "ch5", "ch6", "ch7", 754 "ch8", "ch9", "ch10", "ch11", 755 "ch12", "ch13", "ch14", "ch15", 756 "ch16", "ch17", "ch18", "ch19", 757 "ch20", "ch21", "ch22", "ch23", 758 "ch24"; 759 clocks = <&cpg CPG_MOD 812>; 760 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 761 resets = <&cpg 812>; 762 phy-mode = "rgmii"; 763 iommus = <&ipmmu_ds0 16>; 764 #address-cells = <1>; 765 #size-cells = <0>; 766 status = "disabled"; 767 }; 768 769 pwm0: pwm@e6e30000 { 770 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 771 reg = <0 0xe6e30000 0 0x8>; 772 clocks = <&cpg CPG_MOD 523>; 773 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 774 resets = <&cpg 523>; 775 #pwm-cells = <2>; 776 status = "disabled"; 777 }; 778 779 pwm1: pwm@e6e31000 { 780 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 781 reg = <0 0xe6e31000 0 0x8>; 782 clocks = <&cpg CPG_MOD 523>; 783 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 784 resets = <&cpg 523>; 785 #pwm-cells = <2>; 786 status = "disabled"; 787 }; 788 789 pwm2: pwm@e6e32000 { 790 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 791 reg = <0 0xe6e32000 0 0x8>; 792 clocks = <&cpg CPG_MOD 523>; 793 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 794 resets = <&cpg 523>; 795 #pwm-cells = <2>; 796 status = "disabled"; 797 }; 798 799 pwm3: pwm@e6e33000 { 800 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 801 reg = <0 0xe6e33000 0 0x8>; 802 clocks = <&cpg CPG_MOD 523>; 803 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 804 resets = <&cpg 523>; 805 #pwm-cells = <2>; 806 status = "disabled"; 807 }; 808 809 pwm4: pwm@e6e34000 { 810 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 811 reg = <0 0xe6e34000 0 0x8>; 812 clocks = <&cpg CPG_MOD 523>; 813 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 814 resets = <&cpg 523>; 815 #pwm-cells = <2>; 816 status = "disabled"; 817 }; 818 819 pwm5: pwm@e6e35000 { 820 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 821 reg = <0 0xe6e35000 0 0x8>; 822 clocks = <&cpg CPG_MOD 523>; 823 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 824 resets = <&cpg 523>; 825 #pwm-cells = <2>; 826 status = "disabled"; 827 }; 828 829 pwm6: pwm@e6e36000 { 830 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 831 reg = <0 0xe6e36000 0 0x8>; 832 clocks = <&cpg CPG_MOD 523>; 833 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 834 resets = <&cpg 523>; 835 #pwm-cells = <2>; 836 status = "disabled"; 837 }; 838 839 scif0: serial@e6e60000 { 840 compatible = "renesas,scif-r8a77990", 841 "renesas,rcar-gen3-scif", "renesas,scif"; 842 reg = <0 0xe6e60000 0 64>; 843 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 844 clocks = <&cpg CPG_MOD 207>, 845 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 846 <&scif_clk>; 847 clock-names = "fck", "brg_int", "scif_clk"; 848 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 849 <&dmac2 0x51>, <&dmac2 0x50>; 850 dma-names = "tx", "rx", "tx", "rx"; 851 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 852 resets = <&cpg 207>; 853 status = "disabled"; 854 }; 855 856 scif1: serial@e6e68000 { 857 compatible = "renesas,scif-r8a77990", 858 "renesas,rcar-gen3-scif", "renesas,scif"; 859 reg = <0 0xe6e68000 0 64>; 860 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 861 clocks = <&cpg CPG_MOD 206>, 862 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 863 <&scif_clk>; 864 clock-names = "fck", "brg_int", "scif_clk"; 865 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 866 <&dmac2 0x53>, <&dmac2 0x52>; 867 dma-names = "tx", "rx", "tx", "rx"; 868 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 869 resets = <&cpg 206>; 870 status = "disabled"; 871 }; 872 873 scif2: serial@e6e88000 { 874 compatible = "renesas,scif-r8a77990", 875 "renesas,rcar-gen3-scif", "renesas,scif"; 876 reg = <0 0xe6e88000 0 64>; 877 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 878 clocks = <&cpg CPG_MOD 310>, 879 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 880 <&scif_clk>; 881 clock-names = "fck", "brg_int", "scif_clk"; 882 883 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 884 resets = <&cpg 310>; 885 status = "disabled"; 886 }; 887 888 scif3: serial@e6c50000 { 889 compatible = "renesas,scif-r8a77990", 890 "renesas,rcar-gen3-scif", "renesas,scif"; 891 reg = <0 0xe6c50000 0 64>; 892 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 893 clocks = <&cpg CPG_MOD 204>, 894 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 895 <&scif_clk>; 896 clock-names = "fck", "brg_int", "scif_clk"; 897 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 898 dma-names = "tx", "rx"; 899 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 900 resets = <&cpg 204>; 901 status = "disabled"; 902 }; 903 904 scif4: serial@e6c40000 { 905 compatible = "renesas,scif-r8a77990", 906 "renesas,rcar-gen3-scif", "renesas,scif"; 907 reg = <0 0xe6c40000 0 64>; 908 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 909 clocks = <&cpg CPG_MOD 203>, 910 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 911 <&scif_clk>; 912 clock-names = "fck", "brg_int", "scif_clk"; 913 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 914 dma-names = "tx", "rx"; 915 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 916 resets = <&cpg 203>; 917 status = "disabled"; 918 }; 919 920 scif5: serial@e6f30000 { 921 compatible = "renesas,scif-r8a77990", 922 "renesas,rcar-gen3-scif", "renesas,scif"; 923 reg = <0 0xe6f30000 0 64>; 924 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 925 clocks = <&cpg CPG_MOD 202>, 926 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 927 <&scif_clk>; 928 clock-names = "fck", "brg_int", "scif_clk"; 929 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 930 <&dmac2 0x5b>, <&dmac2 0x5a>; 931 dma-names = "tx", "rx", "tx", "rx"; 932 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 933 resets = <&cpg 202>; 934 status = "disabled"; 935 }; 936 937 msiof0: spi@e6e90000 { 938 compatible = "renesas,msiof-r8a77990", 939 "renesas,rcar-gen3-msiof"; 940 reg = <0 0xe6e90000 0 0x0064>; 941 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 942 clocks = <&cpg CPG_MOD 211>; 943 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 944 <&dmac2 0x41>, <&dmac2 0x40>; 945 dma-names = "tx", "rx", "tx", "rx"; 946 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 947 resets = <&cpg 211>; 948 #address-cells = <1>; 949 #size-cells = <0>; 950 status = "disabled"; 951 }; 952 953 msiof1: spi@e6ea0000 { 954 compatible = "renesas,msiof-r8a77990", 955 "renesas,rcar-gen3-msiof"; 956 reg = <0 0xe6ea0000 0 0x0064>; 957 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 958 clocks = <&cpg CPG_MOD 210>; 959 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 960 <&dmac2 0x43>, <&dmac2 0x42>; 961 dma-names = "tx", "rx", "tx", "rx"; 962 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 963 resets = <&cpg 210>; 964 #address-cells = <1>; 965 #size-cells = <0>; 966 status = "disabled"; 967 }; 968 969 msiof2: spi@e6c00000 { 970 compatible = "renesas,msiof-r8a77990", 971 "renesas,rcar-gen3-msiof"; 972 reg = <0 0xe6c00000 0 0x0064>; 973 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 974 clocks = <&cpg CPG_MOD 209>; 975 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 976 dma-names = "tx", "rx"; 977 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 978 resets = <&cpg 209>; 979 #address-cells = <1>; 980 #size-cells = <0>; 981 status = "disabled"; 982 }; 983 984 msiof3: spi@e6c10000 { 985 compatible = "renesas,msiof-r8a77990", 986 "renesas,rcar-gen3-msiof"; 987 reg = <0 0xe6c10000 0 0x0064>; 988 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 989 clocks = <&cpg CPG_MOD 208>; 990 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 991 dma-names = "tx", "rx"; 992 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 993 resets = <&cpg 208>; 994 #address-cells = <1>; 995 #size-cells = <0>; 996 status = "disabled"; 997 }; 998 999 vin4: video@e6ef4000 { 1000 compatible = "renesas,vin-r8a77990"; 1001 reg = <0 0xe6ef4000 0 0x1000>; 1002 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1003 clocks = <&cpg CPG_MOD 807>; 1004 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1005 resets = <&cpg 807>; 1006 renesas,id = <4>; 1007 status = "disabled"; 1008 1009 ports { 1010 #address-cells = <1>; 1011 #size-cells = <0>; 1012 1013 port@1 { 1014 reg = <1>; 1015 1016 vin4csi40: endpoint { 1017 remote-endpoint= <&csi40vin4>; 1018 }; 1019 }; 1020 }; 1021 }; 1022 1023 vin5: video@e6ef5000 { 1024 compatible = "renesas,vin-r8a77990"; 1025 reg = <0 0xe6ef5000 0 0x1000>; 1026 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1027 clocks = <&cpg CPG_MOD 806>; 1028 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1029 resets = <&cpg 806>; 1030 renesas,id = <5>; 1031 status = "disabled"; 1032 1033 ports { 1034 #address-cells = <1>; 1035 #size-cells = <0>; 1036 1037 port@1 { 1038 reg = <1>; 1039 1040 vin5csi40: endpoint { 1041 remote-endpoint= <&csi40vin5>; 1042 }; 1043 }; 1044 }; 1045 }; 1046 1047 rcar_sound: sound@ec500000 { 1048 /* 1049 * #sound-dai-cells is required 1050 * 1051 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1052 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1053 */ 1054 /* 1055 * #clock-cells is required for audio_clkout0/1/2/3 1056 * 1057 * clkout : #clock-cells = <0>; <&rcar_sound>; 1058 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1059 */ 1060 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1061 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1062 <0 0xec5a0000 0 0x100>, /* ADG */ 1063 <0 0xec540000 0 0x1000>, /* SSIU */ 1064 <0 0xec541000 0 0x280>, /* SSI */ 1065 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1066 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1067 1068 clocks = <&cpg CPG_MOD 1005>, 1069 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1070 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1071 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1072 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1073 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1074 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1075 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1076 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1077 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1078 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1079 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1080 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1081 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1082 <&audio_clk_a>, <&audio_clk_b>, 1083 <&audio_clk_c>, 1084 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1085 clock-names = "ssi-all", 1086 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1087 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1088 "ssi.1", "ssi.0", 1089 "src.9", "src.8", "src.7", "src.6", 1090 "src.5", "src.4", "src.3", "src.2", 1091 "src.1", "src.0", 1092 "mix.1", "mix.0", 1093 "ctu.1", "ctu.0", 1094 "dvc.0", "dvc.1", 1095 "clk_a", "clk_b", "clk_c", "clk_i"; 1096 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1097 resets = <&cpg 1005>, 1098 <&cpg 1006>, <&cpg 1007>, 1099 <&cpg 1008>, <&cpg 1009>, 1100 <&cpg 1010>, <&cpg 1011>, 1101 <&cpg 1012>, <&cpg 1013>, 1102 <&cpg 1014>, <&cpg 1015>; 1103 reset-names = "ssi-all", 1104 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1105 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1106 "ssi.1", "ssi.0"; 1107 status = "disabled"; 1108 1109 rcar_sound,dvc { 1110 dvc0: dvc-0 { 1111 dmas = <&audma0 0xbc>; 1112 dma-names = "tx"; 1113 }; 1114 dvc1: dvc-1 { 1115 dmas = <&audma0 0xbe>; 1116 dma-names = "tx"; 1117 }; 1118 }; 1119 1120 rcar_sound,mix { 1121 mix0: mix-0 { }; 1122 mix1: mix-1 { }; 1123 }; 1124 1125 rcar_sound,ctu { 1126 ctu00: ctu-0 { }; 1127 ctu01: ctu-1 { }; 1128 ctu02: ctu-2 { }; 1129 ctu03: ctu-3 { }; 1130 ctu10: ctu-4 { }; 1131 ctu11: ctu-5 { }; 1132 ctu12: ctu-6 { }; 1133 ctu13: ctu-7 { }; 1134 }; 1135 1136 rcar_sound,src { 1137 src0: src-0 { 1138 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1139 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1140 dma-names = "rx", "tx"; 1141 }; 1142 src1: src-1 { 1143 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1144 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1145 dma-names = "rx", "tx"; 1146 }; 1147 src2: src-2 { 1148 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1149 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1150 dma-names = "rx", "tx"; 1151 }; 1152 src3: src-3 { 1153 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1154 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1155 dma-names = "rx", "tx"; 1156 }; 1157 src4: src-4 { 1158 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1159 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1160 dma-names = "rx", "tx"; 1161 }; 1162 src5: src-5 { 1163 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1164 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1165 dma-names = "rx", "tx"; 1166 }; 1167 src6: src-6 { 1168 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1169 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1170 dma-names = "rx", "tx"; 1171 }; 1172 src7: src-7 { 1173 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1174 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1175 dma-names = "rx", "tx"; 1176 }; 1177 src8: src-8 { 1178 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1179 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1180 dma-names = "rx", "tx"; 1181 }; 1182 src9: src-9 { 1183 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1184 dmas = <&audma0 0x97>, <&audma0 0xba>; 1185 dma-names = "rx", "tx"; 1186 }; 1187 }; 1188 1189 rcar_sound,ssi { 1190 ssi0: ssi-0 { 1191 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1192 dmas = <&audma0 0x01>, <&audma0 0x02>, 1193 <&audma0 0x15>, <&audma0 0x16>; 1194 dma-names = "rx", "tx", "rxu", "txu"; 1195 }; 1196 ssi1: ssi-1 { 1197 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1198 dmas = <&audma0 0x03>, <&audma0 0x04>, 1199 <&audma0 0x49>, <&audma0 0x4a>; 1200 dma-names = "rx", "tx", "rxu", "txu"; 1201 }; 1202 ssi2: ssi-2 { 1203 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1204 dmas = <&audma0 0x05>, <&audma0 0x06>, 1205 <&audma0 0x63>, <&audma0 0x64>; 1206 dma-names = "rx", "tx", "rxu", "txu"; 1207 }; 1208 ssi3: ssi-3 { 1209 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1210 dmas = <&audma0 0x07>, <&audma0 0x08>, 1211 <&audma0 0x6f>, <&audma0 0x70>; 1212 dma-names = "rx", "tx", "rxu", "txu"; 1213 }; 1214 ssi4: ssi-4 { 1215 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1216 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1217 <&audma0 0x71>, <&audma0 0x72>; 1218 dma-names = "rx", "tx", "rxu", "txu"; 1219 }; 1220 ssi5: ssi-5 { 1221 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1222 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1223 <&audma0 0x73>, <&audma0 0x74>; 1224 dma-names = "rx", "tx", "rxu", "txu"; 1225 }; 1226 ssi6: ssi-6 { 1227 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1228 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1229 <&audma0 0x75>, <&audma0 0x76>; 1230 dma-names = "rx", "tx", "rxu", "txu"; 1231 }; 1232 ssi7: ssi-7 { 1233 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1234 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1235 <&audma0 0x79>, <&audma0 0x7a>; 1236 dma-names = "rx", "tx", "rxu", "txu"; 1237 }; 1238 ssi8: ssi-8 { 1239 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1240 dmas = <&audma0 0x11>, <&audma0 0x12>, 1241 <&audma0 0x7b>, <&audma0 0x7c>; 1242 dma-names = "rx", "tx", "rxu", "txu"; 1243 }; 1244 ssi9: ssi-9 { 1245 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1246 dmas = <&audma0 0x13>, <&audma0 0x14>, 1247 <&audma0 0x7d>, <&audma0 0x7e>; 1248 dma-names = "rx", "tx", "rxu", "txu"; 1249 }; 1250 }; 1251 }; 1252 1253 audma0: dma-controller@ec700000 { 1254 compatible = "renesas,dmac-r8a77990", 1255 "renesas,rcar-dmac"; 1256 reg = <0 0xec700000 0 0x10000>; 1257 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1258 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1259 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1260 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1261 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1262 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1263 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1264 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1265 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1266 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1267 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1268 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1269 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1270 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1271 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1272 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1273 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1274 interrupt-names = "error", 1275 "ch0", "ch1", "ch2", "ch3", 1276 "ch4", "ch5", "ch6", "ch7", 1277 "ch8", "ch9", "ch10", "ch11", 1278 "ch12", "ch13", "ch14", "ch15"; 1279 clocks = <&cpg CPG_MOD 502>; 1280 clock-names = "fck"; 1281 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1282 resets = <&cpg 502>; 1283 #dma-cells = <1>; 1284 dma-channels = <16>; 1285 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1286 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1287 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1288 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1289 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1290 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1291 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1292 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1293 }; 1294 1295 xhci0: usb@ee000000 { 1296 compatible = "renesas,xhci-r8a77990", 1297 "renesas,rcar-gen3-xhci"; 1298 reg = <0 0xee000000 0 0xc00>; 1299 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1300 clocks = <&cpg CPG_MOD 328>; 1301 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1302 resets = <&cpg 328>; 1303 status = "disabled"; 1304 }; 1305 1306 usb3_peri0: usb@ee020000 { 1307 compatible = "renesas,r8a77990-usb3-peri", 1308 "renesas,rcar-gen3-usb3-peri"; 1309 reg = <0 0xee020000 0 0x400>; 1310 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1311 clocks = <&cpg CPG_MOD 328>; 1312 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1313 resets = <&cpg 328>; 1314 status = "disabled"; 1315 }; 1316 1317 ohci0: usb@ee080000 { 1318 compatible = "generic-ohci"; 1319 reg = <0 0xee080000 0 0x100>; 1320 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1321 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1322 phys = <&usb2_phy0>; 1323 phy-names = "usb"; 1324 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1325 resets = <&cpg 703>, <&cpg 704>; 1326 status = "disabled"; 1327 }; 1328 1329 ehci0: usb@ee080100 { 1330 compatible = "generic-ehci"; 1331 reg = <0 0xee080100 0 0x100>; 1332 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1333 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1334 phys = <&usb2_phy0>; 1335 phy-names = "usb"; 1336 companion = <&ohci0>; 1337 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1338 resets = <&cpg 703>, <&cpg 704>; 1339 status = "disabled"; 1340 }; 1341 1342 usb2_phy0: usb-phy@ee080200 { 1343 compatible = "renesas,usb2-phy-r8a77990", 1344 "renesas,rcar-gen3-usb2-phy"; 1345 reg = <0 0xee080200 0 0x700>; 1346 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1347 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1348 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1349 resets = <&cpg 703>, <&cpg 704>; 1350 #phy-cells = <0>; 1351 status = "disabled"; 1352 }; 1353 1354 sdhi0: sd@ee100000 { 1355 compatible = "renesas,sdhi-r8a77990", 1356 "renesas,rcar-gen3-sdhi"; 1357 reg = <0 0xee100000 0 0x2000>; 1358 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1359 clocks = <&cpg CPG_MOD 314>; 1360 max-frequency = <200000000>; 1361 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1362 resets = <&cpg 314>; 1363 status = "disabled"; 1364 }; 1365 1366 sdhi1: sd@ee120000 { 1367 compatible = "renesas,sdhi-r8a77990", 1368 "renesas,rcar-gen3-sdhi"; 1369 reg = <0 0xee120000 0 0x2000>; 1370 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1371 clocks = <&cpg CPG_MOD 313>; 1372 max-frequency = <200000000>; 1373 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1374 resets = <&cpg 313>; 1375 status = "disabled"; 1376 }; 1377 1378 sdhi3: sd@ee160000 { 1379 compatible = "renesas,sdhi-r8a77990", 1380 "renesas,rcar-gen3-sdhi"; 1381 reg = <0 0xee160000 0 0x2000>; 1382 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1383 clocks = <&cpg CPG_MOD 311>; 1384 max-frequency = <200000000>; 1385 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1386 resets = <&cpg 311>; 1387 status = "disabled"; 1388 }; 1389 1390 gic: interrupt-controller@f1010000 { 1391 compatible = "arm,gic-400"; 1392 #interrupt-cells = <3>; 1393 #address-cells = <0>; 1394 interrupt-controller; 1395 reg = <0x0 0xf1010000 0 0x1000>, 1396 <0x0 0xf1020000 0 0x20000>, 1397 <0x0 0xf1040000 0 0x20000>, 1398 <0x0 0xf1060000 0 0x20000>; 1399 interrupts = <GIC_PPI 9 1400 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1401 clocks = <&cpg CPG_MOD 408>; 1402 clock-names = "clk"; 1403 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1404 resets = <&cpg 408>; 1405 }; 1406 1407 vspb0: vsp@fe960000 { 1408 compatible = "renesas,vsp2"; 1409 reg = <0 0xfe960000 0 0x8000>; 1410 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1411 clocks = <&cpg CPG_MOD 626>; 1412 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1413 resets = <&cpg 626>; 1414 renesas,fcp = <&fcpvb0>; 1415 }; 1416 1417 fcpvb0: fcp@fe96f000 { 1418 compatible = "renesas,fcpv"; 1419 reg = <0 0xfe96f000 0 0x200>; 1420 clocks = <&cpg CPG_MOD 607>; 1421 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1422 resets = <&cpg 607>; 1423 iommus = <&ipmmu_vp0 5>; 1424 }; 1425 1426 vspi0: vsp@fe9a0000 { 1427 compatible = "renesas,vsp2"; 1428 reg = <0 0xfe9a0000 0 0x8000>; 1429 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1430 clocks = <&cpg CPG_MOD 631>; 1431 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1432 resets = <&cpg 631>; 1433 renesas,fcp = <&fcpvi0>; 1434 }; 1435 1436 fcpvi0: fcp@fe9af000 { 1437 compatible = "renesas,fcpv"; 1438 reg = <0 0xfe9af000 0 0x200>; 1439 clocks = <&cpg CPG_MOD 611>; 1440 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1441 resets = <&cpg 611>; 1442 iommus = <&ipmmu_vp0 8>; 1443 }; 1444 1445 vspd0: vsp@fea20000 { 1446 compatible = "renesas,vsp2"; 1447 reg = <0 0xfea20000 0 0x7000>; 1448 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1449 clocks = <&cpg CPG_MOD 623>; 1450 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1451 resets = <&cpg 623>; 1452 renesas,fcp = <&fcpvd0>; 1453 }; 1454 1455 fcpvd0: fcp@fea27000 { 1456 compatible = "renesas,fcpv"; 1457 reg = <0 0xfea27000 0 0x200>; 1458 clocks = <&cpg CPG_MOD 603>; 1459 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1460 resets = <&cpg 603>; 1461 iommus = <&ipmmu_vi0 8>; 1462 }; 1463 1464 vspd1: vsp@fea28000 { 1465 compatible = "renesas,vsp2"; 1466 reg = <0 0xfea28000 0 0x7000>; 1467 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1468 clocks = <&cpg CPG_MOD 622>; 1469 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1470 resets = <&cpg 622>; 1471 renesas,fcp = <&fcpvd1>; 1472 }; 1473 1474 fcpvd1: fcp@fea2f000 { 1475 compatible = "renesas,fcpv"; 1476 reg = <0 0xfea2f000 0 0x200>; 1477 clocks = <&cpg CPG_MOD 602>; 1478 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1479 resets = <&cpg 602>; 1480 iommus = <&ipmmu_vi0 9>; 1481 }; 1482 1483 csi40: csi2@feaa0000 { 1484 compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; 1485 reg = <0 0xfeaa0000 0 0x10000>; 1486 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1487 clocks = <&cpg CPG_MOD 716>; 1488 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1489 resets = <&cpg 716>; 1490 status = "disabled"; 1491 1492 ports { 1493 #address-cells = <1>; 1494 #size-cells = <0>; 1495 1496 port@1 { 1497 #address-cells = <1>; 1498 #size-cells = <0>; 1499 1500 reg = <1>; 1501 1502 csi40vin4: endpoint@0 { 1503 reg = <0>; 1504 remote-endpoint = <&vin4csi40>; 1505 }; 1506 csi40vin5: endpoint@1 { 1507 reg = <1>; 1508 remote-endpoint = <&vin5csi40>; 1509 }; 1510 }; 1511 }; 1512 }; 1513 1514 du: display@feb00000 { 1515 compatible = "renesas,du-r8a77990"; 1516 reg = <0 0xfeb00000 0 0x80000>; 1517 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1518 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1519 clocks = <&cpg CPG_MOD 724>, 1520 <&cpg CPG_MOD 723>; 1521 clock-names = "du.0", "du.1"; 1522 vsps = <&vspd0 0 &vspd1 0>; 1523 status = "disabled"; 1524 1525 ports { 1526 #address-cells = <1>; 1527 #size-cells = <0>; 1528 1529 port@0 { 1530 reg = <0>; 1531 du_out_rgb: endpoint { 1532 }; 1533 }; 1534 1535 port@1 { 1536 reg = <1>; 1537 du_out_lvds0: endpoint { 1538 remote-endpoint = <&lvds0_in>; 1539 }; 1540 }; 1541 1542 port@2 { 1543 reg = <2>; 1544 du_out_lvds1: endpoint { 1545 remote-endpoint = <&lvds1_in>; 1546 }; 1547 }; 1548 }; 1549 }; 1550 1551 lvds0: lvds-encoder@feb90000 { 1552 compatible = "renesas,r8a77990-lvds"; 1553 reg = <0 0xfeb90000 0 0x20>; 1554 clocks = <&cpg CPG_MOD 727>; 1555 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1556 resets = <&cpg 727>; 1557 status = "disabled"; 1558 1559 ports { 1560 #address-cells = <1>; 1561 #size-cells = <0>; 1562 1563 port@0 { 1564 reg = <0>; 1565 lvds0_in: endpoint { 1566 remote-endpoint = <&du_out_lvds0>; 1567 }; 1568 }; 1569 1570 port@1 { 1571 reg = <1>; 1572 lvds0_out: endpoint { 1573 }; 1574 }; 1575 }; 1576 }; 1577 1578 lvds1: lvds-encoder@feb90100 { 1579 compatible = "renesas,r8a77990-lvds"; 1580 reg = <0 0xfeb90100 0 0x20>; 1581 clocks = <&cpg CPG_MOD 727>; 1582 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1583 resets = <&cpg 726>; 1584 status = "disabled"; 1585 1586 ports { 1587 #address-cells = <1>; 1588 #size-cells = <0>; 1589 1590 port@0 { 1591 reg = <0>; 1592 lvds1_in: endpoint { 1593 remote-endpoint = <&du_out_lvds1>; 1594 }; 1595 }; 1596 1597 port@1 { 1598 reg = <1>; 1599 lvds1_out: endpoint { 1600 }; 1601 }; 1602 }; 1603 }; 1604 1605 prr: chipid@fff00044 { 1606 compatible = "renesas,prr"; 1607 reg = <0 0xfff00044 0 4>; 1608 }; 1609 }; 1610 1611 timer { 1612 compatible = "arm,armv8-timer"; 1613 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1614 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1615 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1616 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1617 }; 1618}; 1619