1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 /* External CAN clock - to be overridden by boards that provide it */ 52 can_clk: can { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 cluster1_opp: opp_table10 { 59 compatible = "operating-points-v2"; 60 opp-shared; 61 opp-800000000 { 62 opp-hz = /bits/ 64 <800000000>; 63 opp-microvolt = <820000>; 64 clock-latency-ns = <300000>; 65 }; 66 opp-1000000000 { 67 opp-hz = /bits/ 64 <1000000000>; 68 opp-microvolt = <820000>; 69 clock-latency-ns = <300000>; 70 }; 71 opp-1200000000 { 72 opp-hz = /bits/ 64 <1200000000>; 73 opp-microvolt = <820000>; 74 clock-latency-ns = <300000>; 75 opp-suspend; 76 }; 77 }; 78 79 cpus { 80 #address-cells = <1>; 81 #size-cells = <0>; 82 83 a53_0: cpu@0 { 84 compatible = "arm,cortex-a53"; 85 reg = <0>; 86 device_type = "cpu"; 87 #cooling-cells = <2>; 88 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 89 next-level-cache = <&L2_CA53>; 90 enable-method = "psci"; 91 dynamic-power-coefficient = <277>; 92 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 93 operating-points-v2 = <&cluster1_opp>; 94 }; 95 96 a53_1: cpu@1 { 97 compatible = "arm,cortex-a53"; 98 reg = <1>; 99 device_type = "cpu"; 100 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 101 next-level-cache = <&L2_CA53>; 102 enable-method = "psci"; 103 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 104 operating-points-v2 = <&cluster1_opp>; 105 }; 106 107 L2_CA53: cache-controller-0 { 108 compatible = "cache"; 109 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 110 cache-unified; 111 cache-level = <2>; 112 }; 113 }; 114 115 extal_clk: extal { 116 compatible = "fixed-clock"; 117 #clock-cells = <0>; 118 /* This value must be overridden by the board */ 119 clock-frequency = <0>; 120 }; 121 122 /* External PCIe clock - can be overridden by the board */ 123 pcie_bus_clk: pcie_bus { 124 compatible = "fixed-clock"; 125 #clock-cells = <0>; 126 clock-frequency = <0>; 127 }; 128 129 pmu_a53 { 130 compatible = "arm,cortex-a53-pmu"; 131 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 132 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 133 interrupt-affinity = <&a53_0>, <&a53_1>; 134 }; 135 136 psci { 137 compatible = "arm,psci-1.0", "arm,psci-0.2"; 138 method = "smc"; 139 }; 140 141 /* External SCIF clock - to be overridden by boards that provide it */ 142 scif_clk: scif { 143 compatible = "fixed-clock"; 144 #clock-cells = <0>; 145 clock-frequency = <0>; 146 }; 147 148 soc: soc { 149 compatible = "simple-bus"; 150 interrupt-parent = <&gic>; 151 #address-cells = <2>; 152 #size-cells = <2>; 153 ranges; 154 155 rwdt: watchdog@e6020000 { 156 compatible = "renesas,r8a77990-wdt", 157 "renesas,rcar-gen3-wdt"; 158 reg = <0 0xe6020000 0 0x0c>; 159 clocks = <&cpg CPG_MOD 402>; 160 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 161 resets = <&cpg 402>; 162 status = "disabled"; 163 }; 164 165 gpio0: gpio@e6050000 { 166 compatible = "renesas,gpio-r8a77990", 167 "renesas,rcar-gen3-gpio"; 168 reg = <0 0xe6050000 0 0x50>; 169 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 170 #gpio-cells = <2>; 171 gpio-controller; 172 gpio-ranges = <&pfc 0 0 18>; 173 #interrupt-cells = <2>; 174 interrupt-controller; 175 clocks = <&cpg CPG_MOD 912>; 176 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 177 resets = <&cpg 912>; 178 }; 179 180 gpio1: gpio@e6051000 { 181 compatible = "renesas,gpio-r8a77990", 182 "renesas,rcar-gen3-gpio"; 183 reg = <0 0xe6051000 0 0x50>; 184 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 185 #gpio-cells = <2>; 186 gpio-controller; 187 gpio-ranges = <&pfc 0 32 23>; 188 #interrupt-cells = <2>; 189 interrupt-controller; 190 clocks = <&cpg CPG_MOD 911>; 191 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 192 resets = <&cpg 911>; 193 }; 194 195 gpio2: gpio@e6052000 { 196 compatible = "renesas,gpio-r8a77990", 197 "renesas,rcar-gen3-gpio"; 198 reg = <0 0xe6052000 0 0x50>; 199 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 200 #gpio-cells = <2>; 201 gpio-controller; 202 gpio-ranges = <&pfc 0 64 26>; 203 #interrupt-cells = <2>; 204 interrupt-controller; 205 clocks = <&cpg CPG_MOD 910>; 206 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 207 resets = <&cpg 910>; 208 }; 209 210 gpio3: gpio@e6053000 { 211 compatible = "renesas,gpio-r8a77990", 212 "renesas,rcar-gen3-gpio"; 213 reg = <0 0xe6053000 0 0x50>; 214 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 215 #gpio-cells = <2>; 216 gpio-controller; 217 gpio-ranges = <&pfc 0 96 16>; 218 #interrupt-cells = <2>; 219 interrupt-controller; 220 clocks = <&cpg CPG_MOD 909>; 221 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 222 resets = <&cpg 909>; 223 }; 224 225 gpio4: gpio@e6054000 { 226 compatible = "renesas,gpio-r8a77990", 227 "renesas,rcar-gen3-gpio"; 228 reg = <0 0xe6054000 0 0x50>; 229 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 230 #gpio-cells = <2>; 231 gpio-controller; 232 gpio-ranges = <&pfc 0 128 11>; 233 #interrupt-cells = <2>; 234 interrupt-controller; 235 clocks = <&cpg CPG_MOD 908>; 236 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 237 resets = <&cpg 908>; 238 }; 239 240 gpio5: gpio@e6055000 { 241 compatible = "renesas,gpio-r8a77990", 242 "renesas,rcar-gen3-gpio"; 243 reg = <0 0xe6055000 0 0x50>; 244 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 245 #gpio-cells = <2>; 246 gpio-controller; 247 gpio-ranges = <&pfc 0 160 20>; 248 #interrupt-cells = <2>; 249 interrupt-controller; 250 clocks = <&cpg CPG_MOD 907>; 251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 252 resets = <&cpg 907>; 253 }; 254 255 gpio6: gpio@e6055400 { 256 compatible = "renesas,gpio-r8a77990", 257 "renesas,rcar-gen3-gpio"; 258 reg = <0 0xe6055400 0 0x50>; 259 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 260 #gpio-cells = <2>; 261 gpio-controller; 262 gpio-ranges = <&pfc 0 192 18>; 263 #interrupt-cells = <2>; 264 interrupt-controller; 265 clocks = <&cpg CPG_MOD 906>; 266 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 267 resets = <&cpg 906>; 268 }; 269 270 pfc: pin-controller@e6060000 { 271 compatible = "renesas,pfc-r8a77990"; 272 reg = <0 0xe6060000 0 0x508>; 273 }; 274 275 i2c_dvfs: i2c@e60b0000 { 276 #address-cells = <1>; 277 #size-cells = <0>; 278 compatible = "renesas,iic-r8a77990"; 279 reg = <0 0xe60b0000 0 0x15>; 280 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 281 clocks = <&cpg CPG_MOD 926>; 282 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 283 resets = <&cpg 926>; 284 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 285 dma-names = "tx", "rx"; 286 status = "disabled"; 287 }; 288 289 cmt0: timer@e60f0000 { 290 compatible = "renesas,r8a77990-cmt0", 291 "renesas,rcar-gen3-cmt0"; 292 reg = <0 0xe60f0000 0 0x1004>; 293 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 295 clocks = <&cpg CPG_MOD 303>; 296 clock-names = "fck"; 297 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 298 resets = <&cpg 303>; 299 status = "disabled"; 300 }; 301 302 cmt1: timer@e6130000 { 303 compatible = "renesas,r8a77990-cmt1", 304 "renesas,rcar-gen3-cmt1"; 305 reg = <0 0xe6130000 0 0x1004>; 306 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 307 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 314 clocks = <&cpg CPG_MOD 302>; 315 clock-names = "fck"; 316 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 317 resets = <&cpg 302>; 318 status = "disabled"; 319 }; 320 321 cmt2: timer@e6140000 { 322 compatible = "renesas,r8a77990-cmt1", 323 "renesas,rcar-gen3-cmt1"; 324 reg = <0 0xe6140000 0 0x1004>; 325 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 333 clocks = <&cpg CPG_MOD 301>; 334 clock-names = "fck"; 335 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 336 resets = <&cpg 301>; 337 status = "disabled"; 338 }; 339 340 cmt3: timer@e6148000 { 341 compatible = "renesas,r8a77990-cmt1", 342 "renesas,rcar-gen3-cmt1"; 343 reg = <0 0xe6148000 0 0x1004>; 344 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 300>; 353 clock-names = "fck"; 354 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 355 resets = <&cpg 300>; 356 status = "disabled"; 357 }; 358 359 cpg: clock-controller@e6150000 { 360 compatible = "renesas,r8a77990-cpg-mssr"; 361 reg = <0 0xe6150000 0 0x1000>; 362 clocks = <&extal_clk>; 363 clock-names = "extal"; 364 #clock-cells = <2>; 365 #power-domain-cells = <0>; 366 #reset-cells = <1>; 367 }; 368 369 rst: reset-controller@e6160000 { 370 compatible = "renesas,r8a77990-rst"; 371 reg = <0 0xe6160000 0 0x0200>; 372 }; 373 374 sysc: system-controller@e6180000 { 375 compatible = "renesas,r8a77990-sysc"; 376 reg = <0 0xe6180000 0 0x0400>; 377 #power-domain-cells = <1>; 378 }; 379 380 thermal: thermal@e6190000 { 381 compatible = "renesas,thermal-r8a77990"; 382 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 383 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 385 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 386 clocks = <&cpg CPG_MOD 522>; 387 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 388 resets = <&cpg 522>; 389 #thermal-sensor-cells = <0>; 390 }; 391 392 intc_ex: interrupt-controller@e61c0000 { 393 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 394 #interrupt-cells = <2>; 395 interrupt-controller; 396 reg = <0 0xe61c0000 0 0x200>; 397 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 398 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 399 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 403 clocks = <&cpg CPG_MOD 407>; 404 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 405 resets = <&cpg 407>; 406 }; 407 408 i2c0: i2c@e6500000 { 409 #address-cells = <1>; 410 #size-cells = <0>; 411 compatible = "renesas,i2c-r8a77990", 412 "renesas,rcar-gen3-i2c"; 413 reg = <0 0xe6500000 0 0x40>; 414 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 415 clocks = <&cpg CPG_MOD 931>; 416 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 417 resets = <&cpg 931>; 418 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 419 <&dmac2 0x91>, <&dmac2 0x90>; 420 dma-names = "tx", "rx", "tx", "rx"; 421 i2c-scl-internal-delay-ns = <110>; 422 status = "disabled"; 423 }; 424 425 i2c1: i2c@e6508000 { 426 #address-cells = <1>; 427 #size-cells = <0>; 428 compatible = "renesas,i2c-r8a77990", 429 "renesas,rcar-gen3-i2c"; 430 reg = <0 0xe6508000 0 0x40>; 431 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 432 clocks = <&cpg CPG_MOD 930>; 433 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 434 resets = <&cpg 930>; 435 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 436 <&dmac2 0x93>, <&dmac2 0x92>; 437 dma-names = "tx", "rx", "tx", "rx"; 438 i2c-scl-internal-delay-ns = <6>; 439 status = "disabled"; 440 }; 441 442 i2c2: i2c@e6510000 { 443 #address-cells = <1>; 444 #size-cells = <0>; 445 compatible = "renesas,i2c-r8a77990", 446 "renesas,rcar-gen3-i2c"; 447 reg = <0 0xe6510000 0 0x40>; 448 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 449 clocks = <&cpg CPG_MOD 929>; 450 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 451 resets = <&cpg 929>; 452 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 453 <&dmac2 0x95>, <&dmac2 0x94>; 454 dma-names = "tx", "rx", "tx", "rx"; 455 i2c-scl-internal-delay-ns = <6>; 456 status = "disabled"; 457 }; 458 459 i2c3: i2c@e66d0000 { 460 #address-cells = <1>; 461 #size-cells = <0>; 462 compatible = "renesas,i2c-r8a77990", 463 "renesas,rcar-gen3-i2c"; 464 reg = <0 0xe66d0000 0 0x40>; 465 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 466 clocks = <&cpg CPG_MOD 928>; 467 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 468 resets = <&cpg 928>; 469 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 470 dma-names = "tx", "rx"; 471 i2c-scl-internal-delay-ns = <110>; 472 status = "disabled"; 473 }; 474 475 i2c4: i2c@e66d8000 { 476 #address-cells = <1>; 477 #size-cells = <0>; 478 compatible = "renesas,i2c-r8a77990", 479 "renesas,rcar-gen3-i2c"; 480 reg = <0 0xe66d8000 0 0x40>; 481 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 482 clocks = <&cpg CPG_MOD 927>; 483 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 484 resets = <&cpg 927>; 485 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 486 dma-names = "tx", "rx"; 487 i2c-scl-internal-delay-ns = <6>; 488 status = "disabled"; 489 }; 490 491 i2c5: i2c@e66e0000 { 492 #address-cells = <1>; 493 #size-cells = <0>; 494 compatible = "renesas,i2c-r8a77990", 495 "renesas,rcar-gen3-i2c"; 496 reg = <0 0xe66e0000 0 0x40>; 497 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 498 clocks = <&cpg CPG_MOD 919>; 499 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 500 resets = <&cpg 919>; 501 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 502 dma-names = "tx", "rx"; 503 i2c-scl-internal-delay-ns = <6>; 504 status = "disabled"; 505 }; 506 507 i2c6: i2c@e66e8000 { 508 #address-cells = <1>; 509 #size-cells = <0>; 510 compatible = "renesas,i2c-r8a77990", 511 "renesas,rcar-gen3-i2c"; 512 reg = <0 0xe66e8000 0 0x40>; 513 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 514 clocks = <&cpg CPG_MOD 918>; 515 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 516 resets = <&cpg 918>; 517 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 518 dma-names = "tx", "rx"; 519 i2c-scl-internal-delay-ns = <6>; 520 status = "disabled"; 521 }; 522 523 i2c7: i2c@e6690000 { 524 #address-cells = <1>; 525 #size-cells = <0>; 526 compatible = "renesas,i2c-r8a77990", 527 "renesas,rcar-gen3-i2c"; 528 reg = <0 0xe6690000 0 0x40>; 529 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 1003>; 531 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 532 resets = <&cpg 1003>; 533 i2c-scl-internal-delay-ns = <6>; 534 status = "disabled"; 535 }; 536 537 hscif0: serial@e6540000 { 538 compatible = "renesas,hscif-r8a77990", 539 "renesas,rcar-gen3-hscif", 540 "renesas,hscif"; 541 reg = <0 0xe6540000 0 0x60>; 542 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 543 clocks = <&cpg CPG_MOD 520>, 544 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 545 <&scif_clk>; 546 clock-names = "fck", "brg_int", "scif_clk"; 547 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 548 <&dmac2 0x31>, <&dmac2 0x30>; 549 dma-names = "tx", "rx", "tx", "rx"; 550 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 551 resets = <&cpg 520>; 552 status = "disabled"; 553 }; 554 555 hscif1: serial@e6550000 { 556 compatible = "renesas,hscif-r8a77990", 557 "renesas,rcar-gen3-hscif", 558 "renesas,hscif"; 559 reg = <0 0xe6550000 0 0x60>; 560 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 561 clocks = <&cpg CPG_MOD 519>, 562 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 563 <&scif_clk>; 564 clock-names = "fck", "brg_int", "scif_clk"; 565 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 566 <&dmac2 0x33>, <&dmac2 0x32>; 567 dma-names = "tx", "rx", "tx", "rx"; 568 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 569 resets = <&cpg 519>; 570 status = "disabled"; 571 }; 572 573 hscif2: serial@e6560000 { 574 compatible = "renesas,hscif-r8a77990", 575 "renesas,rcar-gen3-hscif", 576 "renesas,hscif"; 577 reg = <0 0xe6560000 0 0x60>; 578 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 579 clocks = <&cpg CPG_MOD 518>, 580 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 581 <&scif_clk>; 582 clock-names = "fck", "brg_int", "scif_clk"; 583 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 584 <&dmac2 0x35>, <&dmac2 0x34>; 585 dma-names = "tx", "rx", "tx", "rx"; 586 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 587 resets = <&cpg 518>; 588 status = "disabled"; 589 }; 590 591 hscif3: serial@e66a0000 { 592 compatible = "renesas,hscif-r8a77990", 593 "renesas,rcar-gen3-hscif", 594 "renesas,hscif"; 595 reg = <0 0xe66a0000 0 0x60>; 596 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 597 clocks = <&cpg CPG_MOD 517>, 598 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 599 <&scif_clk>; 600 clock-names = "fck", "brg_int", "scif_clk"; 601 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 602 dma-names = "tx", "rx"; 603 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 604 resets = <&cpg 517>; 605 status = "disabled"; 606 }; 607 608 hscif4: serial@e66b0000 { 609 compatible = "renesas,hscif-r8a77990", 610 "renesas,rcar-gen3-hscif", 611 "renesas,hscif"; 612 reg = <0 0xe66b0000 0 0x60>; 613 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 614 clocks = <&cpg CPG_MOD 516>, 615 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 616 <&scif_clk>; 617 clock-names = "fck", "brg_int", "scif_clk"; 618 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 619 dma-names = "tx", "rx"; 620 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 621 resets = <&cpg 516>; 622 status = "disabled"; 623 }; 624 625 hsusb: usb@e6590000 { 626 compatible = "renesas,usbhs-r8a77990", 627 "renesas,rcar-gen3-usbhs"; 628 reg = <0 0xe6590000 0 0x200>; 629 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 630 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 631 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 632 <&usb_dmac1 0>, <&usb_dmac1 1>; 633 dma-names = "ch0", "ch1", "ch2", "ch3"; 634 renesas,buswait = <11>; 635 phys = <&usb2_phy0 3>; 636 phy-names = "usb"; 637 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 638 resets = <&cpg 704>, <&cpg 703>; 639 status = "disabled"; 640 }; 641 642 usb_dmac0: dma-controller@e65a0000 { 643 compatible = "renesas,r8a77990-usb-dmac", 644 "renesas,usb-dmac"; 645 reg = <0 0xe65a0000 0 0x100>; 646 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 648 interrupt-names = "ch0", "ch1"; 649 clocks = <&cpg CPG_MOD 330>; 650 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 651 resets = <&cpg 330>; 652 #dma-cells = <1>; 653 dma-channels = <2>; 654 }; 655 656 usb_dmac1: dma-controller@e65b0000 { 657 compatible = "renesas,r8a77990-usb-dmac", 658 "renesas,usb-dmac"; 659 reg = <0 0xe65b0000 0 0x100>; 660 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 661 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 662 interrupt-names = "ch0", "ch1"; 663 clocks = <&cpg CPG_MOD 331>; 664 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 665 resets = <&cpg 331>; 666 #dma-cells = <1>; 667 dma-channels = <2>; 668 }; 669 670 dmac0: dma-controller@e6700000 { 671 compatible = "renesas,dmac-r8a77990", 672 "renesas,rcar-dmac"; 673 reg = <0 0xe6700000 0 0x10000>; 674 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 678 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 680 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 681 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 682 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 683 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 684 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 685 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 686 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 687 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 688 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 689 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 690 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 691 interrupt-names = "error", 692 "ch0", "ch1", "ch2", "ch3", 693 "ch4", "ch5", "ch6", "ch7", 694 "ch8", "ch9", "ch10", "ch11", 695 "ch12", "ch13", "ch14", "ch15"; 696 clocks = <&cpg CPG_MOD 219>; 697 clock-names = "fck"; 698 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 699 resets = <&cpg 219>; 700 #dma-cells = <1>; 701 dma-channels = <16>; 702 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 703 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 704 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 705 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 706 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 707 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 708 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 709 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 710 }; 711 712 dmac1: dma-controller@e7300000 { 713 compatible = "renesas,dmac-r8a77990", 714 "renesas,rcar-dmac"; 715 reg = <0 0xe7300000 0 0x10000>; 716 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 717 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 718 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 719 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 720 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 721 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 722 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 723 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 724 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 725 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 726 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 727 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 728 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 729 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 730 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 732 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 733 interrupt-names = "error", 734 "ch0", "ch1", "ch2", "ch3", 735 "ch4", "ch5", "ch6", "ch7", 736 "ch8", "ch9", "ch10", "ch11", 737 "ch12", "ch13", "ch14", "ch15"; 738 clocks = <&cpg CPG_MOD 218>; 739 clock-names = "fck"; 740 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 741 resets = <&cpg 218>; 742 #dma-cells = <1>; 743 dma-channels = <16>; 744 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 745 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 746 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 747 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 748 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 749 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 750 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 751 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 752 }; 753 754 dmac2: dma-controller@e7310000 { 755 compatible = "renesas,dmac-r8a77990", 756 "renesas,rcar-dmac"; 757 reg = <0 0xe7310000 0 0x10000>; 758 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 760 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 761 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 775 interrupt-names = "error", 776 "ch0", "ch1", "ch2", "ch3", 777 "ch4", "ch5", "ch6", "ch7", 778 "ch8", "ch9", "ch10", "ch11", 779 "ch12", "ch13", "ch14", "ch15"; 780 clocks = <&cpg CPG_MOD 217>; 781 clock-names = "fck"; 782 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 783 resets = <&cpg 217>; 784 #dma-cells = <1>; 785 dma-channels = <16>; 786 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 787 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 788 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 789 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 790 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 791 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 792 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 793 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 794 }; 795 796 ipmmu_ds0: mmu@e6740000 { 797 compatible = "renesas,ipmmu-r8a77990"; 798 reg = <0 0xe6740000 0 0x1000>; 799 renesas,ipmmu-main = <&ipmmu_mm 0>; 800 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 801 #iommu-cells = <1>; 802 }; 803 804 ipmmu_ds1: mmu@e7740000 { 805 compatible = "renesas,ipmmu-r8a77990"; 806 reg = <0 0xe7740000 0 0x1000>; 807 renesas,ipmmu-main = <&ipmmu_mm 1>; 808 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 809 #iommu-cells = <1>; 810 }; 811 812 ipmmu_hc: mmu@e6570000 { 813 compatible = "renesas,ipmmu-r8a77990"; 814 reg = <0 0xe6570000 0 0x1000>; 815 renesas,ipmmu-main = <&ipmmu_mm 2>; 816 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 817 #iommu-cells = <1>; 818 }; 819 820 ipmmu_mm: mmu@e67b0000 { 821 compatible = "renesas,ipmmu-r8a77990"; 822 reg = <0 0xe67b0000 0 0x1000>; 823 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 825 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 826 #iommu-cells = <1>; 827 }; 828 829 ipmmu_mp: mmu@ec670000 { 830 compatible = "renesas,ipmmu-r8a77990"; 831 reg = <0 0xec670000 0 0x1000>; 832 renesas,ipmmu-main = <&ipmmu_mm 4>; 833 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 834 #iommu-cells = <1>; 835 }; 836 837 ipmmu_pv0: mmu@fd800000 { 838 compatible = "renesas,ipmmu-r8a77990"; 839 reg = <0 0xfd800000 0 0x1000>; 840 renesas,ipmmu-main = <&ipmmu_mm 6>; 841 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 842 #iommu-cells = <1>; 843 }; 844 845 ipmmu_rt: mmu@ffc80000 { 846 compatible = "renesas,ipmmu-r8a77990"; 847 reg = <0 0xffc80000 0 0x1000>; 848 renesas,ipmmu-main = <&ipmmu_mm 10>; 849 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 850 #iommu-cells = <1>; 851 }; 852 853 ipmmu_vc0: mmu@fe6b0000 { 854 compatible = "renesas,ipmmu-r8a77990"; 855 reg = <0 0xfe6b0000 0 0x1000>; 856 renesas,ipmmu-main = <&ipmmu_mm 12>; 857 power-domains = <&sysc R8A77990_PD_A3VC>; 858 #iommu-cells = <1>; 859 }; 860 861 ipmmu_vi0: mmu@febd0000 { 862 compatible = "renesas,ipmmu-r8a77990"; 863 reg = <0 0xfebd0000 0 0x1000>; 864 renesas,ipmmu-main = <&ipmmu_mm 14>; 865 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 866 #iommu-cells = <1>; 867 }; 868 869 ipmmu_vp0: mmu@fe990000 { 870 compatible = "renesas,ipmmu-r8a77990"; 871 reg = <0 0xfe990000 0 0x1000>; 872 renesas,ipmmu-main = <&ipmmu_mm 16>; 873 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 874 #iommu-cells = <1>; 875 }; 876 877 avb: ethernet@e6800000 { 878 compatible = "renesas,etheravb-r8a77990", 879 "renesas,etheravb-rcar-gen3"; 880 reg = <0 0xe6800000 0 0x800>; 881 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 886 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 887 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 888 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 890 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 891 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 892 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 893 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 896 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 897 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 898 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 899 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 900 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 901 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 902 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 906 interrupt-names = "ch0", "ch1", "ch2", "ch3", 907 "ch4", "ch5", "ch6", "ch7", 908 "ch8", "ch9", "ch10", "ch11", 909 "ch12", "ch13", "ch14", "ch15", 910 "ch16", "ch17", "ch18", "ch19", 911 "ch20", "ch21", "ch22", "ch23", 912 "ch24"; 913 clocks = <&cpg CPG_MOD 812>; 914 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 915 resets = <&cpg 812>; 916 phy-mode = "rgmii"; 917 iommus = <&ipmmu_ds0 16>; 918 #address-cells = <1>; 919 #size-cells = <0>; 920 status = "disabled"; 921 }; 922 923 can0: can@e6c30000 { 924 compatible = "renesas,can-r8a77990", 925 "renesas,rcar-gen3-can"; 926 reg = <0 0xe6c30000 0 0x1000>; 927 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 928 clocks = <&cpg CPG_MOD 916>, 929 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 930 <&can_clk>; 931 clock-names = "clkp1", "clkp2", "can_clk"; 932 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 933 assigned-clock-rates = <40000000>; 934 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 935 resets = <&cpg 916>; 936 status = "disabled"; 937 }; 938 939 can1: can@e6c38000 { 940 compatible = "renesas,can-r8a77990", 941 "renesas,rcar-gen3-can"; 942 reg = <0 0xe6c38000 0 0x1000>; 943 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 944 clocks = <&cpg CPG_MOD 915>, 945 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 946 <&can_clk>; 947 clock-names = "clkp1", "clkp2", "can_clk"; 948 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 949 assigned-clock-rates = <40000000>; 950 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 951 resets = <&cpg 915>; 952 status = "disabled"; 953 }; 954 955 canfd: can@e66c0000 { 956 compatible = "renesas,r8a77990-canfd", 957 "renesas,rcar-gen3-canfd"; 958 reg = <0 0xe66c0000 0 0x8000>; 959 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 961 clocks = <&cpg CPG_MOD 914>, 962 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 963 <&can_clk>; 964 clock-names = "fck", "canfd", "can_clk"; 965 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 966 assigned-clock-rates = <40000000>; 967 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 968 resets = <&cpg 914>; 969 status = "disabled"; 970 971 channel0 { 972 status = "disabled"; 973 }; 974 975 channel1 { 976 status = "disabled"; 977 }; 978 }; 979 980 pwm0: pwm@e6e30000 { 981 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 982 reg = <0 0xe6e30000 0 0x8>; 983 clocks = <&cpg CPG_MOD 523>; 984 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 985 resets = <&cpg 523>; 986 #pwm-cells = <2>; 987 status = "disabled"; 988 }; 989 990 pwm1: pwm@e6e31000 { 991 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 992 reg = <0 0xe6e31000 0 0x8>; 993 clocks = <&cpg CPG_MOD 523>; 994 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 995 resets = <&cpg 523>; 996 #pwm-cells = <2>; 997 status = "disabled"; 998 }; 999 1000 pwm2: pwm@e6e32000 { 1001 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1002 reg = <0 0xe6e32000 0 0x8>; 1003 clocks = <&cpg CPG_MOD 523>; 1004 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1005 resets = <&cpg 523>; 1006 #pwm-cells = <2>; 1007 status = "disabled"; 1008 }; 1009 1010 pwm3: pwm@e6e33000 { 1011 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1012 reg = <0 0xe6e33000 0 0x8>; 1013 clocks = <&cpg CPG_MOD 523>; 1014 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1015 resets = <&cpg 523>; 1016 #pwm-cells = <2>; 1017 status = "disabled"; 1018 }; 1019 1020 pwm4: pwm@e6e34000 { 1021 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1022 reg = <0 0xe6e34000 0 0x8>; 1023 clocks = <&cpg CPG_MOD 523>; 1024 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1025 resets = <&cpg 523>; 1026 #pwm-cells = <2>; 1027 status = "disabled"; 1028 }; 1029 1030 pwm5: pwm@e6e35000 { 1031 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1032 reg = <0 0xe6e35000 0 0x8>; 1033 clocks = <&cpg CPG_MOD 523>; 1034 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1035 resets = <&cpg 523>; 1036 #pwm-cells = <2>; 1037 status = "disabled"; 1038 }; 1039 1040 pwm6: pwm@e6e36000 { 1041 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1042 reg = <0 0xe6e36000 0 0x8>; 1043 clocks = <&cpg CPG_MOD 523>; 1044 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1045 resets = <&cpg 523>; 1046 #pwm-cells = <2>; 1047 status = "disabled"; 1048 }; 1049 1050 scif0: serial@e6e60000 { 1051 compatible = "renesas,scif-r8a77990", 1052 "renesas,rcar-gen3-scif", "renesas,scif"; 1053 reg = <0 0xe6e60000 0 64>; 1054 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1055 clocks = <&cpg CPG_MOD 207>, 1056 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1057 <&scif_clk>; 1058 clock-names = "fck", "brg_int", "scif_clk"; 1059 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1060 <&dmac2 0x51>, <&dmac2 0x50>; 1061 dma-names = "tx", "rx", "tx", "rx"; 1062 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1063 resets = <&cpg 207>; 1064 status = "disabled"; 1065 }; 1066 1067 scif1: serial@e6e68000 { 1068 compatible = "renesas,scif-r8a77990", 1069 "renesas,rcar-gen3-scif", "renesas,scif"; 1070 reg = <0 0xe6e68000 0 64>; 1071 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1072 clocks = <&cpg CPG_MOD 206>, 1073 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1074 <&scif_clk>; 1075 clock-names = "fck", "brg_int", "scif_clk"; 1076 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1077 <&dmac2 0x53>, <&dmac2 0x52>; 1078 dma-names = "tx", "rx", "tx", "rx"; 1079 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1080 resets = <&cpg 206>; 1081 status = "disabled"; 1082 }; 1083 1084 scif2: serial@e6e88000 { 1085 compatible = "renesas,scif-r8a77990", 1086 "renesas,rcar-gen3-scif", "renesas,scif"; 1087 reg = <0 0xe6e88000 0 64>; 1088 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1089 clocks = <&cpg CPG_MOD 310>, 1090 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1091 <&scif_clk>; 1092 clock-names = "fck", "brg_int", "scif_clk"; 1093 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1094 <&dmac2 0x13>, <&dmac2 0x12>; 1095 dma-names = "tx", "rx", "tx", "rx"; 1096 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1097 resets = <&cpg 310>; 1098 status = "disabled"; 1099 }; 1100 1101 scif3: serial@e6c50000 { 1102 compatible = "renesas,scif-r8a77990", 1103 "renesas,rcar-gen3-scif", "renesas,scif"; 1104 reg = <0 0xe6c50000 0 64>; 1105 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1106 clocks = <&cpg CPG_MOD 204>, 1107 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1108 <&scif_clk>; 1109 clock-names = "fck", "brg_int", "scif_clk"; 1110 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1111 dma-names = "tx", "rx"; 1112 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1113 resets = <&cpg 204>; 1114 status = "disabled"; 1115 }; 1116 1117 scif4: serial@e6c40000 { 1118 compatible = "renesas,scif-r8a77990", 1119 "renesas,rcar-gen3-scif", "renesas,scif"; 1120 reg = <0 0xe6c40000 0 64>; 1121 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1122 clocks = <&cpg CPG_MOD 203>, 1123 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1124 <&scif_clk>; 1125 clock-names = "fck", "brg_int", "scif_clk"; 1126 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1127 dma-names = "tx", "rx"; 1128 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1129 resets = <&cpg 203>; 1130 status = "disabled"; 1131 }; 1132 1133 scif5: serial@e6f30000 { 1134 compatible = "renesas,scif-r8a77990", 1135 "renesas,rcar-gen3-scif", "renesas,scif"; 1136 reg = <0 0xe6f30000 0 64>; 1137 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1138 clocks = <&cpg CPG_MOD 202>, 1139 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1140 <&scif_clk>; 1141 clock-names = "fck", "brg_int", "scif_clk"; 1142 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1143 dma-names = "tx", "rx"; 1144 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1145 resets = <&cpg 202>; 1146 status = "disabled"; 1147 }; 1148 1149 msiof0: spi@e6e90000 { 1150 compatible = "renesas,msiof-r8a77990", 1151 "renesas,rcar-gen3-msiof"; 1152 reg = <0 0xe6e90000 0 0x0064>; 1153 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1154 clocks = <&cpg CPG_MOD 211>; 1155 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1156 <&dmac2 0x41>, <&dmac2 0x40>; 1157 dma-names = "tx", "rx", "tx", "rx"; 1158 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1159 resets = <&cpg 211>; 1160 #address-cells = <1>; 1161 #size-cells = <0>; 1162 status = "disabled"; 1163 }; 1164 1165 msiof1: spi@e6ea0000 { 1166 compatible = "renesas,msiof-r8a77990", 1167 "renesas,rcar-gen3-msiof"; 1168 reg = <0 0xe6ea0000 0 0x0064>; 1169 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1170 clocks = <&cpg CPG_MOD 210>; 1171 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1172 <&dmac2 0x43>, <&dmac2 0x42>; 1173 dma-names = "tx", "rx", "tx", "rx"; 1174 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1175 resets = <&cpg 210>; 1176 #address-cells = <1>; 1177 #size-cells = <0>; 1178 status = "disabled"; 1179 }; 1180 1181 msiof2: spi@e6c00000 { 1182 compatible = "renesas,msiof-r8a77990", 1183 "renesas,rcar-gen3-msiof"; 1184 reg = <0 0xe6c00000 0 0x0064>; 1185 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1186 clocks = <&cpg CPG_MOD 209>; 1187 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1188 dma-names = "tx", "rx"; 1189 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1190 resets = <&cpg 209>; 1191 #address-cells = <1>; 1192 #size-cells = <0>; 1193 status = "disabled"; 1194 }; 1195 1196 msiof3: spi@e6c10000 { 1197 compatible = "renesas,msiof-r8a77990", 1198 "renesas,rcar-gen3-msiof"; 1199 reg = <0 0xe6c10000 0 0x0064>; 1200 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1201 clocks = <&cpg CPG_MOD 208>; 1202 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1203 dma-names = "tx", "rx"; 1204 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1205 resets = <&cpg 208>; 1206 #address-cells = <1>; 1207 #size-cells = <0>; 1208 status = "disabled"; 1209 }; 1210 1211 vin4: video@e6ef4000 { 1212 compatible = "renesas,vin-r8a77990"; 1213 reg = <0 0xe6ef4000 0 0x1000>; 1214 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1215 clocks = <&cpg CPG_MOD 807>; 1216 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1217 resets = <&cpg 807>; 1218 renesas,id = <4>; 1219 status = "disabled"; 1220 1221 ports { 1222 #address-cells = <1>; 1223 #size-cells = <0>; 1224 1225 port@1 { 1226 #address-cells = <1>; 1227 #size-cells = <0>; 1228 1229 reg = <1>; 1230 1231 vin4csi40: endpoint@2 { 1232 reg = <2>; 1233 remote-endpoint= <&csi40vin4>; 1234 }; 1235 }; 1236 }; 1237 }; 1238 1239 vin5: video@e6ef5000 { 1240 compatible = "renesas,vin-r8a77990"; 1241 reg = <0 0xe6ef5000 0 0x1000>; 1242 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1243 clocks = <&cpg CPG_MOD 806>; 1244 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1245 resets = <&cpg 806>; 1246 renesas,id = <5>; 1247 status = "disabled"; 1248 1249 ports { 1250 #address-cells = <1>; 1251 #size-cells = <0>; 1252 1253 port@1 { 1254 #address-cells = <1>; 1255 #size-cells = <0>; 1256 1257 reg = <1>; 1258 1259 vin5csi40: endpoint@2 { 1260 reg = <2>; 1261 remote-endpoint= <&csi40vin5>; 1262 }; 1263 }; 1264 }; 1265 }; 1266 1267 rcar_sound: sound@ec500000 { 1268 /* 1269 * #sound-dai-cells is required 1270 * 1271 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1272 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1273 */ 1274 /* 1275 * #clock-cells is required for audio_clkout0/1/2/3 1276 * 1277 * clkout : #clock-cells = <0>; <&rcar_sound>; 1278 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1279 */ 1280 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1281 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1282 <0 0xec5a0000 0 0x100>, /* ADG */ 1283 <0 0xec540000 0 0x1000>, /* SSIU */ 1284 <0 0xec541000 0 0x280>, /* SSI */ 1285 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1286 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1287 1288 clocks = <&cpg CPG_MOD 1005>, 1289 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1290 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1291 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1292 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1293 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1294 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1295 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1296 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1297 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1298 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1299 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1300 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1301 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1302 <&audio_clk_a>, <&audio_clk_b>, 1303 <&audio_clk_c>, 1304 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1305 clock-names = "ssi-all", 1306 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1307 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1308 "ssi.1", "ssi.0", 1309 "src.9", "src.8", "src.7", "src.6", 1310 "src.5", "src.4", "src.3", "src.2", 1311 "src.1", "src.0", 1312 "mix.1", "mix.0", 1313 "ctu.1", "ctu.0", 1314 "dvc.0", "dvc.1", 1315 "clk_a", "clk_b", "clk_c", "clk_i"; 1316 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1317 resets = <&cpg 1005>, 1318 <&cpg 1006>, <&cpg 1007>, 1319 <&cpg 1008>, <&cpg 1009>, 1320 <&cpg 1010>, <&cpg 1011>, 1321 <&cpg 1012>, <&cpg 1013>, 1322 <&cpg 1014>, <&cpg 1015>; 1323 reset-names = "ssi-all", 1324 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1325 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1326 "ssi.1", "ssi.0"; 1327 status = "disabled"; 1328 1329 rcar_sound,ctu { 1330 ctu00: ctu-0 { }; 1331 ctu01: ctu-1 { }; 1332 ctu02: ctu-2 { }; 1333 ctu03: ctu-3 { }; 1334 ctu10: ctu-4 { }; 1335 ctu11: ctu-5 { }; 1336 ctu12: ctu-6 { }; 1337 ctu13: ctu-7 { }; 1338 }; 1339 1340 rcar_sound,dvc { 1341 dvc0: dvc-0 { 1342 dmas = <&audma0 0xbc>; 1343 dma-names = "tx"; 1344 }; 1345 dvc1: dvc-1 { 1346 dmas = <&audma0 0xbe>; 1347 dma-names = "tx"; 1348 }; 1349 }; 1350 1351 rcar_sound,mix { 1352 mix0: mix-0 { }; 1353 mix1: mix-1 { }; 1354 }; 1355 1356 rcar_sound,src { 1357 src0: src-0 { 1358 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1359 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1360 dma-names = "rx", "tx"; 1361 }; 1362 src1: src-1 { 1363 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1364 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1365 dma-names = "rx", "tx"; 1366 }; 1367 src2: src-2 { 1368 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1369 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1370 dma-names = "rx", "tx"; 1371 }; 1372 src3: src-3 { 1373 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1374 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1375 dma-names = "rx", "tx"; 1376 }; 1377 src4: src-4 { 1378 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1379 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1380 dma-names = "rx", "tx"; 1381 }; 1382 src5: src-5 { 1383 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1384 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1385 dma-names = "rx", "tx"; 1386 }; 1387 src6: src-6 { 1388 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1389 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1390 dma-names = "rx", "tx"; 1391 }; 1392 src7: src-7 { 1393 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1394 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1395 dma-names = "rx", "tx"; 1396 }; 1397 src8: src-8 { 1398 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1399 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1400 dma-names = "rx", "tx"; 1401 }; 1402 src9: src-9 { 1403 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1404 dmas = <&audma0 0x97>, <&audma0 0xba>; 1405 dma-names = "rx", "tx"; 1406 }; 1407 }; 1408 1409 rcar_sound,ssi { 1410 ssi0: ssi-0 { 1411 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1412 dmas = <&audma0 0x01>, <&audma0 0x02>, 1413 <&audma0 0x15>, <&audma0 0x16>; 1414 dma-names = "rx", "tx", "rxu", "txu"; 1415 }; 1416 ssi1: ssi-1 { 1417 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1418 dmas = <&audma0 0x03>, <&audma0 0x04>, 1419 <&audma0 0x49>, <&audma0 0x4a>; 1420 dma-names = "rx", "tx", "rxu", "txu"; 1421 }; 1422 ssi2: ssi-2 { 1423 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1424 dmas = <&audma0 0x05>, <&audma0 0x06>, 1425 <&audma0 0x63>, <&audma0 0x64>; 1426 dma-names = "rx", "tx", "rxu", "txu"; 1427 }; 1428 ssi3: ssi-3 { 1429 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1430 dmas = <&audma0 0x07>, <&audma0 0x08>, 1431 <&audma0 0x6f>, <&audma0 0x70>; 1432 dma-names = "rx", "tx", "rxu", "txu"; 1433 }; 1434 ssi4: ssi-4 { 1435 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1436 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1437 <&audma0 0x71>, <&audma0 0x72>; 1438 dma-names = "rx", "tx", "rxu", "txu"; 1439 }; 1440 ssi5: ssi-5 { 1441 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1442 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1443 <&audma0 0x73>, <&audma0 0x74>; 1444 dma-names = "rx", "tx", "rxu", "txu"; 1445 }; 1446 ssi6: ssi-6 { 1447 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1448 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1449 <&audma0 0x75>, <&audma0 0x76>; 1450 dma-names = "rx", "tx", "rxu", "txu"; 1451 }; 1452 ssi7: ssi-7 { 1453 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1454 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1455 <&audma0 0x79>, <&audma0 0x7a>; 1456 dma-names = "rx", "tx", "rxu", "txu"; 1457 }; 1458 ssi8: ssi-8 { 1459 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1460 dmas = <&audma0 0x11>, <&audma0 0x12>, 1461 <&audma0 0x7b>, <&audma0 0x7c>; 1462 dma-names = "rx", "tx", "rxu", "txu"; 1463 }; 1464 ssi9: ssi-9 { 1465 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1466 dmas = <&audma0 0x13>, <&audma0 0x14>, 1467 <&audma0 0x7d>, <&audma0 0x7e>; 1468 dma-names = "rx", "tx", "rxu", "txu"; 1469 }; 1470 }; 1471 }; 1472 1473 audma0: dma-controller@ec700000 { 1474 compatible = "renesas,dmac-r8a77990", 1475 "renesas,rcar-dmac"; 1476 reg = <0 0xec700000 0 0x10000>; 1477 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1478 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1479 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1480 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1481 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1482 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1483 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1484 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1485 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1486 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1487 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1488 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1489 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1490 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1491 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1492 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1493 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1494 interrupt-names = "error", 1495 "ch0", "ch1", "ch2", "ch3", 1496 "ch4", "ch5", "ch6", "ch7", 1497 "ch8", "ch9", "ch10", "ch11", 1498 "ch12", "ch13", "ch14", "ch15"; 1499 clocks = <&cpg CPG_MOD 502>; 1500 clock-names = "fck"; 1501 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1502 resets = <&cpg 502>; 1503 #dma-cells = <1>; 1504 dma-channels = <16>; 1505 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1506 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1507 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1508 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1509 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1510 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1511 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1512 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1513 }; 1514 1515 xhci0: usb@ee000000 { 1516 compatible = "renesas,xhci-r8a77990", 1517 "renesas,rcar-gen3-xhci"; 1518 reg = <0 0xee000000 0 0xc00>; 1519 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1520 clocks = <&cpg CPG_MOD 328>; 1521 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1522 resets = <&cpg 328>; 1523 status = "disabled"; 1524 }; 1525 1526 usb3_peri0: usb@ee020000 { 1527 compatible = "renesas,r8a77990-usb3-peri", 1528 "renesas,rcar-gen3-usb3-peri"; 1529 reg = <0 0xee020000 0 0x400>; 1530 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1531 clocks = <&cpg CPG_MOD 328>; 1532 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1533 resets = <&cpg 328>; 1534 status = "disabled"; 1535 }; 1536 1537 ohci0: usb@ee080000 { 1538 compatible = "generic-ohci"; 1539 reg = <0 0xee080000 0 0x100>; 1540 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1541 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1542 phys = <&usb2_phy0 1>; 1543 phy-names = "usb"; 1544 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1545 resets = <&cpg 703>, <&cpg 704>; 1546 status = "disabled"; 1547 }; 1548 1549 ehci0: usb@ee080100 { 1550 compatible = "generic-ehci"; 1551 reg = <0 0xee080100 0 0x100>; 1552 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1553 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1554 phys = <&usb2_phy0 2>; 1555 phy-names = "usb"; 1556 companion = <&ohci0>; 1557 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1558 resets = <&cpg 703>, <&cpg 704>; 1559 status = "disabled"; 1560 }; 1561 1562 usb2_phy0: usb-phy@ee080200 { 1563 compatible = "renesas,usb2-phy-r8a77990", 1564 "renesas,rcar-gen3-usb2-phy"; 1565 reg = <0 0xee080200 0 0x700>; 1566 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1567 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1568 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1569 resets = <&cpg 703>, <&cpg 704>; 1570 #phy-cells = <1>; 1571 status = "disabled"; 1572 }; 1573 1574 sdhi0: sd@ee100000 { 1575 compatible = "renesas,sdhi-r8a77990", 1576 "renesas,rcar-gen3-sdhi"; 1577 reg = <0 0xee100000 0 0x2000>; 1578 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1579 clocks = <&cpg CPG_MOD 314>; 1580 max-frequency = <200000000>; 1581 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1582 resets = <&cpg 314>; 1583 iommus = <&ipmmu_ds1 32>; 1584 status = "disabled"; 1585 }; 1586 1587 sdhi1: sd@ee120000 { 1588 compatible = "renesas,sdhi-r8a77990", 1589 "renesas,rcar-gen3-sdhi"; 1590 reg = <0 0xee120000 0 0x2000>; 1591 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1592 clocks = <&cpg CPG_MOD 313>; 1593 max-frequency = <200000000>; 1594 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1595 resets = <&cpg 313>; 1596 iommus = <&ipmmu_ds1 33>; 1597 status = "disabled"; 1598 }; 1599 1600 sdhi3: sd@ee160000 { 1601 compatible = "renesas,sdhi-r8a77990", 1602 "renesas,rcar-gen3-sdhi"; 1603 reg = <0 0xee160000 0 0x2000>; 1604 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1605 clocks = <&cpg CPG_MOD 311>; 1606 max-frequency = <200000000>; 1607 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1608 resets = <&cpg 311>; 1609 iommus = <&ipmmu_ds1 35>; 1610 status = "disabled"; 1611 }; 1612 1613 gic: interrupt-controller@f1010000 { 1614 compatible = "arm,gic-400"; 1615 #interrupt-cells = <3>; 1616 #address-cells = <0>; 1617 interrupt-controller; 1618 reg = <0x0 0xf1010000 0 0x1000>, 1619 <0x0 0xf1020000 0 0x20000>, 1620 <0x0 0xf1040000 0 0x20000>, 1621 <0x0 0xf1060000 0 0x20000>; 1622 interrupts = <GIC_PPI 9 1623 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1624 clocks = <&cpg CPG_MOD 408>; 1625 clock-names = "clk"; 1626 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1627 resets = <&cpg 408>; 1628 }; 1629 1630 pciec0: pcie@fe000000 { 1631 compatible = "renesas,pcie-r8a77990", 1632 "renesas,pcie-rcar-gen3"; 1633 reg = <0 0xfe000000 0 0x80000>; 1634 #address-cells = <3>; 1635 #size-cells = <2>; 1636 bus-range = <0x00 0xff>; 1637 device_type = "pci"; 1638 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1639 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1640 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1641 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1642 /* Map all possible DDR as inbound ranges */ 1643 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1644 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1645 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1646 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1647 #interrupt-cells = <1>; 1648 interrupt-map-mask = <0 0 0 0>; 1649 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1650 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1651 clock-names = "pcie", "pcie_bus"; 1652 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1653 resets = <&cpg 319>; 1654 status = "disabled"; 1655 }; 1656 1657 vspb0: vsp@fe960000 { 1658 compatible = "renesas,vsp2"; 1659 reg = <0 0xfe960000 0 0x8000>; 1660 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1661 clocks = <&cpg CPG_MOD 626>; 1662 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1663 resets = <&cpg 626>; 1664 renesas,fcp = <&fcpvb0>; 1665 }; 1666 1667 fcpvb0: fcp@fe96f000 { 1668 compatible = "renesas,fcpv"; 1669 reg = <0 0xfe96f000 0 0x200>; 1670 clocks = <&cpg CPG_MOD 607>; 1671 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1672 resets = <&cpg 607>; 1673 iommus = <&ipmmu_vp0 5>; 1674 }; 1675 1676 vspi0: vsp@fe9a0000 { 1677 compatible = "renesas,vsp2"; 1678 reg = <0 0xfe9a0000 0 0x8000>; 1679 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1680 clocks = <&cpg CPG_MOD 631>; 1681 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1682 resets = <&cpg 631>; 1683 renesas,fcp = <&fcpvi0>; 1684 }; 1685 1686 fcpvi0: fcp@fe9af000 { 1687 compatible = "renesas,fcpv"; 1688 reg = <0 0xfe9af000 0 0x200>; 1689 clocks = <&cpg CPG_MOD 611>; 1690 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1691 resets = <&cpg 611>; 1692 iommus = <&ipmmu_vp0 8>; 1693 }; 1694 1695 vspd0: vsp@fea20000 { 1696 compatible = "renesas,vsp2"; 1697 reg = <0 0xfea20000 0 0x7000>; 1698 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1699 clocks = <&cpg CPG_MOD 623>; 1700 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1701 resets = <&cpg 623>; 1702 renesas,fcp = <&fcpvd0>; 1703 }; 1704 1705 fcpvd0: fcp@fea27000 { 1706 compatible = "renesas,fcpv"; 1707 reg = <0 0xfea27000 0 0x200>; 1708 clocks = <&cpg CPG_MOD 603>; 1709 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1710 resets = <&cpg 603>; 1711 iommus = <&ipmmu_vi0 8>; 1712 }; 1713 1714 vspd1: vsp@fea28000 { 1715 compatible = "renesas,vsp2"; 1716 reg = <0 0xfea28000 0 0x7000>; 1717 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1718 clocks = <&cpg CPG_MOD 622>; 1719 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1720 resets = <&cpg 622>; 1721 renesas,fcp = <&fcpvd1>; 1722 }; 1723 1724 fcpvd1: fcp@fea2f000 { 1725 compatible = "renesas,fcpv"; 1726 reg = <0 0xfea2f000 0 0x200>; 1727 clocks = <&cpg CPG_MOD 602>; 1728 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1729 resets = <&cpg 602>; 1730 iommus = <&ipmmu_vi0 9>; 1731 }; 1732 1733 cmm0: cmm@fea40000 { 1734 compatible = "renesas,r8a77990-cmm", 1735 "renesas,rcar-gen3-cmm"; 1736 reg = <0 0xfea40000 0 0x1000>; 1737 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1738 clocks = <&cpg CPG_MOD 711>; 1739 resets = <&cpg 711>; 1740 }; 1741 1742 cmm1: cmm@fea50000 { 1743 compatible = "renesas,r8a77990-cmm", 1744 "renesas,rcar-gen3-cmm"; 1745 reg = <0 0xfea50000 0 0x1000>; 1746 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1747 clocks = <&cpg CPG_MOD 710>; 1748 resets = <&cpg 710>; 1749 }; 1750 1751 csi40: csi2@feaa0000 { 1752 compatible = "renesas,r8a77990-csi2"; 1753 reg = <0 0xfeaa0000 0 0x10000>; 1754 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1755 clocks = <&cpg CPG_MOD 716>; 1756 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1757 resets = <&cpg 716>; 1758 status = "disabled"; 1759 1760 ports { 1761 #address-cells = <1>; 1762 #size-cells = <0>; 1763 1764 port@1 { 1765 #address-cells = <1>; 1766 #size-cells = <0>; 1767 1768 reg = <1>; 1769 1770 csi40vin4: endpoint@0 { 1771 reg = <0>; 1772 remote-endpoint = <&vin4csi40>; 1773 }; 1774 csi40vin5: endpoint@1 { 1775 reg = <1>; 1776 remote-endpoint = <&vin5csi40>; 1777 }; 1778 }; 1779 }; 1780 }; 1781 1782 du: display@feb00000 { 1783 compatible = "renesas,du-r8a77990"; 1784 reg = <0 0xfeb00000 0 0x40000>; 1785 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1786 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1787 clocks = <&cpg CPG_MOD 724>, 1788 <&cpg CPG_MOD 723>; 1789 clock-names = "du.0", "du.1"; 1790 resets = <&cpg 724>; 1791 reset-names = "du.0"; 1792 1793 renesas,cmms = <&cmm0>, <&cmm1>; 1794 vsps = <&vspd0 0>, <&vspd1 0>; 1795 1796 status = "disabled"; 1797 1798 ports { 1799 #address-cells = <1>; 1800 #size-cells = <0>; 1801 1802 port@0 { 1803 reg = <0>; 1804 du_out_rgb: endpoint { 1805 }; 1806 }; 1807 1808 port@1 { 1809 reg = <1>; 1810 du_out_lvds0: endpoint { 1811 remote-endpoint = <&lvds0_in>; 1812 }; 1813 }; 1814 1815 port@2 { 1816 reg = <2>; 1817 du_out_lvds1: endpoint { 1818 remote-endpoint = <&lvds1_in>; 1819 }; 1820 }; 1821 }; 1822 }; 1823 1824 lvds0: lvds-encoder@feb90000 { 1825 compatible = "renesas,r8a77990-lvds"; 1826 reg = <0 0xfeb90000 0 0x20>; 1827 clocks = <&cpg CPG_MOD 727>; 1828 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1829 resets = <&cpg 727>; 1830 status = "disabled"; 1831 1832 renesas,companion = <&lvds1>; 1833 1834 ports { 1835 #address-cells = <1>; 1836 #size-cells = <0>; 1837 1838 port@0 { 1839 reg = <0>; 1840 lvds0_in: endpoint { 1841 remote-endpoint = <&du_out_lvds0>; 1842 }; 1843 }; 1844 1845 port@1 { 1846 reg = <1>; 1847 lvds0_out: endpoint { 1848 }; 1849 }; 1850 }; 1851 }; 1852 1853 lvds1: lvds-encoder@feb90100 { 1854 compatible = "renesas,r8a77990-lvds"; 1855 reg = <0 0xfeb90100 0 0x20>; 1856 clocks = <&cpg CPG_MOD 727>; 1857 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1858 resets = <&cpg 726>; 1859 status = "disabled"; 1860 1861 ports { 1862 #address-cells = <1>; 1863 #size-cells = <0>; 1864 1865 port@0 { 1866 reg = <0>; 1867 lvds1_in: endpoint { 1868 remote-endpoint = <&du_out_lvds1>; 1869 }; 1870 }; 1871 1872 port@1 { 1873 reg = <1>; 1874 lvds1_out: endpoint { 1875 }; 1876 }; 1877 }; 1878 }; 1879 1880 prr: chipid@fff00044 { 1881 compatible = "renesas,prr"; 1882 reg = <0 0xfff00044 0 4>; 1883 }; 1884 }; 1885 1886 thermal-zones { 1887 cpu-thermal { 1888 polling-delay-passive = <250>; 1889 polling-delay = <0>; 1890 thermal-sensors = <&thermal 0>; 1891 sustainable-power = <717>; 1892 1893 cooling-maps { 1894 map0 { 1895 trip = <&target>; 1896 cooling-device = <&a53_0 0 2>; 1897 contribution = <1024>; 1898 }; 1899 }; 1900 1901 trips { 1902 sensor1_crit: sensor1-crit { 1903 temperature = <120000>; 1904 hysteresis = <2000>; 1905 type = "critical"; 1906 }; 1907 1908 target: trip-point1 { 1909 temperature = <100000>; 1910 hysteresis = <2000>; 1911 type = "passive"; 1912 }; 1913 }; 1914 }; 1915 }; 1916 1917 timer { 1918 compatible = "arm,armv8-timer"; 1919 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1920 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1921 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1922 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1923 }; 1924}; 1925