1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 /* External CAN clock - to be overridden by boards that provide it */ 52 can_clk: can { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 cpus { 59 #address-cells = <1>; 60 #size-cells = <0>; 61 62 a53_0: cpu@0 { 63 compatible = "arm,cortex-a53", "arm,armv8"; 64 reg = <0>; 65 device_type = "cpu"; 66 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 67 next-level-cache = <&L2_CA53>; 68 enable-method = "psci"; 69 }; 70 71 a53_1: cpu@1 { 72 compatible = "arm,cortex-a53", "arm,armv8"; 73 reg = <1>; 74 device_type = "cpu"; 75 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 76 next-level-cache = <&L2_CA53>; 77 enable-method = "psci"; 78 }; 79 80 L2_CA53: cache-controller-0 { 81 compatible = "cache"; 82 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 83 cache-unified; 84 cache-level = <2>; 85 }; 86 }; 87 88 extal_clk: extal { 89 compatible = "fixed-clock"; 90 #clock-cells = <0>; 91 /* This value must be overridden by the board */ 92 clock-frequency = <0>; 93 }; 94 95 /* External PCIe clock - can be overridden by the board */ 96 pcie_bus_clk: pcie_bus { 97 compatible = "fixed-clock"; 98 #clock-cells = <0>; 99 clock-frequency = <0>; 100 }; 101 102 pmu_a53 { 103 compatible = "arm,cortex-a53-pmu"; 104 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 105 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 106 interrupt-affinity = <&a53_0>, <&a53_1>; 107 }; 108 109 psci { 110 compatible = "arm,psci-1.0", "arm,psci-0.2"; 111 method = "smc"; 112 }; 113 114 /* External SCIF clock - to be overridden by boards that provide it */ 115 scif_clk: scif { 116 compatible = "fixed-clock"; 117 #clock-cells = <0>; 118 clock-frequency = <0>; 119 }; 120 121 soc: soc { 122 compatible = "simple-bus"; 123 interrupt-parent = <&gic>; 124 #address-cells = <2>; 125 #size-cells = <2>; 126 ranges; 127 128 rwdt: watchdog@e6020000 { 129 compatible = "renesas,r8a77990-wdt", 130 "renesas,rcar-gen3-wdt"; 131 reg = <0 0xe6020000 0 0x0c>; 132 clocks = <&cpg CPG_MOD 402>; 133 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 134 resets = <&cpg 402>; 135 status = "disabled"; 136 }; 137 138 gpio0: gpio@e6050000 { 139 compatible = "renesas,gpio-r8a77990", 140 "renesas,rcar-gen3-gpio"; 141 reg = <0 0xe6050000 0 0x50>; 142 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 143 #gpio-cells = <2>; 144 gpio-controller; 145 gpio-ranges = <&pfc 0 0 18>; 146 #interrupt-cells = <2>; 147 interrupt-controller; 148 clocks = <&cpg CPG_MOD 912>; 149 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 150 resets = <&cpg 912>; 151 }; 152 153 gpio1: gpio@e6051000 { 154 compatible = "renesas,gpio-r8a77990", 155 "renesas,rcar-gen3-gpio"; 156 reg = <0 0xe6051000 0 0x50>; 157 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 158 #gpio-cells = <2>; 159 gpio-controller; 160 gpio-ranges = <&pfc 0 32 23>; 161 #interrupt-cells = <2>; 162 interrupt-controller; 163 clocks = <&cpg CPG_MOD 911>; 164 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 165 resets = <&cpg 911>; 166 }; 167 168 gpio2: gpio@e6052000 { 169 compatible = "renesas,gpio-r8a77990", 170 "renesas,rcar-gen3-gpio"; 171 reg = <0 0xe6052000 0 0x50>; 172 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 173 #gpio-cells = <2>; 174 gpio-controller; 175 gpio-ranges = <&pfc 0 64 26>; 176 #interrupt-cells = <2>; 177 interrupt-controller; 178 clocks = <&cpg CPG_MOD 910>; 179 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 180 resets = <&cpg 910>; 181 }; 182 183 gpio3: gpio@e6053000 { 184 compatible = "renesas,gpio-r8a77990", 185 "renesas,rcar-gen3-gpio"; 186 reg = <0 0xe6053000 0 0x50>; 187 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 188 #gpio-cells = <2>; 189 gpio-controller; 190 gpio-ranges = <&pfc 0 96 16>; 191 #interrupt-cells = <2>; 192 interrupt-controller; 193 clocks = <&cpg CPG_MOD 909>; 194 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 195 resets = <&cpg 909>; 196 }; 197 198 gpio4: gpio@e6054000 { 199 compatible = "renesas,gpio-r8a77990", 200 "renesas,rcar-gen3-gpio"; 201 reg = <0 0xe6054000 0 0x50>; 202 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 203 #gpio-cells = <2>; 204 gpio-controller; 205 gpio-ranges = <&pfc 0 128 11>; 206 #interrupt-cells = <2>; 207 interrupt-controller; 208 clocks = <&cpg CPG_MOD 908>; 209 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 210 resets = <&cpg 908>; 211 }; 212 213 gpio5: gpio@e6055000 { 214 compatible = "renesas,gpio-r8a77990", 215 "renesas,rcar-gen3-gpio"; 216 reg = <0 0xe6055000 0 0x50>; 217 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 218 #gpio-cells = <2>; 219 gpio-controller; 220 gpio-ranges = <&pfc 0 160 20>; 221 #interrupt-cells = <2>; 222 interrupt-controller; 223 clocks = <&cpg CPG_MOD 907>; 224 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 225 resets = <&cpg 907>; 226 }; 227 228 gpio6: gpio@e6055400 { 229 compatible = "renesas,gpio-r8a77990", 230 "renesas,rcar-gen3-gpio"; 231 reg = <0 0xe6055400 0 0x50>; 232 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 233 #gpio-cells = <2>; 234 gpio-controller; 235 gpio-ranges = <&pfc 0 192 18>; 236 #interrupt-cells = <2>; 237 interrupt-controller; 238 clocks = <&cpg CPG_MOD 906>; 239 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 240 resets = <&cpg 906>; 241 }; 242 243 i2c0: i2c@e6500000 { 244 #address-cells = <1>; 245 #size-cells = <0>; 246 compatible = "renesas,i2c-r8a77990", 247 "renesas,rcar-gen3-i2c"; 248 reg = <0 0xe6500000 0 0x40>; 249 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&cpg CPG_MOD 931>; 251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 252 resets = <&cpg 931>; 253 i2c-scl-internal-delay-ns = <110>; 254 status = "disabled"; 255 }; 256 257 i2c1: i2c@e6508000 { 258 #address-cells = <1>; 259 #size-cells = <0>; 260 compatible = "renesas,i2c-r8a77990", 261 "renesas,rcar-gen3-i2c"; 262 reg = <0 0xe6508000 0 0x40>; 263 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 264 clocks = <&cpg CPG_MOD 930>; 265 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 266 resets = <&cpg 930>; 267 i2c-scl-internal-delay-ns = <6>; 268 status = "disabled"; 269 }; 270 271 i2c2: i2c@e6510000 { 272 #address-cells = <1>; 273 #size-cells = <0>; 274 compatible = "renesas,i2c-r8a77990", 275 "renesas,rcar-gen3-i2c"; 276 reg = <0 0xe6510000 0 0x40>; 277 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 278 clocks = <&cpg CPG_MOD 929>; 279 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 280 resets = <&cpg 929>; 281 i2c-scl-internal-delay-ns = <6>; 282 status = "disabled"; 283 }; 284 285 i2c3: i2c@e66d0000 { 286 #address-cells = <1>; 287 #size-cells = <0>; 288 compatible = "renesas,i2c-r8a77990", 289 "renesas,rcar-gen3-i2c"; 290 reg = <0 0xe66d0000 0 0x40>; 291 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 292 clocks = <&cpg CPG_MOD 928>; 293 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 294 resets = <&cpg 928>; 295 i2c-scl-internal-delay-ns = <110>; 296 status = "disabled"; 297 }; 298 299 i2c4: i2c@e66d8000 { 300 #address-cells = <1>; 301 #size-cells = <0>; 302 compatible = "renesas,i2c-r8a77990", 303 "renesas,rcar-gen3-i2c"; 304 reg = <0 0xe66d8000 0 0x40>; 305 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 306 clocks = <&cpg CPG_MOD 927>; 307 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 308 resets = <&cpg 927>; 309 i2c-scl-internal-delay-ns = <6>; 310 status = "disabled"; 311 }; 312 313 i2c5: i2c@e66e0000 { 314 #address-cells = <1>; 315 #size-cells = <0>; 316 compatible = "renesas,i2c-r8a77990", 317 "renesas,rcar-gen3-i2c"; 318 reg = <0 0xe66e0000 0 0x40>; 319 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 320 clocks = <&cpg CPG_MOD 919>; 321 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 322 resets = <&cpg 919>; 323 i2c-scl-internal-delay-ns = <6>; 324 status = "disabled"; 325 }; 326 327 i2c6: i2c@e66e8000 { 328 #address-cells = <1>; 329 #size-cells = <0>; 330 compatible = "renesas,i2c-r8a77990", 331 "renesas,rcar-gen3-i2c"; 332 reg = <0 0xe66e8000 0 0x40>; 333 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 334 clocks = <&cpg CPG_MOD 918>; 335 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 336 resets = <&cpg 918>; 337 i2c-scl-internal-delay-ns = <6>; 338 status = "disabled"; 339 }; 340 341 i2c7: i2c@e6690000 { 342 #address-cells = <1>; 343 #size-cells = <0>; 344 compatible = "renesas,i2c-r8a77990", 345 "renesas,rcar-gen3-i2c"; 346 reg = <0 0xe6690000 0 0x40>; 347 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 348 clocks = <&cpg CPG_MOD 1003>; 349 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 350 resets = <&cpg 1003>; 351 i2c-scl-internal-delay-ns = <6>; 352 status = "disabled"; 353 }; 354 355 pfc: pin-controller@e6060000 { 356 compatible = "renesas,pfc-r8a77990"; 357 reg = <0 0xe6060000 0 0x508>; 358 }; 359 360 i2c_dvfs: i2c@e60b0000 { 361 #address-cells = <1>; 362 #size-cells = <0>; 363 compatible = "renesas,iic-r8a77990"; 364 reg = <0 0xe60b0000 0 0x15>; 365 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 366 clocks = <&cpg CPG_MOD 926>; 367 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 368 resets = <&cpg 926>; 369 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 370 dma-names = "tx", "rx"; 371 status = "disabled"; 372 }; 373 374 cpg: clock-controller@e6150000 { 375 compatible = "renesas,r8a77990-cpg-mssr"; 376 reg = <0 0xe6150000 0 0x1000>; 377 clocks = <&extal_clk>; 378 clock-names = "extal"; 379 #clock-cells = <2>; 380 #power-domain-cells = <0>; 381 #reset-cells = <1>; 382 }; 383 384 rst: reset-controller@e6160000 { 385 compatible = "renesas,r8a77990-rst"; 386 reg = <0 0xe6160000 0 0x0200>; 387 }; 388 389 sysc: system-controller@e6180000 { 390 compatible = "renesas,r8a77990-sysc"; 391 reg = <0 0xe6180000 0 0x0400>; 392 #power-domain-cells = <1>; 393 }; 394 395 intc_ex: interrupt-controller@e61c0000 { 396 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 397 #interrupt-cells = <2>; 398 interrupt-controller; 399 reg = <0 0xe61c0000 0 0x200>; 400 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 401 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 402 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 403 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 404 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 405 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 406 clocks = <&cpg CPG_MOD 407>; 407 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 408 resets = <&cpg 407>; 409 }; 410 411 hscif0: serial@e6540000 { 412 compatible = "renesas,hscif-r8a77990", 413 "renesas,rcar-gen3-hscif", 414 "renesas,hscif"; 415 reg = <0 0xe6540000 0 0x60>; 416 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 417 clocks = <&cpg CPG_MOD 520>, 418 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 419 <&scif_clk>; 420 clock-names = "fck", "brg_int", "scif_clk"; 421 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 422 <&dmac2 0x31>, <&dmac2 0x30>; 423 dma-names = "tx", "rx", "tx", "rx"; 424 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 425 resets = <&cpg 520>; 426 status = "disabled"; 427 }; 428 429 hscif1: serial@e6550000 { 430 compatible = "renesas,hscif-r8a77990", 431 "renesas,rcar-gen3-hscif", 432 "renesas,hscif"; 433 reg = <0 0xe6550000 0 0x60>; 434 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 435 clocks = <&cpg CPG_MOD 519>, 436 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 437 <&scif_clk>; 438 clock-names = "fck", "brg_int", "scif_clk"; 439 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 440 <&dmac2 0x33>, <&dmac2 0x32>; 441 dma-names = "tx", "rx", "tx", "rx"; 442 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 443 resets = <&cpg 519>; 444 status = "disabled"; 445 }; 446 447 hscif2: serial@e6560000 { 448 compatible = "renesas,hscif-r8a77990", 449 "renesas,rcar-gen3-hscif", 450 "renesas,hscif"; 451 reg = <0 0xe6560000 0 0x60>; 452 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 453 clocks = <&cpg CPG_MOD 518>, 454 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 455 <&scif_clk>; 456 clock-names = "fck", "brg_int", "scif_clk"; 457 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 458 <&dmac2 0x35>, <&dmac2 0x34>; 459 dma-names = "tx", "rx", "tx", "rx"; 460 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 461 resets = <&cpg 518>; 462 status = "disabled"; 463 }; 464 465 hscif3: serial@e66a0000 { 466 compatible = "renesas,hscif-r8a77990", 467 "renesas,rcar-gen3-hscif", 468 "renesas,hscif"; 469 reg = <0 0xe66a0000 0 0x60>; 470 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 471 clocks = <&cpg CPG_MOD 517>, 472 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 473 <&scif_clk>; 474 clock-names = "fck", "brg_int", "scif_clk"; 475 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 476 dma-names = "tx", "rx"; 477 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 478 resets = <&cpg 517>; 479 status = "disabled"; 480 }; 481 482 hscif4: serial@e66b0000 { 483 compatible = "renesas,hscif-r8a77990", 484 "renesas,rcar-gen3-hscif", 485 "renesas,hscif"; 486 reg = <0 0xe66b0000 0 0x60>; 487 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 488 clocks = <&cpg CPG_MOD 516>, 489 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 490 <&scif_clk>; 491 clock-names = "fck", "brg_int", "scif_clk"; 492 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 493 dma-names = "tx", "rx"; 494 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 495 resets = <&cpg 516>; 496 status = "disabled"; 497 }; 498 499 hsusb: usb@e6590000 { 500 compatible = "renesas,usbhs-r8a77990", 501 "renesas,rcar-gen3-usbhs"; 502 reg = <0 0xe6590000 0 0x200>; 503 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 504 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 505 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 506 <&usb_dmac1 0>, <&usb_dmac1 1>; 507 dma-names = "ch0", "ch1", "ch2", "ch3"; 508 renesas,buswait = <11>; 509 phys = <&usb2_phy0>; 510 phy-names = "usb"; 511 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 512 resets = <&cpg 704>, <&cpg 703>; 513 status = "disabled"; 514 }; 515 516 usb_dmac0: dma-controller@e65a0000 { 517 compatible = "renesas,r8a77990-usb-dmac", 518 "renesas,usb-dmac"; 519 reg = <0 0xe65a0000 0 0x100>; 520 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 521 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 522 interrupt-names = "ch0", "ch1"; 523 clocks = <&cpg CPG_MOD 330>; 524 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 525 resets = <&cpg 330>; 526 #dma-cells = <1>; 527 dma-channels = <2>; 528 }; 529 530 usb_dmac1: dma-controller@e65b0000 { 531 compatible = "renesas,r8a77990-usb-dmac", 532 "renesas,usb-dmac"; 533 reg = <0 0xe65b0000 0 0x100>; 534 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 535 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 536 interrupt-names = "ch0", "ch1"; 537 clocks = <&cpg CPG_MOD 331>; 538 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 539 resets = <&cpg 331>; 540 #dma-cells = <1>; 541 dma-channels = <2>; 542 }; 543 544 dmac0: dma-controller@e6700000 { 545 compatible = "renesas,dmac-r8a77990", 546 "renesas,rcar-dmac"; 547 reg = <0 0xe6700000 0 0x10000>; 548 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 549 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 550 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 551 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 552 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 553 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 554 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 555 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 556 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 557 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 558 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 559 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 560 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 561 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 562 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 563 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 564 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 565 interrupt-names = "error", 566 "ch0", "ch1", "ch2", "ch3", 567 "ch4", "ch5", "ch6", "ch7", 568 "ch8", "ch9", "ch10", "ch11", 569 "ch12", "ch13", "ch14", "ch15"; 570 clocks = <&cpg CPG_MOD 219>; 571 clock-names = "fck"; 572 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 573 resets = <&cpg 219>; 574 #dma-cells = <1>; 575 dma-channels = <16>; 576 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 577 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 578 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 579 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 580 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 581 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 582 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 583 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 584 }; 585 586 dmac1: dma-controller@e7300000 { 587 compatible = "renesas,dmac-r8a77990", 588 "renesas,rcar-dmac"; 589 reg = <0 0xe7300000 0 0x10000>; 590 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 591 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 592 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 593 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 594 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 595 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 596 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 597 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 598 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 599 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 600 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 601 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 602 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 603 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 604 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 605 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 606 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 607 interrupt-names = "error", 608 "ch0", "ch1", "ch2", "ch3", 609 "ch4", "ch5", "ch6", "ch7", 610 "ch8", "ch9", "ch10", "ch11", 611 "ch12", "ch13", "ch14", "ch15"; 612 clocks = <&cpg CPG_MOD 218>; 613 clock-names = "fck"; 614 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 615 resets = <&cpg 218>; 616 #dma-cells = <1>; 617 dma-channels = <16>; 618 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 619 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 620 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 621 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 622 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 623 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 624 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 625 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 626 }; 627 628 dmac2: dma-controller@e7310000 { 629 compatible = "renesas,dmac-r8a77990", 630 "renesas,rcar-dmac"; 631 reg = <0 0xe7310000 0 0x10000>; 632 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 633 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 634 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 635 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 636 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 637 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 638 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 639 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 640 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 641 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 642 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 643 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 644 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 645 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 646 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 647 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 648 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 649 interrupt-names = "error", 650 "ch0", "ch1", "ch2", "ch3", 651 "ch4", "ch5", "ch6", "ch7", 652 "ch8", "ch9", "ch10", "ch11", 653 "ch12", "ch13", "ch14", "ch15"; 654 clocks = <&cpg CPG_MOD 217>; 655 clock-names = "fck"; 656 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 657 resets = <&cpg 217>; 658 #dma-cells = <1>; 659 dma-channels = <16>; 660 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 661 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 662 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 663 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 664 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 665 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 666 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 667 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 668 }; 669 670 ipmmu_ds0: mmu@e6740000 { 671 compatible = "renesas,ipmmu-r8a77990"; 672 reg = <0 0xe6740000 0 0x1000>; 673 renesas,ipmmu-main = <&ipmmu_mm 0>; 674 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 675 #iommu-cells = <1>; 676 }; 677 678 ipmmu_ds1: mmu@e7740000 { 679 compatible = "renesas,ipmmu-r8a77990"; 680 reg = <0 0xe7740000 0 0x1000>; 681 renesas,ipmmu-main = <&ipmmu_mm 1>; 682 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 683 #iommu-cells = <1>; 684 }; 685 686 ipmmu_hc: mmu@e6570000 { 687 compatible = "renesas,ipmmu-r8a77990"; 688 reg = <0 0xe6570000 0 0x1000>; 689 renesas,ipmmu-main = <&ipmmu_mm 2>; 690 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 691 #iommu-cells = <1>; 692 }; 693 694 ipmmu_mm: mmu@e67b0000 { 695 compatible = "renesas,ipmmu-r8a77990"; 696 reg = <0 0xe67b0000 0 0x1000>; 697 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 698 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 699 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 700 #iommu-cells = <1>; 701 }; 702 703 ipmmu_mp: mmu@ec670000 { 704 compatible = "renesas,ipmmu-r8a77990"; 705 reg = <0 0xec670000 0 0x1000>; 706 renesas,ipmmu-main = <&ipmmu_mm 4>; 707 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 708 #iommu-cells = <1>; 709 }; 710 711 ipmmu_pv0: mmu@fd800000 { 712 compatible = "renesas,ipmmu-r8a77990"; 713 reg = <0 0xfd800000 0 0x1000>; 714 renesas,ipmmu-main = <&ipmmu_mm 6>; 715 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 716 #iommu-cells = <1>; 717 }; 718 719 ipmmu_rt: mmu@ffc80000 { 720 compatible = "renesas,ipmmu-r8a77990"; 721 reg = <0 0xffc80000 0 0x1000>; 722 renesas,ipmmu-main = <&ipmmu_mm 10>; 723 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 724 #iommu-cells = <1>; 725 }; 726 727 ipmmu_vc0: mmu@fe6b0000 { 728 compatible = "renesas,ipmmu-r8a77990"; 729 reg = <0 0xfe6b0000 0 0x1000>; 730 renesas,ipmmu-main = <&ipmmu_mm 12>; 731 power-domains = <&sysc R8A77990_PD_A3VC>; 732 #iommu-cells = <1>; 733 }; 734 735 ipmmu_vi0: mmu@febd0000 { 736 compatible = "renesas,ipmmu-r8a77990"; 737 reg = <0 0xfebd0000 0 0x1000>; 738 renesas,ipmmu-main = <&ipmmu_mm 14>; 739 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 740 #iommu-cells = <1>; 741 }; 742 743 ipmmu_vp0: mmu@fe990000 { 744 compatible = "renesas,ipmmu-r8a77990"; 745 reg = <0 0xfe990000 0 0x1000>; 746 renesas,ipmmu-main = <&ipmmu_mm 16>; 747 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 748 #iommu-cells = <1>; 749 }; 750 751 avb: ethernet@e6800000 { 752 compatible = "renesas,etheravb-r8a77990", 753 "renesas,etheravb-rcar-gen3"; 754 reg = <0 0xe6800000 0 0x800>; 755 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 756 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 757 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 760 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 761 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 766 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 768 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 769 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 770 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 771 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 780 interrupt-names = "ch0", "ch1", "ch2", "ch3", 781 "ch4", "ch5", "ch6", "ch7", 782 "ch8", "ch9", "ch10", "ch11", 783 "ch12", "ch13", "ch14", "ch15", 784 "ch16", "ch17", "ch18", "ch19", 785 "ch20", "ch21", "ch22", "ch23", 786 "ch24"; 787 clocks = <&cpg CPG_MOD 812>; 788 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 789 resets = <&cpg 812>; 790 phy-mode = "rgmii"; 791 iommus = <&ipmmu_ds0 16>; 792 #address-cells = <1>; 793 #size-cells = <0>; 794 status = "disabled"; 795 }; 796 797 can0: can@e6c30000 { 798 compatible = "renesas,can-r8a77990", 799 "renesas,rcar-gen3-can"; 800 reg = <0 0xe6c30000 0 0x1000>; 801 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 802 clocks = <&cpg CPG_MOD 916>, 803 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 804 <&can_clk>; 805 clock-names = "clkp1", "clkp2", "can_clk"; 806 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 807 assigned-clock-rates = <40000000>; 808 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 809 resets = <&cpg 916>; 810 status = "disabled"; 811 }; 812 813 can1: can@e6c38000 { 814 compatible = "renesas,can-r8a77990", 815 "renesas,rcar-gen3-can"; 816 reg = <0 0xe6c38000 0 0x1000>; 817 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 818 clocks = <&cpg CPG_MOD 915>, 819 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 820 <&can_clk>; 821 clock-names = "clkp1", "clkp2", "can_clk"; 822 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 823 assigned-clock-rates = <40000000>; 824 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 825 resets = <&cpg 915>; 826 status = "disabled"; 827 }; 828 829 canfd: can@e66c0000 { 830 compatible = "renesas,r8a77990-canfd", 831 "renesas,rcar-gen3-canfd"; 832 reg = <0 0xe66c0000 0 0x8000>; 833 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 835 clocks = <&cpg CPG_MOD 914>, 836 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 837 <&can_clk>; 838 clock-names = "fck", "canfd", "can_clk"; 839 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 840 assigned-clock-rates = <40000000>; 841 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 842 resets = <&cpg 914>; 843 status = "disabled"; 844 845 channel0 { 846 status = "disabled"; 847 }; 848 849 channel1 { 850 status = "disabled"; 851 }; 852 }; 853 854 pwm0: pwm@e6e30000 { 855 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 856 reg = <0 0xe6e30000 0 0x8>; 857 clocks = <&cpg CPG_MOD 523>; 858 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 859 resets = <&cpg 523>; 860 #pwm-cells = <2>; 861 status = "disabled"; 862 }; 863 864 pwm1: pwm@e6e31000 { 865 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 866 reg = <0 0xe6e31000 0 0x8>; 867 clocks = <&cpg CPG_MOD 523>; 868 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 869 resets = <&cpg 523>; 870 #pwm-cells = <2>; 871 status = "disabled"; 872 }; 873 874 pwm2: pwm@e6e32000 { 875 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 876 reg = <0 0xe6e32000 0 0x8>; 877 clocks = <&cpg CPG_MOD 523>; 878 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 879 resets = <&cpg 523>; 880 #pwm-cells = <2>; 881 status = "disabled"; 882 }; 883 884 pwm3: pwm@e6e33000 { 885 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 886 reg = <0 0xe6e33000 0 0x8>; 887 clocks = <&cpg CPG_MOD 523>; 888 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 889 resets = <&cpg 523>; 890 #pwm-cells = <2>; 891 status = "disabled"; 892 }; 893 894 pwm4: pwm@e6e34000 { 895 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 896 reg = <0 0xe6e34000 0 0x8>; 897 clocks = <&cpg CPG_MOD 523>; 898 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 899 resets = <&cpg 523>; 900 #pwm-cells = <2>; 901 status = "disabled"; 902 }; 903 904 pwm5: pwm@e6e35000 { 905 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 906 reg = <0 0xe6e35000 0 0x8>; 907 clocks = <&cpg CPG_MOD 523>; 908 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 909 resets = <&cpg 523>; 910 #pwm-cells = <2>; 911 status = "disabled"; 912 }; 913 914 pwm6: pwm@e6e36000 { 915 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 916 reg = <0 0xe6e36000 0 0x8>; 917 clocks = <&cpg CPG_MOD 523>; 918 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 919 resets = <&cpg 523>; 920 #pwm-cells = <2>; 921 status = "disabled"; 922 }; 923 924 scif0: serial@e6e60000 { 925 compatible = "renesas,scif-r8a77990", 926 "renesas,rcar-gen3-scif", "renesas,scif"; 927 reg = <0 0xe6e60000 0 64>; 928 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 929 clocks = <&cpg CPG_MOD 207>, 930 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 931 <&scif_clk>; 932 clock-names = "fck", "brg_int", "scif_clk"; 933 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 934 <&dmac2 0x51>, <&dmac2 0x50>; 935 dma-names = "tx", "rx", "tx", "rx"; 936 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 937 resets = <&cpg 207>; 938 status = "disabled"; 939 }; 940 941 scif1: serial@e6e68000 { 942 compatible = "renesas,scif-r8a77990", 943 "renesas,rcar-gen3-scif", "renesas,scif"; 944 reg = <0 0xe6e68000 0 64>; 945 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 946 clocks = <&cpg CPG_MOD 206>, 947 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 948 <&scif_clk>; 949 clock-names = "fck", "brg_int", "scif_clk"; 950 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 951 <&dmac2 0x53>, <&dmac2 0x52>; 952 dma-names = "tx", "rx", "tx", "rx"; 953 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 954 resets = <&cpg 206>; 955 status = "disabled"; 956 }; 957 958 scif2: serial@e6e88000 { 959 compatible = "renesas,scif-r8a77990", 960 "renesas,rcar-gen3-scif", "renesas,scif"; 961 reg = <0 0xe6e88000 0 64>; 962 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 963 clocks = <&cpg CPG_MOD 310>, 964 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 965 <&scif_clk>; 966 clock-names = "fck", "brg_int", "scif_clk"; 967 968 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 969 resets = <&cpg 310>; 970 status = "disabled"; 971 }; 972 973 scif3: serial@e6c50000 { 974 compatible = "renesas,scif-r8a77990", 975 "renesas,rcar-gen3-scif", "renesas,scif"; 976 reg = <0 0xe6c50000 0 64>; 977 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 978 clocks = <&cpg CPG_MOD 204>, 979 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 980 <&scif_clk>; 981 clock-names = "fck", "brg_int", "scif_clk"; 982 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 983 dma-names = "tx", "rx"; 984 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 985 resets = <&cpg 204>; 986 status = "disabled"; 987 }; 988 989 scif4: serial@e6c40000 { 990 compatible = "renesas,scif-r8a77990", 991 "renesas,rcar-gen3-scif", "renesas,scif"; 992 reg = <0 0xe6c40000 0 64>; 993 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 994 clocks = <&cpg CPG_MOD 203>, 995 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 996 <&scif_clk>; 997 clock-names = "fck", "brg_int", "scif_clk"; 998 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 999 dma-names = "tx", "rx"; 1000 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1001 resets = <&cpg 203>; 1002 status = "disabled"; 1003 }; 1004 1005 scif5: serial@e6f30000 { 1006 compatible = "renesas,scif-r8a77990", 1007 "renesas,rcar-gen3-scif", "renesas,scif"; 1008 reg = <0 0xe6f30000 0 64>; 1009 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1010 clocks = <&cpg CPG_MOD 202>, 1011 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1012 <&scif_clk>; 1013 clock-names = "fck", "brg_int", "scif_clk"; 1014 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1015 <&dmac2 0x5b>, <&dmac2 0x5a>; 1016 dma-names = "tx", "rx", "tx", "rx"; 1017 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1018 resets = <&cpg 202>; 1019 status = "disabled"; 1020 }; 1021 1022 msiof0: spi@e6e90000 { 1023 compatible = "renesas,msiof-r8a77990", 1024 "renesas,rcar-gen3-msiof"; 1025 reg = <0 0xe6e90000 0 0x0064>; 1026 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1027 clocks = <&cpg CPG_MOD 211>; 1028 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1029 <&dmac2 0x41>, <&dmac2 0x40>; 1030 dma-names = "tx", "rx", "tx", "rx"; 1031 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1032 resets = <&cpg 211>; 1033 #address-cells = <1>; 1034 #size-cells = <0>; 1035 status = "disabled"; 1036 }; 1037 1038 msiof1: spi@e6ea0000 { 1039 compatible = "renesas,msiof-r8a77990", 1040 "renesas,rcar-gen3-msiof"; 1041 reg = <0 0xe6ea0000 0 0x0064>; 1042 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1043 clocks = <&cpg CPG_MOD 210>; 1044 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1045 <&dmac2 0x43>, <&dmac2 0x42>; 1046 dma-names = "tx", "rx", "tx", "rx"; 1047 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1048 resets = <&cpg 210>; 1049 #address-cells = <1>; 1050 #size-cells = <0>; 1051 status = "disabled"; 1052 }; 1053 1054 msiof2: spi@e6c00000 { 1055 compatible = "renesas,msiof-r8a77990", 1056 "renesas,rcar-gen3-msiof"; 1057 reg = <0 0xe6c00000 0 0x0064>; 1058 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1059 clocks = <&cpg CPG_MOD 209>; 1060 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1061 dma-names = "tx", "rx"; 1062 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1063 resets = <&cpg 209>; 1064 #address-cells = <1>; 1065 #size-cells = <0>; 1066 status = "disabled"; 1067 }; 1068 1069 msiof3: spi@e6c10000 { 1070 compatible = "renesas,msiof-r8a77990", 1071 "renesas,rcar-gen3-msiof"; 1072 reg = <0 0xe6c10000 0 0x0064>; 1073 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1074 clocks = <&cpg CPG_MOD 208>; 1075 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1076 dma-names = "tx", "rx"; 1077 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1078 resets = <&cpg 208>; 1079 #address-cells = <1>; 1080 #size-cells = <0>; 1081 status = "disabled"; 1082 }; 1083 1084 vin4: video@e6ef4000 { 1085 compatible = "renesas,vin-r8a77990"; 1086 reg = <0 0xe6ef4000 0 0x1000>; 1087 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1088 clocks = <&cpg CPG_MOD 807>; 1089 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1090 resets = <&cpg 807>; 1091 renesas,id = <4>; 1092 status = "disabled"; 1093 1094 ports { 1095 #address-cells = <1>; 1096 #size-cells = <0>; 1097 1098 port@1 { 1099 #address-cells = <1>; 1100 #size-cells = <0>; 1101 1102 reg = <1>; 1103 1104 vin4csi40: endpoint@2 { 1105 reg = <2>; 1106 remote-endpoint= <&csi40vin4>; 1107 }; 1108 }; 1109 }; 1110 }; 1111 1112 vin5: video@e6ef5000 { 1113 compatible = "renesas,vin-r8a77990"; 1114 reg = <0 0xe6ef5000 0 0x1000>; 1115 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1116 clocks = <&cpg CPG_MOD 806>; 1117 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1118 resets = <&cpg 806>; 1119 renesas,id = <5>; 1120 status = "disabled"; 1121 1122 ports { 1123 #address-cells = <1>; 1124 #size-cells = <0>; 1125 1126 port@1 { 1127 #address-cells = <1>; 1128 #size-cells = <0>; 1129 1130 reg = <1>; 1131 1132 vin5csi40: endpoint@2 { 1133 reg = <2>; 1134 remote-endpoint= <&csi40vin5>; 1135 }; 1136 }; 1137 }; 1138 }; 1139 1140 rcar_sound: sound@ec500000 { 1141 /* 1142 * #sound-dai-cells is required 1143 * 1144 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1145 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1146 */ 1147 /* 1148 * #clock-cells is required for audio_clkout0/1/2/3 1149 * 1150 * clkout : #clock-cells = <0>; <&rcar_sound>; 1151 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1152 */ 1153 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1154 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1155 <0 0xec5a0000 0 0x100>, /* ADG */ 1156 <0 0xec540000 0 0x1000>, /* SSIU */ 1157 <0 0xec541000 0 0x280>, /* SSI */ 1158 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1159 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1160 1161 clocks = <&cpg CPG_MOD 1005>, 1162 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1163 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1164 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1165 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1166 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1167 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1168 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1169 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1170 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1171 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1172 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1173 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1174 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1175 <&audio_clk_a>, <&audio_clk_b>, 1176 <&audio_clk_c>, 1177 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1178 clock-names = "ssi-all", 1179 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1180 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1181 "ssi.1", "ssi.0", 1182 "src.9", "src.8", "src.7", "src.6", 1183 "src.5", "src.4", "src.3", "src.2", 1184 "src.1", "src.0", 1185 "mix.1", "mix.0", 1186 "ctu.1", "ctu.0", 1187 "dvc.0", "dvc.1", 1188 "clk_a", "clk_b", "clk_c", "clk_i"; 1189 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1190 resets = <&cpg 1005>, 1191 <&cpg 1006>, <&cpg 1007>, 1192 <&cpg 1008>, <&cpg 1009>, 1193 <&cpg 1010>, <&cpg 1011>, 1194 <&cpg 1012>, <&cpg 1013>, 1195 <&cpg 1014>, <&cpg 1015>; 1196 reset-names = "ssi-all", 1197 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1198 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1199 "ssi.1", "ssi.0"; 1200 status = "disabled"; 1201 1202 rcar_sound,dvc { 1203 dvc0: dvc-0 { 1204 dmas = <&audma0 0xbc>; 1205 dma-names = "tx"; 1206 }; 1207 dvc1: dvc-1 { 1208 dmas = <&audma0 0xbe>; 1209 dma-names = "tx"; 1210 }; 1211 }; 1212 1213 rcar_sound,mix { 1214 mix0: mix-0 { }; 1215 mix1: mix-1 { }; 1216 }; 1217 1218 rcar_sound,ctu { 1219 ctu00: ctu-0 { }; 1220 ctu01: ctu-1 { }; 1221 ctu02: ctu-2 { }; 1222 ctu03: ctu-3 { }; 1223 ctu10: ctu-4 { }; 1224 ctu11: ctu-5 { }; 1225 ctu12: ctu-6 { }; 1226 ctu13: ctu-7 { }; 1227 }; 1228 1229 rcar_sound,src { 1230 src0: src-0 { 1231 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1232 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1233 dma-names = "rx", "tx"; 1234 }; 1235 src1: src-1 { 1236 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1237 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1238 dma-names = "rx", "tx"; 1239 }; 1240 src2: src-2 { 1241 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1242 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1243 dma-names = "rx", "tx"; 1244 }; 1245 src3: src-3 { 1246 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1247 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1248 dma-names = "rx", "tx"; 1249 }; 1250 src4: src-4 { 1251 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1252 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1253 dma-names = "rx", "tx"; 1254 }; 1255 src5: src-5 { 1256 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1257 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1258 dma-names = "rx", "tx"; 1259 }; 1260 src6: src-6 { 1261 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1262 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1263 dma-names = "rx", "tx"; 1264 }; 1265 src7: src-7 { 1266 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1267 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1268 dma-names = "rx", "tx"; 1269 }; 1270 src8: src-8 { 1271 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1272 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1273 dma-names = "rx", "tx"; 1274 }; 1275 src9: src-9 { 1276 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1277 dmas = <&audma0 0x97>, <&audma0 0xba>; 1278 dma-names = "rx", "tx"; 1279 }; 1280 }; 1281 1282 rcar_sound,ssi { 1283 ssi0: ssi-0 { 1284 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1285 dmas = <&audma0 0x01>, <&audma0 0x02>, 1286 <&audma0 0x15>, <&audma0 0x16>; 1287 dma-names = "rx", "tx", "rxu", "txu"; 1288 }; 1289 ssi1: ssi-1 { 1290 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1291 dmas = <&audma0 0x03>, <&audma0 0x04>, 1292 <&audma0 0x49>, <&audma0 0x4a>; 1293 dma-names = "rx", "tx", "rxu", "txu"; 1294 }; 1295 ssi2: ssi-2 { 1296 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1297 dmas = <&audma0 0x05>, <&audma0 0x06>, 1298 <&audma0 0x63>, <&audma0 0x64>; 1299 dma-names = "rx", "tx", "rxu", "txu"; 1300 }; 1301 ssi3: ssi-3 { 1302 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1303 dmas = <&audma0 0x07>, <&audma0 0x08>, 1304 <&audma0 0x6f>, <&audma0 0x70>; 1305 dma-names = "rx", "tx", "rxu", "txu"; 1306 }; 1307 ssi4: ssi-4 { 1308 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1309 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1310 <&audma0 0x71>, <&audma0 0x72>; 1311 dma-names = "rx", "tx", "rxu", "txu"; 1312 }; 1313 ssi5: ssi-5 { 1314 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1315 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1316 <&audma0 0x73>, <&audma0 0x74>; 1317 dma-names = "rx", "tx", "rxu", "txu"; 1318 }; 1319 ssi6: ssi-6 { 1320 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1321 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1322 <&audma0 0x75>, <&audma0 0x76>; 1323 dma-names = "rx", "tx", "rxu", "txu"; 1324 }; 1325 ssi7: ssi-7 { 1326 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1327 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1328 <&audma0 0x79>, <&audma0 0x7a>; 1329 dma-names = "rx", "tx", "rxu", "txu"; 1330 }; 1331 ssi8: ssi-8 { 1332 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1333 dmas = <&audma0 0x11>, <&audma0 0x12>, 1334 <&audma0 0x7b>, <&audma0 0x7c>; 1335 dma-names = "rx", "tx", "rxu", "txu"; 1336 }; 1337 ssi9: ssi-9 { 1338 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1339 dmas = <&audma0 0x13>, <&audma0 0x14>, 1340 <&audma0 0x7d>, <&audma0 0x7e>; 1341 dma-names = "rx", "tx", "rxu", "txu"; 1342 }; 1343 }; 1344 }; 1345 1346 audma0: dma-controller@ec700000 { 1347 compatible = "renesas,dmac-r8a77990", 1348 "renesas,rcar-dmac"; 1349 reg = <0 0xec700000 0 0x10000>; 1350 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1351 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1352 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1353 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1354 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1355 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1356 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1357 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1358 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1359 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1360 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1361 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1362 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1363 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1364 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1365 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1366 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1367 interrupt-names = "error", 1368 "ch0", "ch1", "ch2", "ch3", 1369 "ch4", "ch5", "ch6", "ch7", 1370 "ch8", "ch9", "ch10", "ch11", 1371 "ch12", "ch13", "ch14", "ch15"; 1372 clocks = <&cpg CPG_MOD 502>; 1373 clock-names = "fck"; 1374 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1375 resets = <&cpg 502>; 1376 #dma-cells = <1>; 1377 dma-channels = <16>; 1378 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1379 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1380 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1381 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1382 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1383 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1384 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1385 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1386 }; 1387 1388 xhci0: usb@ee000000 { 1389 compatible = "renesas,xhci-r8a77990", 1390 "renesas,rcar-gen3-xhci"; 1391 reg = <0 0xee000000 0 0xc00>; 1392 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1393 clocks = <&cpg CPG_MOD 328>; 1394 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1395 resets = <&cpg 328>; 1396 status = "disabled"; 1397 }; 1398 1399 usb3_peri0: usb@ee020000 { 1400 compatible = "renesas,r8a77990-usb3-peri", 1401 "renesas,rcar-gen3-usb3-peri"; 1402 reg = <0 0xee020000 0 0x400>; 1403 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1404 clocks = <&cpg CPG_MOD 328>; 1405 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1406 resets = <&cpg 328>; 1407 status = "disabled"; 1408 }; 1409 1410 ohci0: usb@ee080000 { 1411 compatible = "generic-ohci"; 1412 reg = <0 0xee080000 0 0x100>; 1413 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1414 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1415 phys = <&usb2_phy0>; 1416 phy-names = "usb"; 1417 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1418 resets = <&cpg 703>, <&cpg 704>; 1419 status = "disabled"; 1420 }; 1421 1422 ehci0: usb@ee080100 { 1423 compatible = "generic-ehci"; 1424 reg = <0 0xee080100 0 0x100>; 1425 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1426 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1427 phys = <&usb2_phy0>; 1428 phy-names = "usb"; 1429 companion = <&ohci0>; 1430 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1431 resets = <&cpg 703>, <&cpg 704>; 1432 status = "disabled"; 1433 }; 1434 1435 usb2_phy0: usb-phy@ee080200 { 1436 compatible = "renesas,usb2-phy-r8a77990", 1437 "renesas,rcar-gen3-usb2-phy"; 1438 reg = <0 0xee080200 0 0x700>; 1439 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1440 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1441 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1442 resets = <&cpg 703>, <&cpg 704>; 1443 #phy-cells = <0>; 1444 status = "disabled"; 1445 }; 1446 1447 sdhi0: sd@ee100000 { 1448 compatible = "renesas,sdhi-r8a77990", 1449 "renesas,rcar-gen3-sdhi"; 1450 reg = <0 0xee100000 0 0x2000>; 1451 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1452 clocks = <&cpg CPG_MOD 314>; 1453 max-frequency = <200000000>; 1454 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1455 resets = <&cpg 314>; 1456 status = "disabled"; 1457 }; 1458 1459 sdhi1: sd@ee120000 { 1460 compatible = "renesas,sdhi-r8a77990", 1461 "renesas,rcar-gen3-sdhi"; 1462 reg = <0 0xee120000 0 0x2000>; 1463 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1464 clocks = <&cpg CPG_MOD 313>; 1465 max-frequency = <200000000>; 1466 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1467 resets = <&cpg 313>; 1468 status = "disabled"; 1469 }; 1470 1471 sdhi3: sd@ee160000 { 1472 compatible = "renesas,sdhi-r8a77990", 1473 "renesas,rcar-gen3-sdhi"; 1474 reg = <0 0xee160000 0 0x2000>; 1475 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1476 clocks = <&cpg CPG_MOD 311>; 1477 max-frequency = <200000000>; 1478 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1479 resets = <&cpg 311>; 1480 status = "disabled"; 1481 }; 1482 1483 gic: interrupt-controller@f1010000 { 1484 compatible = "arm,gic-400"; 1485 #interrupt-cells = <3>; 1486 #address-cells = <0>; 1487 interrupt-controller; 1488 reg = <0x0 0xf1010000 0 0x1000>, 1489 <0x0 0xf1020000 0 0x20000>, 1490 <0x0 0xf1040000 0 0x20000>, 1491 <0x0 0xf1060000 0 0x20000>; 1492 interrupts = <GIC_PPI 9 1493 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1494 clocks = <&cpg CPG_MOD 408>; 1495 clock-names = "clk"; 1496 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1497 resets = <&cpg 408>; 1498 }; 1499 1500 vspb0: vsp@fe960000 { 1501 compatible = "renesas,vsp2"; 1502 reg = <0 0xfe960000 0 0x8000>; 1503 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1504 clocks = <&cpg CPG_MOD 626>; 1505 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1506 resets = <&cpg 626>; 1507 renesas,fcp = <&fcpvb0>; 1508 }; 1509 1510 fcpvb0: fcp@fe96f000 { 1511 compatible = "renesas,fcpv"; 1512 reg = <0 0xfe96f000 0 0x200>; 1513 clocks = <&cpg CPG_MOD 607>; 1514 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1515 resets = <&cpg 607>; 1516 iommus = <&ipmmu_vp0 5>; 1517 }; 1518 1519 vspi0: vsp@fe9a0000 { 1520 compatible = "renesas,vsp2"; 1521 reg = <0 0xfe9a0000 0 0x8000>; 1522 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1523 clocks = <&cpg CPG_MOD 631>; 1524 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1525 resets = <&cpg 631>; 1526 renesas,fcp = <&fcpvi0>; 1527 }; 1528 1529 fcpvi0: fcp@fe9af000 { 1530 compatible = "renesas,fcpv"; 1531 reg = <0 0xfe9af000 0 0x200>; 1532 clocks = <&cpg CPG_MOD 611>; 1533 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1534 resets = <&cpg 611>; 1535 iommus = <&ipmmu_vp0 8>; 1536 }; 1537 1538 vspd0: vsp@fea20000 { 1539 compatible = "renesas,vsp2"; 1540 reg = <0 0xfea20000 0 0x7000>; 1541 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1542 clocks = <&cpg CPG_MOD 623>; 1543 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1544 resets = <&cpg 623>; 1545 renesas,fcp = <&fcpvd0>; 1546 }; 1547 1548 fcpvd0: fcp@fea27000 { 1549 compatible = "renesas,fcpv"; 1550 reg = <0 0xfea27000 0 0x200>; 1551 clocks = <&cpg CPG_MOD 603>; 1552 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1553 resets = <&cpg 603>; 1554 iommus = <&ipmmu_vi0 8>; 1555 }; 1556 1557 vspd1: vsp@fea28000 { 1558 compatible = "renesas,vsp2"; 1559 reg = <0 0xfea28000 0 0x7000>; 1560 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1561 clocks = <&cpg CPG_MOD 622>; 1562 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1563 resets = <&cpg 622>; 1564 renesas,fcp = <&fcpvd1>; 1565 }; 1566 1567 fcpvd1: fcp@fea2f000 { 1568 compatible = "renesas,fcpv"; 1569 reg = <0 0xfea2f000 0 0x200>; 1570 clocks = <&cpg CPG_MOD 602>; 1571 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1572 resets = <&cpg 602>; 1573 iommus = <&ipmmu_vi0 9>; 1574 }; 1575 1576 csi40: csi2@feaa0000 { 1577 compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; 1578 reg = <0 0xfeaa0000 0 0x10000>; 1579 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1580 clocks = <&cpg CPG_MOD 716>; 1581 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1582 resets = <&cpg 716>; 1583 status = "disabled"; 1584 1585 ports { 1586 #address-cells = <1>; 1587 #size-cells = <0>; 1588 1589 port@1 { 1590 #address-cells = <1>; 1591 #size-cells = <0>; 1592 1593 reg = <1>; 1594 1595 csi40vin4: endpoint@0 { 1596 reg = <0>; 1597 remote-endpoint = <&vin4csi40>; 1598 }; 1599 csi40vin5: endpoint@1 { 1600 reg = <1>; 1601 remote-endpoint = <&vin5csi40>; 1602 }; 1603 }; 1604 }; 1605 }; 1606 1607 du: display@feb00000 { 1608 compatible = "renesas,du-r8a77990"; 1609 reg = <0 0xfeb00000 0 0x80000>; 1610 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1611 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1612 clocks = <&cpg CPG_MOD 724>, 1613 <&cpg CPG_MOD 723>; 1614 clock-names = "du.0", "du.1"; 1615 vsps = <&vspd0 0 &vspd1 0>; 1616 status = "disabled"; 1617 1618 ports { 1619 #address-cells = <1>; 1620 #size-cells = <0>; 1621 1622 port@0 { 1623 reg = <0>; 1624 du_out_rgb: endpoint { 1625 }; 1626 }; 1627 1628 port@1 { 1629 reg = <1>; 1630 du_out_lvds0: endpoint { 1631 remote-endpoint = <&lvds0_in>; 1632 }; 1633 }; 1634 1635 port@2 { 1636 reg = <2>; 1637 du_out_lvds1: endpoint { 1638 remote-endpoint = <&lvds1_in>; 1639 }; 1640 }; 1641 }; 1642 }; 1643 1644 lvds0: lvds-encoder@feb90000 { 1645 compatible = "renesas,r8a77990-lvds"; 1646 reg = <0 0xfeb90000 0 0x20>; 1647 clocks = <&cpg CPG_MOD 727>; 1648 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1649 resets = <&cpg 727>; 1650 status = "disabled"; 1651 1652 ports { 1653 #address-cells = <1>; 1654 #size-cells = <0>; 1655 1656 port@0 { 1657 reg = <0>; 1658 lvds0_in: endpoint { 1659 remote-endpoint = <&du_out_lvds0>; 1660 }; 1661 }; 1662 1663 port@1 { 1664 reg = <1>; 1665 lvds0_out: endpoint { 1666 }; 1667 }; 1668 }; 1669 }; 1670 1671 lvds1: lvds-encoder@feb90100 { 1672 compatible = "renesas,r8a77990-lvds"; 1673 reg = <0 0xfeb90100 0 0x20>; 1674 clocks = <&cpg CPG_MOD 727>; 1675 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1676 resets = <&cpg 726>; 1677 status = "disabled"; 1678 1679 ports { 1680 #address-cells = <1>; 1681 #size-cells = <0>; 1682 1683 port@0 { 1684 reg = <0>; 1685 lvds1_in: endpoint { 1686 remote-endpoint = <&du_out_lvds1>; 1687 }; 1688 }; 1689 1690 port@1 { 1691 reg = <1>; 1692 lvds1_out: endpoint { 1693 }; 1694 }; 1695 }; 1696 }; 1697 1698 pciec0: pcie@fe000000 { 1699 compatible = "renesas,pcie-r8a77990", 1700 "renesas,pcie-rcar-gen3"; 1701 reg = <0 0xfe000000 0 0x80000>; 1702 #address-cells = <3>; 1703 #size-cells = <2>; 1704 bus-range = <0x00 0xff>; 1705 device_type = "pci"; 1706 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1707 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1708 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1709 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1710 /* Map all possible DDR as inbound ranges */ 1711 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1712 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1713 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1714 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1715 #interrupt-cells = <1>; 1716 interrupt-map-mask = <0 0 0 0>; 1717 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1718 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1719 clock-names = "pcie", "pcie_bus"; 1720 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1721 resets = <&cpg 319>; 1722 status = "disabled"; 1723 }; 1724 1725 prr: chipid@fff00044 { 1726 compatible = "renesas,prr"; 1727 reg = <0 0xfff00044 0 4>; 1728 }; 1729 }; 1730 1731 timer { 1732 compatible = "arm,armv8-timer"; 1733 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1734 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1735 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1736 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1737 }; 1738}; 1739