1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 /* External CAN clock - to be overridden by boards that provide it */ 52 can_clk: can { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 cpus { 59 #address-cells = <1>; 60 #size-cells = <0>; 61 62 a53_0: cpu@0 { 63 compatible = "arm,cortex-a53", "arm,armv8"; 64 reg = <0>; 65 device_type = "cpu"; 66 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 67 next-level-cache = <&L2_CA53>; 68 enable-method = "psci"; 69 }; 70 71 a53_1: cpu@1 { 72 compatible = "arm,cortex-a53", "arm,armv8"; 73 reg = <1>; 74 device_type = "cpu"; 75 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 76 next-level-cache = <&L2_CA53>; 77 enable-method = "psci"; 78 }; 79 80 L2_CA53: cache-controller-0 { 81 compatible = "cache"; 82 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 83 cache-unified; 84 cache-level = <2>; 85 }; 86 }; 87 88 extal_clk: extal { 89 compatible = "fixed-clock"; 90 #clock-cells = <0>; 91 /* This value must be overridden by the board */ 92 clock-frequency = <0>; 93 }; 94 95 /* External PCIe clock - can be overridden by the board */ 96 pcie_bus_clk: pcie_bus { 97 compatible = "fixed-clock"; 98 #clock-cells = <0>; 99 clock-frequency = <0>; 100 }; 101 102 pmu_a53 { 103 compatible = "arm,cortex-a53-pmu"; 104 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 105 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 106 interrupt-affinity = <&a53_0>, <&a53_1>; 107 }; 108 109 psci { 110 compatible = "arm,psci-1.0", "arm,psci-0.2"; 111 method = "smc"; 112 }; 113 114 /* External SCIF clock - to be overridden by boards that provide it */ 115 scif_clk: scif { 116 compatible = "fixed-clock"; 117 #clock-cells = <0>; 118 clock-frequency = <0>; 119 }; 120 121 soc: soc { 122 compatible = "simple-bus"; 123 interrupt-parent = <&gic>; 124 #address-cells = <2>; 125 #size-cells = <2>; 126 ranges; 127 128 rwdt: watchdog@e6020000 { 129 compatible = "renesas,r8a77990-wdt", 130 "renesas,rcar-gen3-wdt"; 131 reg = <0 0xe6020000 0 0x0c>; 132 clocks = <&cpg CPG_MOD 402>; 133 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 134 resets = <&cpg 402>; 135 status = "disabled"; 136 }; 137 138 gpio0: gpio@e6050000 { 139 compatible = "renesas,gpio-r8a77990", 140 "renesas,rcar-gen3-gpio"; 141 reg = <0 0xe6050000 0 0x50>; 142 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 143 #gpio-cells = <2>; 144 gpio-controller; 145 gpio-ranges = <&pfc 0 0 18>; 146 #interrupt-cells = <2>; 147 interrupt-controller; 148 clocks = <&cpg CPG_MOD 912>; 149 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 150 resets = <&cpg 912>; 151 }; 152 153 gpio1: gpio@e6051000 { 154 compatible = "renesas,gpio-r8a77990", 155 "renesas,rcar-gen3-gpio"; 156 reg = <0 0xe6051000 0 0x50>; 157 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 158 #gpio-cells = <2>; 159 gpio-controller; 160 gpio-ranges = <&pfc 0 32 23>; 161 #interrupt-cells = <2>; 162 interrupt-controller; 163 clocks = <&cpg CPG_MOD 911>; 164 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 165 resets = <&cpg 911>; 166 }; 167 168 gpio2: gpio@e6052000 { 169 compatible = "renesas,gpio-r8a77990", 170 "renesas,rcar-gen3-gpio"; 171 reg = <0 0xe6052000 0 0x50>; 172 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 173 #gpio-cells = <2>; 174 gpio-controller; 175 gpio-ranges = <&pfc 0 64 26>; 176 #interrupt-cells = <2>; 177 interrupt-controller; 178 clocks = <&cpg CPG_MOD 910>; 179 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 180 resets = <&cpg 910>; 181 }; 182 183 gpio3: gpio@e6053000 { 184 compatible = "renesas,gpio-r8a77990", 185 "renesas,rcar-gen3-gpio"; 186 reg = <0 0xe6053000 0 0x50>; 187 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 188 #gpio-cells = <2>; 189 gpio-controller; 190 gpio-ranges = <&pfc 0 96 16>; 191 #interrupt-cells = <2>; 192 interrupt-controller; 193 clocks = <&cpg CPG_MOD 909>; 194 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 195 resets = <&cpg 909>; 196 }; 197 198 gpio4: gpio@e6054000 { 199 compatible = "renesas,gpio-r8a77990", 200 "renesas,rcar-gen3-gpio"; 201 reg = <0 0xe6054000 0 0x50>; 202 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 203 #gpio-cells = <2>; 204 gpio-controller; 205 gpio-ranges = <&pfc 0 128 11>; 206 #interrupt-cells = <2>; 207 interrupt-controller; 208 clocks = <&cpg CPG_MOD 908>; 209 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 210 resets = <&cpg 908>; 211 }; 212 213 gpio5: gpio@e6055000 { 214 compatible = "renesas,gpio-r8a77990", 215 "renesas,rcar-gen3-gpio"; 216 reg = <0 0xe6055000 0 0x50>; 217 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 218 #gpio-cells = <2>; 219 gpio-controller; 220 gpio-ranges = <&pfc 0 160 20>; 221 #interrupt-cells = <2>; 222 interrupt-controller; 223 clocks = <&cpg CPG_MOD 907>; 224 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 225 resets = <&cpg 907>; 226 }; 227 228 gpio6: gpio@e6055400 { 229 compatible = "renesas,gpio-r8a77990", 230 "renesas,rcar-gen3-gpio"; 231 reg = <0 0xe6055400 0 0x50>; 232 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 233 #gpio-cells = <2>; 234 gpio-controller; 235 gpio-ranges = <&pfc 0 192 18>; 236 #interrupt-cells = <2>; 237 interrupt-controller; 238 clocks = <&cpg CPG_MOD 906>; 239 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 240 resets = <&cpg 906>; 241 }; 242 243 i2c0: i2c@e6500000 { 244 #address-cells = <1>; 245 #size-cells = <0>; 246 compatible = "renesas,i2c-r8a77990", 247 "renesas,rcar-gen3-i2c"; 248 reg = <0 0xe6500000 0 0x40>; 249 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 250 clocks = <&cpg CPG_MOD 931>; 251 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 252 resets = <&cpg 931>; 253 i2c-scl-internal-delay-ns = <110>; 254 status = "disabled"; 255 }; 256 257 i2c1: i2c@e6508000 { 258 #address-cells = <1>; 259 #size-cells = <0>; 260 compatible = "renesas,i2c-r8a77990", 261 "renesas,rcar-gen3-i2c"; 262 reg = <0 0xe6508000 0 0x40>; 263 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 264 clocks = <&cpg CPG_MOD 930>; 265 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 266 resets = <&cpg 930>; 267 i2c-scl-internal-delay-ns = <6>; 268 status = "disabled"; 269 }; 270 271 i2c2: i2c@e6510000 { 272 #address-cells = <1>; 273 #size-cells = <0>; 274 compatible = "renesas,i2c-r8a77990", 275 "renesas,rcar-gen3-i2c"; 276 reg = <0 0xe6510000 0 0x40>; 277 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 278 clocks = <&cpg CPG_MOD 929>; 279 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 280 resets = <&cpg 929>; 281 i2c-scl-internal-delay-ns = <6>; 282 status = "disabled"; 283 }; 284 285 i2c3: i2c@e66d0000 { 286 #address-cells = <1>; 287 #size-cells = <0>; 288 compatible = "renesas,i2c-r8a77990", 289 "renesas,rcar-gen3-i2c"; 290 reg = <0 0xe66d0000 0 0x40>; 291 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 292 clocks = <&cpg CPG_MOD 928>; 293 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 294 resets = <&cpg 928>; 295 i2c-scl-internal-delay-ns = <110>; 296 status = "disabled"; 297 }; 298 299 i2c4: i2c@e66d8000 { 300 #address-cells = <1>; 301 #size-cells = <0>; 302 compatible = "renesas,i2c-r8a77990", 303 "renesas,rcar-gen3-i2c"; 304 reg = <0 0xe66d8000 0 0x40>; 305 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 306 clocks = <&cpg CPG_MOD 927>; 307 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 308 resets = <&cpg 927>; 309 i2c-scl-internal-delay-ns = <6>; 310 status = "disabled"; 311 }; 312 313 i2c5: i2c@e66e0000 { 314 #address-cells = <1>; 315 #size-cells = <0>; 316 compatible = "renesas,i2c-r8a77990", 317 "renesas,rcar-gen3-i2c"; 318 reg = <0 0xe66e0000 0 0x40>; 319 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 320 clocks = <&cpg CPG_MOD 919>; 321 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 322 resets = <&cpg 919>; 323 i2c-scl-internal-delay-ns = <6>; 324 status = "disabled"; 325 }; 326 327 i2c6: i2c@e66e8000 { 328 #address-cells = <1>; 329 #size-cells = <0>; 330 compatible = "renesas,i2c-r8a77990", 331 "renesas,rcar-gen3-i2c"; 332 reg = <0 0xe66e8000 0 0x40>; 333 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 334 clocks = <&cpg CPG_MOD 918>; 335 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 336 resets = <&cpg 918>; 337 i2c-scl-internal-delay-ns = <6>; 338 status = "disabled"; 339 }; 340 341 i2c7: i2c@e6690000 { 342 #address-cells = <1>; 343 #size-cells = <0>; 344 compatible = "renesas,i2c-r8a77990", 345 "renesas,rcar-gen3-i2c"; 346 reg = <0 0xe6690000 0 0x40>; 347 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 348 clocks = <&cpg CPG_MOD 1003>; 349 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 350 resets = <&cpg 1003>; 351 i2c-scl-internal-delay-ns = <6>; 352 status = "disabled"; 353 }; 354 355 pfc: pin-controller@e6060000 { 356 compatible = "renesas,pfc-r8a77990"; 357 reg = <0 0xe6060000 0 0x508>; 358 }; 359 360 cpg: clock-controller@e6150000 { 361 compatible = "renesas,r8a77990-cpg-mssr"; 362 reg = <0 0xe6150000 0 0x1000>; 363 clocks = <&extal_clk>; 364 clock-names = "extal"; 365 #clock-cells = <2>; 366 #power-domain-cells = <0>; 367 #reset-cells = <1>; 368 }; 369 370 rst: reset-controller@e6160000 { 371 compatible = "renesas,r8a77990-rst"; 372 reg = <0 0xe6160000 0 0x0200>; 373 }; 374 375 sysc: system-controller@e6180000 { 376 compatible = "renesas,r8a77990-sysc"; 377 reg = <0 0xe6180000 0 0x0400>; 378 #power-domain-cells = <1>; 379 }; 380 381 intc_ex: interrupt-controller@e61c0000 { 382 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 383 #interrupt-cells = <2>; 384 interrupt-controller; 385 reg = <0 0xe61c0000 0 0x200>; 386 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 387 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 388 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 389 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 390 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 391 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 392 clocks = <&cpg CPG_MOD 407>; 393 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 394 resets = <&cpg 407>; 395 }; 396 397 hscif0: serial@e6540000 { 398 compatible = "renesas,hscif-r8a77990", 399 "renesas,rcar-gen3-hscif", 400 "renesas,hscif"; 401 reg = <0 0xe6540000 0 0x60>; 402 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 403 clocks = <&cpg CPG_MOD 520>, 404 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 405 <&scif_clk>; 406 clock-names = "fck", "brg_int", "scif_clk"; 407 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 408 <&dmac2 0x31>, <&dmac2 0x30>; 409 dma-names = "tx", "rx", "tx", "rx"; 410 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 411 resets = <&cpg 520>; 412 status = "disabled"; 413 }; 414 415 hscif1: serial@e6550000 { 416 compatible = "renesas,hscif-r8a77990", 417 "renesas,rcar-gen3-hscif", 418 "renesas,hscif"; 419 reg = <0 0xe6550000 0 0x60>; 420 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 421 clocks = <&cpg CPG_MOD 519>, 422 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 423 <&scif_clk>; 424 clock-names = "fck", "brg_int", "scif_clk"; 425 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 426 <&dmac2 0x33>, <&dmac2 0x32>; 427 dma-names = "tx", "rx", "tx", "rx"; 428 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 429 resets = <&cpg 519>; 430 status = "disabled"; 431 }; 432 433 hscif2: serial@e6560000 { 434 compatible = "renesas,hscif-r8a77990", 435 "renesas,rcar-gen3-hscif", 436 "renesas,hscif"; 437 reg = <0 0xe6560000 0 0x60>; 438 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 439 clocks = <&cpg CPG_MOD 518>, 440 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 441 <&scif_clk>; 442 clock-names = "fck", "brg_int", "scif_clk"; 443 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 444 <&dmac2 0x35>, <&dmac2 0x34>; 445 dma-names = "tx", "rx", "tx", "rx"; 446 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 447 resets = <&cpg 518>; 448 status = "disabled"; 449 }; 450 451 hscif3: serial@e66a0000 { 452 compatible = "renesas,hscif-r8a77990", 453 "renesas,rcar-gen3-hscif", 454 "renesas,hscif"; 455 reg = <0 0xe66a0000 0 0x60>; 456 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 457 clocks = <&cpg CPG_MOD 517>, 458 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 459 <&scif_clk>; 460 clock-names = "fck", "brg_int", "scif_clk"; 461 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 462 dma-names = "tx", "rx"; 463 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 464 resets = <&cpg 517>; 465 status = "disabled"; 466 }; 467 468 hscif4: serial@e66b0000 { 469 compatible = "renesas,hscif-r8a77990", 470 "renesas,rcar-gen3-hscif", 471 "renesas,hscif"; 472 reg = <0 0xe66b0000 0 0x60>; 473 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 474 clocks = <&cpg CPG_MOD 516>, 475 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 476 <&scif_clk>; 477 clock-names = "fck", "brg_int", "scif_clk"; 478 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 479 dma-names = "tx", "rx"; 480 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 481 resets = <&cpg 516>; 482 status = "disabled"; 483 }; 484 485 hsusb: usb@e6590000 { 486 compatible = "renesas,usbhs-r8a77990", 487 "renesas,rcar-gen3-usbhs"; 488 reg = <0 0xe6590000 0 0x200>; 489 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 490 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 491 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 492 <&usb_dmac1 0>, <&usb_dmac1 1>; 493 dma-names = "ch0", "ch1", "ch2", "ch3"; 494 renesas,buswait = <11>; 495 phys = <&usb2_phy0>; 496 phy-names = "usb"; 497 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 498 resets = <&cpg 704>, <&cpg 703>; 499 status = "disabled"; 500 }; 501 502 usb_dmac0: dma-controller@e65a0000 { 503 compatible = "renesas,r8a77990-usb-dmac", 504 "renesas,usb-dmac"; 505 reg = <0 0xe65a0000 0 0x100>; 506 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 507 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 508 interrupt-names = "ch0", "ch1"; 509 clocks = <&cpg CPG_MOD 330>; 510 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 511 resets = <&cpg 330>; 512 #dma-cells = <1>; 513 dma-channels = <2>; 514 }; 515 516 usb_dmac1: dma-controller@e65b0000 { 517 compatible = "renesas,r8a77990-usb-dmac", 518 "renesas,usb-dmac"; 519 reg = <0 0xe65b0000 0 0x100>; 520 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 521 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 522 interrupt-names = "ch0", "ch1"; 523 clocks = <&cpg CPG_MOD 331>; 524 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 525 resets = <&cpg 331>; 526 #dma-cells = <1>; 527 dma-channels = <2>; 528 }; 529 530 dmac0: dma-controller@e6700000 { 531 compatible = "renesas,dmac-r8a77990", 532 "renesas,rcar-dmac"; 533 reg = <0 0xe6700000 0 0x10000>; 534 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 535 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 536 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 537 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 538 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 539 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 540 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 541 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 542 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 543 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 544 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 545 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 546 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 547 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 548 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 549 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 550 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 551 interrupt-names = "error", 552 "ch0", "ch1", "ch2", "ch3", 553 "ch4", "ch5", "ch6", "ch7", 554 "ch8", "ch9", "ch10", "ch11", 555 "ch12", "ch13", "ch14", "ch15"; 556 clocks = <&cpg CPG_MOD 219>; 557 clock-names = "fck"; 558 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 559 resets = <&cpg 219>; 560 #dma-cells = <1>; 561 dma-channels = <16>; 562 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 563 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 564 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 565 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 566 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 567 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 568 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 569 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 570 }; 571 572 dmac1: dma-controller@e7300000 { 573 compatible = "renesas,dmac-r8a77990", 574 "renesas,rcar-dmac"; 575 reg = <0 0xe7300000 0 0x10000>; 576 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 577 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 578 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 579 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 580 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 581 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 582 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 583 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 584 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 585 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 586 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 587 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 588 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 589 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 590 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 591 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 592 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 593 interrupt-names = "error", 594 "ch0", "ch1", "ch2", "ch3", 595 "ch4", "ch5", "ch6", "ch7", 596 "ch8", "ch9", "ch10", "ch11", 597 "ch12", "ch13", "ch14", "ch15"; 598 clocks = <&cpg CPG_MOD 218>; 599 clock-names = "fck"; 600 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 601 resets = <&cpg 218>; 602 #dma-cells = <1>; 603 dma-channels = <16>; 604 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 605 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 606 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 607 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 608 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 609 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 610 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 611 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 612 }; 613 614 dmac2: dma-controller@e7310000 { 615 compatible = "renesas,dmac-r8a77990", 616 "renesas,rcar-dmac"; 617 reg = <0 0xe7310000 0 0x10000>; 618 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 619 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 620 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 621 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 622 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 623 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 624 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 625 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 626 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 627 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 628 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 629 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 630 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 631 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 632 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 633 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 634 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 635 interrupt-names = "error", 636 "ch0", "ch1", "ch2", "ch3", 637 "ch4", "ch5", "ch6", "ch7", 638 "ch8", "ch9", "ch10", "ch11", 639 "ch12", "ch13", "ch14", "ch15"; 640 clocks = <&cpg CPG_MOD 217>; 641 clock-names = "fck"; 642 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 643 resets = <&cpg 217>; 644 #dma-cells = <1>; 645 dma-channels = <16>; 646 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 647 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 648 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 649 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 650 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 651 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 652 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 653 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 654 }; 655 656 ipmmu_ds0: mmu@e6740000 { 657 compatible = "renesas,ipmmu-r8a77990"; 658 reg = <0 0xe6740000 0 0x1000>; 659 renesas,ipmmu-main = <&ipmmu_mm 0>; 660 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 661 #iommu-cells = <1>; 662 }; 663 664 ipmmu_ds1: mmu@e7740000 { 665 compatible = "renesas,ipmmu-r8a77990"; 666 reg = <0 0xe7740000 0 0x1000>; 667 renesas,ipmmu-main = <&ipmmu_mm 1>; 668 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 669 #iommu-cells = <1>; 670 }; 671 672 ipmmu_hc: mmu@e6570000 { 673 compatible = "renesas,ipmmu-r8a77990"; 674 reg = <0 0xe6570000 0 0x1000>; 675 renesas,ipmmu-main = <&ipmmu_mm 2>; 676 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 677 #iommu-cells = <1>; 678 }; 679 680 ipmmu_mm: mmu@e67b0000 { 681 compatible = "renesas,ipmmu-r8a77990"; 682 reg = <0 0xe67b0000 0 0x1000>; 683 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 684 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 685 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 686 #iommu-cells = <1>; 687 }; 688 689 ipmmu_mp: mmu@ec670000 { 690 compatible = "renesas,ipmmu-r8a77990"; 691 reg = <0 0xec670000 0 0x1000>; 692 renesas,ipmmu-main = <&ipmmu_mm 4>; 693 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 694 #iommu-cells = <1>; 695 }; 696 697 ipmmu_pv0: mmu@fd800000 { 698 compatible = "renesas,ipmmu-r8a77990"; 699 reg = <0 0xfd800000 0 0x1000>; 700 renesas,ipmmu-main = <&ipmmu_mm 6>; 701 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 702 #iommu-cells = <1>; 703 }; 704 705 ipmmu_rt: mmu@ffc80000 { 706 compatible = "renesas,ipmmu-r8a77990"; 707 reg = <0 0xffc80000 0 0x1000>; 708 renesas,ipmmu-main = <&ipmmu_mm 10>; 709 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 710 #iommu-cells = <1>; 711 }; 712 713 ipmmu_vc0: mmu@fe6b0000 { 714 compatible = "renesas,ipmmu-r8a77990"; 715 reg = <0 0xfe6b0000 0 0x1000>; 716 renesas,ipmmu-main = <&ipmmu_mm 12>; 717 power-domains = <&sysc R8A77990_PD_A3VC>; 718 #iommu-cells = <1>; 719 }; 720 721 ipmmu_vi0: mmu@febd0000 { 722 compatible = "renesas,ipmmu-r8a77990"; 723 reg = <0 0xfebd0000 0 0x1000>; 724 renesas,ipmmu-main = <&ipmmu_mm 14>; 725 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 726 #iommu-cells = <1>; 727 }; 728 729 ipmmu_vp0: mmu@fe990000 { 730 compatible = "renesas,ipmmu-r8a77990"; 731 reg = <0 0xfe990000 0 0x1000>; 732 renesas,ipmmu-main = <&ipmmu_mm 16>; 733 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 734 #iommu-cells = <1>; 735 }; 736 737 avb: ethernet@e6800000 { 738 compatible = "renesas,etheravb-r8a77990", 739 "renesas,etheravb-rcar-gen3"; 740 reg = <0 0xe6800000 0 0x800>; 741 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 742 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 743 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 744 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 745 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 746 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 747 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 748 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 749 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 750 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 751 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 752 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 753 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 754 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 755 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 756 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 757 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 758 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 760 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 761 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 762 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 763 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 764 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 765 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 766 interrupt-names = "ch0", "ch1", "ch2", "ch3", 767 "ch4", "ch5", "ch6", "ch7", 768 "ch8", "ch9", "ch10", "ch11", 769 "ch12", "ch13", "ch14", "ch15", 770 "ch16", "ch17", "ch18", "ch19", 771 "ch20", "ch21", "ch22", "ch23", 772 "ch24"; 773 clocks = <&cpg CPG_MOD 812>; 774 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 775 resets = <&cpg 812>; 776 phy-mode = "rgmii"; 777 iommus = <&ipmmu_ds0 16>; 778 #address-cells = <1>; 779 #size-cells = <0>; 780 status = "disabled"; 781 }; 782 783 can0: can@e6c30000 { 784 compatible = "renesas,can-r8a77990", 785 "renesas,rcar-gen3-can"; 786 reg = <0 0xe6c30000 0 0x1000>; 787 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 788 clocks = <&cpg CPG_MOD 916>, 789 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 790 <&can_clk>; 791 clock-names = "clkp1", "clkp2", "can_clk"; 792 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 793 assigned-clock-rates = <40000000>; 794 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 795 resets = <&cpg 916>; 796 status = "disabled"; 797 }; 798 799 can1: can@e6c38000 { 800 compatible = "renesas,can-r8a77990", 801 "renesas,rcar-gen3-can"; 802 reg = <0 0xe6c38000 0 0x1000>; 803 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 804 clocks = <&cpg CPG_MOD 915>, 805 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 806 <&can_clk>; 807 clock-names = "clkp1", "clkp2", "can_clk"; 808 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 809 assigned-clock-rates = <40000000>; 810 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 811 resets = <&cpg 915>; 812 status = "disabled"; 813 }; 814 815 canfd: can@e66c0000 { 816 compatible = "renesas,r8a77990-canfd", 817 "renesas,rcar-gen3-canfd"; 818 reg = <0 0xe66c0000 0 0x8000>; 819 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 821 clocks = <&cpg CPG_MOD 914>, 822 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 823 <&can_clk>; 824 clock-names = "fck", "canfd", "can_clk"; 825 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 826 assigned-clock-rates = <40000000>; 827 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 828 resets = <&cpg 914>; 829 status = "disabled"; 830 831 channel0 { 832 status = "disabled"; 833 }; 834 835 channel1 { 836 status = "disabled"; 837 }; 838 }; 839 840 pwm0: pwm@e6e30000 { 841 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 842 reg = <0 0xe6e30000 0 0x8>; 843 clocks = <&cpg CPG_MOD 523>; 844 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 845 resets = <&cpg 523>; 846 #pwm-cells = <2>; 847 status = "disabled"; 848 }; 849 850 pwm1: pwm@e6e31000 { 851 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 852 reg = <0 0xe6e31000 0 0x8>; 853 clocks = <&cpg CPG_MOD 523>; 854 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 855 resets = <&cpg 523>; 856 #pwm-cells = <2>; 857 status = "disabled"; 858 }; 859 860 pwm2: pwm@e6e32000 { 861 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 862 reg = <0 0xe6e32000 0 0x8>; 863 clocks = <&cpg CPG_MOD 523>; 864 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 865 resets = <&cpg 523>; 866 #pwm-cells = <2>; 867 status = "disabled"; 868 }; 869 870 pwm3: pwm@e6e33000 { 871 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 872 reg = <0 0xe6e33000 0 0x8>; 873 clocks = <&cpg CPG_MOD 523>; 874 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 875 resets = <&cpg 523>; 876 #pwm-cells = <2>; 877 status = "disabled"; 878 }; 879 880 pwm4: pwm@e6e34000 { 881 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 882 reg = <0 0xe6e34000 0 0x8>; 883 clocks = <&cpg CPG_MOD 523>; 884 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 885 resets = <&cpg 523>; 886 #pwm-cells = <2>; 887 status = "disabled"; 888 }; 889 890 pwm5: pwm@e6e35000 { 891 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 892 reg = <0 0xe6e35000 0 0x8>; 893 clocks = <&cpg CPG_MOD 523>; 894 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 895 resets = <&cpg 523>; 896 #pwm-cells = <2>; 897 status = "disabled"; 898 }; 899 900 pwm6: pwm@e6e36000 { 901 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 902 reg = <0 0xe6e36000 0 0x8>; 903 clocks = <&cpg CPG_MOD 523>; 904 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 905 resets = <&cpg 523>; 906 #pwm-cells = <2>; 907 status = "disabled"; 908 }; 909 910 scif0: serial@e6e60000 { 911 compatible = "renesas,scif-r8a77990", 912 "renesas,rcar-gen3-scif", "renesas,scif"; 913 reg = <0 0xe6e60000 0 64>; 914 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 915 clocks = <&cpg CPG_MOD 207>, 916 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 917 <&scif_clk>; 918 clock-names = "fck", "brg_int", "scif_clk"; 919 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 920 <&dmac2 0x51>, <&dmac2 0x50>; 921 dma-names = "tx", "rx", "tx", "rx"; 922 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 923 resets = <&cpg 207>; 924 status = "disabled"; 925 }; 926 927 scif1: serial@e6e68000 { 928 compatible = "renesas,scif-r8a77990", 929 "renesas,rcar-gen3-scif", "renesas,scif"; 930 reg = <0 0xe6e68000 0 64>; 931 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 932 clocks = <&cpg CPG_MOD 206>, 933 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 934 <&scif_clk>; 935 clock-names = "fck", "brg_int", "scif_clk"; 936 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 937 <&dmac2 0x53>, <&dmac2 0x52>; 938 dma-names = "tx", "rx", "tx", "rx"; 939 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 940 resets = <&cpg 206>; 941 status = "disabled"; 942 }; 943 944 scif2: serial@e6e88000 { 945 compatible = "renesas,scif-r8a77990", 946 "renesas,rcar-gen3-scif", "renesas,scif"; 947 reg = <0 0xe6e88000 0 64>; 948 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 949 clocks = <&cpg CPG_MOD 310>, 950 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 951 <&scif_clk>; 952 clock-names = "fck", "brg_int", "scif_clk"; 953 954 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 955 resets = <&cpg 310>; 956 status = "disabled"; 957 }; 958 959 scif3: serial@e6c50000 { 960 compatible = "renesas,scif-r8a77990", 961 "renesas,rcar-gen3-scif", "renesas,scif"; 962 reg = <0 0xe6c50000 0 64>; 963 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 964 clocks = <&cpg CPG_MOD 204>, 965 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 966 <&scif_clk>; 967 clock-names = "fck", "brg_int", "scif_clk"; 968 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 969 dma-names = "tx", "rx"; 970 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 971 resets = <&cpg 204>; 972 status = "disabled"; 973 }; 974 975 scif4: serial@e6c40000 { 976 compatible = "renesas,scif-r8a77990", 977 "renesas,rcar-gen3-scif", "renesas,scif"; 978 reg = <0 0xe6c40000 0 64>; 979 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 980 clocks = <&cpg CPG_MOD 203>, 981 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 982 <&scif_clk>; 983 clock-names = "fck", "brg_int", "scif_clk"; 984 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 985 dma-names = "tx", "rx"; 986 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 987 resets = <&cpg 203>; 988 status = "disabled"; 989 }; 990 991 scif5: serial@e6f30000 { 992 compatible = "renesas,scif-r8a77990", 993 "renesas,rcar-gen3-scif", "renesas,scif"; 994 reg = <0 0xe6f30000 0 64>; 995 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 996 clocks = <&cpg CPG_MOD 202>, 997 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 998 <&scif_clk>; 999 clock-names = "fck", "brg_int", "scif_clk"; 1000 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1001 <&dmac2 0x5b>, <&dmac2 0x5a>; 1002 dma-names = "tx", "rx", "tx", "rx"; 1003 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1004 resets = <&cpg 202>; 1005 status = "disabled"; 1006 }; 1007 1008 msiof0: spi@e6e90000 { 1009 compatible = "renesas,msiof-r8a77990", 1010 "renesas,rcar-gen3-msiof"; 1011 reg = <0 0xe6e90000 0 0x0064>; 1012 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1013 clocks = <&cpg CPG_MOD 211>; 1014 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1015 <&dmac2 0x41>, <&dmac2 0x40>; 1016 dma-names = "tx", "rx", "tx", "rx"; 1017 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1018 resets = <&cpg 211>; 1019 #address-cells = <1>; 1020 #size-cells = <0>; 1021 status = "disabled"; 1022 }; 1023 1024 msiof1: spi@e6ea0000 { 1025 compatible = "renesas,msiof-r8a77990", 1026 "renesas,rcar-gen3-msiof"; 1027 reg = <0 0xe6ea0000 0 0x0064>; 1028 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1029 clocks = <&cpg CPG_MOD 210>; 1030 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1031 <&dmac2 0x43>, <&dmac2 0x42>; 1032 dma-names = "tx", "rx", "tx", "rx"; 1033 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1034 resets = <&cpg 210>; 1035 #address-cells = <1>; 1036 #size-cells = <0>; 1037 status = "disabled"; 1038 }; 1039 1040 msiof2: spi@e6c00000 { 1041 compatible = "renesas,msiof-r8a77990", 1042 "renesas,rcar-gen3-msiof"; 1043 reg = <0 0xe6c00000 0 0x0064>; 1044 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1045 clocks = <&cpg CPG_MOD 209>; 1046 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1047 dma-names = "tx", "rx"; 1048 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1049 resets = <&cpg 209>; 1050 #address-cells = <1>; 1051 #size-cells = <0>; 1052 status = "disabled"; 1053 }; 1054 1055 msiof3: spi@e6c10000 { 1056 compatible = "renesas,msiof-r8a77990", 1057 "renesas,rcar-gen3-msiof"; 1058 reg = <0 0xe6c10000 0 0x0064>; 1059 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1060 clocks = <&cpg CPG_MOD 208>; 1061 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1062 dma-names = "tx", "rx"; 1063 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1064 resets = <&cpg 208>; 1065 #address-cells = <1>; 1066 #size-cells = <0>; 1067 status = "disabled"; 1068 }; 1069 1070 vin4: video@e6ef4000 { 1071 compatible = "renesas,vin-r8a77990"; 1072 reg = <0 0xe6ef4000 0 0x1000>; 1073 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1074 clocks = <&cpg CPG_MOD 807>; 1075 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1076 resets = <&cpg 807>; 1077 renesas,id = <4>; 1078 status = "disabled"; 1079 1080 ports { 1081 #address-cells = <1>; 1082 #size-cells = <0>; 1083 1084 port@1 { 1085 #address-cells = <1>; 1086 #size-cells = <0>; 1087 1088 reg = <1>; 1089 1090 vin4csi40: endpoint@2 { 1091 reg = <2>; 1092 remote-endpoint= <&csi40vin4>; 1093 }; 1094 }; 1095 }; 1096 }; 1097 1098 vin5: video@e6ef5000 { 1099 compatible = "renesas,vin-r8a77990"; 1100 reg = <0 0xe6ef5000 0 0x1000>; 1101 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1102 clocks = <&cpg CPG_MOD 806>; 1103 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1104 resets = <&cpg 806>; 1105 renesas,id = <5>; 1106 status = "disabled"; 1107 1108 ports { 1109 #address-cells = <1>; 1110 #size-cells = <0>; 1111 1112 port@1 { 1113 #address-cells = <1>; 1114 #size-cells = <0>; 1115 1116 reg = <1>; 1117 1118 vin5csi40: endpoint@2 { 1119 reg = <2>; 1120 remote-endpoint= <&csi40vin5>; 1121 }; 1122 }; 1123 }; 1124 }; 1125 1126 rcar_sound: sound@ec500000 { 1127 /* 1128 * #sound-dai-cells is required 1129 * 1130 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1131 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1132 */ 1133 /* 1134 * #clock-cells is required for audio_clkout0/1/2/3 1135 * 1136 * clkout : #clock-cells = <0>; <&rcar_sound>; 1137 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1138 */ 1139 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1140 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1141 <0 0xec5a0000 0 0x100>, /* ADG */ 1142 <0 0xec540000 0 0x1000>, /* SSIU */ 1143 <0 0xec541000 0 0x280>, /* SSI */ 1144 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1145 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1146 1147 clocks = <&cpg CPG_MOD 1005>, 1148 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1149 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1150 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1151 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1152 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1153 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1154 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1155 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1156 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1157 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1158 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1159 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1160 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1161 <&audio_clk_a>, <&audio_clk_b>, 1162 <&audio_clk_c>, 1163 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1164 clock-names = "ssi-all", 1165 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1166 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1167 "ssi.1", "ssi.0", 1168 "src.9", "src.8", "src.7", "src.6", 1169 "src.5", "src.4", "src.3", "src.2", 1170 "src.1", "src.0", 1171 "mix.1", "mix.0", 1172 "ctu.1", "ctu.0", 1173 "dvc.0", "dvc.1", 1174 "clk_a", "clk_b", "clk_c", "clk_i"; 1175 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1176 resets = <&cpg 1005>, 1177 <&cpg 1006>, <&cpg 1007>, 1178 <&cpg 1008>, <&cpg 1009>, 1179 <&cpg 1010>, <&cpg 1011>, 1180 <&cpg 1012>, <&cpg 1013>, 1181 <&cpg 1014>, <&cpg 1015>; 1182 reset-names = "ssi-all", 1183 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1184 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1185 "ssi.1", "ssi.0"; 1186 status = "disabled"; 1187 1188 rcar_sound,dvc { 1189 dvc0: dvc-0 { 1190 dmas = <&audma0 0xbc>; 1191 dma-names = "tx"; 1192 }; 1193 dvc1: dvc-1 { 1194 dmas = <&audma0 0xbe>; 1195 dma-names = "tx"; 1196 }; 1197 }; 1198 1199 rcar_sound,mix { 1200 mix0: mix-0 { }; 1201 mix1: mix-1 { }; 1202 }; 1203 1204 rcar_sound,ctu { 1205 ctu00: ctu-0 { }; 1206 ctu01: ctu-1 { }; 1207 ctu02: ctu-2 { }; 1208 ctu03: ctu-3 { }; 1209 ctu10: ctu-4 { }; 1210 ctu11: ctu-5 { }; 1211 ctu12: ctu-6 { }; 1212 ctu13: ctu-7 { }; 1213 }; 1214 1215 rcar_sound,src { 1216 src0: src-0 { 1217 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1218 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1219 dma-names = "rx", "tx"; 1220 }; 1221 src1: src-1 { 1222 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1223 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1224 dma-names = "rx", "tx"; 1225 }; 1226 src2: src-2 { 1227 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1228 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1229 dma-names = "rx", "tx"; 1230 }; 1231 src3: src-3 { 1232 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1233 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1234 dma-names = "rx", "tx"; 1235 }; 1236 src4: src-4 { 1237 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1238 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1239 dma-names = "rx", "tx"; 1240 }; 1241 src5: src-5 { 1242 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1243 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1244 dma-names = "rx", "tx"; 1245 }; 1246 src6: src-6 { 1247 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1248 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1249 dma-names = "rx", "tx"; 1250 }; 1251 src7: src-7 { 1252 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1253 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1254 dma-names = "rx", "tx"; 1255 }; 1256 src8: src-8 { 1257 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1258 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1259 dma-names = "rx", "tx"; 1260 }; 1261 src9: src-9 { 1262 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1263 dmas = <&audma0 0x97>, <&audma0 0xba>; 1264 dma-names = "rx", "tx"; 1265 }; 1266 }; 1267 1268 rcar_sound,ssi { 1269 ssi0: ssi-0 { 1270 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1271 dmas = <&audma0 0x01>, <&audma0 0x02>, 1272 <&audma0 0x15>, <&audma0 0x16>; 1273 dma-names = "rx", "tx", "rxu", "txu"; 1274 }; 1275 ssi1: ssi-1 { 1276 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1277 dmas = <&audma0 0x03>, <&audma0 0x04>, 1278 <&audma0 0x49>, <&audma0 0x4a>; 1279 dma-names = "rx", "tx", "rxu", "txu"; 1280 }; 1281 ssi2: ssi-2 { 1282 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1283 dmas = <&audma0 0x05>, <&audma0 0x06>, 1284 <&audma0 0x63>, <&audma0 0x64>; 1285 dma-names = "rx", "tx", "rxu", "txu"; 1286 }; 1287 ssi3: ssi-3 { 1288 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1289 dmas = <&audma0 0x07>, <&audma0 0x08>, 1290 <&audma0 0x6f>, <&audma0 0x70>; 1291 dma-names = "rx", "tx", "rxu", "txu"; 1292 }; 1293 ssi4: ssi-4 { 1294 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1295 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1296 <&audma0 0x71>, <&audma0 0x72>; 1297 dma-names = "rx", "tx", "rxu", "txu"; 1298 }; 1299 ssi5: ssi-5 { 1300 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1301 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1302 <&audma0 0x73>, <&audma0 0x74>; 1303 dma-names = "rx", "tx", "rxu", "txu"; 1304 }; 1305 ssi6: ssi-6 { 1306 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1307 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1308 <&audma0 0x75>, <&audma0 0x76>; 1309 dma-names = "rx", "tx", "rxu", "txu"; 1310 }; 1311 ssi7: ssi-7 { 1312 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1313 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1314 <&audma0 0x79>, <&audma0 0x7a>; 1315 dma-names = "rx", "tx", "rxu", "txu"; 1316 }; 1317 ssi8: ssi-8 { 1318 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1319 dmas = <&audma0 0x11>, <&audma0 0x12>, 1320 <&audma0 0x7b>, <&audma0 0x7c>; 1321 dma-names = "rx", "tx", "rxu", "txu"; 1322 }; 1323 ssi9: ssi-9 { 1324 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1325 dmas = <&audma0 0x13>, <&audma0 0x14>, 1326 <&audma0 0x7d>, <&audma0 0x7e>; 1327 dma-names = "rx", "tx", "rxu", "txu"; 1328 }; 1329 }; 1330 }; 1331 1332 audma0: dma-controller@ec700000 { 1333 compatible = "renesas,dmac-r8a77990", 1334 "renesas,rcar-dmac"; 1335 reg = <0 0xec700000 0 0x10000>; 1336 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1337 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1338 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1339 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1340 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1341 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1342 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1343 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1344 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1345 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1346 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1347 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1348 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1349 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1350 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1351 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1352 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1353 interrupt-names = "error", 1354 "ch0", "ch1", "ch2", "ch3", 1355 "ch4", "ch5", "ch6", "ch7", 1356 "ch8", "ch9", "ch10", "ch11", 1357 "ch12", "ch13", "ch14", "ch15"; 1358 clocks = <&cpg CPG_MOD 502>; 1359 clock-names = "fck"; 1360 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1361 resets = <&cpg 502>; 1362 #dma-cells = <1>; 1363 dma-channels = <16>; 1364 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1365 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1366 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1367 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1368 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1369 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1370 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1371 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1372 }; 1373 1374 xhci0: usb@ee000000 { 1375 compatible = "renesas,xhci-r8a77990", 1376 "renesas,rcar-gen3-xhci"; 1377 reg = <0 0xee000000 0 0xc00>; 1378 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1379 clocks = <&cpg CPG_MOD 328>; 1380 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1381 resets = <&cpg 328>; 1382 status = "disabled"; 1383 }; 1384 1385 usb3_peri0: usb@ee020000 { 1386 compatible = "renesas,r8a77990-usb3-peri", 1387 "renesas,rcar-gen3-usb3-peri"; 1388 reg = <0 0xee020000 0 0x400>; 1389 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1390 clocks = <&cpg CPG_MOD 328>; 1391 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1392 resets = <&cpg 328>; 1393 status = "disabled"; 1394 }; 1395 1396 ohci0: usb@ee080000 { 1397 compatible = "generic-ohci"; 1398 reg = <0 0xee080000 0 0x100>; 1399 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1400 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1401 phys = <&usb2_phy0>; 1402 phy-names = "usb"; 1403 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1404 resets = <&cpg 703>, <&cpg 704>; 1405 status = "disabled"; 1406 }; 1407 1408 ehci0: usb@ee080100 { 1409 compatible = "generic-ehci"; 1410 reg = <0 0xee080100 0 0x100>; 1411 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1412 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1413 phys = <&usb2_phy0>; 1414 phy-names = "usb"; 1415 companion = <&ohci0>; 1416 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1417 resets = <&cpg 703>, <&cpg 704>; 1418 status = "disabled"; 1419 }; 1420 1421 usb2_phy0: usb-phy@ee080200 { 1422 compatible = "renesas,usb2-phy-r8a77990", 1423 "renesas,rcar-gen3-usb2-phy"; 1424 reg = <0 0xee080200 0 0x700>; 1425 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1426 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1427 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1428 resets = <&cpg 703>, <&cpg 704>; 1429 #phy-cells = <0>; 1430 status = "disabled"; 1431 }; 1432 1433 sdhi0: sd@ee100000 { 1434 compatible = "renesas,sdhi-r8a77990", 1435 "renesas,rcar-gen3-sdhi"; 1436 reg = <0 0xee100000 0 0x2000>; 1437 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1438 clocks = <&cpg CPG_MOD 314>; 1439 max-frequency = <200000000>; 1440 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1441 resets = <&cpg 314>; 1442 status = "disabled"; 1443 }; 1444 1445 sdhi1: sd@ee120000 { 1446 compatible = "renesas,sdhi-r8a77990", 1447 "renesas,rcar-gen3-sdhi"; 1448 reg = <0 0xee120000 0 0x2000>; 1449 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1450 clocks = <&cpg CPG_MOD 313>; 1451 max-frequency = <200000000>; 1452 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1453 resets = <&cpg 313>; 1454 status = "disabled"; 1455 }; 1456 1457 sdhi3: sd@ee160000 { 1458 compatible = "renesas,sdhi-r8a77990", 1459 "renesas,rcar-gen3-sdhi"; 1460 reg = <0 0xee160000 0 0x2000>; 1461 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1462 clocks = <&cpg CPG_MOD 311>; 1463 max-frequency = <200000000>; 1464 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1465 resets = <&cpg 311>; 1466 status = "disabled"; 1467 }; 1468 1469 gic: interrupt-controller@f1010000 { 1470 compatible = "arm,gic-400"; 1471 #interrupt-cells = <3>; 1472 #address-cells = <0>; 1473 interrupt-controller; 1474 reg = <0x0 0xf1010000 0 0x1000>, 1475 <0x0 0xf1020000 0 0x20000>, 1476 <0x0 0xf1040000 0 0x20000>, 1477 <0x0 0xf1060000 0 0x20000>; 1478 interrupts = <GIC_PPI 9 1479 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1480 clocks = <&cpg CPG_MOD 408>; 1481 clock-names = "clk"; 1482 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1483 resets = <&cpg 408>; 1484 }; 1485 1486 vspb0: vsp@fe960000 { 1487 compatible = "renesas,vsp2"; 1488 reg = <0 0xfe960000 0 0x8000>; 1489 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1490 clocks = <&cpg CPG_MOD 626>; 1491 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1492 resets = <&cpg 626>; 1493 renesas,fcp = <&fcpvb0>; 1494 }; 1495 1496 fcpvb0: fcp@fe96f000 { 1497 compatible = "renesas,fcpv"; 1498 reg = <0 0xfe96f000 0 0x200>; 1499 clocks = <&cpg CPG_MOD 607>; 1500 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1501 resets = <&cpg 607>; 1502 iommus = <&ipmmu_vp0 5>; 1503 }; 1504 1505 vspi0: vsp@fe9a0000 { 1506 compatible = "renesas,vsp2"; 1507 reg = <0 0xfe9a0000 0 0x8000>; 1508 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1509 clocks = <&cpg CPG_MOD 631>; 1510 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1511 resets = <&cpg 631>; 1512 renesas,fcp = <&fcpvi0>; 1513 }; 1514 1515 fcpvi0: fcp@fe9af000 { 1516 compatible = "renesas,fcpv"; 1517 reg = <0 0xfe9af000 0 0x200>; 1518 clocks = <&cpg CPG_MOD 611>; 1519 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1520 resets = <&cpg 611>; 1521 iommus = <&ipmmu_vp0 8>; 1522 }; 1523 1524 vspd0: vsp@fea20000 { 1525 compatible = "renesas,vsp2"; 1526 reg = <0 0xfea20000 0 0x7000>; 1527 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1528 clocks = <&cpg CPG_MOD 623>; 1529 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1530 resets = <&cpg 623>; 1531 renesas,fcp = <&fcpvd0>; 1532 }; 1533 1534 fcpvd0: fcp@fea27000 { 1535 compatible = "renesas,fcpv"; 1536 reg = <0 0xfea27000 0 0x200>; 1537 clocks = <&cpg CPG_MOD 603>; 1538 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1539 resets = <&cpg 603>; 1540 iommus = <&ipmmu_vi0 8>; 1541 }; 1542 1543 vspd1: vsp@fea28000 { 1544 compatible = "renesas,vsp2"; 1545 reg = <0 0xfea28000 0 0x7000>; 1546 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1547 clocks = <&cpg CPG_MOD 622>; 1548 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1549 resets = <&cpg 622>; 1550 renesas,fcp = <&fcpvd1>; 1551 }; 1552 1553 fcpvd1: fcp@fea2f000 { 1554 compatible = "renesas,fcpv"; 1555 reg = <0 0xfea2f000 0 0x200>; 1556 clocks = <&cpg CPG_MOD 602>; 1557 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1558 resets = <&cpg 602>; 1559 iommus = <&ipmmu_vi0 9>; 1560 }; 1561 1562 csi40: csi2@feaa0000 { 1563 compatible = "renesas,r8a77990-csi2", "renesas,rcar-gen3-csi2"; 1564 reg = <0 0xfeaa0000 0 0x10000>; 1565 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1566 clocks = <&cpg CPG_MOD 716>; 1567 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1568 resets = <&cpg 716>; 1569 status = "disabled"; 1570 1571 ports { 1572 #address-cells = <1>; 1573 #size-cells = <0>; 1574 1575 port@1 { 1576 #address-cells = <1>; 1577 #size-cells = <0>; 1578 1579 reg = <1>; 1580 1581 csi40vin4: endpoint@0 { 1582 reg = <0>; 1583 remote-endpoint = <&vin4csi40>; 1584 }; 1585 csi40vin5: endpoint@1 { 1586 reg = <1>; 1587 remote-endpoint = <&vin5csi40>; 1588 }; 1589 }; 1590 }; 1591 }; 1592 1593 du: display@feb00000 { 1594 compatible = "renesas,du-r8a77990"; 1595 reg = <0 0xfeb00000 0 0x80000>; 1596 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1597 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1598 clocks = <&cpg CPG_MOD 724>, 1599 <&cpg CPG_MOD 723>; 1600 clock-names = "du.0", "du.1"; 1601 vsps = <&vspd0 0 &vspd1 0>; 1602 status = "disabled"; 1603 1604 ports { 1605 #address-cells = <1>; 1606 #size-cells = <0>; 1607 1608 port@0 { 1609 reg = <0>; 1610 du_out_rgb: endpoint { 1611 }; 1612 }; 1613 1614 port@1 { 1615 reg = <1>; 1616 du_out_lvds0: endpoint { 1617 remote-endpoint = <&lvds0_in>; 1618 }; 1619 }; 1620 1621 port@2 { 1622 reg = <2>; 1623 du_out_lvds1: endpoint { 1624 remote-endpoint = <&lvds1_in>; 1625 }; 1626 }; 1627 }; 1628 }; 1629 1630 lvds0: lvds-encoder@feb90000 { 1631 compatible = "renesas,r8a77990-lvds"; 1632 reg = <0 0xfeb90000 0 0x20>; 1633 clocks = <&cpg CPG_MOD 727>; 1634 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1635 resets = <&cpg 727>; 1636 status = "disabled"; 1637 1638 ports { 1639 #address-cells = <1>; 1640 #size-cells = <0>; 1641 1642 port@0 { 1643 reg = <0>; 1644 lvds0_in: endpoint { 1645 remote-endpoint = <&du_out_lvds0>; 1646 }; 1647 }; 1648 1649 port@1 { 1650 reg = <1>; 1651 lvds0_out: endpoint { 1652 }; 1653 }; 1654 }; 1655 }; 1656 1657 lvds1: lvds-encoder@feb90100 { 1658 compatible = "renesas,r8a77990-lvds"; 1659 reg = <0 0xfeb90100 0 0x20>; 1660 clocks = <&cpg CPG_MOD 727>; 1661 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1662 resets = <&cpg 726>; 1663 status = "disabled"; 1664 1665 ports { 1666 #address-cells = <1>; 1667 #size-cells = <0>; 1668 1669 port@0 { 1670 reg = <0>; 1671 lvds1_in: endpoint { 1672 remote-endpoint = <&du_out_lvds1>; 1673 }; 1674 }; 1675 1676 port@1 { 1677 reg = <1>; 1678 lvds1_out: endpoint { 1679 }; 1680 }; 1681 }; 1682 }; 1683 1684 pciec0: pcie@fe000000 { 1685 compatible = "renesas,pcie-r8a77990", 1686 "renesas,pcie-rcar-gen3"; 1687 reg = <0 0xfe000000 0 0x80000>; 1688 #address-cells = <3>; 1689 #size-cells = <2>; 1690 bus-range = <0x00 0xff>; 1691 device_type = "pci"; 1692 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1693 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1694 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1695 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1696 /* Map all possible DDR as inbound ranges */ 1697 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1698 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1699 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1700 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1701 #interrupt-cells = <1>; 1702 interrupt-map-mask = <0 0 0 0>; 1703 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1704 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1705 clock-names = "pcie", "pcie_bus"; 1706 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1707 resets = <&cpg 319>; 1708 status = "disabled"; 1709 }; 1710 1711 prr: chipid@fff00044 { 1712 compatible = "renesas,prr"; 1713 reg = <0 0xfff00044 0 4>; 1714 }; 1715 }; 1716 1717 timer { 1718 compatible = "arm,armv8-timer"; 1719 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1720 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1721 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1722 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1723 }; 1724}; 1725