xref: /linux/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts (revision bd628c1bed7902ec1f24ba0fe70758949146abbe) 
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Device Tree Source for the ebisu board
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8/dts-v1/;
9#include "r8a77990.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	model = "Renesas Ebisu board based on r8a77990";
14	compatible = "renesas,ebisu", "renesas,r8a77990";
15
16	aliases {
17		serial0 = &scif2;
18		ethernet0 = &avb;
19	};
20
21	chosen {
22		bootargs = "ignore_loglevel";
23		stdout-path = "serial0:115200n8";
24	};
25
26	memory@48000000 {
27		device_type = "memory";
28		/* first 128MB is reserved for secure area. */
29		reg = <0x0 0x48000000 0x0 0x38000000>;
30	};
31
32	audio_clkout: audio-clkout {
33		/*
34		 * This is same as <&rcar_sound 0>
35		 * but needed to avoid cs2000/rcar_sound probe dead-lock
36		 */
37		compatible = "fixed-clock";
38		#clock-cells = <0>;
39		clock-frequency = <11289600>;
40	};
41
42	cvbs-in {
43		compatible = "composite-video-connector";
44		label = "CVBS IN";
45
46		port {
47			cvbs_con: endpoint {
48				remote-endpoint = <&adv7482_ain7>;
49			};
50		};
51	};
52
53	hdmi-in {
54		compatible = "hdmi-connector";
55		label = "HDMI IN";
56		type = "a";
57
58		port {
59			hdmi_in_con: endpoint {
60				remote-endpoint = <&adv7482_hdmi>;
61			};
62		};
63	};
64
65	hdmi-out {
66		compatible = "hdmi-connector";
67		type = "a";
68
69		port {
70			hdmi_con_out: endpoint {
71				remote-endpoint = <&adv7511_out>;
72			};
73		};
74	};
75
76	lvds-decoder {
77		compatible = "thine,thc63lvd1024";
78		vcc-supply = <&reg_3p3v>;
79
80		ports {
81			#address-cells = <1>;
82			#size-cells = <0>;
83
84			port@0 {
85				reg = <0>;
86				thc63lvd1024_in: endpoint {
87					remote-endpoint = <&lvds0_out>;
88				};
89			};
90
91			port@2 {
92				reg = <2>;
93				thc63lvd1024_out: endpoint {
94					remote-endpoint = <&adv7511_in>;
95				};
96			};
97		};
98	};
99
100	vga {
101		compatible = "vga-connector";
102
103		port {
104			vga_in: endpoint {
105				remote-endpoint = <&adv7123_out>;
106			};
107		};
108	};
109
110	vga-encoder {
111		compatible = "adi,adv7123";
112
113		ports {
114			#address-cells = <1>;
115			#size-cells = <0>;
116
117			port@0 {
118				reg = <0>;
119				adv7123_in: endpoint {
120					remote-endpoint = <&du_out_rgb>;
121				};
122			};
123			port@1 {
124				reg = <1>;
125				adv7123_out: endpoint {
126					remote-endpoint = <&vga_in>;
127				};
128			};
129		};
130	};
131
132	reg_1p8v: regulator0 {
133		compatible = "regulator-fixed";
134		regulator-name = "fixed-1.8V";
135		regulator-min-microvolt = <1800000>;
136		regulator-max-microvolt = <1800000>;
137		regulator-boot-on;
138		regulator-always-on;
139	};
140
141	reg_3p3v: regulator1 {
142		compatible = "regulator-fixed";
143		regulator-name = "fixed-3.3V";
144		regulator-min-microvolt = <3300000>;
145		regulator-max-microvolt = <3300000>;
146		regulator-boot-on;
147		regulator-always-on;
148	};
149
150	vbus0_usb2: regulator-vbus0-usb2 {
151		compatible = "regulator-fixed";
152
153		regulator-name = "USB20_VBUS_CN";
154		regulator-min-microvolt = <5000000>;
155		regulator-max-microvolt = <5000000>;
156
157		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
158		enable-active-high;
159	};
160
161	rsnd_ak4613: sound {
162		compatible = "simple-scu-audio-card";
163
164		simple-audio-card,name = "rsnd-ak4613";
165		simple-audio-card,format = "left_j";
166		simple-audio-card,bitclock-master = <&sndcpu>;
167		simple-audio-card,frame-master = <&sndcpu>;
168
169		simple-audio-card,prefix = "ak4613";
170		simple-audio-card,routing = "ak4613 Playback", "DAI0 Playback",
171		"DAI0 Capture", "ak4613 Capture";
172		sndcpu: simple-audio-card,cpu {
173			sound-dai = <&rcar_sound>;
174		};
175
176		sndcodec: simple-audio-card,codec {
177			sound-dai = <&ak4613>;
178		};
179	};
180
181	x12_clk: x12 {
182		compatible = "fixed-clock";
183		#clock-cells = <0>;
184		clock-frequency = <24576000>;
185	};
186
187	x13_clk: x13 {
188		compatible = "fixed-clock";
189		#clock-cells = <0>;
190		clock-frequency = <74250000>;
191	};
192
193	vcc_sdhi0: regulator-vcc-sdhi0 {
194		compatible = "regulator-fixed";
195
196		regulator-name = "SDHI0 Vcc";
197		regulator-min-microvolt = <3300000>;
198		regulator-max-microvolt = <3300000>;
199
200		gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
201		enable-active-high;
202	};
203
204	vccq_sdhi0: regulator-vccq-sdhi0 {
205		compatible = "regulator-gpio";
206
207		regulator-name = "SDHI0 VccQ";
208		regulator-min-microvolt = <1800000>;
209		regulator-max-microvolt = <3300000>;
210
211		gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
212		gpios-states = <1>;
213		states = <3300000 1
214			  1800000 0>;
215	};
216
217	vcc_sdhi1: regulator-vcc-sdhi1 {
218		compatible = "regulator-fixed";
219
220		regulator-name = "SDHI1 Vcc";
221		regulator-min-microvolt = <3300000>;
222		regulator-max-microvolt = <3300000>;
223
224		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
225		enable-active-high;
226	};
227
228	vccq_sdhi1: regulator-vccq-sdhi1 {
229		compatible = "regulator-gpio";
230
231		regulator-name = "SDHI1 VccQ";
232		regulator-min-microvolt = <1800000>;
233		regulator-max-microvolt = <3300000>;
234
235		gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
236		gpios-states = <1>;
237		states = <3300000 1
238			  1800000 0>;
239	};
240};
241
242&audio_clk_a {
243	clock-frequency = <22579200>;
244};
245
246&avb {
247	pinctrl-0 = <&avb_pins>;
248	pinctrl-names = "default";
249	renesas,no-ether-link;
250	phy-handle = <&phy0>;
251	phy-mode = "rgmii-txid";
252	status = "okay";
253
254	phy0: ethernet-phy@0 {
255		rxc-skew-ps = <1500>;
256		reg = <0>;
257		interrupt-parent = <&gpio2>;
258		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
259		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
260	};
261};
262
263&canfd {
264	pinctrl-0 = <&canfd0_pins>;
265	pinctrl-names = "default";
266	status = "okay";
267
268	channel0 {
269		status = "okay";
270	};
271};
272
273&csi40 {
274	status = "okay";
275
276	ports {
277		port@0 {
278			reg = <0>;
279
280			csi40_in: endpoint {
281				clock-lanes = <0>;
282				data-lanes = <1 2>;
283				remote-endpoint = <&adv7482_txa>;
284			};
285		};
286	};
287};
288
289&du {
290	pinctrl-0 = <&du_pins>;
291	pinctrl-names = "default";
292	status = "okay";
293
294	clocks = <&cpg CPG_MOD 724>,
295		 <&cpg CPG_MOD 723>,
296		 <&x13_clk>;
297	clock-names = "du.0", "du.1", "dclkin.0";
298
299	ports {
300		port@0 {
301			endpoint {
302				remote-endpoint = <&adv7123_in>;
303			};
304		};
305	};
306};
307
308&ehci0 {
309	dr_mode = "otg";
310	status = "okay";
311};
312
313&extal_clk {
314	clock-frequency = <48000000>;
315};
316
317&hsusb {
318	dr_mode = "otg";
319	status = "okay";
320};
321
322&i2c0 {
323	status = "okay";
324
325	hdmi-encoder@39 {
326		compatible = "adi,adv7511w";
327		reg = <0x39>;
328		interrupt-parent = <&gpio1>;
329		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
330
331		adi,input-depth = <8>;
332		adi,input-colorspace = "rgb";
333		adi,input-clock = "1x";
334		adi,input-style = <1>;
335		adi,input-justification = "evenly";
336
337		ports {
338			#address-cells = <1>;
339			#size-cells = <0>;
340
341			port@0 {
342				reg = <0>;
343				adv7511_in: endpoint {
344					remote-endpoint = <&thc63lvd1024_out>;
345				};
346			};
347
348			port@1 {
349				reg = <1>;
350				adv7511_out: endpoint {
351					remote-endpoint = <&hdmi_con_out>;
352				};
353			};
354		};
355	};
356
357	video-receiver@70 {
358		compatible = "adi,adv7482";
359		reg = <0x70>;
360
361		#address-cells = <1>;
362		#size-cells = <0>;
363
364		interrupt-parent = <&gpio0>;
365		interrupt-names = "intrq1", "intrq2";
366		interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
367			     <17 IRQ_TYPE_LEVEL_LOW>;
368
369		port@7 {
370			reg = <7>;
371
372			adv7482_ain7: endpoint {
373				remote-endpoint = <&cvbs_con>;
374			};
375		};
376
377		port@8 {
378			reg = <8>;
379
380			adv7482_hdmi: endpoint {
381				remote-endpoint = <&hdmi_in_con>;
382			};
383		};
384
385		port@a {
386			reg = <0xa>;
387
388			adv7482_txa: endpoint {
389				clock-lanes = <0>;
390				data-lanes = <1 2>;
391				remote-endpoint = <&csi40_in>;
392			};
393		};
394	};
395};
396
397&i2c3 {
398	status = "okay";
399
400	ak4613: codec@10 {
401		compatible = "asahi-kasei,ak4613";
402		#sound-dai-cells = <0>;
403		reg = <0x10>;
404		clocks = <&rcar_sound 3>;
405
406		asahi-kasei,in1-single-end;
407		asahi-kasei,in2-single-end;
408		asahi-kasei,out1-single-end;
409		asahi-kasei,out2-single-end;
410		asahi-kasei,out3-single-end;
411		asahi-kasei,out4-single-end;
412		asahi-kasei,out5-single-end;
413		asahi-kasei,out6-single-end;
414	};
415
416	cs2000: clk-multiplier@4f {
417		#clock-cells = <0>;
418		compatible = "cirrus,cs2000-cp";
419		reg = <0x4f>;
420		clocks = <&audio_clkout>, <&x12_clk>;
421		clock-names = "clk_in", "ref_clk";
422
423		assigned-clocks = <&cs2000>;
424		assigned-clock-rates = <24576000>; /* 1/1 divide */
425	};
426};
427
428&lvds0 {
429	status = "okay";
430
431	clocks = <&cpg CPG_MOD 727>,
432		 <&x13_clk>,
433		 <&extal_clk>;
434	clock-names = "fck", "dclkin.0", "extal";
435
436	ports {
437		port@1 {
438			lvds0_out: endpoint {
439				remote-endpoint = <&thc63lvd1024_in>;
440			};
441		};
442	};
443};
444
445&lvds1 {
446	clocks = <&cpg CPG_MOD 727>,
447		 <&x13_clk>,
448		 <&extal_clk>;
449	clock-names = "fck", "dclkin.0", "extal";
450};
451
452&ohci0 {
453	dr_mode = "otg";
454	status = "okay";
455};
456
457&pcie_bus_clk {
458	clock-frequency = <100000000>;
459};
460
461&pciec0 {
462	status = "okay";
463};
464
465&pfc {
466	avb_pins: avb {
467		mux {
468			groups = "avb_link", "avb_mii";
469			function = "avb";
470		};
471	};
472
473	canfd0_pins: canfd0 {
474		groups = "canfd0_data";
475		function = "canfd0";
476	};
477
478	du_pins: du {
479		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
480		function = "du";
481	};
482
483	pwm3_pins: pwm3 {
484		groups = "pwm3_b";
485		function = "pwm3";
486	};
487
488	pwm5_pins: pwm5 {
489		groups = "pwm5_a";
490		function = "pwm5";
491	};
492
493	sdhi0_pins: sd0 {
494		groups = "sdhi0_data4", "sdhi0_ctrl";
495		function = "sdhi0";
496		power-source = <3300>;
497	};
498
499	sdhi0_pins_uhs: sd0_uhs {
500		groups = "sdhi0_data4", "sdhi0_ctrl";
501		function = "sdhi0";
502		power-source = <1800>;
503	};
504
505	sdhi1_pins: sd1 {
506		groups = "sdhi1_data4", "sdhi1_ctrl";
507		function = "sdhi1";
508		power-source = <3300>;
509	};
510
511	sdhi1_pins_uhs: sd1_uhs {
512		groups = "sdhi1_data4", "sdhi1_ctrl";
513		function = "sdhi1";
514		power-source = <1800>;
515	};
516
517	sdhi3_pins: sd3 {
518		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
519		function = "sdhi3";
520		power-source = <1800>;
521	};
522
523	sound_pins: sound {
524		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
525		function = "ssi";
526	};
527
528	sound_clk_pins: sound_clk {
529		groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
530			 "audio_clkout_a", "audio_clkout1_a";
531		function = "audio_clk";
532	};
533
534	scif2_pins: scif2 {
535		groups = "scif2_data_a";
536		function = "scif2";
537	};
538
539	usb0_pins: usb {
540		groups = "usb0_b", "usb0_id";
541		function = "usb0";
542	};
543
544	usb30_pins: usb30 {
545		groups = "usb30";
546		function = "usb30";
547	};
548};
549
550&pwm3 {
551	pinctrl-0 = <&pwm3_pins>;
552	pinctrl-names = "default";
553
554	status = "okay";
555};
556
557&pwm5 {
558	pinctrl-0 = <&pwm5_pins>;
559	pinctrl-names = "default";
560
561	status = "okay";
562};
563
564&rcar_sound {
565	pinctrl-0 = <&sound_pins &sound_clk_pins>;
566	pinctrl-names = "default";
567
568	/* Single DAI */
569	#sound-dai-cells = <0>;
570
571	/* audio_clkout0/1/2/3 */
572	#clock-cells = <1>;
573	clock-frequency = <12288000 11289600>;
574	clkout-lr-synchronous;
575
576	status = "okay";
577
578	/* update <audio_clk_b> to <cs2000> */
579	clocks = <&cpg CPG_MOD 1005>,
580		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
581		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
582		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
583		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
584		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
585		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
586		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
587		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
588		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
589		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
590		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
591		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
592		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
593		 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
594		 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
595
596	rcar_sound,dai {
597		dai0 {
598			playback = <&ssi0 &src0 &dvc0>;
599			capture  = <&ssi1 &src1 &dvc1>;
600		};
601	};
602
603};
604
605&rwdt {
606	timeout-sec = <60>;
607	status = "okay";
608};
609
610&scif2 {
611	pinctrl-0 = <&scif2_pins>;
612	pinctrl-names = "default";
613
614	status = "okay";
615};
616
617&ssi1 {
618	shared-pin;
619};
620
621&usb2_phy0 {
622	pinctrl-0 = <&usb0_pins>;
623	pinctrl-names = "default";
624
625	vbus-supply = <&vbus0_usb2>;
626	status = "okay";
627};
628
629&usb3_peri0 {
630	companion = <&xhci0>;
631	status = "okay";
632};
633
634&vin4 {
635	status = "okay";
636};
637
638&xhci0 {
639	pinctrl-0 = <&usb30_pins>;
640	pinctrl-names = "default";
641
642	status = "okay";
643};
644
645&sdhi0 {
646	pinctrl-0 = <&sdhi0_pins>;
647	pinctrl-1 = <&sdhi0_pins_uhs>;
648	pinctrl-names = "default", "state_uhs";
649
650	vmmc-supply = <&vcc_sdhi0>;
651	vqmmc-supply = <&vccq_sdhi0>;
652	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
653	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
654	bus-width = <4>;
655	sd-uhs-sdr50;
656	sd-uhs-sdr104;
657	status = "okay";
658};
659
660&sdhi1 {
661	pinctrl-0 = <&sdhi1_pins>;
662	pinctrl-1 = <&sdhi1_pins_uhs>;
663	pinctrl-names = "default", "state_uhs";
664
665	vmmc-supply = <&vcc_sdhi1>;
666	vqmmc-supply = <&vccq_sdhi1>;
667	cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
668	bus-width = <4>;
669	sd-uhs-sdr50;
670	sd-uhs-sdr104;
671	status = "okay";
672};
673
674&sdhi3 {
675	/* used for on-board 8bit eMMC */
676	pinctrl-0 = <&sdhi3_pins>;
677	pinctrl-1 = <&sdhi3_pins>;
678	pinctrl-names = "default", "state_uhs";
679
680	vmmc-supply = <&reg_3p3v>;
681	vqmmc-supply = <&reg_1p8v>;
682	mmc-hs200-1_8v;
683	bus-width = <8>;
684	non-removable;
685	status = "okay";
686};
687