xref: /linux/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts (revision 6f50fa2a6f1395ad5f59ce7b87730f1f3ea19d76) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the ebisu board
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8/dts-v1/;
9#include "r8a77990.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	model = "Renesas Ebisu board based on r8a77990";
14	compatible = "renesas,ebisu", "renesas,r8a77990";
15
16	aliases {
17		serial0 = &scif2;
18		ethernet0 = &avb;
19	};
20
21	chosen {
22		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
23		stdout-path = "serial0:115200n8";
24	};
25
26	memory@48000000 {
27		device_type = "memory";
28		/* first 128MB is reserved for secure area. */
29		reg = <0x0 0x48000000 0x0 0x38000000>;
30	};
31
32	audio_clkout: audio-clkout {
33		/*
34		 * This is same as <&rcar_sound 0>
35		 * but needed to avoid cs2000/rcar_sound probe dead-lock
36		 */
37		compatible = "fixed-clock";
38		#clock-cells = <0>;
39		clock-frequency = <11289600>;
40	};
41
42	backlight: backlight {
43		compatible = "pwm-backlight";
44		pwms = <&pwm3 0 50000>;
45
46		brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
47		default-brightness-level = <10>;
48
49		power-supply = <&reg_12p0v>;
50	};
51
52	cvbs-in {
53		compatible = "composite-video-connector";
54		label = "CVBS IN";
55
56		port {
57			cvbs_con: endpoint {
58				remote-endpoint = <&adv7482_ain7>;
59			};
60		};
61	};
62
63	hdmi-in {
64		compatible = "hdmi-connector";
65		label = "HDMI IN";
66		type = "a";
67
68		port {
69			hdmi_in_con: endpoint {
70				remote-endpoint = <&adv7482_hdmi>;
71			};
72		};
73	};
74
75	hdmi-out {
76		compatible = "hdmi-connector";
77		type = "a";
78
79		port {
80			hdmi_con_out: endpoint {
81				remote-endpoint = <&adv7511_out>;
82			};
83		};
84	};
85
86	lvds-decoder {
87		compatible = "thine,thc63lvd1024";
88		vcc-supply = <&reg_3p3v>;
89
90		ports {
91			#address-cells = <1>;
92			#size-cells = <0>;
93
94			port@0 {
95				reg = <0>;
96				thc63lvd1024_in: endpoint {
97					remote-endpoint = <&lvds0_out>;
98				};
99			};
100
101			port@2 {
102				reg = <2>;
103				thc63lvd1024_out: endpoint {
104					remote-endpoint = <&adv7511_in>;
105				};
106			};
107		};
108	};
109
110	vga {
111		compatible = "vga-connector";
112
113		port {
114			vga_in: endpoint {
115				remote-endpoint = <&adv7123_out>;
116			};
117		};
118	};
119
120	vga-encoder {
121		compatible = "adi,adv7123";
122
123		ports {
124			#address-cells = <1>;
125			#size-cells = <0>;
126
127			port@0 {
128				reg = <0>;
129				adv7123_in: endpoint {
130					remote-endpoint = <&du_out_rgb>;
131				};
132			};
133			port@1 {
134				reg = <1>;
135				adv7123_out: endpoint {
136					remote-endpoint = <&vga_in>;
137				};
138			};
139		};
140	};
141
142	reg_1p8v: regulator0 {
143		compatible = "regulator-fixed";
144		regulator-name = "fixed-1.8V";
145		regulator-min-microvolt = <1800000>;
146		regulator-max-microvolt = <1800000>;
147		regulator-boot-on;
148		regulator-always-on;
149	};
150
151	reg_3p3v: regulator1 {
152		compatible = "regulator-fixed";
153		regulator-name = "fixed-3.3V";
154		regulator-min-microvolt = <3300000>;
155		regulator-max-microvolt = <3300000>;
156		regulator-boot-on;
157		regulator-always-on;
158	};
159
160	vbus0_usb2: regulator-vbus0-usb2 {
161		compatible = "regulator-fixed";
162
163		regulator-name = "USB20_VBUS_CN";
164		regulator-min-microvolt = <5000000>;
165		regulator-max-microvolt = <5000000>;
166
167		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
168		enable-active-high;
169	};
170
171	rsnd_ak4613: sound {
172		compatible = "simple-audio-card";
173
174		simple-audio-card,name = "rsnd-ak4613";
175		simple-audio-card,format = "left_j";
176		simple-audio-card,bitclock-master = <&sndcpu>;
177		simple-audio-card,frame-master = <&sndcpu>;
178
179		sndcpu: simple-audio-card,cpu {
180			sound-dai = <&rcar_sound>;
181		};
182
183		sndcodec: simple-audio-card,codec {
184			sound-dai = <&ak4613>;
185		};
186	};
187
188	x12_clk: x12 {
189		compatible = "fixed-clock";
190		#clock-cells = <0>;
191		clock-frequency = <24576000>;
192	};
193
194	reg_12p0v: regulator2 {
195		compatible = "regulator-fixed";
196		regulator-name = "D12.0V";
197		regulator-min-microvolt = <12000000>;
198		regulator-max-microvolt = <12000000>;
199		regulator-boot-on;
200		regulator-always-on;
201	};
202
203	x13_clk: x13 {
204		compatible = "fixed-clock";
205		#clock-cells = <0>;
206		clock-frequency = <74250000>;
207	};
208
209	vcc_sdhi0: regulator-vcc-sdhi0 {
210		compatible = "regulator-fixed";
211
212		regulator-name = "SDHI0 Vcc";
213		regulator-min-microvolt = <3300000>;
214		regulator-max-microvolt = <3300000>;
215
216		gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
217		enable-active-high;
218	};
219
220	vccq_sdhi0: regulator-vccq-sdhi0 {
221		compatible = "regulator-gpio";
222
223		regulator-name = "SDHI0 VccQ";
224		regulator-min-microvolt = <1800000>;
225		regulator-max-microvolt = <3300000>;
226
227		gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
228		gpios-states = <1>;
229		states = <3300000 1
230			  1800000 0>;
231	};
232
233	vcc_sdhi1: regulator-vcc-sdhi1 {
234		compatible = "regulator-fixed";
235
236		regulator-name = "SDHI1 Vcc";
237		regulator-min-microvolt = <3300000>;
238		regulator-max-microvolt = <3300000>;
239
240		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
241		enable-active-high;
242	};
243
244	vccq_sdhi1: regulator-vccq-sdhi1 {
245		compatible = "regulator-gpio";
246
247		regulator-name = "SDHI1 VccQ";
248		regulator-min-microvolt = <1800000>;
249		regulator-max-microvolt = <3300000>;
250
251		gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
252		gpios-states = <1>;
253		states = <3300000 1
254			  1800000 0>;
255	};
256};
257
258&audio_clk_a {
259	clock-frequency = <22579200>;
260};
261
262&avb {
263	pinctrl-0 = <&avb_pins>;
264	pinctrl-names = "default";
265	phy-handle = <&phy0>;
266	status = "okay";
267
268	phy0: ethernet-phy@0 {
269		rxc-skew-ps = <1500>;
270		reg = <0>;
271		interrupt-parent = <&gpio2>;
272		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
273		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
274	};
275};
276
277&canfd {
278	pinctrl-0 = <&canfd0_pins>;
279	pinctrl-names = "default";
280	status = "okay";
281
282	channel0 {
283		status = "okay";
284	};
285};
286
287&csi40 {
288	status = "okay";
289
290	ports {
291		port@0 {
292			reg = <0>;
293
294			csi40_in: endpoint {
295				clock-lanes = <0>;
296				data-lanes = <1 2>;
297				remote-endpoint = <&adv7482_txa>;
298			};
299		};
300	};
301};
302
303&du {
304	pinctrl-0 = <&du_pins>;
305	pinctrl-names = "default";
306	status = "okay";
307
308	clocks = <&cpg CPG_MOD 724>,
309		 <&cpg CPG_MOD 723>,
310		 <&x13_clk>;
311	clock-names = "du.0", "du.1", "dclkin.0";
312
313	ports {
314		port@0 {
315			endpoint {
316				remote-endpoint = <&adv7123_in>;
317			};
318		};
319	};
320};
321
322&ehci0 {
323	dr_mode = "otg";
324	status = "okay";
325};
326
327&extal_clk {
328	clock-frequency = <48000000>;
329};
330
331&hsusb {
332	dr_mode = "otg";
333	status = "okay";
334};
335
336&i2c0 {
337	status = "okay";
338
339	io_expander: gpio@20 {
340		compatible = "onnn,pca9654";
341		reg = <0x20>;
342		gpio-controller;
343		#gpio-cells = <2>;
344		interrupt-parent = <&gpio2>;
345		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
346	};
347
348	hdmi-encoder@39 {
349		compatible = "adi,adv7511w";
350		reg = <0x39>;
351		interrupt-parent = <&gpio1>;
352		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
353
354		adi,input-depth = <8>;
355		adi,input-colorspace = "rgb";
356		adi,input-clock = "1x";
357		adi,input-style = <1>;
358		adi,input-justification = "evenly";
359
360		ports {
361			#address-cells = <1>;
362			#size-cells = <0>;
363
364			port@0 {
365				reg = <0>;
366				adv7511_in: endpoint {
367					remote-endpoint = <&thc63lvd1024_out>;
368				};
369			};
370
371			port@1 {
372				reg = <1>;
373				adv7511_out: endpoint {
374					remote-endpoint = <&hdmi_con_out>;
375				};
376			};
377		};
378	};
379
380	video-receiver@70 {
381		compatible = "adi,adv7482";
382		reg = <0x70>;
383
384		#address-cells = <1>;
385		#size-cells = <0>;
386
387		interrupt-parent = <&gpio0>;
388		interrupt-names = "intrq1", "intrq2";
389		interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
390			     <17 IRQ_TYPE_LEVEL_LOW>;
391
392		port@7 {
393			reg = <7>;
394
395			adv7482_ain7: endpoint {
396				remote-endpoint = <&cvbs_con>;
397			};
398		};
399
400		port@8 {
401			reg = <8>;
402
403			adv7482_hdmi: endpoint {
404				remote-endpoint = <&hdmi_in_con>;
405			};
406		};
407
408		port@a {
409			reg = <10>;
410
411			adv7482_txa: endpoint {
412				clock-lanes = <0>;
413				data-lanes = <1 2>;
414				remote-endpoint = <&csi40_in>;
415			};
416		};
417	};
418};
419
420&i2c3 {
421	status = "okay";
422
423	ak4613: codec@10 {
424		compatible = "asahi-kasei,ak4613";
425		#sound-dai-cells = <0>;
426		reg = <0x10>;
427		clocks = <&rcar_sound 3>;
428
429		asahi-kasei,in1-single-end;
430		asahi-kasei,in2-single-end;
431		asahi-kasei,out1-single-end;
432		asahi-kasei,out2-single-end;
433		asahi-kasei,out3-single-end;
434		asahi-kasei,out4-single-end;
435		asahi-kasei,out5-single-end;
436		asahi-kasei,out6-single-end;
437	};
438
439	cs2000: clk-multiplier@4f {
440		#clock-cells = <0>;
441		compatible = "cirrus,cs2000-cp";
442		reg = <0x4f>;
443		clocks = <&audio_clkout>, <&x12_clk>;
444		clock-names = "clk_in", "ref_clk";
445
446		assigned-clocks = <&cs2000>;
447		assigned-clock-rates = <24576000>; /* 1/1 divide */
448	};
449};
450
451&i2c_dvfs {
452	status = "okay";
453
454	clock-frequency = <400000>;
455
456	pmic: pmic@30 {
457		pinctrl-0 = <&irq0_pins>;
458		pinctrl-names = "default";
459
460		compatible = "rohm,bd9571mwv";
461		reg = <0x30>;
462		interrupt-parent = <&intc_ex>;
463		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
464		interrupt-controller;
465		#interrupt-cells = <2>;
466		gpio-controller;
467		#gpio-cells = <2>;
468		rohm,ddr-backup-power = <0x1>;
469		rohm,rstbmode-level;
470	};
471};
472
473&lvds0 {
474	status = "okay";
475
476	clocks = <&cpg CPG_MOD 727>,
477		 <&x13_clk>,
478		 <&extal_clk>;
479	clock-names = "fck", "dclkin.0", "extal";
480
481	ports {
482		port@1 {
483			lvds0_out: endpoint {
484				remote-endpoint = <&thc63lvd1024_in>;
485			};
486		};
487	};
488};
489
490&lvds1 {
491	/*
492	 * Even though the LVDS1 output is not connected, the encoder must be
493	 * enabled to supply a pixel clock to the DU for the DPAD output when
494	 * LVDS0 is in use.
495	 */
496	status = "okay";
497
498	clocks = <&cpg CPG_MOD 727>,
499		 <&x13_clk>,
500		 <&extal_clk>;
501	clock-names = "fck", "dclkin.0", "extal";
502};
503
504&ohci0 {
505	dr_mode = "otg";
506	status = "okay";
507};
508
509&pcie_bus_clk {
510	clock-frequency = <100000000>;
511};
512
513&pciec0 {
514	status = "okay";
515};
516
517&pfc {
518	avb_pins: avb {
519		mux {
520			groups = "avb_link", "avb_mii";
521			function = "avb";
522		};
523	};
524
525	canfd0_pins: canfd0 {
526		groups = "canfd0_data";
527		function = "canfd0";
528	};
529
530	du_pins: du {
531		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
532		function = "du";
533	};
534
535	irq0_pins: irq0 {
536		groups = "intc_ex_irq0";
537		function = "intc_ex";
538	};
539
540	pwm3_pins: pwm3 {
541		groups = "pwm3_b";
542		function = "pwm3";
543	};
544
545	pwm5_pins: pwm5 {
546		groups = "pwm5_a";
547		function = "pwm5";
548	};
549
550	sdhi0_pins: sd0 {
551		groups = "sdhi0_data4", "sdhi0_ctrl";
552		function = "sdhi0";
553		power-source = <3300>;
554	};
555
556	sdhi0_pins_uhs: sd0_uhs {
557		groups = "sdhi0_data4", "sdhi0_ctrl";
558		function = "sdhi0";
559		power-source = <1800>;
560	};
561
562	sdhi1_pins: sd1 {
563		groups = "sdhi1_data4", "sdhi1_ctrl";
564		function = "sdhi1";
565		power-source = <3300>;
566	};
567
568	sdhi1_pins_uhs: sd1_uhs {
569		groups = "sdhi1_data4", "sdhi1_ctrl";
570		function = "sdhi1";
571		power-source = <1800>;
572	};
573
574	sdhi3_pins: sd3 {
575		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
576		function = "sdhi3";
577		power-source = <1800>;
578	};
579
580	sound_pins: sound {
581		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
582		function = "ssi";
583	};
584
585	sound_clk_pins: sound_clk {
586		groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
587			 "audio_clkout_a", "audio_clkout1_a";
588		function = "audio_clk";
589	};
590
591	scif2_pins: scif2 {
592		groups = "scif2_data_a";
593		function = "scif2";
594	};
595
596	usb0_pins: usb {
597		groups = "usb0_b", "usb0_id";
598		function = "usb0";
599	};
600
601	usb30_pins: usb30 {
602		groups = "usb30";
603		function = "usb30";
604	};
605};
606
607&pwm3 {
608	pinctrl-0 = <&pwm3_pins>;
609	pinctrl-names = "default";
610
611	status = "okay";
612};
613
614&pwm5 {
615	pinctrl-0 = <&pwm5_pins>;
616	pinctrl-names = "default";
617
618	status = "okay";
619};
620
621&rcar_sound {
622	pinctrl-0 = <&sound_pins &sound_clk_pins>;
623	pinctrl-names = "default";
624
625	/* Single DAI */
626	#sound-dai-cells = <0>;
627
628	/* audio_clkout0/1/2/3 */
629	#clock-cells = <1>;
630	clock-frequency = <12288000 11289600>;
631	clkout-lr-synchronous;
632
633	status = "okay";
634
635	/* update <audio_clk_b> to <cs2000> */
636	clocks = <&cpg CPG_MOD 1005>,
637		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
638		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
639		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
640		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
641		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
642		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
643		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
644		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
645		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
646		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
647		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
648		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
649		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
650		 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
651		 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
652
653	rcar_sound,dai {
654		dai0 {
655			playback = <&ssi0 &src0 &dvc0>;
656			capture  = <&ssi1 &src1 &dvc1>;
657		};
658	};
659
660};
661
662&rwdt {
663	timeout-sec = <60>;
664	status = "okay";
665};
666
667&scif2 {
668	pinctrl-0 = <&scif2_pins>;
669	pinctrl-names = "default";
670
671	status = "okay";
672};
673
674&ssi1 {
675	shared-pin;
676};
677
678&usb2_phy0 {
679	pinctrl-0 = <&usb0_pins>;
680	pinctrl-names = "default";
681
682	vbus-supply = <&vbus0_usb2>;
683	status = "okay";
684};
685
686&usb3_peri0 {
687	companion = <&xhci0>;
688	status = "okay";
689};
690
691&vin4 {
692	status = "okay";
693};
694
695&vin5 {
696	status = "okay";
697};
698
699&xhci0 {
700	pinctrl-0 = <&usb30_pins>;
701	pinctrl-names = "default";
702
703	status = "okay";
704};
705
706&sdhi0 {
707	pinctrl-0 = <&sdhi0_pins>;
708	pinctrl-1 = <&sdhi0_pins_uhs>;
709	pinctrl-names = "default", "state_uhs";
710
711	vmmc-supply = <&vcc_sdhi0>;
712	vqmmc-supply = <&vccq_sdhi0>;
713	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
714	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
715	bus-width = <4>;
716	sd-uhs-sdr50;
717	sd-uhs-sdr104;
718	status = "okay";
719};
720
721&sdhi1 {
722	pinctrl-0 = <&sdhi1_pins>;
723	pinctrl-1 = <&sdhi1_pins_uhs>;
724	pinctrl-names = "default", "state_uhs";
725
726	vmmc-supply = <&vcc_sdhi1>;
727	vqmmc-supply = <&vccq_sdhi1>;
728	cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
729	bus-width = <4>;
730	sd-uhs-sdr50;
731	sd-uhs-sdr104;
732	status = "okay";
733};
734
735&sdhi3 {
736	/* used for on-board 8bit eMMC */
737	pinctrl-0 = <&sdhi3_pins>;
738	pinctrl-1 = <&sdhi3_pins>;
739	pinctrl-names = "default", "state_uhs";
740
741	vmmc-supply = <&reg_3p3v>;
742	vqmmc-supply = <&reg_1p8v>;
743	mmc-hs200-1_8v;
744	mmc-hs400-1_8v;
745	bus-width = <8>;
746	non-removable;
747	status = "okay";
748};
749