xref: /linux/arch/arm64/boot/dts/renesas/r8a77980-condor.dts (revision c6eb20473f0b296c671dc6f7a7766ea6bedf2d59)
1b9edbce9SSergei Shtylyov// SPDX-License-Identifier: GPL-2.0
2b9edbce9SSergei Shtylyov/*
3b9edbce9SSergei Shtylyov * Device Tree Source for the Condor board
4b9edbce9SSergei Shtylyov *
5b9edbce9SSergei Shtylyov * Copyright (C) 2018 Renesas Electronics Corp.
6b9edbce9SSergei Shtylyov * Copyright (C) 2018 Cogent Embedded, Inc.
7b9edbce9SSergei Shtylyov */
8b9edbce9SSergei Shtylyov
9b9edbce9SSergei Shtylyov/dts-v1/;
10b9edbce9SSergei Shtylyov#include "r8a77980.dtsi"
11b9edbce9SSergei Shtylyov
12b9edbce9SSergei Shtylyov/ {
13b9edbce9SSergei Shtylyov	model = "Renesas Condor board based on r8a77980";
14b9edbce9SSergei Shtylyov	compatible = "renesas,condor", "renesas,r8a77980";
15b9edbce9SSergei Shtylyov
16b9edbce9SSergei Shtylyov	aliases {
17b9edbce9SSergei Shtylyov		serial0 = &scif0;
188091788fSSergei Shtylyov		ethernet0 = &avb;
19b9edbce9SSergei Shtylyov	};
20b9edbce9SSergei Shtylyov
21b9edbce9SSergei Shtylyov	chosen {
22b9edbce9SSergei Shtylyov		stdout-path = "serial0:115200n8";
23b9edbce9SSergei Shtylyov	};
24b9edbce9SSergei Shtylyov
25b9edbce9SSergei Shtylyov	memory@48000000 {
26b9edbce9SSergei Shtylyov		device_type = "memory";
27b9edbce9SSergei Shtylyov		/* first 128MB is reserved for secure area. */
28b9edbce9SSergei Shtylyov		reg = <0 0x48000000 0 0x78000000>;
29b9edbce9SSergei Shtylyov	};
30cc922244SSergei Shtylyov
31cc922244SSergei Shtylyov	d3_3v: regulator-0 {
32cc922244SSergei Shtylyov		compatible = "regulator-fixed";
33cc922244SSergei Shtylyov		regulator-name = "D3.3V";
34cc922244SSergei Shtylyov		regulator-min-microvolt = <3300000>;
35cc922244SSergei Shtylyov		regulator-max-microvolt = <3300000>;
36cc922244SSergei Shtylyov		regulator-boot-on;
37cc922244SSergei Shtylyov		regulator-always-on;
38cc922244SSergei Shtylyov	};
39cc922244SSergei Shtylyov
40cc922244SSergei Shtylyov	vddq_vin01: regulator-1 {
41cc922244SSergei Shtylyov		compatible = "regulator-fixed";
42cc922244SSergei Shtylyov		regulator-name = "VDDQ_VIN01";
43cc922244SSergei Shtylyov		regulator-min-microvolt = <1800000>;
44cc922244SSergei Shtylyov		regulator-max-microvolt = <1800000>;
45cc922244SSergei Shtylyov		regulator-boot-on;
46cc922244SSergei Shtylyov		regulator-always-on;
47cc922244SSergei Shtylyov	};
4870fd8b6aSSergei Shtylyov
4970fd8b6aSSergei Shtylyov	d1_8v: regulator-2 {
5070fd8b6aSSergei Shtylyov		compatible = "regulator-fixed";
5170fd8b6aSSergei Shtylyov		regulator-name = "D1.8V";
5270fd8b6aSSergei Shtylyov		regulator-min-microvolt = <1800000>;
5370fd8b6aSSergei Shtylyov		regulator-max-microvolt = <1800000>;
5470fd8b6aSSergei Shtylyov		regulator-boot-on;
5570fd8b6aSSergei Shtylyov		regulator-always-on;
5670fd8b6aSSergei Shtylyov	};
5770fd8b6aSSergei Shtylyov
5870fd8b6aSSergei Shtylyov	hdmi-out {
5970fd8b6aSSergei Shtylyov		compatible = "hdmi-connector";
6070fd8b6aSSergei Shtylyov		type = "a";
6170fd8b6aSSergei Shtylyov
6270fd8b6aSSergei Shtylyov		port {
6370fd8b6aSSergei Shtylyov			hdmi_con: endpoint {
6470fd8b6aSSergei Shtylyov				remote-endpoint = <&adv7511_out>;
6570fd8b6aSSergei Shtylyov			};
6670fd8b6aSSergei Shtylyov		};
6770fd8b6aSSergei Shtylyov	};
6870fd8b6aSSergei Shtylyov
6970fd8b6aSSergei Shtylyov	lvds-decoder {
7070fd8b6aSSergei Shtylyov		compatible = "thine,thc63lvd1024";
7170fd8b6aSSergei Shtylyov		vcc-supply = <&d3_3v>;
7270fd8b6aSSergei Shtylyov
7370fd8b6aSSergei Shtylyov		ports {
7470fd8b6aSSergei Shtylyov			#address-cells = <1>;
7570fd8b6aSSergei Shtylyov			#size-cells = <0>;
7670fd8b6aSSergei Shtylyov
7770fd8b6aSSergei Shtylyov			port@0 {
7870fd8b6aSSergei Shtylyov				reg = <0>;
7970fd8b6aSSergei Shtylyov				thc63lvd1024_in: endpoint {
8070fd8b6aSSergei Shtylyov					remote-endpoint = <&lvds0_out>;
8170fd8b6aSSergei Shtylyov				};
8270fd8b6aSSergei Shtylyov			};
8370fd8b6aSSergei Shtylyov
8470fd8b6aSSergei Shtylyov			port@2 {
8570fd8b6aSSergei Shtylyov				reg = <2>;
8670fd8b6aSSergei Shtylyov				thc63lvd1024_out: endpoint {
8770fd8b6aSSergei Shtylyov					remote-endpoint = <&adv7511_in>;
8870fd8b6aSSergei Shtylyov				};
8970fd8b6aSSergei Shtylyov			};
9070fd8b6aSSergei Shtylyov		};
9170fd8b6aSSergei Shtylyov	};
9270fd8b6aSSergei Shtylyov
9370fd8b6aSSergei Shtylyov	x1_clk: x1-clock {
9470fd8b6aSSergei Shtylyov		compatible = "fixed-clock";
9570fd8b6aSSergei Shtylyov		#clock-cells = <0>;
9670fd8b6aSSergei Shtylyov		clock-frequency = <148500000>;
9770fd8b6aSSergei Shtylyov	};
98b9edbce9SSergei Shtylyov};
99b9edbce9SSergei Shtylyov
1008091788fSSergei Shtylyov&avb {
10155cda281SSergei Shtylyov	pinctrl-0 = <&avb_pins>;
10255cda281SSergei Shtylyov	pinctrl-names = "default";
10355cda281SSergei Shtylyov
1048091788fSSergei Shtylyov	phy-mode = "rgmii-id";
1058091788fSSergei Shtylyov	phy-handle = <&phy0>;
1068091788fSSergei Shtylyov	renesas,no-ether-link;
1078091788fSSergei Shtylyov	status = "okay";
1088091788fSSergei Shtylyov
1098091788fSSergei Shtylyov	phy0: ethernet-phy@0 {
1108091788fSSergei Shtylyov		rxc-skew-ps = <1500>;
1118091788fSSergei Shtylyov		reg = <0>;
112ffbd5235SSergei Shtylyov		interrupt-parent = <&gpio1>;
113ffbd5235SSergei Shtylyov		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
1148091788fSSergei Shtylyov	};
1158091788fSSergei Shtylyov};
1168091788fSSergei Shtylyov
1177a9706d2SSergei Shtylyov&canfd {
1187a9706d2SSergei Shtylyov	pinctrl-0 = <&canfd0_pins>;
1197a9706d2SSergei Shtylyov	pinctrl-names = "default";
1207a9706d2SSergei Shtylyov	status = "okay";
1217a9706d2SSergei Shtylyov
1227a9706d2SSergei Shtylyov	channel0 {
1237a9706d2SSergei Shtylyov		status = "okay";
1247a9706d2SSergei Shtylyov	};
1257a9706d2SSergei Shtylyov};
1267a9706d2SSergei Shtylyov
12770fd8b6aSSergei Shtylyov&du {
12870fd8b6aSSergei Shtylyov	clocks = <&cpg CPG_MOD 724>,
12970fd8b6aSSergei Shtylyov		 <&x1_clk>;
13070fd8b6aSSergei Shtylyov	clock-names = "du.0", "dclkin.0";
13170fd8b6aSSergei Shtylyov	status = "okay";
13270fd8b6aSSergei Shtylyov};
13370fd8b6aSSergei Shtylyov
134b9edbce9SSergei Shtylyov&extal_clk {
135b9edbce9SSergei Shtylyov	clock-frequency = <16666666>;
136b9edbce9SSergei Shtylyov};
137b9edbce9SSergei Shtylyov
138b9edbce9SSergei Shtylyov&extalr_clk {
139b9edbce9SSergei Shtylyov	clock-frequency = <32768>;
140b9edbce9SSergei Shtylyov};
141b9edbce9SSergei Shtylyov
14245fde0d4SSergei Shtylyov&i2c0 {
14345fde0d4SSergei Shtylyov	pinctrl-0 = <&i2c0_pins>;
14445fde0d4SSergei Shtylyov	pinctrl-names = "default";
14545fde0d4SSergei Shtylyov
14645fde0d4SSergei Shtylyov	status = "okay";
14745fde0d4SSergei Shtylyov	clock-frequency = <400000>;
14845fde0d4SSergei Shtylyov
14945fde0d4SSergei Shtylyov	io_expander0: gpio@20 {
15045fde0d4SSergei Shtylyov		compatible = "onnn,pca9654";
15145fde0d4SSergei Shtylyov		reg = <0x20>;
15245fde0d4SSergei Shtylyov		gpio-controller;
15345fde0d4SSergei Shtylyov		#gpio-cells = <2>;
15445fde0d4SSergei Shtylyov	};
15545fde0d4SSergei Shtylyov
15645fde0d4SSergei Shtylyov	io_expander1: gpio@21 {
15745fde0d4SSergei Shtylyov		compatible = "onnn,pca9654";
15845fde0d4SSergei Shtylyov		reg = <0x21>;
15945fde0d4SSergei Shtylyov		gpio-controller;
16045fde0d4SSergei Shtylyov		#gpio-cells = <2>;
16145fde0d4SSergei Shtylyov	};
16270fd8b6aSSergei Shtylyov
16370fd8b6aSSergei Shtylyov	hdmi@39 {
16470fd8b6aSSergei Shtylyov		compatible = "adi,adv7511w";
16570fd8b6aSSergei Shtylyov		reg = <0x39>;
16670fd8b6aSSergei Shtylyov		interrupt-parent = <&gpio1>;
16770fd8b6aSSergei Shtylyov		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
16870fd8b6aSSergei Shtylyov		avdd-supply = <&d1_8v>;
16970fd8b6aSSergei Shtylyov		dvdd-supply = <&d1_8v>;
17070fd8b6aSSergei Shtylyov		pvdd-supply = <&d1_8v>;
17170fd8b6aSSergei Shtylyov		bgvdd-supply = <&d1_8v>;
17270fd8b6aSSergei Shtylyov		dvdd-3v-supply = <&d3_3v>;
17370fd8b6aSSergei Shtylyov
17470fd8b6aSSergei Shtylyov		adi,input-depth = <8>;
17570fd8b6aSSergei Shtylyov		adi,input-colorspace = "rgb";
17670fd8b6aSSergei Shtylyov		adi,input-clock = "1x";
17770fd8b6aSSergei Shtylyov		adi,input-style = <1>;
17870fd8b6aSSergei Shtylyov		adi,input-justification = "evenly";
17970fd8b6aSSergei Shtylyov
18070fd8b6aSSergei Shtylyov		ports {
18170fd8b6aSSergei Shtylyov			#address-cells = <1>;
18270fd8b6aSSergei Shtylyov			#size-cells = <0>;
18370fd8b6aSSergei Shtylyov
18470fd8b6aSSergei Shtylyov			port@0 {
18570fd8b6aSSergei Shtylyov				reg = <0>;
18670fd8b6aSSergei Shtylyov				adv7511_in: endpoint {
18770fd8b6aSSergei Shtylyov					remote-endpoint = <&thc63lvd1024_out>;
18870fd8b6aSSergei Shtylyov				};
18970fd8b6aSSergei Shtylyov			};
19070fd8b6aSSergei Shtylyov
19170fd8b6aSSergei Shtylyov			port@1 {
19270fd8b6aSSergei Shtylyov				reg = <1>;
19370fd8b6aSSergei Shtylyov				adv7511_out: endpoint {
19470fd8b6aSSergei Shtylyov					remote-endpoint = <&hdmi_con>;
19570fd8b6aSSergei Shtylyov				};
19670fd8b6aSSergei Shtylyov			};
19770fd8b6aSSergei Shtylyov		};
19870fd8b6aSSergei Shtylyov	};
19970fd8b6aSSergei Shtylyov};
20070fd8b6aSSergei Shtylyov
20170fd8b6aSSergei Shtylyov&lvds0 {
20270fd8b6aSSergei Shtylyov	status = "okay";
20370fd8b6aSSergei Shtylyov
20470fd8b6aSSergei Shtylyov	ports {
20570fd8b6aSSergei Shtylyov		port@1 {
20670fd8b6aSSergei Shtylyov			lvds0_out: endpoint {
20770fd8b6aSSergei Shtylyov				remote-endpoint = <&thc63lvd1024_in>;
20870fd8b6aSSergei Shtylyov			};
20970fd8b6aSSergei Shtylyov		};
21070fd8b6aSSergei Shtylyov	};
21145fde0d4SSergei Shtylyov};
21245fde0d4SSergei Shtylyov
213cc922244SSergei Shtylyov&mmc0 {
214cc922244SSergei Shtylyov	pinctrl-0 = <&mmc_pins>;
215cc922244SSergei Shtylyov	pinctrl-1 = <&mmc_pins_uhs>;
216cc922244SSergei Shtylyov	pinctrl-names = "default", "state_uhs";
217cc922244SSergei Shtylyov
218cc922244SSergei Shtylyov	vmmc-supply = <&d3_3v>;
219cc922244SSergei Shtylyov	vqmmc-supply = <&vddq_vin01>;
220cc922244SSergei Shtylyov	mmc-hs200-1_8v;
221cc922244SSergei Shtylyov	bus-width = <8>;
222cc922244SSergei Shtylyov	non-removable;
223cc922244SSergei Shtylyov	status = "okay";
224cc922244SSergei Shtylyov};
225cc922244SSergei Shtylyov
226*c6eb2047SSergei Shtylyov&pciec {
227*c6eb2047SSergei Shtylyov	status = "okay";
228*c6eb2047SSergei Shtylyov};
229*c6eb2047SSergei Shtylyov
230*c6eb2047SSergei Shtylyov&pcie_bus_clk {
231*c6eb2047SSergei Shtylyov	clock-frequency = <100000000>;
232*c6eb2047SSergei Shtylyov};
233*c6eb2047SSergei Shtylyov
234*c6eb2047SSergei Shtylyov&pcie_phy {
235*c6eb2047SSergei Shtylyov	status = "okay";
236*c6eb2047SSergei Shtylyov};
237*c6eb2047SSergei Shtylyov
238a824e63cSSergei Shtylyov&pfc {
23955cda281SSergei Shtylyov	avb_pins: avb {
24055cda281SSergei Shtylyov		groups = "avb_mdio", "avb_rgmii";
24155cda281SSergei Shtylyov		function = "avb";
24255cda281SSergei Shtylyov	};
24355cda281SSergei Shtylyov
2447a9706d2SSergei Shtylyov	canfd0_pins: canfd0 {
2457a9706d2SSergei Shtylyov		groups = "canfd0_data_a";
2467a9706d2SSergei Shtylyov		function = "canfd0";
2477a9706d2SSergei Shtylyov	};
2487a9706d2SSergei Shtylyov
24945fde0d4SSergei Shtylyov	i2c0_pins: i2c0 {
25045fde0d4SSergei Shtylyov		groups = "i2c0";
25145fde0d4SSergei Shtylyov		function = "i2c0";
25245fde0d4SSergei Shtylyov	};
25345fde0d4SSergei Shtylyov
254cc922244SSergei Shtylyov	mmc_pins: mmc {
255cc922244SSergei Shtylyov		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
256cc922244SSergei Shtylyov		function = "mmc";
257cc922244SSergei Shtylyov		power-source = <3300>;
258cc922244SSergei Shtylyov	};
259cc922244SSergei Shtylyov
260cc922244SSergei Shtylyov	mmc_pins_uhs: mmc_uhs {
261cc922244SSergei Shtylyov		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
262cc922244SSergei Shtylyov		function = "mmc";
263cc922244SSergei Shtylyov		power-source = <1800>;
264cc922244SSergei Shtylyov	};
265cc922244SSergei Shtylyov
266a824e63cSSergei Shtylyov	scif0_pins: scif0 {
267a824e63cSSergei Shtylyov		groups = "scif0_data";
268a824e63cSSergei Shtylyov		function = "scif0";
269a824e63cSSergei Shtylyov	};
270a824e63cSSergei Shtylyov
271a824e63cSSergei Shtylyov	scif_clk_pins: scif_clk {
272a824e63cSSergei Shtylyov		groups = "scif_clk_b";
273a824e63cSSergei Shtylyov		function = "scif_clk";
274a824e63cSSergei Shtylyov	};
275a824e63cSSergei Shtylyov};
276a824e63cSSergei Shtylyov
277bcee502cSSergei Shtylyov&rwdt {
278bcee502cSSergei Shtylyov	timeout-sec = <60>;
279bcee502cSSergei Shtylyov	status = "okay";
280bcee502cSSergei Shtylyov};
281bcee502cSSergei Shtylyov
282b9edbce9SSergei Shtylyov&scif0 {
283a824e63cSSergei Shtylyov	pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
284a824e63cSSergei Shtylyov	pinctrl-names = "default";
285a824e63cSSergei Shtylyov
286b9edbce9SSergei Shtylyov	status = "okay";
287b9edbce9SSergei Shtylyov};
288b9edbce9SSergei Shtylyov
289b9edbce9SSergei Shtylyov&scif_clk {
290b9edbce9SSergei Shtylyov	clock-frequency = <14745600>;
291b9edbce9SSergei Shtylyov};
292