1*b9edbce9SSergei Shtylyov// SPDX-License-Identifier: GPL-2.0 2*b9edbce9SSergei Shtylyov/* 3*b9edbce9SSergei Shtylyov * Device Tree Source for the Condor board 4*b9edbce9SSergei Shtylyov * 5*b9edbce9SSergei Shtylyov * Copyright (C) 2018 Renesas Electronics Corp. 6*b9edbce9SSergei Shtylyov * Copyright (C) 2018 Cogent Embedded, Inc. 7*b9edbce9SSergei Shtylyov */ 8*b9edbce9SSergei Shtylyov 9*b9edbce9SSergei Shtylyov/dts-v1/; 10*b9edbce9SSergei Shtylyov#include "r8a77980.dtsi" 11*b9edbce9SSergei Shtylyov 12*b9edbce9SSergei Shtylyov/ { 13*b9edbce9SSergei Shtylyov model = "Renesas Condor board based on r8a77980"; 14*b9edbce9SSergei Shtylyov compatible = "renesas,condor", "renesas,r8a77980"; 15*b9edbce9SSergei Shtylyov 16*b9edbce9SSergei Shtylyov aliases { 17*b9edbce9SSergei Shtylyov serial0 = &scif0; 18*b9edbce9SSergei Shtylyov }; 19*b9edbce9SSergei Shtylyov 20*b9edbce9SSergei Shtylyov chosen { 21*b9edbce9SSergei Shtylyov stdout-path = "serial0:115200n8"; 22*b9edbce9SSergei Shtylyov }; 23*b9edbce9SSergei Shtylyov 24*b9edbce9SSergei Shtylyov memory@48000000 { 25*b9edbce9SSergei Shtylyov device_type = "memory"; 26*b9edbce9SSergei Shtylyov /* first 128MB is reserved for secure area. */ 27*b9edbce9SSergei Shtylyov reg = <0 0x48000000 0 0x78000000>; 28*b9edbce9SSergei Shtylyov }; 29*b9edbce9SSergei Shtylyov}; 30*b9edbce9SSergei Shtylyov 31*b9edbce9SSergei Shtylyov&extal_clk { 32*b9edbce9SSergei Shtylyov clock-frequency = <16666666>; 33*b9edbce9SSergei Shtylyov}; 34*b9edbce9SSergei Shtylyov 35*b9edbce9SSergei Shtylyov&extalr_clk { 36*b9edbce9SSergei Shtylyov clock-frequency = <32768>; 37*b9edbce9SSergei Shtylyov}; 38*b9edbce9SSergei Shtylyov 39*b9edbce9SSergei Shtylyov&scif0 { 40*b9edbce9SSergei Shtylyov status = "okay"; 41*b9edbce9SSergei Shtylyov}; 42*b9edbce9SSergei Shtylyov 43*b9edbce9SSergei Shtylyov&scif_clk { 44*b9edbce9SSergei Shtylyov clock-frequency = <14745600>; 45*b9edbce9SSergei Shtylyov}; 46