xref: /linux/arch/arm64/boot/dts/renesas/r8a77980-condor.dts (revision 70fd8b6a4846362991ead7b68f951d519a9c71df)
1b9edbce9SSergei Shtylyov// SPDX-License-Identifier: GPL-2.0
2b9edbce9SSergei Shtylyov/*
3b9edbce9SSergei Shtylyov * Device Tree Source for the Condor board
4b9edbce9SSergei Shtylyov *
5b9edbce9SSergei Shtylyov * Copyright (C) 2018 Renesas Electronics Corp.
6b9edbce9SSergei Shtylyov * Copyright (C) 2018 Cogent Embedded, Inc.
7b9edbce9SSergei Shtylyov */
8b9edbce9SSergei Shtylyov
9b9edbce9SSergei Shtylyov/dts-v1/;
10b9edbce9SSergei Shtylyov#include "r8a77980.dtsi"
11b9edbce9SSergei Shtylyov
12b9edbce9SSergei Shtylyov/ {
13b9edbce9SSergei Shtylyov	model = "Renesas Condor board based on r8a77980";
14b9edbce9SSergei Shtylyov	compatible = "renesas,condor", "renesas,r8a77980";
15b9edbce9SSergei Shtylyov
16b9edbce9SSergei Shtylyov	aliases {
17b9edbce9SSergei Shtylyov		serial0 = &scif0;
188091788fSSergei Shtylyov		ethernet0 = &avb;
19b9edbce9SSergei Shtylyov	};
20b9edbce9SSergei Shtylyov
21b9edbce9SSergei Shtylyov	chosen {
22b9edbce9SSergei Shtylyov		stdout-path = "serial0:115200n8";
23b9edbce9SSergei Shtylyov	};
24b9edbce9SSergei Shtylyov
25b9edbce9SSergei Shtylyov	memory@48000000 {
26b9edbce9SSergei Shtylyov		device_type = "memory";
27b9edbce9SSergei Shtylyov		/* first 128MB is reserved for secure area. */
28b9edbce9SSergei Shtylyov		reg = <0 0x48000000 0 0x78000000>;
29b9edbce9SSergei Shtylyov	};
30cc922244SSergei Shtylyov
31cc922244SSergei Shtylyov	d3_3v: regulator-0 {
32cc922244SSergei Shtylyov		compatible = "regulator-fixed";
33cc922244SSergei Shtylyov		regulator-name = "D3.3V";
34cc922244SSergei Shtylyov		regulator-min-microvolt = <3300000>;
35cc922244SSergei Shtylyov		regulator-max-microvolt = <3300000>;
36cc922244SSergei Shtylyov		regulator-boot-on;
37cc922244SSergei Shtylyov		regulator-always-on;
38cc922244SSergei Shtylyov	};
39cc922244SSergei Shtylyov
40cc922244SSergei Shtylyov	vddq_vin01: regulator-1 {
41cc922244SSergei Shtylyov		compatible = "regulator-fixed";
42cc922244SSergei Shtylyov		regulator-name = "VDDQ_VIN01";
43cc922244SSergei Shtylyov		regulator-min-microvolt = <1800000>;
44cc922244SSergei Shtylyov		regulator-max-microvolt = <1800000>;
45cc922244SSergei Shtylyov		regulator-boot-on;
46cc922244SSergei Shtylyov		regulator-always-on;
47cc922244SSergei Shtylyov	};
48*70fd8b6aSSergei Shtylyov
49*70fd8b6aSSergei Shtylyov	d1_8v: regulator-2 {
50*70fd8b6aSSergei Shtylyov		compatible = "regulator-fixed";
51*70fd8b6aSSergei Shtylyov		regulator-name = "D1.8V";
52*70fd8b6aSSergei Shtylyov		regulator-min-microvolt = <1800000>;
53*70fd8b6aSSergei Shtylyov		regulator-max-microvolt = <1800000>;
54*70fd8b6aSSergei Shtylyov		regulator-boot-on;
55*70fd8b6aSSergei Shtylyov		regulator-always-on;
56*70fd8b6aSSergei Shtylyov	};
57*70fd8b6aSSergei Shtylyov
58*70fd8b6aSSergei Shtylyov	hdmi-out {
59*70fd8b6aSSergei Shtylyov		compatible = "hdmi-connector";
60*70fd8b6aSSergei Shtylyov		type = "a";
61*70fd8b6aSSergei Shtylyov
62*70fd8b6aSSergei Shtylyov		port {
63*70fd8b6aSSergei Shtylyov			hdmi_con: endpoint {
64*70fd8b6aSSergei Shtylyov				remote-endpoint = <&adv7511_out>;
65*70fd8b6aSSergei Shtylyov			};
66*70fd8b6aSSergei Shtylyov		};
67*70fd8b6aSSergei Shtylyov	};
68*70fd8b6aSSergei Shtylyov
69*70fd8b6aSSergei Shtylyov	lvds-decoder {
70*70fd8b6aSSergei Shtylyov		compatible = "thine,thc63lvd1024";
71*70fd8b6aSSergei Shtylyov		vcc-supply = <&d3_3v>;
72*70fd8b6aSSergei Shtylyov
73*70fd8b6aSSergei Shtylyov		ports {
74*70fd8b6aSSergei Shtylyov			#address-cells = <1>;
75*70fd8b6aSSergei Shtylyov			#size-cells = <0>;
76*70fd8b6aSSergei Shtylyov
77*70fd8b6aSSergei Shtylyov			port@0 {
78*70fd8b6aSSergei Shtylyov				reg = <0>;
79*70fd8b6aSSergei Shtylyov				thc63lvd1024_in: endpoint {
80*70fd8b6aSSergei Shtylyov					remote-endpoint = <&lvds0_out>;
81*70fd8b6aSSergei Shtylyov				};
82*70fd8b6aSSergei Shtylyov			};
83*70fd8b6aSSergei Shtylyov
84*70fd8b6aSSergei Shtylyov			port@2 {
85*70fd8b6aSSergei Shtylyov				reg = <2>;
86*70fd8b6aSSergei Shtylyov				thc63lvd1024_out: endpoint {
87*70fd8b6aSSergei Shtylyov					remote-endpoint = <&adv7511_in>;
88*70fd8b6aSSergei Shtylyov				};
89*70fd8b6aSSergei Shtylyov			};
90*70fd8b6aSSergei Shtylyov		};
91*70fd8b6aSSergei Shtylyov	};
92*70fd8b6aSSergei Shtylyov
93*70fd8b6aSSergei Shtylyov	x1_clk: x1-clock {
94*70fd8b6aSSergei Shtylyov		compatible = "fixed-clock";
95*70fd8b6aSSergei Shtylyov		#clock-cells = <0>;
96*70fd8b6aSSergei Shtylyov		clock-frequency = <148500000>;
97*70fd8b6aSSergei Shtylyov	};
98b9edbce9SSergei Shtylyov};
99b9edbce9SSergei Shtylyov
1008091788fSSergei Shtylyov&avb {
10155cda281SSergei Shtylyov	pinctrl-0 = <&avb_pins>;
10255cda281SSergei Shtylyov	pinctrl-names = "default";
10355cda281SSergei Shtylyov
1048091788fSSergei Shtylyov	phy-mode = "rgmii-id";
1058091788fSSergei Shtylyov	phy-handle = <&phy0>;
1068091788fSSergei Shtylyov	renesas,no-ether-link;
1078091788fSSergei Shtylyov	status = "okay";
1088091788fSSergei Shtylyov
1098091788fSSergei Shtylyov	phy0: ethernet-phy@0 {
1108091788fSSergei Shtylyov		rxc-skew-ps = <1500>;
1118091788fSSergei Shtylyov		reg = <0>;
112ffbd5235SSergei Shtylyov		interrupt-parent = <&gpio1>;
113ffbd5235SSergei Shtylyov		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
1148091788fSSergei Shtylyov	};
1158091788fSSergei Shtylyov};
1168091788fSSergei Shtylyov
1177a9706d2SSergei Shtylyov&canfd {
1187a9706d2SSergei Shtylyov	pinctrl-0 = <&canfd0_pins>;
1197a9706d2SSergei Shtylyov	pinctrl-names = "default";
1207a9706d2SSergei Shtylyov	status = "okay";
1217a9706d2SSergei Shtylyov
1227a9706d2SSergei Shtylyov	channel0 {
1237a9706d2SSergei Shtylyov		status = "okay";
1247a9706d2SSergei Shtylyov	};
1257a9706d2SSergei Shtylyov};
1267a9706d2SSergei Shtylyov
127*70fd8b6aSSergei Shtylyov&du {
128*70fd8b6aSSergei Shtylyov	clocks = <&cpg CPG_MOD 724>,
129*70fd8b6aSSergei Shtylyov		 <&x1_clk>;
130*70fd8b6aSSergei Shtylyov	clock-names = "du.0", "dclkin.0";
131*70fd8b6aSSergei Shtylyov	status = "okay";
132*70fd8b6aSSergei Shtylyov};
133*70fd8b6aSSergei Shtylyov
134b9edbce9SSergei Shtylyov&extal_clk {
135b9edbce9SSergei Shtylyov	clock-frequency = <16666666>;
136b9edbce9SSergei Shtylyov};
137b9edbce9SSergei Shtylyov
138b9edbce9SSergei Shtylyov&extalr_clk {
139b9edbce9SSergei Shtylyov	clock-frequency = <32768>;
140b9edbce9SSergei Shtylyov};
141b9edbce9SSergei Shtylyov
14245fde0d4SSergei Shtylyov&i2c0 {
14345fde0d4SSergei Shtylyov	pinctrl-0 = <&i2c0_pins>;
14445fde0d4SSergei Shtylyov	pinctrl-names = "default";
14545fde0d4SSergei Shtylyov
14645fde0d4SSergei Shtylyov	status = "okay";
14745fde0d4SSergei Shtylyov	clock-frequency = <400000>;
14845fde0d4SSergei Shtylyov
14945fde0d4SSergei Shtylyov	io_expander0: gpio@20 {
15045fde0d4SSergei Shtylyov		compatible = "onnn,pca9654";
15145fde0d4SSergei Shtylyov		reg = <0x20>;
15245fde0d4SSergei Shtylyov		gpio-controller;
15345fde0d4SSergei Shtylyov		#gpio-cells = <2>;
15445fde0d4SSergei Shtylyov	};
15545fde0d4SSergei Shtylyov
15645fde0d4SSergei Shtylyov	io_expander1: gpio@21 {
15745fde0d4SSergei Shtylyov		compatible = "onnn,pca9654";
15845fde0d4SSergei Shtylyov		reg = <0x21>;
15945fde0d4SSergei Shtylyov		gpio-controller;
16045fde0d4SSergei Shtylyov		#gpio-cells = <2>;
16145fde0d4SSergei Shtylyov	};
162*70fd8b6aSSergei Shtylyov
163*70fd8b6aSSergei Shtylyov	hdmi@39 {
164*70fd8b6aSSergei Shtylyov		compatible = "adi,adv7511w";
165*70fd8b6aSSergei Shtylyov		reg = <0x39>;
166*70fd8b6aSSergei Shtylyov		interrupt-parent = <&gpio1>;
167*70fd8b6aSSergei Shtylyov		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
168*70fd8b6aSSergei Shtylyov		avdd-supply = <&d1_8v>;
169*70fd8b6aSSergei Shtylyov		dvdd-supply = <&d1_8v>;
170*70fd8b6aSSergei Shtylyov		pvdd-supply = <&d1_8v>;
171*70fd8b6aSSergei Shtylyov		bgvdd-supply = <&d1_8v>;
172*70fd8b6aSSergei Shtylyov		dvdd-3v-supply = <&d3_3v>;
173*70fd8b6aSSergei Shtylyov
174*70fd8b6aSSergei Shtylyov		adi,input-depth = <8>;
175*70fd8b6aSSergei Shtylyov		adi,input-colorspace = "rgb";
176*70fd8b6aSSergei Shtylyov		adi,input-clock = "1x";
177*70fd8b6aSSergei Shtylyov		adi,input-style = <1>;
178*70fd8b6aSSergei Shtylyov		adi,input-justification = "evenly";
179*70fd8b6aSSergei Shtylyov
180*70fd8b6aSSergei Shtylyov		ports {
181*70fd8b6aSSergei Shtylyov			#address-cells = <1>;
182*70fd8b6aSSergei Shtylyov			#size-cells = <0>;
183*70fd8b6aSSergei Shtylyov
184*70fd8b6aSSergei Shtylyov			port@0 {
185*70fd8b6aSSergei Shtylyov				reg = <0>;
186*70fd8b6aSSergei Shtylyov				adv7511_in: endpoint {
187*70fd8b6aSSergei Shtylyov					remote-endpoint = <&thc63lvd1024_out>;
188*70fd8b6aSSergei Shtylyov				};
189*70fd8b6aSSergei Shtylyov			};
190*70fd8b6aSSergei Shtylyov
191*70fd8b6aSSergei Shtylyov			port@1 {
192*70fd8b6aSSergei Shtylyov				reg = <1>;
193*70fd8b6aSSergei Shtylyov				adv7511_out: endpoint {
194*70fd8b6aSSergei Shtylyov					remote-endpoint = <&hdmi_con>;
195*70fd8b6aSSergei Shtylyov				};
196*70fd8b6aSSergei Shtylyov			};
197*70fd8b6aSSergei Shtylyov		};
198*70fd8b6aSSergei Shtylyov	};
199*70fd8b6aSSergei Shtylyov};
200*70fd8b6aSSergei Shtylyov
201*70fd8b6aSSergei Shtylyov&lvds0 {
202*70fd8b6aSSergei Shtylyov	status = "okay";
203*70fd8b6aSSergei Shtylyov
204*70fd8b6aSSergei Shtylyov	ports {
205*70fd8b6aSSergei Shtylyov		port@1 {
206*70fd8b6aSSergei Shtylyov			lvds0_out: endpoint {
207*70fd8b6aSSergei Shtylyov				remote-endpoint = <&thc63lvd1024_in>;
208*70fd8b6aSSergei Shtylyov			};
209*70fd8b6aSSergei Shtylyov		};
210*70fd8b6aSSergei Shtylyov	};
21145fde0d4SSergei Shtylyov};
21245fde0d4SSergei Shtylyov
213cc922244SSergei Shtylyov&mmc0 {
214cc922244SSergei Shtylyov	pinctrl-0 = <&mmc_pins>;
215cc922244SSergei Shtylyov	pinctrl-1 = <&mmc_pins_uhs>;
216cc922244SSergei Shtylyov	pinctrl-names = "default", "state_uhs";
217cc922244SSergei Shtylyov
218cc922244SSergei Shtylyov	vmmc-supply = <&d3_3v>;
219cc922244SSergei Shtylyov	vqmmc-supply = <&vddq_vin01>;
220cc922244SSergei Shtylyov	mmc-hs200-1_8v;
221cc922244SSergei Shtylyov	bus-width = <8>;
222cc922244SSergei Shtylyov	non-removable;
223cc922244SSergei Shtylyov	status = "okay";
224cc922244SSergei Shtylyov};
225cc922244SSergei Shtylyov
226a824e63cSSergei Shtylyov&pfc {
22755cda281SSergei Shtylyov	avb_pins: avb {
22855cda281SSergei Shtylyov		groups = "avb_mdio", "avb_rgmii";
22955cda281SSergei Shtylyov		function = "avb";
23055cda281SSergei Shtylyov	};
23155cda281SSergei Shtylyov
2327a9706d2SSergei Shtylyov	canfd0_pins: canfd0 {
2337a9706d2SSergei Shtylyov		groups = "canfd0_data_a";
2347a9706d2SSergei Shtylyov		function = "canfd0";
2357a9706d2SSergei Shtylyov	};
2367a9706d2SSergei Shtylyov
23745fde0d4SSergei Shtylyov	i2c0_pins: i2c0 {
23845fde0d4SSergei Shtylyov		groups = "i2c0";
23945fde0d4SSergei Shtylyov		function = "i2c0";
24045fde0d4SSergei Shtylyov	};
24145fde0d4SSergei Shtylyov
242cc922244SSergei Shtylyov	mmc_pins: mmc {
243cc922244SSergei Shtylyov		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
244cc922244SSergei Shtylyov		function = "mmc";
245cc922244SSergei Shtylyov		power-source = <3300>;
246cc922244SSergei Shtylyov	};
247cc922244SSergei Shtylyov
248cc922244SSergei Shtylyov	mmc_pins_uhs: mmc_uhs {
249cc922244SSergei Shtylyov		groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
250cc922244SSergei Shtylyov		function = "mmc";
251cc922244SSergei Shtylyov		power-source = <1800>;
252cc922244SSergei Shtylyov	};
253cc922244SSergei Shtylyov
254a824e63cSSergei Shtylyov	scif0_pins: scif0 {
255a824e63cSSergei Shtylyov		groups = "scif0_data";
256a824e63cSSergei Shtylyov		function = "scif0";
257a824e63cSSergei Shtylyov	};
258a824e63cSSergei Shtylyov
259a824e63cSSergei Shtylyov	scif_clk_pins: scif_clk {
260a824e63cSSergei Shtylyov		groups = "scif_clk_b";
261a824e63cSSergei Shtylyov		function = "scif_clk";
262a824e63cSSergei Shtylyov	};
263a824e63cSSergei Shtylyov};
264a824e63cSSergei Shtylyov
265bcee502cSSergei Shtylyov&rwdt {
266bcee502cSSergei Shtylyov	timeout-sec = <60>;
267bcee502cSSergei Shtylyov	status = "okay";
268bcee502cSSergei Shtylyov};
269bcee502cSSergei Shtylyov
270b9edbce9SSergei Shtylyov&scif0 {
271a824e63cSSergei Shtylyov	pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
272a824e63cSSergei Shtylyov	pinctrl-names = "default";
273a824e63cSSergei Shtylyov
274b9edbce9SSergei Shtylyov	status = "okay";
275b9edbce9SSergei Shtylyov};
276b9edbce9SSergei Shtylyov
277b9edbce9SSergei Shtylyov&scif_clk {
278b9edbce9SSergei Shtylyov	clock-frequency = <14745600>;
279b9edbce9SSergei Shtylyov};
280