1b9edbce9SSergei Shtylyov// SPDX-License-Identifier: GPL-2.0 2b9edbce9SSergei Shtylyov/* 3b9edbce9SSergei Shtylyov * Device Tree Source for the Condor board 4b9edbce9SSergei Shtylyov * 5b9edbce9SSergei Shtylyov * Copyright (C) 2018 Renesas Electronics Corp. 6b9edbce9SSergei Shtylyov * Copyright (C) 2018 Cogent Embedded, Inc. 7b9edbce9SSergei Shtylyov */ 8b9edbce9SSergei Shtylyov 9b9edbce9SSergei Shtylyov/dts-v1/; 10b9edbce9SSergei Shtylyov#include "r8a77980.dtsi" 11b9edbce9SSergei Shtylyov 12b9edbce9SSergei Shtylyov/ { 13b9edbce9SSergei Shtylyov model = "Renesas Condor board based on r8a77980"; 14b9edbce9SSergei Shtylyov compatible = "renesas,condor", "renesas,r8a77980"; 15b9edbce9SSergei Shtylyov 16b9edbce9SSergei Shtylyov aliases { 17b9edbce9SSergei Shtylyov serial0 = &scif0; 188091788fSSergei Shtylyov ethernet0 = &avb; 19b9edbce9SSergei Shtylyov }; 20b9edbce9SSergei Shtylyov 21b9edbce9SSergei Shtylyov chosen { 22b9edbce9SSergei Shtylyov stdout-path = "serial0:115200n8"; 23b9edbce9SSergei Shtylyov }; 24b9edbce9SSergei Shtylyov 25b9edbce9SSergei Shtylyov memory@48000000 { 26b9edbce9SSergei Shtylyov device_type = "memory"; 27b9edbce9SSergei Shtylyov /* first 128MB is reserved for secure area. */ 28b9edbce9SSergei Shtylyov reg = <0 0x48000000 0 0x78000000>; 29b9edbce9SSergei Shtylyov }; 30cc922244SSergei Shtylyov 31cc922244SSergei Shtylyov d3_3v: regulator-0 { 32cc922244SSergei Shtylyov compatible = "regulator-fixed"; 33cc922244SSergei Shtylyov regulator-name = "D3.3V"; 34cc922244SSergei Shtylyov regulator-min-microvolt = <3300000>; 35cc922244SSergei Shtylyov regulator-max-microvolt = <3300000>; 36cc922244SSergei Shtylyov regulator-boot-on; 37cc922244SSergei Shtylyov regulator-always-on; 38cc922244SSergei Shtylyov }; 39cc922244SSergei Shtylyov 40cc922244SSergei Shtylyov vddq_vin01: regulator-1 { 41cc922244SSergei Shtylyov compatible = "regulator-fixed"; 42cc922244SSergei Shtylyov regulator-name = "VDDQ_VIN01"; 43cc922244SSergei Shtylyov regulator-min-microvolt = <1800000>; 44cc922244SSergei Shtylyov regulator-max-microvolt = <1800000>; 45cc922244SSergei Shtylyov regulator-boot-on; 46cc922244SSergei Shtylyov regulator-always-on; 47cc922244SSergei Shtylyov }; 48b9edbce9SSergei Shtylyov}; 49b9edbce9SSergei Shtylyov 508091788fSSergei Shtylyov&avb { 5155cda281SSergei Shtylyov pinctrl-0 = <&avb_pins>; 5255cda281SSergei Shtylyov pinctrl-names = "default"; 5355cda281SSergei Shtylyov 548091788fSSergei Shtylyov phy-mode = "rgmii-id"; 558091788fSSergei Shtylyov phy-handle = <&phy0>; 568091788fSSergei Shtylyov renesas,no-ether-link; 578091788fSSergei Shtylyov status = "okay"; 588091788fSSergei Shtylyov 598091788fSSergei Shtylyov phy0: ethernet-phy@0 { 608091788fSSergei Shtylyov rxc-skew-ps = <1500>; 618091788fSSergei Shtylyov reg = <0>; 628091788fSSergei Shtylyov }; 638091788fSSergei Shtylyov}; 648091788fSSergei Shtylyov 657a9706d2SSergei Shtylyov&canfd { 667a9706d2SSergei Shtylyov pinctrl-0 = <&canfd0_pins>; 677a9706d2SSergei Shtylyov pinctrl-names = "default"; 687a9706d2SSergei Shtylyov status = "okay"; 697a9706d2SSergei Shtylyov 707a9706d2SSergei Shtylyov channel0 { 717a9706d2SSergei Shtylyov status = "okay"; 727a9706d2SSergei Shtylyov }; 737a9706d2SSergei Shtylyov}; 747a9706d2SSergei Shtylyov 75b9edbce9SSergei Shtylyov&extal_clk { 76b9edbce9SSergei Shtylyov clock-frequency = <16666666>; 77b9edbce9SSergei Shtylyov}; 78b9edbce9SSergei Shtylyov 79b9edbce9SSergei Shtylyov&extalr_clk { 80b9edbce9SSergei Shtylyov clock-frequency = <32768>; 81b9edbce9SSergei Shtylyov}; 82b9edbce9SSergei Shtylyov 83*45fde0d4SSergei Shtylyov&i2c0 { 84*45fde0d4SSergei Shtylyov pinctrl-0 = <&i2c0_pins>; 85*45fde0d4SSergei Shtylyov pinctrl-names = "default"; 86*45fde0d4SSergei Shtylyov 87*45fde0d4SSergei Shtylyov status = "okay"; 88*45fde0d4SSergei Shtylyov clock-frequency = <400000>; 89*45fde0d4SSergei Shtylyov 90*45fde0d4SSergei Shtylyov io_expander0: gpio@20 { 91*45fde0d4SSergei Shtylyov compatible = "onnn,pca9654"; 92*45fde0d4SSergei Shtylyov reg = <0x20>; 93*45fde0d4SSergei Shtylyov gpio-controller; 94*45fde0d4SSergei Shtylyov #gpio-cells = <2>; 95*45fde0d4SSergei Shtylyov }; 96*45fde0d4SSergei Shtylyov 97*45fde0d4SSergei Shtylyov io_expander1: gpio@21 { 98*45fde0d4SSergei Shtylyov compatible = "onnn,pca9654"; 99*45fde0d4SSergei Shtylyov reg = <0x21>; 100*45fde0d4SSergei Shtylyov gpio-controller; 101*45fde0d4SSergei Shtylyov #gpio-cells = <2>; 102*45fde0d4SSergei Shtylyov }; 103*45fde0d4SSergei Shtylyov}; 104*45fde0d4SSergei Shtylyov 105cc922244SSergei Shtylyov&mmc0 { 106cc922244SSergei Shtylyov pinctrl-0 = <&mmc_pins>; 107cc922244SSergei Shtylyov pinctrl-1 = <&mmc_pins_uhs>; 108cc922244SSergei Shtylyov pinctrl-names = "default", "state_uhs"; 109cc922244SSergei Shtylyov 110cc922244SSergei Shtylyov vmmc-supply = <&d3_3v>; 111cc922244SSergei Shtylyov vqmmc-supply = <&vddq_vin01>; 112cc922244SSergei Shtylyov mmc-hs200-1_8v; 113cc922244SSergei Shtylyov bus-width = <8>; 114cc922244SSergei Shtylyov non-removable; 115cc922244SSergei Shtylyov status = "okay"; 116cc922244SSergei Shtylyov}; 117cc922244SSergei Shtylyov 118a824e63cSSergei Shtylyov&pfc { 11955cda281SSergei Shtylyov avb_pins: avb { 12055cda281SSergei Shtylyov groups = "avb_mdio", "avb_rgmii"; 12155cda281SSergei Shtylyov function = "avb"; 12255cda281SSergei Shtylyov }; 12355cda281SSergei Shtylyov 1247a9706d2SSergei Shtylyov canfd0_pins: canfd0 { 1257a9706d2SSergei Shtylyov groups = "canfd0_data_a"; 1267a9706d2SSergei Shtylyov function = "canfd0"; 1277a9706d2SSergei Shtylyov }; 1287a9706d2SSergei Shtylyov 129*45fde0d4SSergei Shtylyov i2c0_pins: i2c0 { 130*45fde0d4SSergei Shtylyov groups = "i2c0"; 131*45fde0d4SSergei Shtylyov function = "i2c0"; 132*45fde0d4SSergei Shtylyov }; 133*45fde0d4SSergei Shtylyov 134cc922244SSergei Shtylyov mmc_pins: mmc { 135cc922244SSergei Shtylyov groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 136cc922244SSergei Shtylyov function = "mmc"; 137cc922244SSergei Shtylyov power-source = <3300>; 138cc922244SSergei Shtylyov }; 139cc922244SSergei Shtylyov 140cc922244SSergei Shtylyov mmc_pins_uhs: mmc_uhs { 141cc922244SSergei Shtylyov groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 142cc922244SSergei Shtylyov function = "mmc"; 143cc922244SSergei Shtylyov power-source = <1800>; 144cc922244SSergei Shtylyov }; 145cc922244SSergei Shtylyov 146a824e63cSSergei Shtylyov scif0_pins: scif0 { 147a824e63cSSergei Shtylyov groups = "scif0_data"; 148a824e63cSSergei Shtylyov function = "scif0"; 149a824e63cSSergei Shtylyov }; 150a824e63cSSergei Shtylyov 151a824e63cSSergei Shtylyov scif_clk_pins: scif_clk { 152a824e63cSSergei Shtylyov groups = "scif_clk_b"; 153a824e63cSSergei Shtylyov function = "scif_clk"; 154a824e63cSSergei Shtylyov }; 155a824e63cSSergei Shtylyov}; 156a824e63cSSergei Shtylyov 157b9edbce9SSergei Shtylyov&scif0 { 158a824e63cSSergei Shtylyov pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>; 159a824e63cSSergei Shtylyov pinctrl-names = "default"; 160a824e63cSSergei Shtylyov 161b9edbce9SSergei Shtylyov status = "okay"; 162b9edbce9SSergei Shtylyov}; 163b9edbce9SSergei Shtylyov 164b9edbce9SSergei Shtylyov&scif_clk { 165b9edbce9SSergei Shtylyov clock-frequency = <14745600>; 166b9edbce9SSergei Shtylyov}; 167