1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Eagle board 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 * Copyright (C) 2017 Cogent Embedded, Inc. 7 */ 8 9/dts-v1/; 10#include "r8a77970.dtsi" 11 12/ { 13 model = "Renesas Eagle board based on r8a77970"; 14 compatible = "renesas,eagle", "renesas,r8a77970"; 15 16 aliases { 17 serial0 = &scif0; 18 ethernet0 = &avb; 19 }; 20 21 chosen { 22 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 23 stdout-path = "serial0:115200n8"; 24 }; 25 26 d3p3: regulator-fixed { 27 compatible = "regulator-fixed"; 28 regulator-name = "fixed-3.3V"; 29 regulator-min-microvolt = <3300000>; 30 regulator-max-microvolt = <3300000>; 31 regulator-boot-on; 32 regulator-always-on; 33 }; 34 35 hdmi-out { 36 compatible = "hdmi-connector"; 37 type = "a"; 38 39 port { 40 hdmi_con_out: endpoint { 41 remote-endpoint = <&adv7511_out>; 42 }; 43 }; 44 }; 45 46 lvds-decoder { 47 compatible = "thine,thc63lvd1024"; 48 49 vcc-supply = <&d3p3>; 50 51 ports { 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 port@0 { 56 reg = <0>; 57 thc63lvd1024_in: endpoint { 58 remote-endpoint = <&lvds0_out>; 59 }; 60 }; 61 62 port@2 { 63 reg = <2>; 64 thc63lvd1024_out: endpoint { 65 remote-endpoint = <&adv7511_in>; 66 }; 67 }; 68 }; 69 }; 70 71 memory@48000000 { 72 device_type = "memory"; 73 /* first 128MB is reserved for secure area. */ 74 reg = <0x0 0x48000000 0x0 0x38000000>; 75 }; 76}; 77 78&avb { 79 pinctrl-0 = <&avb_pins>; 80 pinctrl-names = "default"; 81 82 renesas,no-ether-link; 83 phy-handle = <&phy0>; 84 phy-mode = "rgmii-id"; 85 status = "okay"; 86 87 phy0: ethernet-phy@0 { 88 rxc-skew-ps = <1500>; 89 reg = <0>; 90 interrupt-parent = <&gpio1>; 91 interrupts = <17 IRQ_TYPE_LEVEL_LOW>; 92 }; 93}; 94 95&canfd { 96 pinctrl-0 = <&canfd0_pins>; 97 pinctrl-names = "default"; 98 status = "okay"; 99 100 channel0 { 101 status = "okay"; 102 }; 103}; 104 105&du { 106 status = "okay"; 107}; 108 109&extal_clk { 110 clock-frequency = <16666666>; 111}; 112 113&extalr_clk { 114 clock-frequency = <32768>; 115}; 116 117&i2c0 { 118 pinctrl-0 = <&i2c0_pins>; 119 pinctrl-names = "default"; 120 121 status = "okay"; 122 clock-frequency = <400000>; 123 124 io_expander: gpio@20 { 125 compatible = "onnn,pca9654"; 126 reg = <0x20>; 127 gpio-controller; 128 #gpio-cells = <2>; 129 }; 130 131 hdmi@39 { 132 compatible = "adi,adv7511w"; 133 reg = <0x39>; 134 interrupt-parent = <&gpio1>; 135 interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 136 137 adi,input-depth = <8>; 138 adi,input-colorspace = "rgb"; 139 adi,input-clock = "1x"; 140 141 ports { 142 #address-cells = <1>; 143 #size-cells = <0>; 144 145 port@0 { 146 reg = <0>; 147 adv7511_in: endpoint { 148 remote-endpoint = <&thc63lvd1024_out>; 149 }; 150 }; 151 152 port@1 { 153 reg = <1>; 154 adv7511_out: endpoint { 155 remote-endpoint = <&hdmi_con_out>; 156 }; 157 }; 158 }; 159 }; 160}; 161 162&lvds0 { 163 status = "okay"; 164 165 ports { 166 port@1 { 167 lvds0_out: endpoint { 168 remote-endpoint = <&thc63lvd1024_in>; 169 }; 170 }; 171 }; 172}; 173 174&pfc { 175 avb_pins: avb0 { 176 groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; 177 function = "avb0"; 178 }; 179 180 canfd0_pins: canfd0 { 181 groups = "canfd0_data_a"; 182 function = "canfd0"; 183 }; 184 185 i2c0_pins: i2c0 { 186 groups = "i2c0"; 187 function = "i2c0"; 188 }; 189 190 qspi0_pins: qspi0 { 191 groups = "qspi0_ctrl", "qspi0_data4"; 192 function = "qspi0"; 193 }; 194 195 scif0_pins: scif0 { 196 groups = "scif0_data"; 197 function = "scif0"; 198 }; 199}; 200 201&rpc { 202 pinctrl-0 = <&qspi0_pins>; 203 pinctrl-names = "default"; 204 205 status = "okay"; 206 207 flash@0 { 208 compatible = "spansion,s25fs512s", "jedec,spi-nor"; 209 reg = <0>; 210 spi-max-frequency = <50000000>; 211 spi-rx-bus-width = <4>; 212 213 partitions { 214 compatible = "fixed-partitions"; 215 #address-cells = <1>; 216 #size-cells = <1>; 217 218 bootparam@0 { 219 reg = <0x00000000 0x040000>; 220 read-only; 221 }; 222 cr7@40000 { 223 reg = <0x00040000 0x080000>; 224 read-only; 225 }; 226 cert_header_sa3@c0000 { 227 reg = <0x000c0000 0x080000>; 228 read-only; 229 }; 230 bl2@140000 { 231 reg = <0x00140000 0x040000>; 232 read-only; 233 }; 234 cert_header_sa6@180000 { 235 reg = <0x00180000 0x040000>; 236 read-only; 237 }; 238 bl31@1c0000 { 239 reg = <0x001c0000 0x460000>; 240 read-only; 241 }; 242 uboot@640000 { 243 reg = <0x00640000 0x0c0000>; 244 read-only; 245 }; 246 uboot-env@700000 { 247 reg = <0x00700000 0x040000>; 248 read-only; 249 }; 250 dtb@740000 { 251 reg = <0x00740000 0x080000>; 252 }; 253 kernel@7c0000 { 254 reg = <0x007c0000 0x1400000>; 255 }; 256 user@1bc0000 { 257 reg = <0x01bc0000 0x2440000>; 258 }; 259 }; 260 }; 261}; 262 263&rwdt { 264 timeout-sec = <60>; 265 status = "okay"; 266}; 267 268&scif0 { 269 pinctrl-0 = <&scif0_pins>; 270 pinctrl-names = "default"; 271 272 status = "okay"; 273}; 274