1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Eagle V3M Function expansion board. 4 * 5 * Copyright (C) 2024 Niklas Söderlund <niklas.soderlund@ragnatech.se> 6 */ 7 8/dts-v1/; 9/plugin/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13 14/ { 15 /* CN4 */ 16 /* Eagle: SW18 set to OFF */ 17 cvbs-in-cn4 { 18 compatible = "composite-video-connector"; 19 label = "CVBS IN CN4"; 20 21 port { 22 cvbs_con: endpoint { 23 remote-endpoint = <&adv7482_ain7>; 24 }; 25 }; 26 }; 27 28 /* CN2 */ 29 /* Eagle: SW35 set 5, 6 and 8 to OFF */ 30 hdmi-in-cn2 { 31 compatible = "hdmi-connector"; 32 label = "HDMI IN CN2"; 33 type = "a"; 34 35 port { 36 hdmi_in_con2: endpoint { 37 remote-endpoint = <&adv7612_in>; 38 }; 39 }; 40 }; 41 42 /* CN3 */ 43 /* Eagle: SW18 set to OFF */ 44 hdmi-in-cn3 { 45 compatible = "hdmi-connector"; 46 label = "HDMI IN CN3"; 47 type = "a"; 48 49 port { 50 hdmi_in_con: endpoint { 51 remote-endpoint = <&adv7482_hdmi>; 52 }; 53 }; 54 }; 55}; 56 57/* Disconnect MAX9286 GMSL I2C. */ 58&i2c3 { 59 status = "disabled"; 60}; 61 62/* Connect expansion board I2C. */ 63&i2c0 { 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 gpio@27 { 68 compatible = "onnn,pca9654"; 69 reg = <0x27>; 70 gpio-controller; 71 #gpio-cells = <2>; 72 73 vin0_adv7612_en { 74 gpio-hog; 75 gpios = <3 GPIO_ACTIVE_LOW>; 76 output-high; 77 line-name = "VIN0_ADV7612_ENn"; 78 }; 79 }; 80 81 hdmi-decoder@4c { 82 compatible = "adi,adv7612"; 83 reg = <0x4c>, <0x50>, <0x52>, <0x54>, <0x56>, <0x58>; 84 reg-names = "main", "afe", "rep", "edid", "hdmi", "cp"; 85 interrupt-parent = <&gpio3>; 86 interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 87 default-input = <0>; 88 89 ports { 90 #address-cells = <1>; 91 #size-cells = <0>; 92 93 port@0 { 94 reg = <0>; 95 96 adv7612_in: endpoint { 97 remote-endpoint = <&hdmi_in_con2>; 98 }; 99 }; 100 101 port@2 { 102 reg = <2>; 103 104 adv7612_out: endpoint { 105 remote-endpoint = <&vin0_in>; 106 }; 107 }; 108 }; 109 }; 110 111 video-receiver@70 { 112 compatible = "adi,adv7482"; 113 reg = <0x70 0x71 0x72 0x73 0x74 0x75 114 0x60 0x61 0x62 0x63 0x64 0x65>; 115 reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater", 116 "infoframe", "cbus", "cec", "sdp", "txa", "txb" ; 117 interrupt-parent = <&gpio3>; 118 interrupts = <03 IRQ_TYPE_LEVEL_LOW>, <04 IRQ_TYPE_LEVEL_LOW>; 119 interrupt-names = "intrq1", "intrq2"; 120 121 ports { 122 #address-cells = <1>; 123 #size-cells = <0>; 124 125 port@7 { 126 reg = <7>; 127 128 adv7482_ain7: endpoint { 129 remote-endpoint = <&cvbs_con>; 130 }; 131 }; 132 133 port@8 { 134 reg = <8>; 135 136 adv7482_hdmi: endpoint { 137 remote-endpoint = <&hdmi_in_con>; 138 }; 139 }; 140 141 port@a { 142 reg = <10>; 143 144 adv7482_txa: endpoint { 145 clock-lanes = <0>; 146 data-lanes = <1 2 3 4>; 147 remote-endpoint = <&csi40_in>; 148 }; 149 }; 150 }; 151 }; 152 153}; 154 155&csi40 { 156 status = "okay"; 157 158 ports { 159 #address-cells = <1>; 160 #size-cells = <0>; 161 162 port@0 { 163 reg = <0>; 164 165 csi40_in: endpoint { 166 clock-lanes = <0>; 167 data-lanes = <1 2 3 4>; 168 remote-endpoint = <&adv7482_txa>; 169 }; 170 }; 171 }; 172}; 173 174&pfc { 175 vin0_pins_parallel: vin0 { 176 groups = "vin0_data12", "vin0_sync", "vin0_clk", "vin0_clkenb"; 177 function = "vin0"; 178 }; 179}; 180 181&vin0 { 182 status = "okay"; 183 184 pinctrl-0 = <&vin0_pins_parallel>; 185 pinctrl-names = "default"; 186 187 ports { 188 #address-cells = <1>; 189 #size-cells = <0>; 190 191 port@0 { 192 reg = <0>; 193 194 vin0_in: endpoint { 195 pclk-sample = <0>; 196 hsync-active = <0>; 197 vsync-active = <0>; 198 remote-endpoint = <&adv7612_out>; 199 }; 200 }; 201 }; 202}; 203 204&vin1 { 205 status = "okay"; 206}; 207 208&vin2 { 209 status = "okay"; 210}; 211 212&vin3 { 213 status = "okay"; 214}; 215