1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cluster0_opp: opp_table0 { 64 compatible = "operating-points-v2"; 65 opp-shared; 66 67 opp-500000000 { 68 opp-hz = /bits/ 64 <500000000>; 69 opp-microvolt = <830000>; 70 clock-latency-ns = <300000>; 71 }; 72 opp-1000000000 { 73 opp-hz = /bits/ 64 <1000000000>; 74 opp-microvolt = <830000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1500000000 { 78 opp-hz = /bits/ 64 <1500000000>; 79 opp-microvolt = <830000>; 80 clock-latency-ns = <300000>; 81 opp-suspend; 82 }; 83 opp-1600000000 { 84 opp-hz = /bits/ 64 <1600000000>; 85 opp-microvolt = <900000>; 86 clock-latency-ns = <300000>; 87 turbo-mode; 88 }; 89 opp-1700000000 { 90 opp-hz = /bits/ 64 <1700000000>; 91 opp-microvolt = <900000>; 92 clock-latency-ns = <300000>; 93 turbo-mode; 94 }; 95 opp-1800000000 { 96 opp-hz = /bits/ 64 <1800000000>; 97 opp-microvolt = <960000>; 98 clock-latency-ns = <300000>; 99 turbo-mode; 100 }; 101 }; 102 103 cpus { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 a57_0: cpu@0 { 108 compatible = "arm,cortex-a57"; 109 reg = <0x0>; 110 device_type = "cpu"; 111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 112 next-level-cache = <&L2_CA57>; 113 enable-method = "psci"; 114 #cooling-cells = <2>; 115 dynamic-power-coefficient = <854>; 116 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 117 operating-points-v2 = <&cluster0_opp>; 118 }; 119 120 a57_1: cpu@1 { 121 compatible = "arm,cortex-a57"; 122 reg = <0x1>; 123 device_type = "cpu"; 124 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 125 next-level-cache = <&L2_CA57>; 126 enable-method = "psci"; 127 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; 128 operating-points-v2 = <&cluster0_opp>; 129 }; 130 131 L2_CA57: cache-controller-0 { 132 compatible = "cache"; 133 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 134 cache-unified; 135 cache-level = <2>; 136 }; 137 }; 138 139 extal_clk: extal { 140 compatible = "fixed-clock"; 141 #clock-cells = <0>; 142 /* This value must be overridden by the board */ 143 clock-frequency = <0>; 144 }; 145 146 extalr_clk: extalr { 147 compatible = "fixed-clock"; 148 #clock-cells = <0>; 149 /* This value must be overridden by the board */ 150 clock-frequency = <0>; 151 }; 152 153 /* External PCIe clock - can be overridden by the board */ 154 pcie_bus_clk: pcie_bus { 155 compatible = "fixed-clock"; 156 #clock-cells = <0>; 157 clock-frequency = <0>; 158 }; 159 160 pmu_a57 { 161 compatible = "arm,cortex-a57-pmu"; 162 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 163 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 164 interrupt-affinity = <&a57_0>, 165 <&a57_1>; 166 }; 167 168 psci { 169 compatible = "arm,psci-1.0", "arm,psci-0.2"; 170 method = "smc"; 171 }; 172 173 /* External SCIF clock - to be overridden by boards that provide it */ 174 scif_clk: scif { 175 compatible = "fixed-clock"; 176 #clock-cells = <0>; 177 clock-frequency = <0>; 178 }; 179 180 soc { 181 compatible = "simple-bus"; 182 interrupt-parent = <&gic>; 183 #address-cells = <2>; 184 #size-cells = <2>; 185 ranges; 186 187 rwdt: watchdog@e6020000 { 188 compatible = "renesas,r8a77965-wdt", 189 "renesas,rcar-gen3-wdt"; 190 reg = <0 0xe6020000 0 0x0c>; 191 clocks = <&cpg CPG_MOD 402>; 192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 193 resets = <&cpg 402>; 194 status = "disabled"; 195 }; 196 197 gpio0: gpio@e6050000 { 198 compatible = "renesas,gpio-r8a77965", 199 "renesas,rcar-gen3-gpio"; 200 reg = <0 0xe6050000 0 0x50>; 201 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 202 #gpio-cells = <2>; 203 gpio-controller; 204 gpio-ranges = <&pfc 0 0 16>; 205 #interrupt-cells = <2>; 206 interrupt-controller; 207 clocks = <&cpg CPG_MOD 912>; 208 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 209 resets = <&cpg 912>; 210 }; 211 212 gpio1: gpio@e6051000 { 213 compatible = "renesas,gpio-r8a77965", 214 "renesas,rcar-gen3-gpio"; 215 reg = <0 0xe6051000 0 0x50>; 216 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 217 #gpio-cells = <2>; 218 gpio-controller; 219 gpio-ranges = <&pfc 0 32 29>; 220 #interrupt-cells = <2>; 221 interrupt-controller; 222 clocks = <&cpg CPG_MOD 911>; 223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 224 resets = <&cpg 911>; 225 }; 226 227 gpio2: gpio@e6052000 { 228 compatible = "renesas,gpio-r8a77965", 229 "renesas,rcar-gen3-gpio"; 230 reg = <0 0xe6052000 0 0x50>; 231 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 232 #gpio-cells = <2>; 233 gpio-controller; 234 gpio-ranges = <&pfc 0 64 15>; 235 #interrupt-cells = <2>; 236 interrupt-controller; 237 clocks = <&cpg CPG_MOD 910>; 238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 239 resets = <&cpg 910>; 240 }; 241 242 gpio3: gpio@e6053000 { 243 compatible = "renesas,gpio-r8a77965", 244 "renesas,rcar-gen3-gpio"; 245 reg = <0 0xe6053000 0 0x50>; 246 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 247 #gpio-cells = <2>; 248 gpio-controller; 249 gpio-ranges = <&pfc 0 96 16>; 250 #interrupt-cells = <2>; 251 interrupt-controller; 252 clocks = <&cpg CPG_MOD 909>; 253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 254 resets = <&cpg 909>; 255 }; 256 257 gpio4: gpio@e6054000 { 258 compatible = "renesas,gpio-r8a77965", 259 "renesas,rcar-gen3-gpio"; 260 reg = <0 0xe6054000 0 0x50>; 261 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 262 #gpio-cells = <2>; 263 gpio-controller; 264 gpio-ranges = <&pfc 0 128 18>; 265 #interrupt-cells = <2>; 266 interrupt-controller; 267 clocks = <&cpg CPG_MOD 908>; 268 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 269 resets = <&cpg 908>; 270 }; 271 272 gpio5: gpio@e6055000 { 273 compatible = "renesas,gpio-r8a77965", 274 "renesas,rcar-gen3-gpio"; 275 reg = <0 0xe6055000 0 0x50>; 276 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 277 #gpio-cells = <2>; 278 gpio-controller; 279 gpio-ranges = <&pfc 0 160 26>; 280 #interrupt-cells = <2>; 281 interrupt-controller; 282 clocks = <&cpg CPG_MOD 907>; 283 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 284 resets = <&cpg 907>; 285 }; 286 287 gpio6: gpio@e6055400 { 288 compatible = "renesas,gpio-r8a77965", 289 "renesas,rcar-gen3-gpio"; 290 reg = <0 0xe6055400 0 0x50>; 291 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 292 #gpio-cells = <2>; 293 gpio-controller; 294 gpio-ranges = <&pfc 0 192 32>; 295 #interrupt-cells = <2>; 296 interrupt-controller; 297 clocks = <&cpg CPG_MOD 906>; 298 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 299 resets = <&cpg 906>; 300 }; 301 302 gpio7: gpio@e6055800 { 303 compatible = "renesas,gpio-r8a77965", 304 "renesas,rcar-gen3-gpio"; 305 reg = <0 0xe6055800 0 0x50>; 306 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 307 #gpio-cells = <2>; 308 gpio-controller; 309 gpio-ranges = <&pfc 0 224 4>; 310 #interrupt-cells = <2>; 311 interrupt-controller; 312 clocks = <&cpg CPG_MOD 905>; 313 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 314 resets = <&cpg 905>; 315 }; 316 317 pfc: pin-controller@e6060000 { 318 compatible = "renesas,pfc-r8a77965"; 319 reg = <0 0xe6060000 0 0x50c>; 320 }; 321 322 cmt0: timer@e60f0000 { 323 compatible = "renesas,r8a77965-cmt0", 324 "renesas,rcar-gen3-cmt0"; 325 reg = <0 0xe60f0000 0 0x1004>; 326 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 328 clocks = <&cpg CPG_MOD 303>; 329 clock-names = "fck"; 330 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 331 resets = <&cpg 303>; 332 status = "disabled"; 333 }; 334 335 cmt1: timer@e6130000 { 336 compatible = "renesas,r8a77965-cmt1", 337 "renesas,rcar-gen3-cmt1"; 338 reg = <0 0xe6130000 0 0x1004>; 339 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 341 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 347 clocks = <&cpg CPG_MOD 302>; 348 clock-names = "fck"; 349 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 350 resets = <&cpg 302>; 351 status = "disabled"; 352 }; 353 354 cmt2: timer@e6140000 { 355 compatible = "renesas,r8a77965-cmt1", 356 "renesas,rcar-gen3-cmt1"; 357 reg = <0 0xe6140000 0 0x1004>; 358 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 364 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 365 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 366 clocks = <&cpg CPG_MOD 301>; 367 clock-names = "fck"; 368 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 369 resets = <&cpg 301>; 370 status = "disabled"; 371 }; 372 373 cmt3: timer@e6148000 { 374 compatible = "renesas,r8a77965-cmt1", 375 "renesas,rcar-gen3-cmt1"; 376 reg = <0 0xe6148000 0 0x1004>; 377 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 378 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 379 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 380 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 381 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 382 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 383 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 385 clocks = <&cpg CPG_MOD 300>; 386 clock-names = "fck"; 387 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 388 resets = <&cpg 300>; 389 status = "disabled"; 390 }; 391 392 cpg: clock-controller@e6150000 { 393 compatible = "renesas,r8a77965-cpg-mssr"; 394 reg = <0 0xe6150000 0 0x1000>; 395 clocks = <&extal_clk>, <&extalr_clk>; 396 clock-names = "extal", "extalr"; 397 #clock-cells = <2>; 398 #power-domain-cells = <0>; 399 #reset-cells = <1>; 400 }; 401 402 rst: reset-controller@e6160000 { 403 compatible = "renesas,r8a77965-rst"; 404 reg = <0 0xe6160000 0 0x0200>; 405 }; 406 407 sysc: system-controller@e6180000 { 408 compatible = "renesas,r8a77965-sysc"; 409 reg = <0 0xe6180000 0 0x0400>; 410 #power-domain-cells = <1>; 411 }; 412 413 tsc: thermal@e6198000 { 414 compatible = "renesas,r8a77965-thermal"; 415 reg = <0 0xe6198000 0 0x100>, 416 <0 0xe61a0000 0 0x100>, 417 <0 0xe61a8000 0 0x100>; 418 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 419 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 420 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 421 clocks = <&cpg CPG_MOD 522>; 422 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 423 resets = <&cpg 522>; 424 #thermal-sensor-cells = <1>; 425 }; 426 427 intc_ex: interrupt-controller@e61c0000 { 428 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 429 #interrupt-cells = <2>; 430 interrupt-controller; 431 reg = <0 0xe61c0000 0 0x200>; 432 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 433 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 434 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 435 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 436 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 437 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 438 clocks = <&cpg CPG_MOD 407>; 439 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 440 resets = <&cpg 407>; 441 }; 442 443 i2c0: i2c@e6500000 { 444 #address-cells = <1>; 445 #size-cells = <0>; 446 compatible = "renesas,i2c-r8a77965", 447 "renesas,rcar-gen3-i2c"; 448 reg = <0 0xe6500000 0 0x40>; 449 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 450 clocks = <&cpg CPG_MOD 931>; 451 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 452 resets = <&cpg 931>; 453 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 454 <&dmac2 0x91>, <&dmac2 0x90>; 455 dma-names = "tx", "rx", "tx", "rx"; 456 i2c-scl-internal-delay-ns = <110>; 457 status = "disabled"; 458 }; 459 460 i2c1: i2c@e6508000 { 461 #address-cells = <1>; 462 #size-cells = <0>; 463 compatible = "renesas,i2c-r8a77965", 464 "renesas,rcar-gen3-i2c"; 465 reg = <0 0xe6508000 0 0x40>; 466 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 467 clocks = <&cpg CPG_MOD 930>; 468 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 469 resets = <&cpg 930>; 470 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 471 <&dmac2 0x93>, <&dmac2 0x92>; 472 dma-names = "tx", "rx", "tx", "rx"; 473 i2c-scl-internal-delay-ns = <6>; 474 status = "disabled"; 475 }; 476 477 i2c2: i2c@e6510000 { 478 #address-cells = <1>; 479 #size-cells = <0>; 480 compatible = "renesas,i2c-r8a77965", 481 "renesas,rcar-gen3-i2c"; 482 reg = <0 0xe6510000 0 0x40>; 483 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 484 clocks = <&cpg CPG_MOD 929>; 485 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 486 resets = <&cpg 929>; 487 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 488 <&dmac2 0x95>, <&dmac2 0x94>; 489 dma-names = "tx", "rx", "tx", "rx"; 490 i2c-scl-internal-delay-ns = <6>; 491 status = "disabled"; 492 }; 493 494 i2c3: i2c@e66d0000 { 495 #address-cells = <1>; 496 #size-cells = <0>; 497 compatible = "renesas,i2c-r8a77965", 498 "renesas,rcar-gen3-i2c"; 499 reg = <0 0xe66d0000 0 0x40>; 500 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 928>; 502 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 503 resets = <&cpg 928>; 504 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 505 dma-names = "tx", "rx"; 506 i2c-scl-internal-delay-ns = <110>; 507 status = "disabled"; 508 }; 509 510 i2c4: i2c@e66d8000 { 511 #address-cells = <1>; 512 #size-cells = <0>; 513 compatible = "renesas,i2c-r8a77965", 514 "renesas,rcar-gen3-i2c"; 515 reg = <0 0xe66d8000 0 0x40>; 516 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 517 clocks = <&cpg CPG_MOD 927>; 518 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 519 resets = <&cpg 927>; 520 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 521 dma-names = "tx", "rx"; 522 i2c-scl-internal-delay-ns = <110>; 523 status = "disabled"; 524 }; 525 526 i2c5: i2c@e66e0000 { 527 #address-cells = <1>; 528 #size-cells = <0>; 529 compatible = "renesas,i2c-r8a77965", 530 "renesas,rcar-gen3-i2c"; 531 reg = <0 0xe66e0000 0 0x40>; 532 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 533 clocks = <&cpg CPG_MOD 919>; 534 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 535 resets = <&cpg 919>; 536 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 537 dma-names = "tx", "rx"; 538 i2c-scl-internal-delay-ns = <110>; 539 status = "disabled"; 540 }; 541 542 i2c6: i2c@e66e8000 { 543 #address-cells = <1>; 544 #size-cells = <0>; 545 compatible = "renesas,i2c-r8a77965", 546 "renesas,rcar-gen3-i2c"; 547 reg = <0 0xe66e8000 0 0x40>; 548 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 549 clocks = <&cpg CPG_MOD 918>; 550 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 551 resets = <&cpg 918>; 552 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 553 dma-names = "tx", "rx"; 554 i2c-scl-internal-delay-ns = <6>; 555 status = "disabled"; 556 }; 557 558 i2c_dvfs: i2c@e60b0000 { 559 #address-cells = <1>; 560 #size-cells = <0>; 561 compatible = "renesas,iic-r8a77965", 562 "renesas,rcar-gen3-iic", 563 "renesas,rmobile-iic"; 564 reg = <0 0xe60b0000 0 0x425>; 565 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 566 clocks = <&cpg CPG_MOD 926>; 567 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 568 resets = <&cpg 926>; 569 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 570 dma-names = "tx", "rx"; 571 status = "disabled"; 572 }; 573 574 hscif0: serial@e6540000 { 575 compatible = "renesas,hscif-r8a77965", 576 "renesas,rcar-gen3-hscif", 577 "renesas,hscif"; 578 reg = <0 0xe6540000 0 0x60>; 579 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 580 clocks = <&cpg CPG_MOD 520>, 581 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 582 <&scif_clk>; 583 clock-names = "fck", "brg_int", "scif_clk"; 584 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 585 <&dmac2 0x31>, <&dmac2 0x30>; 586 dma-names = "tx", "rx", "tx", "rx"; 587 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 588 resets = <&cpg 520>; 589 status = "disabled"; 590 }; 591 592 hscif1: serial@e6550000 { 593 compatible = "renesas,hscif-r8a77965", 594 "renesas,rcar-gen3-hscif", 595 "renesas,hscif"; 596 reg = <0 0xe6550000 0 0x60>; 597 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 598 clocks = <&cpg CPG_MOD 519>, 599 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 600 <&scif_clk>; 601 clock-names = "fck", "brg_int", "scif_clk"; 602 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 603 <&dmac2 0x33>, <&dmac2 0x32>; 604 dma-names = "tx", "rx", "tx", "rx"; 605 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 606 resets = <&cpg 519>; 607 status = "disabled"; 608 }; 609 610 hscif2: serial@e6560000 { 611 compatible = "renesas,hscif-r8a77965", 612 "renesas,rcar-gen3-hscif", 613 "renesas,hscif"; 614 reg = <0 0xe6560000 0 0x60>; 615 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 616 clocks = <&cpg CPG_MOD 518>, 617 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 618 <&scif_clk>; 619 clock-names = "fck", "brg_int", "scif_clk"; 620 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 621 <&dmac2 0x35>, <&dmac2 0x34>; 622 dma-names = "tx", "rx", "tx", "rx"; 623 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 624 resets = <&cpg 518>; 625 status = "disabled"; 626 }; 627 628 hscif3: serial@e66a0000 { 629 compatible = "renesas,hscif-r8a77965", 630 "renesas,rcar-gen3-hscif", 631 "renesas,hscif"; 632 reg = <0 0xe66a0000 0 0x60>; 633 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 634 clocks = <&cpg CPG_MOD 517>, 635 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 636 <&scif_clk>; 637 clock-names = "fck", "brg_int", "scif_clk"; 638 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 639 dma-names = "tx", "rx"; 640 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 641 resets = <&cpg 517>; 642 status = "disabled"; 643 }; 644 645 hscif4: serial@e66b0000 { 646 compatible = "renesas,hscif-r8a77965", 647 "renesas,rcar-gen3-hscif", 648 "renesas,hscif"; 649 reg = <0 0xe66b0000 0 0x60>; 650 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 651 clocks = <&cpg CPG_MOD 516>, 652 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 653 <&scif_clk>; 654 clock-names = "fck", "brg_int", "scif_clk"; 655 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 656 dma-names = "tx", "rx"; 657 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 658 resets = <&cpg 516>; 659 status = "disabled"; 660 }; 661 662 hsusb: usb@e6590000 { 663 compatible = "renesas,usbhs-r8a77965", 664 "renesas,rcar-gen3-usbhs"; 665 reg = <0 0xe6590000 0 0x200>; 666 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 667 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 668 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 669 <&usb_dmac1 0>, <&usb_dmac1 1>; 670 dma-names = "ch0", "ch1", "ch2", "ch3"; 671 renesas,buswait = <11>; 672 phys = <&usb2_phy0 3>; 673 phy-names = "usb"; 674 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 675 resets = <&cpg 704>, <&cpg 703>; 676 status = "disabled"; 677 }; 678 679 usb_dmac0: dma-controller@e65a0000 { 680 compatible = "renesas,r8a77965-usb-dmac", 681 "renesas,usb-dmac"; 682 reg = <0 0xe65a0000 0 0x100>; 683 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 684 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 685 interrupt-names = "ch0", "ch1"; 686 clocks = <&cpg CPG_MOD 330>; 687 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 688 resets = <&cpg 330>; 689 #dma-cells = <1>; 690 dma-channels = <2>; 691 }; 692 693 usb_dmac1: dma-controller@e65b0000 { 694 compatible = "renesas,r8a77965-usb-dmac", 695 "renesas,usb-dmac"; 696 reg = <0 0xe65b0000 0 0x100>; 697 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 698 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 699 interrupt-names = "ch0", "ch1"; 700 clocks = <&cpg CPG_MOD 331>; 701 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 702 resets = <&cpg 331>; 703 #dma-cells = <1>; 704 dma-channels = <2>; 705 }; 706 707 usb3_phy0: usb-phy@e65ee000 { 708 compatible = "renesas,r8a77965-usb3-phy", 709 "renesas,rcar-gen3-usb3-phy"; 710 reg = <0 0xe65ee000 0 0x90>; 711 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 712 <&usb_extal_clk>; 713 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 714 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 715 resets = <&cpg 328>; 716 #phy-cells = <0>; 717 status = "disabled"; 718 }; 719 720 dmac0: dma-controller@e6700000 { 721 compatible = "renesas,dmac-r8a77965", 722 "renesas,rcar-dmac"; 723 reg = <0 0xe6700000 0 0x10000>; 724 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 725 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 726 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 727 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 728 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 729 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 730 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 731 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 732 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 733 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 734 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 735 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 736 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 737 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 738 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 739 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 740 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 741 interrupt-names = "error", 742 "ch0", "ch1", "ch2", "ch3", 743 "ch4", "ch5", "ch6", "ch7", 744 "ch8", "ch9", "ch10", "ch11", 745 "ch12", "ch13", "ch14", "ch15"; 746 clocks = <&cpg CPG_MOD 219>; 747 clock-names = "fck"; 748 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 749 resets = <&cpg 219>; 750 #dma-cells = <1>; 751 dma-channels = <16>; 752 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 753 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 754 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 755 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 756 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 757 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 758 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 759 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 760 }; 761 762 dmac1: dma-controller@e7300000 { 763 compatible = "renesas,dmac-r8a77965", 764 "renesas,rcar-dmac"; 765 reg = <0 0xe7300000 0 0x10000>; 766 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 767 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 768 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 769 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 770 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 771 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 772 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 773 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 774 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 775 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 776 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 777 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 778 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 779 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 780 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 781 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 782 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 783 interrupt-names = "error", 784 "ch0", "ch1", "ch2", "ch3", 785 "ch4", "ch5", "ch6", "ch7", 786 "ch8", "ch9", "ch10", "ch11", 787 "ch12", "ch13", "ch14", "ch15"; 788 clocks = <&cpg CPG_MOD 218>; 789 clock-names = "fck"; 790 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 791 resets = <&cpg 218>; 792 #dma-cells = <1>; 793 dma-channels = <16>; 794 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 795 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 796 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 797 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 798 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 799 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 800 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 801 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 802 }; 803 804 dmac2: dma-controller@e7310000 { 805 compatible = "renesas,dmac-r8a77965", 806 "renesas,rcar-dmac"; 807 reg = <0 0xe7310000 0 0x10000>; 808 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 809 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 810 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 811 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 812 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 813 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 814 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 815 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 816 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 817 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 818 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 819 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 820 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 821 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 822 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 823 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 824 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 825 interrupt-names = "error", 826 "ch0", "ch1", "ch2", "ch3", 827 "ch4", "ch5", "ch6", "ch7", 828 "ch8", "ch9", "ch10", "ch11", 829 "ch12", "ch13", "ch14", "ch15"; 830 clocks = <&cpg CPG_MOD 217>; 831 clock-names = "fck"; 832 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 833 resets = <&cpg 217>; 834 #dma-cells = <1>; 835 dma-channels = <16>; 836 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 837 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 838 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 839 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 840 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 841 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 842 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 843 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 844 }; 845 846 ipmmu_ds0: mmu@e6740000 { 847 compatible = "renesas,ipmmu-r8a77965"; 848 reg = <0 0xe6740000 0 0x1000>; 849 renesas,ipmmu-main = <&ipmmu_mm 0>; 850 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 851 #iommu-cells = <1>; 852 }; 853 854 ipmmu_ds1: mmu@e7740000 { 855 compatible = "renesas,ipmmu-r8a77965"; 856 reg = <0 0xe7740000 0 0x1000>; 857 renesas,ipmmu-main = <&ipmmu_mm 1>; 858 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 859 #iommu-cells = <1>; 860 }; 861 862 ipmmu_hc: mmu@e6570000 { 863 compatible = "renesas,ipmmu-r8a77965"; 864 reg = <0 0xe6570000 0 0x1000>; 865 renesas,ipmmu-main = <&ipmmu_mm 2>; 866 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 867 #iommu-cells = <1>; 868 }; 869 870 ipmmu_mm: mmu@e67b0000 { 871 compatible = "renesas,ipmmu-r8a77965"; 872 reg = <0 0xe67b0000 0 0x1000>; 873 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 875 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 876 #iommu-cells = <1>; 877 }; 878 879 ipmmu_mp: mmu@ec670000 { 880 compatible = "renesas,ipmmu-r8a77965"; 881 reg = <0 0xec670000 0 0x1000>; 882 renesas,ipmmu-main = <&ipmmu_mm 4>; 883 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 884 #iommu-cells = <1>; 885 }; 886 887 ipmmu_pv0: mmu@fd800000 { 888 compatible = "renesas,ipmmu-r8a77965"; 889 reg = <0 0xfd800000 0 0x1000>; 890 renesas,ipmmu-main = <&ipmmu_mm 6>; 891 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 892 #iommu-cells = <1>; 893 }; 894 895 ipmmu_rt: mmu@ffc80000 { 896 compatible = "renesas,ipmmu-r8a77965"; 897 reg = <0 0xffc80000 0 0x1000>; 898 renesas,ipmmu-main = <&ipmmu_mm 10>; 899 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 900 #iommu-cells = <1>; 901 }; 902 903 ipmmu_vc0: mmu@fe6b0000 { 904 compatible = "renesas,ipmmu-r8a77965"; 905 reg = <0 0xfe6b0000 0 0x1000>; 906 renesas,ipmmu-main = <&ipmmu_mm 12>; 907 power-domains = <&sysc R8A77965_PD_A3VC>; 908 #iommu-cells = <1>; 909 }; 910 911 ipmmu_vi0: mmu@febd0000 { 912 compatible = "renesas,ipmmu-r8a77965"; 913 reg = <0 0xfebd0000 0 0x1000>; 914 renesas,ipmmu-main = <&ipmmu_mm 14>; 915 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 916 #iommu-cells = <1>; 917 }; 918 919 ipmmu_vp0: mmu@fe990000 { 920 compatible = "renesas,ipmmu-r8a77965"; 921 reg = <0 0xfe990000 0 0x1000>; 922 renesas,ipmmu-main = <&ipmmu_mm 16>; 923 power-domains = <&sysc R8A77965_PD_A3VP>; 924 #iommu-cells = <1>; 925 }; 926 927 avb: ethernet@e6800000 { 928 compatible = "renesas,etheravb-r8a77965", 929 "renesas,etheravb-rcar-gen3"; 930 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 931 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 932 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 933 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 936 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 937 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 938 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 939 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 940 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 941 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 942 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 943 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 944 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 945 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 949 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 950 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 951 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 952 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 953 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 954 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 956 interrupt-names = "ch0", "ch1", "ch2", "ch3", 957 "ch4", "ch5", "ch6", "ch7", 958 "ch8", "ch9", "ch10", "ch11", 959 "ch12", "ch13", "ch14", "ch15", 960 "ch16", "ch17", "ch18", "ch19", 961 "ch20", "ch21", "ch22", "ch23", 962 "ch24"; 963 clocks = <&cpg CPG_MOD 812>; 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 965 resets = <&cpg 812>; 966 phy-mode = "rgmii"; 967 iommus = <&ipmmu_ds0 16>; 968 #address-cells = <1>; 969 #size-cells = <0>; 970 status = "disabled"; 971 }; 972 973 can0: can@e6c30000 { 974 compatible = "renesas,can-r8a77965", 975 "renesas,rcar-gen3-can"; 976 reg = <0 0xe6c30000 0 0x1000>; 977 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 978 clocks = <&cpg CPG_MOD 916>, 979 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 980 <&can_clk>; 981 clock-names = "clkp1", "clkp2", "can_clk"; 982 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 983 assigned-clock-rates = <40000000>; 984 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 985 resets = <&cpg 916>; 986 status = "disabled"; 987 }; 988 989 can1: can@e6c38000 { 990 compatible = "renesas,can-r8a77965", 991 "renesas,rcar-gen3-can"; 992 reg = <0 0xe6c38000 0 0x1000>; 993 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 994 clocks = <&cpg CPG_MOD 915>, 995 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 996 <&can_clk>; 997 clock-names = "clkp1", "clkp2", "can_clk"; 998 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 999 assigned-clock-rates = <40000000>; 1000 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1001 resets = <&cpg 915>; 1002 status = "disabled"; 1003 }; 1004 1005 canfd: can@e66c0000 { 1006 compatible = "renesas,r8a77965-canfd", 1007 "renesas,rcar-gen3-canfd"; 1008 reg = <0 0xe66c0000 0 0x8000>; 1009 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1010 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1011 clocks = <&cpg CPG_MOD 914>, 1012 <&cpg CPG_CORE R8A77965_CLK_CANFD>, 1013 <&can_clk>; 1014 clock-names = "fck", "canfd", "can_clk"; 1015 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>; 1016 assigned-clock-rates = <40000000>; 1017 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1018 resets = <&cpg 914>; 1019 status = "disabled"; 1020 1021 channel0 { 1022 status = "disabled"; 1023 }; 1024 1025 channel1 { 1026 status = "disabled"; 1027 }; 1028 }; 1029 1030 pwm0: pwm@e6e30000 { 1031 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1032 reg = <0 0xe6e30000 0 8>; 1033 #pwm-cells = <2>; 1034 clocks = <&cpg CPG_MOD 523>; 1035 resets = <&cpg 523>; 1036 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1037 status = "disabled"; 1038 }; 1039 1040 pwm1: pwm@e6e31000 { 1041 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1042 reg = <0 0xe6e31000 0 8>; 1043 #pwm-cells = <2>; 1044 clocks = <&cpg CPG_MOD 523>; 1045 resets = <&cpg 523>; 1046 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1047 status = "disabled"; 1048 }; 1049 1050 pwm2: pwm@e6e32000 { 1051 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1052 reg = <0 0xe6e32000 0 8>; 1053 #pwm-cells = <2>; 1054 clocks = <&cpg CPG_MOD 523>; 1055 resets = <&cpg 523>; 1056 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1057 status = "disabled"; 1058 }; 1059 1060 pwm3: pwm@e6e33000 { 1061 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1062 reg = <0 0xe6e33000 0 8>; 1063 #pwm-cells = <2>; 1064 clocks = <&cpg CPG_MOD 523>; 1065 resets = <&cpg 523>; 1066 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1067 status = "disabled"; 1068 }; 1069 1070 pwm4: pwm@e6e34000 { 1071 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1072 reg = <0 0xe6e34000 0 8>; 1073 #pwm-cells = <2>; 1074 clocks = <&cpg CPG_MOD 523>; 1075 resets = <&cpg 523>; 1076 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1077 status = "disabled"; 1078 }; 1079 1080 pwm5: pwm@e6e35000 { 1081 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1082 reg = <0 0xe6e35000 0 8>; 1083 #pwm-cells = <2>; 1084 clocks = <&cpg CPG_MOD 523>; 1085 resets = <&cpg 523>; 1086 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1087 status = "disabled"; 1088 }; 1089 1090 pwm6: pwm@e6e36000 { 1091 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 1092 reg = <0 0xe6e36000 0 8>; 1093 #pwm-cells = <2>; 1094 clocks = <&cpg CPG_MOD 523>; 1095 resets = <&cpg 523>; 1096 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1097 status = "disabled"; 1098 }; 1099 1100 scif0: serial@e6e60000 { 1101 compatible = "renesas,scif-r8a77965", 1102 "renesas,rcar-gen3-scif", "renesas,scif"; 1103 reg = <0 0xe6e60000 0 64>; 1104 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1105 clocks = <&cpg CPG_MOD 207>, 1106 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1107 <&scif_clk>; 1108 clock-names = "fck", "brg_int", "scif_clk"; 1109 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1110 <&dmac2 0x51>, <&dmac2 0x50>; 1111 dma-names = "tx", "rx", "tx", "rx"; 1112 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1113 resets = <&cpg 207>; 1114 status = "disabled"; 1115 }; 1116 1117 scif1: serial@e6e68000 { 1118 compatible = "renesas,scif-r8a77965", 1119 "renesas,rcar-gen3-scif", "renesas,scif"; 1120 reg = <0 0xe6e68000 0 64>; 1121 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1122 clocks = <&cpg CPG_MOD 206>, 1123 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1124 <&scif_clk>; 1125 clock-names = "fck", "brg_int", "scif_clk"; 1126 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1127 <&dmac2 0x53>, <&dmac2 0x52>; 1128 dma-names = "tx", "rx", "tx", "rx"; 1129 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1130 resets = <&cpg 206>; 1131 status = "disabled"; 1132 }; 1133 1134 scif2: serial@e6e88000 { 1135 compatible = "renesas,scif-r8a77965", 1136 "renesas,rcar-gen3-scif", "renesas,scif"; 1137 reg = <0 0xe6e88000 0 64>; 1138 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1139 clocks = <&cpg CPG_MOD 310>, 1140 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1141 <&scif_clk>; 1142 clock-names = "fck", "brg_int", "scif_clk"; 1143 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1144 <&dmac2 0x13>, <&dmac2 0x12>; 1145 dma-names = "tx", "rx", "tx", "rx"; 1146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1147 resets = <&cpg 310>; 1148 status = "disabled"; 1149 }; 1150 1151 scif3: serial@e6c50000 { 1152 compatible = "renesas,scif-r8a77965", 1153 "renesas,rcar-gen3-scif", "renesas,scif"; 1154 reg = <0 0xe6c50000 0 64>; 1155 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1156 clocks = <&cpg CPG_MOD 204>, 1157 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1158 <&scif_clk>; 1159 clock-names = "fck", "brg_int", "scif_clk"; 1160 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1161 dma-names = "tx", "rx"; 1162 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1163 resets = <&cpg 204>; 1164 status = "disabled"; 1165 }; 1166 1167 scif4: serial@e6c40000 { 1168 compatible = "renesas,scif-r8a77965", 1169 "renesas,rcar-gen3-scif", "renesas,scif"; 1170 reg = <0 0xe6c40000 0 64>; 1171 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1172 clocks = <&cpg CPG_MOD 203>, 1173 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1174 <&scif_clk>; 1175 clock-names = "fck", "brg_int", "scif_clk"; 1176 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1177 dma-names = "tx", "rx"; 1178 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1179 resets = <&cpg 203>; 1180 status = "disabled"; 1181 }; 1182 1183 scif5: serial@e6f30000 { 1184 compatible = "renesas,scif-r8a77965", 1185 "renesas,rcar-gen3-scif", "renesas,scif"; 1186 reg = <0 0xe6f30000 0 64>; 1187 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1188 clocks = <&cpg CPG_MOD 202>, 1189 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1190 <&scif_clk>; 1191 clock-names = "fck", "brg_int", "scif_clk"; 1192 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1193 <&dmac2 0x5b>, <&dmac2 0x5a>; 1194 dma-names = "tx", "rx", "tx", "rx"; 1195 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1196 resets = <&cpg 202>; 1197 status = "disabled"; 1198 }; 1199 1200 tpu: pwm@e6e80000 { 1201 compatible = "renesas,tpu-r8a77965", "renesas,tpu"; 1202 reg = <0 0xe6e80000 0 0x148>; 1203 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1204 clocks = <&cpg CPG_MOD 304>; 1205 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1206 resets = <&cpg 304>; 1207 #pwm-cells = <3>; 1208 status = "disabled"; 1209 }; 1210 1211 msiof0: spi@e6e90000 { 1212 compatible = "renesas,msiof-r8a77965", 1213 "renesas,rcar-gen3-msiof"; 1214 reg = <0 0xe6e90000 0 0x0064>; 1215 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1216 clocks = <&cpg CPG_MOD 211>; 1217 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1218 <&dmac2 0x41>, <&dmac2 0x40>; 1219 dma-names = "tx", "rx", "tx", "rx"; 1220 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1221 resets = <&cpg 211>; 1222 #address-cells = <1>; 1223 #size-cells = <0>; 1224 status = "disabled"; 1225 }; 1226 1227 msiof1: spi@e6ea0000 { 1228 compatible = "renesas,msiof-r8a77965", 1229 "renesas,rcar-gen3-msiof"; 1230 reg = <0 0xe6ea0000 0 0x0064>; 1231 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1232 clocks = <&cpg CPG_MOD 210>; 1233 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1234 <&dmac2 0x43>, <&dmac2 0x42>; 1235 dma-names = "tx", "rx", "tx", "rx"; 1236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1237 resets = <&cpg 210>; 1238 #address-cells = <1>; 1239 #size-cells = <0>; 1240 status = "disabled"; 1241 }; 1242 1243 msiof2: spi@e6c00000 { 1244 compatible = "renesas,msiof-r8a77965", 1245 "renesas,rcar-gen3-msiof"; 1246 reg = <0 0xe6c00000 0 0x0064>; 1247 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1248 clocks = <&cpg CPG_MOD 209>; 1249 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1250 dma-names = "tx", "rx"; 1251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1252 resets = <&cpg 209>; 1253 #address-cells = <1>; 1254 #size-cells = <0>; 1255 status = "disabled"; 1256 }; 1257 1258 msiof3: spi@e6c10000 { 1259 compatible = "renesas,msiof-r8a77965", 1260 "renesas,rcar-gen3-msiof"; 1261 reg = <0 0xe6c10000 0 0x0064>; 1262 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1263 clocks = <&cpg CPG_MOD 208>; 1264 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1265 dma-names = "tx", "rx"; 1266 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1267 resets = <&cpg 208>; 1268 #address-cells = <1>; 1269 #size-cells = <0>; 1270 status = "disabled"; 1271 }; 1272 1273 vin0: video@e6ef0000 { 1274 compatible = "renesas,vin-r8a77965"; 1275 reg = <0 0xe6ef0000 0 0x1000>; 1276 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1277 clocks = <&cpg CPG_MOD 811>; 1278 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1279 resets = <&cpg 811>; 1280 renesas,id = <0>; 1281 status = "disabled"; 1282 1283 ports { 1284 #address-cells = <1>; 1285 #size-cells = <0>; 1286 1287 port@1 { 1288 #address-cells = <1>; 1289 #size-cells = <0>; 1290 1291 reg = <1>; 1292 1293 vin0csi20: endpoint@0 { 1294 reg = <0>; 1295 remote-endpoint = <&csi20vin0>; 1296 }; 1297 vin0csi40: endpoint@2 { 1298 reg = <2>; 1299 remote-endpoint = <&csi40vin0>; 1300 }; 1301 }; 1302 }; 1303 }; 1304 1305 vin1: video@e6ef1000 { 1306 compatible = "renesas,vin-r8a77965"; 1307 reg = <0 0xe6ef1000 0 0x1000>; 1308 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1309 clocks = <&cpg CPG_MOD 810>; 1310 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1311 resets = <&cpg 810>; 1312 renesas,id = <1>; 1313 status = "disabled"; 1314 1315 ports { 1316 #address-cells = <1>; 1317 #size-cells = <0>; 1318 1319 port@1 { 1320 #address-cells = <1>; 1321 #size-cells = <0>; 1322 1323 reg = <1>; 1324 1325 vin1csi20: endpoint@0 { 1326 reg = <0>; 1327 remote-endpoint = <&csi20vin1>; 1328 }; 1329 vin1csi40: endpoint@2 { 1330 reg = <2>; 1331 remote-endpoint = <&csi40vin1>; 1332 }; 1333 }; 1334 }; 1335 }; 1336 1337 vin2: video@e6ef2000 { 1338 compatible = "renesas,vin-r8a77965"; 1339 reg = <0 0xe6ef2000 0 0x1000>; 1340 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1341 clocks = <&cpg CPG_MOD 809>; 1342 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1343 resets = <&cpg 809>; 1344 renesas,id = <2>; 1345 status = "disabled"; 1346 1347 ports { 1348 #address-cells = <1>; 1349 #size-cells = <0>; 1350 1351 port@1 { 1352 #address-cells = <1>; 1353 #size-cells = <0>; 1354 1355 reg = <1>; 1356 1357 vin2csi20: endpoint@0 { 1358 reg = <0>; 1359 remote-endpoint = <&csi20vin2>; 1360 }; 1361 vin2csi40: endpoint@2 { 1362 reg = <2>; 1363 remote-endpoint = <&csi40vin2>; 1364 }; 1365 }; 1366 }; 1367 }; 1368 1369 vin3: video@e6ef3000 { 1370 compatible = "renesas,vin-r8a77965"; 1371 reg = <0 0xe6ef3000 0 0x1000>; 1372 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1373 clocks = <&cpg CPG_MOD 808>; 1374 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1375 resets = <&cpg 808>; 1376 renesas,id = <3>; 1377 status = "disabled"; 1378 1379 ports { 1380 #address-cells = <1>; 1381 #size-cells = <0>; 1382 1383 port@1 { 1384 #address-cells = <1>; 1385 #size-cells = <0>; 1386 1387 reg = <1>; 1388 1389 vin3csi20: endpoint@0 { 1390 reg = <0>; 1391 remote-endpoint = <&csi20vin3>; 1392 }; 1393 vin3csi40: endpoint@2 { 1394 reg = <2>; 1395 remote-endpoint = <&csi40vin3>; 1396 }; 1397 }; 1398 }; 1399 }; 1400 1401 vin4: video@e6ef4000 { 1402 compatible = "renesas,vin-r8a77965"; 1403 reg = <0 0xe6ef4000 0 0x1000>; 1404 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1405 clocks = <&cpg CPG_MOD 807>; 1406 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1407 resets = <&cpg 807>; 1408 renesas,id = <4>; 1409 status = "disabled"; 1410 1411 ports { 1412 #address-cells = <1>; 1413 #size-cells = <0>; 1414 1415 port@1 { 1416 #address-cells = <1>; 1417 #size-cells = <0>; 1418 1419 reg = <1>; 1420 1421 vin4csi20: endpoint@0 { 1422 reg = <0>; 1423 remote-endpoint = <&csi20vin4>; 1424 }; 1425 vin4csi40: endpoint@2 { 1426 reg = <2>; 1427 remote-endpoint = <&csi40vin4>; 1428 }; 1429 }; 1430 }; 1431 }; 1432 1433 vin5: video@e6ef5000 { 1434 compatible = "renesas,vin-r8a77965"; 1435 reg = <0 0xe6ef5000 0 0x1000>; 1436 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1437 clocks = <&cpg CPG_MOD 806>; 1438 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1439 resets = <&cpg 806>; 1440 renesas,id = <5>; 1441 status = "disabled"; 1442 1443 ports { 1444 #address-cells = <1>; 1445 #size-cells = <0>; 1446 1447 port@1 { 1448 #address-cells = <1>; 1449 #size-cells = <0>; 1450 1451 reg = <1>; 1452 1453 vin5csi20: endpoint@0 { 1454 reg = <0>; 1455 remote-endpoint = <&csi20vin5>; 1456 }; 1457 vin5csi40: endpoint@2 { 1458 reg = <2>; 1459 remote-endpoint = <&csi40vin5>; 1460 }; 1461 }; 1462 }; 1463 }; 1464 1465 vin6: video@e6ef6000 { 1466 compatible = "renesas,vin-r8a77965"; 1467 reg = <0 0xe6ef6000 0 0x1000>; 1468 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1469 clocks = <&cpg CPG_MOD 805>; 1470 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1471 resets = <&cpg 805>; 1472 renesas,id = <6>; 1473 status = "disabled"; 1474 1475 ports { 1476 #address-cells = <1>; 1477 #size-cells = <0>; 1478 1479 port@1 { 1480 #address-cells = <1>; 1481 #size-cells = <0>; 1482 1483 reg = <1>; 1484 1485 vin6csi20: endpoint@0 { 1486 reg = <0>; 1487 remote-endpoint = <&csi20vin6>; 1488 }; 1489 vin6csi40: endpoint@2 { 1490 reg = <2>; 1491 remote-endpoint = <&csi40vin6>; 1492 }; 1493 }; 1494 }; 1495 }; 1496 1497 vin7: video@e6ef7000 { 1498 compatible = "renesas,vin-r8a77965"; 1499 reg = <0 0xe6ef7000 0 0x1000>; 1500 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1501 clocks = <&cpg CPG_MOD 804>; 1502 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1503 resets = <&cpg 804>; 1504 renesas,id = <7>; 1505 status = "disabled"; 1506 1507 ports { 1508 #address-cells = <1>; 1509 #size-cells = <0>; 1510 1511 port@1 { 1512 #address-cells = <1>; 1513 #size-cells = <0>; 1514 1515 reg = <1>; 1516 1517 vin7csi20: endpoint@0 { 1518 reg = <0>; 1519 remote-endpoint = <&csi20vin7>; 1520 }; 1521 vin7csi40: endpoint@2 { 1522 reg = <2>; 1523 remote-endpoint = <&csi40vin7>; 1524 }; 1525 }; 1526 }; 1527 }; 1528 1529 rcar_sound: sound@ec500000 { 1530 /* 1531 * #sound-dai-cells is required 1532 * 1533 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1534 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1535 */ 1536 /* 1537 * #clock-cells is required for audio_clkout0/1/2/3 1538 * 1539 * clkout : #clock-cells = <0>; <&rcar_sound>; 1540 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1541 */ 1542 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3"; 1543 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1544 <0 0xec5a0000 0 0x100>, /* ADG */ 1545 <0 0xec540000 0 0x1000>, /* SSIU */ 1546 <0 0xec541000 0 0x280>, /* SSI */ 1547 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1548 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1549 1550 clocks = <&cpg CPG_MOD 1005>, 1551 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1552 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1553 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1554 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1555 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1556 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1557 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1558 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1559 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1560 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1561 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1562 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1563 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1564 <&audio_clk_a>, <&audio_clk_b>, 1565 <&audio_clk_c>, 1566 <&cpg CPG_CORE R8A77965_CLK_S0D4>; 1567 clock-names = "ssi-all", 1568 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1569 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1570 "ssi.1", "ssi.0", 1571 "src.9", "src.8", "src.7", "src.6", 1572 "src.5", "src.4", "src.3", "src.2", 1573 "src.1", "src.0", 1574 "mix.1", "mix.0", 1575 "ctu.1", "ctu.0", 1576 "dvc.0", "dvc.1", 1577 "clk_a", "clk_b", "clk_c", "clk_i"; 1578 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1579 resets = <&cpg 1005>, 1580 <&cpg 1006>, <&cpg 1007>, 1581 <&cpg 1008>, <&cpg 1009>, 1582 <&cpg 1010>, <&cpg 1011>, 1583 <&cpg 1012>, <&cpg 1013>, 1584 <&cpg 1014>, <&cpg 1015>; 1585 reset-names = "ssi-all", 1586 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1587 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1588 "ssi.1", "ssi.0"; 1589 status = "disabled"; 1590 1591 rcar_sound,dvc { 1592 dvc0: dvc-0 { 1593 dmas = <&audma1 0xbc>; 1594 dma-names = "tx"; 1595 }; 1596 dvc1: dvc-1 { 1597 dmas = <&audma1 0xbe>; 1598 dma-names = "tx"; 1599 }; 1600 }; 1601 1602 rcar_sound,mix { 1603 mix0: mix-0 { }; 1604 mix1: mix-1 { }; 1605 }; 1606 1607 rcar_sound,ctu { 1608 ctu00: ctu-0 { }; 1609 ctu01: ctu-1 { }; 1610 ctu02: ctu-2 { }; 1611 ctu03: ctu-3 { }; 1612 ctu10: ctu-4 { }; 1613 ctu11: ctu-5 { }; 1614 ctu12: ctu-6 { }; 1615 ctu13: ctu-7 { }; 1616 }; 1617 1618 rcar_sound,src { 1619 src0: src-0 { 1620 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1621 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1622 dma-names = "rx", "tx"; 1623 }; 1624 src1: src-1 { 1625 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1626 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1627 dma-names = "rx", "tx"; 1628 }; 1629 src2: src-2 { 1630 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1631 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1632 dma-names = "rx", "tx"; 1633 }; 1634 src3: src-3 { 1635 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1636 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1637 dma-names = "rx", "tx"; 1638 }; 1639 src4: src-4 { 1640 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1641 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1642 dma-names = "rx", "tx"; 1643 }; 1644 src5: src-5 { 1645 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1646 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1647 dma-names = "rx", "tx"; 1648 }; 1649 src6: src-6 { 1650 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1651 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1652 dma-names = "rx", "tx"; 1653 }; 1654 src7: src-7 { 1655 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1656 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1657 dma-names = "rx", "tx"; 1658 }; 1659 src8: src-8 { 1660 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1661 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1662 dma-names = "rx", "tx"; 1663 }; 1664 src9: src-9 { 1665 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1666 dmas = <&audma0 0x97>, <&audma1 0xba>; 1667 dma-names = "rx", "tx"; 1668 }; 1669 }; 1670 1671 rcar_sound,ssiu { 1672 ssiu00: ssiu-0 { 1673 dmas = <&audma0 0x15>, <&audma1 0x16>; 1674 dma-names = "rx", "tx"; 1675 }; 1676 ssiu01: ssiu-1 { 1677 dmas = <&audma0 0x35>, <&audma1 0x36>; 1678 dma-names = "rx", "tx"; 1679 }; 1680 ssiu02: ssiu-2 { 1681 dmas = <&audma0 0x37>, <&audma1 0x38>; 1682 dma-names = "rx", "tx"; 1683 }; 1684 ssiu03: ssiu-3 { 1685 dmas = <&audma0 0x47>, <&audma1 0x48>; 1686 dma-names = "rx", "tx"; 1687 }; 1688 ssiu04: ssiu-4 { 1689 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1690 dma-names = "rx", "tx"; 1691 }; 1692 ssiu05: ssiu-5 { 1693 dmas = <&audma0 0x43>, <&audma1 0x44>; 1694 dma-names = "rx", "tx"; 1695 }; 1696 ssiu06: ssiu-6 { 1697 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1698 dma-names = "rx", "tx"; 1699 }; 1700 ssiu07: ssiu-7 { 1701 dmas = <&audma0 0x53>, <&audma1 0x54>; 1702 dma-names = "rx", "tx"; 1703 }; 1704 ssiu10: ssiu-8 { 1705 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1706 dma-names = "rx", "tx"; 1707 }; 1708 ssiu11: ssiu-9 { 1709 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1710 dma-names = "rx", "tx"; 1711 }; 1712 ssiu12: ssiu-10 { 1713 dmas = <&audma0 0x57>, <&audma1 0x58>; 1714 dma-names = "rx", "tx"; 1715 }; 1716 ssiu13: ssiu-11 { 1717 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1718 dma-names = "rx", "tx"; 1719 }; 1720 ssiu14: ssiu-12 { 1721 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1722 dma-names = "rx", "tx"; 1723 }; 1724 ssiu15: ssiu-13 { 1725 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1726 dma-names = "rx", "tx"; 1727 }; 1728 ssiu16: ssiu-14 { 1729 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1730 dma-names = "rx", "tx"; 1731 }; 1732 ssiu17: ssiu-15 { 1733 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1734 dma-names = "rx", "tx"; 1735 }; 1736 ssiu20: ssiu-16 { 1737 dmas = <&audma0 0x63>, <&audma1 0x64>; 1738 dma-names = "rx", "tx"; 1739 }; 1740 ssiu21: ssiu-17 { 1741 dmas = <&audma0 0x67>, <&audma1 0x68>; 1742 dma-names = "rx", "tx"; 1743 }; 1744 ssiu22: ssiu-18 { 1745 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1746 dma-names = "rx", "tx"; 1747 }; 1748 ssiu23: ssiu-19 { 1749 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1750 dma-names = "rx", "tx"; 1751 }; 1752 ssiu24: ssiu-20 { 1753 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1754 dma-names = "rx", "tx"; 1755 }; 1756 ssiu25: ssiu-21 { 1757 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1758 dma-names = "rx", "tx"; 1759 }; 1760 ssiu26: ssiu-22 { 1761 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1762 dma-names = "rx", "tx"; 1763 }; 1764 ssiu27: ssiu-23 { 1765 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1766 dma-names = "rx", "tx"; 1767 }; 1768 ssiu30: ssiu-24 { 1769 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1770 dma-names = "rx", "tx"; 1771 }; 1772 ssiu31: ssiu-25 { 1773 dmas = <&audma0 0x21>, <&audma1 0x22>; 1774 dma-names = "rx", "tx"; 1775 }; 1776 ssiu32: ssiu-26 { 1777 dmas = <&audma0 0x23>, <&audma1 0x24>; 1778 dma-names = "rx", "tx"; 1779 }; 1780 ssiu33: ssiu-27 { 1781 dmas = <&audma0 0x25>, <&audma1 0x26>; 1782 dma-names = "rx", "tx"; 1783 }; 1784 ssiu34: ssiu-28 { 1785 dmas = <&audma0 0x27>, <&audma1 0x28>; 1786 dma-names = "rx", "tx"; 1787 }; 1788 ssiu35: ssiu-29 { 1789 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1790 dma-names = "rx", "tx"; 1791 }; 1792 ssiu36: ssiu-30 { 1793 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1794 dma-names = "rx", "tx"; 1795 }; 1796 ssiu37: ssiu-31 { 1797 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 1798 dma-names = "rx", "tx"; 1799 }; 1800 ssiu40: ssiu-32 { 1801 dmas = <&audma0 0x71>, <&audma1 0x72>; 1802 dma-names = "rx", "tx"; 1803 }; 1804 ssiu41: ssiu-33 { 1805 dmas = <&audma0 0x17>, <&audma1 0x18>; 1806 dma-names = "rx", "tx"; 1807 }; 1808 ssiu42: ssiu-34 { 1809 dmas = <&audma0 0x19>, <&audma1 0x1A>; 1810 dma-names = "rx", "tx"; 1811 }; 1812 ssiu43: ssiu-35 { 1813 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 1814 dma-names = "rx", "tx"; 1815 }; 1816 ssiu44: ssiu-36 { 1817 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 1818 dma-names = "rx", "tx"; 1819 }; 1820 ssiu45: ssiu-37 { 1821 dmas = <&audma0 0x1F>, <&audma1 0x20>; 1822 dma-names = "rx", "tx"; 1823 }; 1824 ssiu46: ssiu-38 { 1825 dmas = <&audma0 0x31>, <&audma1 0x32>; 1826 dma-names = "rx", "tx"; 1827 }; 1828 ssiu47: ssiu-39 { 1829 dmas = <&audma0 0x33>, <&audma1 0x34>; 1830 dma-names = "rx", "tx"; 1831 }; 1832 ssiu50: ssiu-40 { 1833 dmas = <&audma0 0x73>, <&audma1 0x74>; 1834 dma-names = "rx", "tx"; 1835 }; 1836 ssiu60: ssiu-41 { 1837 dmas = <&audma0 0x75>, <&audma1 0x76>; 1838 dma-names = "rx", "tx"; 1839 }; 1840 ssiu70: ssiu-42 { 1841 dmas = <&audma0 0x79>, <&audma1 0x7a>; 1842 dma-names = "rx", "tx"; 1843 }; 1844 ssiu80: ssiu-43 { 1845 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 1846 dma-names = "rx", "tx"; 1847 }; 1848 ssiu90: ssiu-44 { 1849 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 1850 dma-names = "rx", "tx"; 1851 }; 1852 ssiu91: ssiu-45 { 1853 dmas = <&audma0 0x7F>, <&audma1 0x80>; 1854 dma-names = "rx", "tx"; 1855 }; 1856 ssiu92: ssiu-46 { 1857 dmas = <&audma0 0x81>, <&audma1 0x82>; 1858 dma-names = "rx", "tx"; 1859 }; 1860 ssiu93: ssiu-47 { 1861 dmas = <&audma0 0x83>, <&audma1 0x84>; 1862 dma-names = "rx", "tx"; 1863 }; 1864 ssiu94: ssiu-48 { 1865 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 1866 dma-names = "rx", "tx"; 1867 }; 1868 ssiu95: ssiu-49 { 1869 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 1870 dma-names = "rx", "tx"; 1871 }; 1872 ssiu96: ssiu-50 { 1873 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 1874 dma-names = "rx", "tx"; 1875 }; 1876 ssiu97: ssiu-51 { 1877 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 1878 dma-names = "rx", "tx"; 1879 }; 1880 }; 1881 1882 rcar_sound,ssi { 1883 ssi0: ssi-0 { 1884 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1885 dmas = <&audma0 0x01>, <&audma1 0x02>; 1886 dma-names = "rx", "tx"; 1887 }; 1888 ssi1: ssi-1 { 1889 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1890 dmas = <&audma0 0x03>, <&audma1 0x04>; 1891 dma-names = "rx", "tx"; 1892 }; 1893 ssi2: ssi-2 { 1894 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1895 dmas = <&audma0 0x05>, <&audma1 0x06>; 1896 dma-names = "rx", "tx"; 1897 }; 1898 ssi3: ssi-3 { 1899 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1900 dmas = <&audma0 0x07>, <&audma1 0x08>; 1901 dma-names = "rx", "tx"; 1902 }; 1903 ssi4: ssi-4 { 1904 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1905 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1906 dma-names = "rx", "tx"; 1907 }; 1908 ssi5: ssi-5 { 1909 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1910 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1911 dma-names = "rx", "tx"; 1912 }; 1913 ssi6: ssi-6 { 1914 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1915 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1916 dma-names = "rx", "tx"; 1917 }; 1918 ssi7: ssi-7 { 1919 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1920 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1921 dma-names = "rx", "tx"; 1922 }; 1923 ssi8: ssi-8 { 1924 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1925 dmas = <&audma0 0x11>, <&audma1 0x12>; 1926 dma-names = "rx", "tx"; 1927 }; 1928 ssi9: ssi-9 { 1929 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1930 dmas = <&audma0 0x13>, <&audma1 0x14>; 1931 dma-names = "rx", "tx"; 1932 }; 1933 }; 1934 }; 1935 1936 audma0: dma-controller@ec700000 { 1937 compatible = "renesas,dmac-r8a77965", 1938 "renesas,rcar-dmac"; 1939 reg = <0 0xec700000 0 0x10000>; 1940 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1941 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1942 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1943 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1944 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1945 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1946 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1947 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1948 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1949 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1950 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1951 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1952 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1953 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1954 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1955 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1956 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1957 interrupt-names = "error", 1958 "ch0", "ch1", "ch2", "ch3", 1959 "ch4", "ch5", "ch6", "ch7", 1960 "ch8", "ch9", "ch10", "ch11", 1961 "ch12", "ch13", "ch14", "ch15"; 1962 clocks = <&cpg CPG_MOD 502>; 1963 clock-names = "fck"; 1964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1965 resets = <&cpg 502>; 1966 #dma-cells = <1>; 1967 dma-channels = <16>; 1968 }; 1969 1970 audma1: dma-controller@ec720000 { 1971 compatible = "renesas,dmac-r8a77965", 1972 "renesas,rcar-dmac"; 1973 reg = <0 0xec720000 0 0x10000>; 1974 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH 1975 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 1976 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 1977 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 1978 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 1979 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 1980 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 1981 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 1982 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 1983 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 1984 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 1985 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1986 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 1987 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 1988 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH 1989 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 1990 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 1991 interrupt-names = "error", 1992 "ch0", "ch1", "ch2", "ch3", 1993 "ch4", "ch5", "ch6", "ch7", 1994 "ch8", "ch9", "ch10", "ch11", 1995 "ch12", "ch13", "ch14", "ch15"; 1996 clocks = <&cpg CPG_MOD 501>; 1997 clock-names = "fck"; 1998 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1999 resets = <&cpg 501>; 2000 #dma-cells = <1>; 2001 dma-channels = <16>; 2002 }; 2003 2004 xhci0: usb@ee000000 { 2005 compatible = "renesas,xhci-r8a77965", 2006 "renesas,rcar-gen3-xhci"; 2007 reg = <0 0xee000000 0 0xc00>; 2008 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2009 clocks = <&cpg CPG_MOD 328>; 2010 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2011 resets = <&cpg 328>; 2012 status = "disabled"; 2013 }; 2014 2015 usb3_peri0: usb@ee020000 { 2016 compatible = "renesas,r8a77965-usb3-peri", 2017 "renesas,rcar-gen3-usb3-peri"; 2018 reg = <0 0xee020000 0 0x400>; 2019 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2020 clocks = <&cpg CPG_MOD 328>; 2021 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2022 resets = <&cpg 328>; 2023 status = "disabled"; 2024 }; 2025 2026 ohci0: usb@ee080000 { 2027 compatible = "generic-ohci"; 2028 reg = <0 0xee080000 0 0x100>; 2029 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2030 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2031 phys = <&usb2_phy0 1>; 2032 phy-names = "usb"; 2033 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2034 resets = <&cpg 703>, <&cpg 704>; 2035 status = "disabled"; 2036 }; 2037 2038 ohci1: usb@ee0a0000 { 2039 compatible = "generic-ohci"; 2040 reg = <0 0xee0a0000 0 0x100>; 2041 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2042 clocks = <&cpg CPG_MOD 702>; 2043 phys = <&usb2_phy1 1>; 2044 phy-names = "usb"; 2045 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2046 resets = <&cpg 702>; 2047 status = "disabled"; 2048 }; 2049 2050 ehci0: usb@ee080100 { 2051 compatible = "generic-ehci"; 2052 reg = <0 0xee080100 0 0x100>; 2053 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2054 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2055 phys = <&usb2_phy0 2>; 2056 phy-names = "usb"; 2057 companion = <&ohci0>; 2058 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2059 resets = <&cpg 703>, <&cpg 704>; 2060 status = "disabled"; 2061 }; 2062 2063 ehci1: usb@ee0a0100 { 2064 compatible = "generic-ehci"; 2065 reg = <0 0xee0a0100 0 0x100>; 2066 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2067 clocks = <&cpg CPG_MOD 702>; 2068 phys = <&usb2_phy1 2>; 2069 phy-names = "usb"; 2070 companion = <&ohci1>; 2071 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2072 resets = <&cpg 702>; 2073 status = "disabled"; 2074 }; 2075 2076 usb2_phy0: usb-phy@ee080200 { 2077 compatible = "renesas,usb2-phy-r8a77965", 2078 "renesas,rcar-gen3-usb2-phy"; 2079 reg = <0 0xee080200 0 0x700>; 2080 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2081 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2082 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2083 resets = <&cpg 703>, <&cpg 704>; 2084 #phy-cells = <1>; 2085 status = "disabled"; 2086 }; 2087 2088 usb2_phy1: usb-phy@ee0a0200 { 2089 compatible = "renesas,usb2-phy-r8a77965", 2090 "renesas,rcar-gen3-usb2-phy"; 2091 reg = <0 0xee0a0200 0 0x700>; 2092 clocks = <&cpg CPG_MOD 702>; 2093 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2094 resets = <&cpg 702>; 2095 #phy-cells = <1>; 2096 status = "disabled"; 2097 }; 2098 2099 sdhi0: sd@ee100000 { 2100 compatible = "renesas,sdhi-r8a77965", 2101 "renesas,rcar-gen3-sdhi"; 2102 reg = <0 0xee100000 0 0x2000>; 2103 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2104 clocks = <&cpg CPG_MOD 314>; 2105 max-frequency = <200000000>; 2106 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2107 resets = <&cpg 314>; 2108 status = "disabled"; 2109 }; 2110 2111 sdhi1: sd@ee120000 { 2112 compatible = "renesas,sdhi-r8a77965", 2113 "renesas,rcar-gen3-sdhi"; 2114 reg = <0 0xee120000 0 0x2000>; 2115 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2116 clocks = <&cpg CPG_MOD 313>; 2117 max-frequency = <200000000>; 2118 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2119 resets = <&cpg 313>; 2120 status = "disabled"; 2121 }; 2122 2123 sdhi2: sd@ee140000 { 2124 compatible = "renesas,sdhi-r8a77965", 2125 "renesas,rcar-gen3-sdhi"; 2126 reg = <0 0xee140000 0 0x2000>; 2127 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2128 clocks = <&cpg CPG_MOD 312>; 2129 max-frequency = <200000000>; 2130 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2131 resets = <&cpg 312>; 2132 status = "disabled"; 2133 }; 2134 2135 sdhi3: sd@ee160000 { 2136 compatible = "renesas,sdhi-r8a77965", 2137 "renesas,rcar-gen3-sdhi"; 2138 reg = <0 0xee160000 0 0x2000>; 2139 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2140 clocks = <&cpg CPG_MOD 311>; 2141 max-frequency = <200000000>; 2142 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2143 resets = <&cpg 311>; 2144 status = "disabled"; 2145 }; 2146 2147 sata: sata@ee300000 { 2148 compatible = "renesas,sata-r8a77965", 2149 "renesas,rcar-gen3-sata"; 2150 reg = <0 0xee300000 0 0x200000>; 2151 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2152 clocks = <&cpg CPG_MOD 815>; 2153 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2154 resets = <&cpg 815>; 2155 status = "disabled"; 2156 }; 2157 2158 gic: interrupt-controller@f1010000 { 2159 compatible = "arm,gic-400"; 2160 #interrupt-cells = <3>; 2161 #address-cells = <0>; 2162 interrupt-controller; 2163 reg = <0x0 0xf1010000 0 0x1000>, 2164 <0x0 0xf1020000 0 0x20000>, 2165 <0x0 0xf1040000 0 0x20000>, 2166 <0x0 0xf1060000 0 0x20000>; 2167 interrupts = <GIC_PPI 9 2168 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2169 clocks = <&cpg CPG_MOD 408>; 2170 clock-names = "clk"; 2171 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2172 resets = <&cpg 408>; 2173 }; 2174 2175 pciec0: pcie@fe000000 { 2176 compatible = "renesas,pcie-r8a77965", 2177 "renesas,pcie-rcar-gen3"; 2178 reg = <0 0xfe000000 0 0x80000>; 2179 #address-cells = <3>; 2180 #size-cells = <2>; 2181 bus-range = <0x00 0xff>; 2182 device_type = "pci"; 2183 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 2184 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 2185 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 2186 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2187 /* Map all possible DDR as inbound ranges */ 2188 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2189 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2190 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2191 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2192 #interrupt-cells = <1>; 2193 interrupt-map-mask = <0 0 0 0>; 2194 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2195 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2196 clock-names = "pcie", "pcie_bus"; 2197 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2198 resets = <&cpg 319>; 2199 status = "disabled"; 2200 }; 2201 2202 pciec1: pcie@ee800000 { 2203 compatible = "renesas,pcie-r8a77965", 2204 "renesas,pcie-rcar-gen3"; 2205 reg = <0 0xee800000 0 0x80000>; 2206 #address-cells = <3>; 2207 #size-cells = <2>; 2208 bus-range = <0x00 0xff>; 2209 device_type = "pci"; 2210 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 2211 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 2212 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 2213 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2214 /* Map all possible DDR as inbound ranges */ 2215 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2216 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2217 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2218 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2219 #interrupt-cells = <1>; 2220 interrupt-map-mask = <0 0 0 0>; 2221 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2222 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2223 clock-names = "pcie", "pcie_bus"; 2224 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2225 resets = <&cpg 318>; 2226 status = "disabled"; 2227 }; 2228 2229 fdp1@fe940000 { 2230 compatible = "renesas,fdp1"; 2231 reg = <0 0xfe940000 0 0x2400>; 2232 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2233 clocks = <&cpg CPG_MOD 119>; 2234 power-domains = <&sysc R8A77965_PD_A3VP>; 2235 resets = <&cpg 119>; 2236 renesas,fcp = <&fcpf0>; 2237 }; 2238 2239 fcpf0: fcp@fe950000 { 2240 compatible = "renesas,fcpf"; 2241 reg = <0 0xfe950000 0 0x200>; 2242 clocks = <&cpg CPG_MOD 615>; 2243 power-domains = <&sysc R8A77965_PD_A3VP>; 2244 resets = <&cpg 615>; 2245 }; 2246 2247 vspb: vsp@fe960000 { 2248 compatible = "renesas,vsp2"; 2249 reg = <0 0xfe960000 0 0x8000>; 2250 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2251 clocks = <&cpg CPG_MOD 626>; 2252 power-domains = <&sysc R8A77965_PD_A3VP>; 2253 resets = <&cpg 626>; 2254 2255 renesas,fcp = <&fcpvb0>; 2256 }; 2257 2258 vspi0: vsp@fe9a0000 { 2259 compatible = "renesas,vsp2"; 2260 reg = <0 0xfe9a0000 0 0x8000>; 2261 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2262 clocks = <&cpg CPG_MOD 631>; 2263 power-domains = <&sysc R8A77965_PD_A3VP>; 2264 resets = <&cpg 631>; 2265 2266 renesas,fcp = <&fcpvi0>; 2267 }; 2268 2269 vspd0: vsp@fea20000 { 2270 compatible = "renesas,vsp2"; 2271 reg = <0 0xfea20000 0 0x5000>; 2272 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2273 clocks = <&cpg CPG_MOD 623>; 2274 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2275 resets = <&cpg 623>; 2276 2277 renesas,fcp = <&fcpvd0>; 2278 }; 2279 2280 vspd1: vsp@fea28000 { 2281 compatible = "renesas,vsp2"; 2282 reg = <0 0xfea28000 0 0x5000>; 2283 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2284 clocks = <&cpg CPG_MOD 622>; 2285 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2286 resets = <&cpg 622>; 2287 2288 renesas,fcp = <&fcpvd1>; 2289 }; 2290 2291 fcpvb0: fcp@fe96f000 { 2292 compatible = "renesas,fcpv"; 2293 reg = <0 0xfe96f000 0 0x200>; 2294 clocks = <&cpg CPG_MOD 607>; 2295 power-domains = <&sysc R8A77965_PD_A3VP>; 2296 resets = <&cpg 607>; 2297 }; 2298 2299 fcpvd0: fcp@fea27000 { 2300 compatible = "renesas,fcpv"; 2301 reg = <0 0xfea27000 0 0x200>; 2302 clocks = <&cpg CPG_MOD 603>; 2303 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2304 resets = <&cpg 603>; 2305 }; 2306 2307 fcpvd1: fcp@fea2f000 { 2308 compatible = "renesas,fcpv"; 2309 reg = <0 0xfea2f000 0 0x200>; 2310 clocks = <&cpg CPG_MOD 602>; 2311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2312 resets = <&cpg 602>; 2313 }; 2314 2315 fcpvi0: fcp@fe9af000 { 2316 compatible = "renesas,fcpv"; 2317 reg = <0 0xfe9af000 0 0x200>; 2318 clocks = <&cpg CPG_MOD 611>; 2319 power-domains = <&sysc R8A77965_PD_A3VP>; 2320 resets = <&cpg 611>; 2321 }; 2322 2323 csi20: csi2@fea80000 { 2324 compatible = "renesas,r8a77965-csi2"; 2325 reg = <0 0xfea80000 0 0x10000>; 2326 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2327 clocks = <&cpg CPG_MOD 714>; 2328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2329 resets = <&cpg 714>; 2330 status = "disabled"; 2331 2332 ports { 2333 #address-cells = <1>; 2334 #size-cells = <0>; 2335 2336 port@1 { 2337 #address-cells = <1>; 2338 #size-cells = <0>; 2339 2340 reg = <1>; 2341 2342 csi20vin0: endpoint@0 { 2343 reg = <0>; 2344 remote-endpoint = <&vin0csi20>; 2345 }; 2346 csi20vin1: endpoint@1 { 2347 reg = <1>; 2348 remote-endpoint = <&vin1csi20>; 2349 }; 2350 csi20vin2: endpoint@2 { 2351 reg = <2>; 2352 remote-endpoint = <&vin2csi20>; 2353 }; 2354 csi20vin3: endpoint@3 { 2355 reg = <3>; 2356 remote-endpoint = <&vin3csi20>; 2357 }; 2358 csi20vin4: endpoint@4 { 2359 reg = <4>; 2360 remote-endpoint = <&vin4csi20>; 2361 }; 2362 csi20vin5: endpoint@5 { 2363 reg = <5>; 2364 remote-endpoint = <&vin5csi20>; 2365 }; 2366 csi20vin6: endpoint@6 { 2367 reg = <6>; 2368 remote-endpoint = <&vin6csi20>; 2369 }; 2370 csi20vin7: endpoint@7 { 2371 reg = <7>; 2372 remote-endpoint = <&vin7csi20>; 2373 }; 2374 }; 2375 }; 2376 }; 2377 2378 csi40: csi2@feaa0000 { 2379 compatible = "renesas,r8a77965-csi2"; 2380 reg = <0 0xfeaa0000 0 0x10000>; 2381 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2382 clocks = <&cpg CPG_MOD 716>; 2383 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2384 resets = <&cpg 716>; 2385 status = "disabled"; 2386 2387 ports { 2388 #address-cells = <1>; 2389 #size-cells = <0>; 2390 2391 port@1 { 2392 #address-cells = <1>; 2393 #size-cells = <0>; 2394 2395 reg = <1>; 2396 2397 csi40vin0: endpoint@0 { 2398 reg = <0>; 2399 remote-endpoint = <&vin0csi40>; 2400 }; 2401 csi40vin1: endpoint@1 { 2402 reg = <1>; 2403 remote-endpoint = <&vin1csi40>; 2404 }; 2405 csi40vin2: endpoint@2 { 2406 reg = <2>; 2407 remote-endpoint = <&vin2csi40>; 2408 }; 2409 csi40vin3: endpoint@3 { 2410 reg = <3>; 2411 remote-endpoint = <&vin3csi40>; 2412 }; 2413 csi40vin4: endpoint@4 { 2414 reg = <4>; 2415 remote-endpoint = <&vin4csi40>; 2416 }; 2417 csi40vin5: endpoint@5 { 2418 reg = <5>; 2419 remote-endpoint = <&vin5csi40>; 2420 }; 2421 csi40vin6: endpoint@6 { 2422 reg = <6>; 2423 remote-endpoint = <&vin6csi40>; 2424 }; 2425 csi40vin7: endpoint@7 { 2426 reg = <7>; 2427 remote-endpoint = <&vin7csi40>; 2428 }; 2429 }; 2430 }; 2431 }; 2432 2433 hdmi0: hdmi@fead0000 { 2434 compatible = "renesas,r8a77965-hdmi", 2435 "renesas,rcar-gen3-hdmi"; 2436 reg = <0 0xfead0000 0 0x10000>; 2437 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2438 clocks = <&cpg CPG_MOD 729>, 2439 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 2440 clock-names = "iahb", "isfr"; 2441 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2442 resets = <&cpg 729>; 2443 status = "disabled"; 2444 2445 ports { 2446 #address-cells = <1>; 2447 #size-cells = <0>; 2448 port@0 { 2449 reg = <0>; 2450 dw_hdmi0_in: endpoint { 2451 remote-endpoint = <&du_out_hdmi0>; 2452 }; 2453 }; 2454 port@1 { 2455 reg = <1>; 2456 }; 2457 }; 2458 }; 2459 2460 du: display@feb00000 { 2461 compatible = "renesas,du-r8a77965"; 2462 reg = <0 0xfeb00000 0 0x80000>; 2463 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2464 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2465 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2466 clocks = <&cpg CPG_MOD 724>, 2467 <&cpg CPG_MOD 723>, 2468 <&cpg CPG_MOD 721>; 2469 clock-names = "du.0", "du.1", "du.3"; 2470 status = "disabled"; 2471 2472 vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2473 2474 ports { 2475 #address-cells = <1>; 2476 #size-cells = <0>; 2477 2478 port@0 { 2479 reg = <0>; 2480 du_out_rgb: endpoint { 2481 }; 2482 }; 2483 port@1 { 2484 reg = <1>; 2485 du_out_hdmi0: endpoint { 2486 remote-endpoint = <&dw_hdmi0_in>; 2487 }; 2488 }; 2489 port@2 { 2490 reg = <2>; 2491 du_out_lvds0: endpoint { 2492 remote-endpoint = <&lvds0_in>; 2493 }; 2494 }; 2495 }; 2496 }; 2497 2498 lvds0: lvds@feb90000 { 2499 compatible = "renesas,r8a77965-lvds"; 2500 reg = <0 0xfeb90000 0 0x14>; 2501 clocks = <&cpg CPG_MOD 727>; 2502 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 2503 resets = <&cpg 727>; 2504 status = "disabled"; 2505 2506 ports { 2507 #address-cells = <1>; 2508 #size-cells = <0>; 2509 2510 port@0 { 2511 reg = <0>; 2512 lvds0_in: endpoint { 2513 remote-endpoint = <&du_out_lvds0>; 2514 }; 2515 }; 2516 port@1 { 2517 reg = <1>; 2518 lvds0_out: endpoint { 2519 }; 2520 }; 2521 }; 2522 }; 2523 2524 prr: chipid@fff00044 { 2525 compatible = "renesas,prr"; 2526 reg = <0 0xfff00044 0 4>; 2527 }; 2528 }; 2529 2530 thermal-zones { 2531 sensor_thermal1: sensor-thermal1 { 2532 polling-delay-passive = <250>; 2533 polling-delay = <1000>; 2534 thermal-sensors = <&tsc 0>; 2535 sustainable-power = <2439>; 2536 2537 trips { 2538 sensor1_crit: sensor1-crit { 2539 temperature = <120000>; 2540 hysteresis = <1000>; 2541 type = "critical"; 2542 }; 2543 }; 2544 }; 2545 2546 sensor_thermal2: sensor-thermal2 { 2547 polling-delay-passive = <250>; 2548 polling-delay = <1000>; 2549 thermal-sensors = <&tsc 1>; 2550 sustainable-power = <2439>; 2551 2552 trips { 2553 sensor2_crit: sensor2-crit { 2554 temperature = <120000>; 2555 hysteresis = <1000>; 2556 type = "critical"; 2557 }; 2558 }; 2559 }; 2560 2561 sensor_thermal3: sensor-thermal3 { 2562 polling-delay-passive = <250>; 2563 polling-delay = <1000>; 2564 thermal-sensors = <&tsc 2>; 2565 sustainable-power = <2439>; 2566 2567 trips { 2568 target: trip-point1 { 2569 /* miliCelsius */ 2570 temperature = <100000>; 2571 hysteresis = <1000>; 2572 type = "passive"; 2573 }; 2574 2575 sensor3_crit: sensor3-crit { 2576 temperature = <120000>; 2577 hysteresis = <1000>; 2578 type = "critical"; 2579 }; 2580 }; 2581 2582 cooling-maps { 2583 map0 { 2584 trip = <&target>; 2585 cooling-device = <&a57_0 2 4>; 2586 contribution = <1024>; 2587 }; 2588 }; 2589 }; 2590 }; 2591 2592 timer { 2593 compatible = "arm,armv8-timer"; 2594 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2595 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2596 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2597 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2598 }; 2599 2600 /* External USB clocks - can be overridden by the board */ 2601 usb3s0_clk: usb3s0 { 2602 compatible = "fixed-clock"; 2603 #clock-cells = <0>; 2604 clock-frequency = <0>; 2605 }; 2606 2607 usb_extal_clk: usb_extal { 2608 compatible = "fixed-clock"; 2609 #clock-cells = <0>; 2610 clock-frequency = <0>; 2611 }; 2612}; 2613