1*919d31abSGeert Uytterhoeven// SPDX-License-Identifier: GPL-2.0 2*919d31abSGeert Uytterhoeven/* 3*919d31abSGeert Uytterhoeven * Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board 4*919d31abSGeert Uytterhoeven * 5*919d31abSGeert Uytterhoeven * Copyright (C) 2018 Renesas Electronics Corp. 6*919d31abSGeert Uytterhoeven * Copyright (C) 2018 Cogent Embedded, Inc. 7*919d31abSGeert Uytterhoeven */ 8*919d31abSGeert Uytterhoeven 9*919d31abSGeert Uytterhoeven/dts-v1/; 10*919d31abSGeert Uytterhoeven#include "r8a77965.dtsi" 11*919d31abSGeert Uytterhoeven#include "ulcb.dtsi" 12*919d31abSGeert Uytterhoeven 13*919d31abSGeert Uytterhoeven/ { 14*919d31abSGeert Uytterhoeven model = "Renesas M3NULCB board based on r8a77965"; 15*919d31abSGeert Uytterhoeven compatible = "renesas,m3nulcb", "renesas,r8a77965"; 16*919d31abSGeert Uytterhoeven 17*919d31abSGeert Uytterhoeven memory@48000000 { 18*919d31abSGeert Uytterhoeven device_type = "memory"; 19*919d31abSGeert Uytterhoeven /* first 128MB is reserved for secure area. */ 20*919d31abSGeert Uytterhoeven reg = <0x0 0x48000000 0x0 0x78000000>; 21*919d31abSGeert Uytterhoeven }; 22*919d31abSGeert Uytterhoeven}; 23*919d31abSGeert Uytterhoeven 24*919d31abSGeert Uytterhoeven&du { 25*919d31abSGeert Uytterhoeven clocks = <&cpg CPG_MOD 724>, 26*919d31abSGeert Uytterhoeven <&cpg CPG_MOD 723>, 27*919d31abSGeert Uytterhoeven <&cpg CPG_MOD 721>, 28*919d31abSGeert Uytterhoeven <&versaclock5 1>, 29*919d31abSGeert Uytterhoeven <&versaclock5 3>, 30*919d31abSGeert Uytterhoeven <&versaclock5 2>; 31*919d31abSGeert Uytterhoeven clock-names = "du.0", "du.1", "du.3", 32*919d31abSGeert Uytterhoeven "dclkin.0", "dclkin.1", "dclkin.3"; 33*919d31abSGeert Uytterhoeven}; 34