1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77961-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77961-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A77961_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a77961"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 /* 20 * The external audio clocks are configured as 0 Hz fixed frequency 21 * clocks by default. 22 * Boards that provide audio clocks should override them. 23 */ 24 audio_clk_a: audio_clk_a { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; 27 clock-frequency = <0>; 28 }; 29 30 audio_clk_b: audio_clk_b { 31 compatible = "fixed-clock"; 32 #clock-cells = <0>; 33 clock-frequency = <0>; 34 }; 35 36 audio_clk_c: audio_clk_c { 37 compatible = "fixed-clock"; 38 #clock-cells = <0>; 39 clock-frequency = <0>; 40 }; 41 42 /* External CAN clock - to be overridden by boards that provide it */ 43 can_clk: can { 44 compatible = "fixed-clock"; 45 #clock-cells = <0>; 46 clock-frequency = <0>; 47 }; 48 49 cluster0_opp: opp_table0 { 50 compatible = "operating-points-v2"; 51 opp-shared; 52 53 opp-500000000 { 54 opp-hz = /bits/ 64 <500000000>; 55 opp-microvolt = <820000>; 56 clock-latency-ns = <300000>; 57 }; 58 opp-1000000000 { 59 opp-hz = /bits/ 64 <1000000000>; 60 opp-microvolt = <820000>; 61 clock-latency-ns = <300000>; 62 }; 63 opp-1500000000 { 64 opp-hz = /bits/ 64 <1500000000>; 65 opp-microvolt = <820000>; 66 clock-latency-ns = <300000>; 67 opp-suspend; 68 }; 69 opp-1600000000 { 70 opp-hz = /bits/ 64 <1600000000>; 71 opp-microvolt = <900000>; 72 clock-latency-ns = <300000>; 73 turbo-mode; 74 }; 75 opp-1700000000 { 76 opp-hz = /bits/ 64 <1700000000>; 77 opp-microvolt = <900000>; 78 clock-latency-ns = <300000>; 79 turbo-mode; 80 }; 81 opp-1800000000 { 82 opp-hz = /bits/ 64 <1800000000>; 83 opp-microvolt = <960000>; 84 clock-latency-ns = <300000>; 85 turbo-mode; 86 }; 87 }; 88 89 cluster1_opp: opp_table1 { 90 compatible = "operating-points-v2"; 91 opp-shared; 92 93 opp-800000000 { 94 opp-hz = /bits/ 64 <800000000>; 95 opp-microvolt = <820000>; 96 clock-latency-ns = <300000>; 97 }; 98 opp-1000000000 { 99 opp-hz = /bits/ 64 <1000000000>; 100 opp-microvolt = <820000>; 101 clock-latency-ns = <300000>; 102 }; 103 opp-1200000000 { 104 opp-hz = /bits/ 64 <1200000000>; 105 opp-microvolt = <820000>; 106 clock-latency-ns = <300000>; 107 }; 108 opp-1300000000 { 109 opp-hz = /bits/ 64 <1300000000>; 110 opp-microvolt = <820000>; 111 clock-latency-ns = <300000>; 112 turbo-mode; 113 }; 114 }; 115 116 cpus { 117 #address-cells = <1>; 118 #size-cells = <0>; 119 120 cpu-map { 121 cluster0 { 122 core0 { 123 cpu = <&a57_0>; 124 }; 125 core1 { 126 cpu = <&a57_1>; 127 }; 128 }; 129 130 cluster1 { 131 core0 { 132 cpu = <&a53_0>; 133 }; 134 core1 { 135 cpu = <&a53_1>; 136 }; 137 core2 { 138 cpu = <&a53_2>; 139 }; 140 core3 { 141 cpu = <&a53_3>; 142 }; 143 }; 144 }; 145 146 a57_0: cpu@0 { 147 compatible = "arm,cortex-a57"; 148 reg = <0x0>; 149 device_type = "cpu"; 150 power-domains = <&sysc R8A77961_PD_CA57_CPU0>; 151 next-level-cache = <&L2_CA57>; 152 enable-method = "psci"; 153 cpu-idle-states = <&CPU_SLEEP_0>; 154 dynamic-power-coefficient = <854>; 155 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>; 156 operating-points-v2 = <&cluster0_opp>; 157 capacity-dmips-mhz = <1024>; 158 #cooling-cells = <2>; 159 }; 160 161 a57_1: cpu@1 { 162 compatible = "arm,cortex-a57"; 163 reg = <0x1>; 164 device_type = "cpu"; 165 power-domains = <&sysc R8A77961_PD_CA57_CPU1>; 166 next-level-cache = <&L2_CA57>; 167 enable-method = "psci"; 168 cpu-idle-states = <&CPU_SLEEP_0>; 169 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>; 170 operating-points-v2 = <&cluster0_opp>; 171 capacity-dmips-mhz = <1024>; 172 #cooling-cells = <2>; 173 }; 174 175 a53_0: cpu@100 { 176 compatible = "arm,cortex-a53"; 177 reg = <0x100>; 178 device_type = "cpu"; 179 power-domains = <&sysc R8A77961_PD_CA53_CPU0>; 180 next-level-cache = <&L2_CA53>; 181 enable-method = "psci"; 182 cpu-idle-states = <&CPU_SLEEP_1>; 183 #cooling-cells = <2>; 184 dynamic-power-coefficient = <277>; 185 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 186 operating-points-v2 = <&cluster1_opp>; 187 capacity-dmips-mhz = <535>; 188 }; 189 190 a53_1: cpu@101 { 191 compatible = "arm,cortex-a53"; 192 reg = <0x101>; 193 device_type = "cpu"; 194 power-domains = <&sysc R8A77961_PD_CA53_CPU1>; 195 next-level-cache = <&L2_CA53>; 196 enable-method = "psci"; 197 cpu-idle-states = <&CPU_SLEEP_1>; 198 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 199 operating-points-v2 = <&cluster1_opp>; 200 capacity-dmips-mhz = <535>; 201 }; 202 203 a53_2: cpu@102 { 204 compatible = "arm,cortex-a53"; 205 reg = <0x102>; 206 device_type = "cpu"; 207 power-domains = <&sysc R8A77961_PD_CA53_CPU2>; 208 next-level-cache = <&L2_CA53>; 209 enable-method = "psci"; 210 cpu-idle-states = <&CPU_SLEEP_1>; 211 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 212 operating-points-v2 = <&cluster1_opp>; 213 capacity-dmips-mhz = <535>; 214 }; 215 216 a53_3: cpu@103 { 217 compatible = "arm,cortex-a53"; 218 reg = <0x103>; 219 device_type = "cpu"; 220 power-domains = <&sysc R8A77961_PD_CA53_CPU3>; 221 next-level-cache = <&L2_CA53>; 222 enable-method = "psci"; 223 cpu-idle-states = <&CPU_SLEEP_1>; 224 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 225 operating-points-v2 = <&cluster1_opp>; 226 capacity-dmips-mhz = <535>; 227 }; 228 229 L2_CA57: cache-controller-0 { 230 compatible = "cache"; 231 power-domains = <&sysc R8A77961_PD_CA57_SCU>; 232 cache-unified; 233 cache-level = <2>; 234 }; 235 236 L2_CA53: cache-controller-1 { 237 compatible = "cache"; 238 power-domains = <&sysc R8A77961_PD_CA53_SCU>; 239 cache-unified; 240 cache-level = <2>; 241 }; 242 243 idle-states { 244 entry-method = "psci"; 245 246 CPU_SLEEP_0: cpu-sleep-0 { 247 compatible = "arm,idle-state"; 248 arm,psci-suspend-param = <0x0010000>; 249 local-timer-stop; 250 entry-latency-us = <400>; 251 exit-latency-us = <500>; 252 min-residency-us = <4000>; 253 }; 254 255 CPU_SLEEP_1: cpu-sleep-1 { 256 compatible = "arm,idle-state"; 257 arm,psci-suspend-param = <0x0010000>; 258 local-timer-stop; 259 entry-latency-us = <700>; 260 exit-latency-us = <700>; 261 min-residency-us = <5000>; 262 }; 263 }; 264 }; 265 266 extal_clk: extal { 267 compatible = "fixed-clock"; 268 #clock-cells = <0>; 269 /* This value must be overridden by the board */ 270 clock-frequency = <0>; 271 }; 272 273 extalr_clk: extalr { 274 compatible = "fixed-clock"; 275 #clock-cells = <0>; 276 /* This value must be overridden by the board */ 277 clock-frequency = <0>; 278 }; 279 280 /* External PCIe clock - can be overridden by the board */ 281 pcie_bus_clk: pcie_bus { 282 compatible = "fixed-clock"; 283 #clock-cells = <0>; 284 clock-frequency = <0>; 285 }; 286 287 pmu_a53 { 288 compatible = "arm,cortex-a53-pmu"; 289 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 290 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 291 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 292 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 293 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 294 }; 295 296 pmu_a57 { 297 compatible = "arm,cortex-a57-pmu"; 298 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 299 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 300 interrupt-affinity = <&a57_0>, <&a57_1>; 301 }; 302 303 psci { 304 compatible = "arm,psci-1.0", "arm,psci-0.2"; 305 method = "smc"; 306 }; 307 308 /* External SCIF clock - to be overridden by boards that provide it */ 309 scif_clk: scif { 310 compatible = "fixed-clock"; 311 #clock-cells = <0>; 312 clock-frequency = <0>; 313 }; 314 315 soc { 316 compatible = "simple-bus"; 317 interrupt-parent = <&gic>; 318 #address-cells = <2>; 319 #size-cells = <2>; 320 ranges; 321 322 rwdt: watchdog@e6020000 { 323 compatible = "renesas,r8a77961-wdt", 324 "renesas,rcar-gen3-wdt"; 325 reg = <0 0xe6020000 0 0x0c>; 326 clocks = <&cpg CPG_MOD 402>; 327 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 328 resets = <&cpg 402>; 329 status = "disabled"; 330 }; 331 332 gpio0: gpio@e6050000 { 333 compatible = "renesas,gpio-r8a77961", 334 "renesas,rcar-gen3-gpio"; 335 reg = <0 0xe6050000 0 0x50>; 336 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 337 #gpio-cells = <2>; 338 gpio-controller; 339 gpio-ranges = <&pfc 0 0 16>; 340 #interrupt-cells = <2>; 341 interrupt-controller; 342 clocks = <&cpg CPG_MOD 912>; 343 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 344 resets = <&cpg 912>; 345 }; 346 347 gpio1: gpio@e6051000 { 348 compatible = "renesas,gpio-r8a77961", 349 "renesas,rcar-gen3-gpio"; 350 reg = <0 0xe6051000 0 0x50>; 351 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 352 #gpio-cells = <2>; 353 gpio-controller; 354 gpio-ranges = <&pfc 0 32 29>; 355 #interrupt-cells = <2>; 356 interrupt-controller; 357 clocks = <&cpg CPG_MOD 911>; 358 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 359 resets = <&cpg 911>; 360 }; 361 362 gpio2: gpio@e6052000 { 363 compatible = "renesas,gpio-r8a77961", 364 "renesas,rcar-gen3-gpio"; 365 reg = <0 0xe6052000 0 0x50>; 366 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 367 #gpio-cells = <2>; 368 gpio-controller; 369 gpio-ranges = <&pfc 0 64 15>; 370 #interrupt-cells = <2>; 371 interrupt-controller; 372 clocks = <&cpg CPG_MOD 910>; 373 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 374 resets = <&cpg 910>; 375 }; 376 377 gpio3: gpio@e6053000 { 378 compatible = "renesas,gpio-r8a77961", 379 "renesas,rcar-gen3-gpio"; 380 reg = <0 0xe6053000 0 0x50>; 381 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 382 #gpio-cells = <2>; 383 gpio-controller; 384 gpio-ranges = <&pfc 0 96 16>; 385 #interrupt-cells = <2>; 386 interrupt-controller; 387 clocks = <&cpg CPG_MOD 909>; 388 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 389 resets = <&cpg 909>; 390 }; 391 392 gpio4: gpio@e6054000 { 393 compatible = "renesas,gpio-r8a77961", 394 "renesas,rcar-gen3-gpio"; 395 reg = <0 0xe6054000 0 0x50>; 396 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 397 #gpio-cells = <2>; 398 gpio-controller; 399 gpio-ranges = <&pfc 0 128 18>; 400 #interrupt-cells = <2>; 401 interrupt-controller; 402 clocks = <&cpg CPG_MOD 908>; 403 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 404 resets = <&cpg 908>; 405 }; 406 407 gpio5: gpio@e6055000 { 408 compatible = "renesas,gpio-r8a77961", 409 "renesas,rcar-gen3-gpio"; 410 reg = <0 0xe6055000 0 0x50>; 411 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 412 #gpio-cells = <2>; 413 gpio-controller; 414 gpio-ranges = <&pfc 0 160 26>; 415 #interrupt-cells = <2>; 416 interrupt-controller; 417 clocks = <&cpg CPG_MOD 907>; 418 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 419 resets = <&cpg 907>; 420 }; 421 422 gpio6: gpio@e6055400 { 423 compatible = "renesas,gpio-r8a77961", 424 "renesas,rcar-gen3-gpio"; 425 reg = <0 0xe6055400 0 0x50>; 426 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 427 #gpio-cells = <2>; 428 gpio-controller; 429 gpio-ranges = <&pfc 0 192 32>; 430 #interrupt-cells = <2>; 431 interrupt-controller; 432 clocks = <&cpg CPG_MOD 906>; 433 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 434 resets = <&cpg 906>; 435 }; 436 437 gpio7: gpio@e6055800 { 438 compatible = "renesas,gpio-r8a77961", 439 "renesas,rcar-gen3-gpio"; 440 reg = <0 0xe6055800 0 0x50>; 441 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 442 #gpio-cells = <2>; 443 gpio-controller; 444 gpio-ranges = <&pfc 0 224 4>; 445 #interrupt-cells = <2>; 446 interrupt-controller; 447 clocks = <&cpg CPG_MOD 905>; 448 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 449 resets = <&cpg 905>; 450 }; 451 452 pfc: pinctrl@e6060000 { 453 compatible = "renesas,pfc-r8a77961"; 454 reg = <0 0xe6060000 0 0x50c>; 455 }; 456 457 cmt0: timer@e60f0000 { 458 compatible = "renesas,r8a77961-cmt0", 459 "renesas,rcar-gen3-cmt0"; 460 reg = <0 0xe60f0000 0 0x1004>; 461 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 462 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 463 clocks = <&cpg CPG_MOD 303>; 464 clock-names = "fck"; 465 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 466 resets = <&cpg 303>; 467 status = "disabled"; 468 }; 469 470 cmt1: timer@e6130000 { 471 compatible = "renesas,r8a77961-cmt1", 472 "renesas,rcar-gen3-cmt1"; 473 reg = <0 0xe6130000 0 0x1004>; 474 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 475 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 476 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 477 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 478 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 480 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 481 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 482 clocks = <&cpg CPG_MOD 302>; 483 clock-names = "fck"; 484 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 485 resets = <&cpg 302>; 486 status = "disabled"; 487 }; 488 489 cmt2: timer@e6140000 { 490 compatible = "renesas,r8a77961-cmt1", 491 "renesas,rcar-gen3-cmt1"; 492 reg = <0 0xe6140000 0 0x1004>; 493 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 494 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 495 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 496 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 497 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 498 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 499 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 500 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 301>; 502 clock-names = "fck"; 503 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 504 resets = <&cpg 301>; 505 status = "disabled"; 506 }; 507 508 cmt3: timer@e6148000 { 509 compatible = "renesas,r8a77961-cmt1", 510 "renesas,rcar-gen3-cmt1"; 511 reg = <0 0xe6148000 0 0x1004>; 512 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 513 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 514 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 518 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 519 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 520 clocks = <&cpg CPG_MOD 300>; 521 clock-names = "fck"; 522 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 523 resets = <&cpg 300>; 524 status = "disabled"; 525 }; 526 527 cpg: clock-controller@e6150000 { 528 compatible = "renesas,r8a77961-cpg-mssr"; 529 reg = <0 0xe6150000 0 0x1000>; 530 clocks = <&extal_clk>, <&extalr_clk>; 531 clock-names = "extal", "extalr"; 532 #clock-cells = <2>; 533 #power-domain-cells = <0>; 534 #reset-cells = <1>; 535 }; 536 537 rst: reset-controller@e6160000 { 538 compatible = "renesas,r8a77961-rst"; 539 reg = <0 0xe6160000 0 0x0200>; 540 }; 541 542 sysc: system-controller@e6180000 { 543 compatible = "renesas,r8a77961-sysc"; 544 reg = <0 0xe6180000 0 0x0400>; 545 #power-domain-cells = <1>; 546 }; 547 548 tsc: thermal@e6198000 { 549 compatible = "renesas,r8a77961-thermal"; 550 reg = <0 0xe6198000 0 0x100>, 551 <0 0xe61a0000 0 0x100>, 552 <0 0xe61a8000 0 0x100>; 553 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 554 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 555 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 556 clocks = <&cpg CPG_MOD 522>; 557 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 558 resets = <&cpg 522>; 559 #thermal-sensor-cells = <1>; 560 }; 561 562 intc_ex: interrupt-controller@e61c0000 { 563 #interrupt-cells = <2>; 564 interrupt-controller; 565 reg = <0 0xe61c0000 0 0x200>; 566 /* placeholder */ 567 }; 568 569 tmu0: timer@e61e0000 { 570 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 571 reg = <0 0xe61e0000 0 0x30>; 572 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 573 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 574 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 575 clocks = <&cpg CPG_MOD 125>; 576 clock-names = "fck"; 577 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 578 resets = <&cpg 125>; 579 status = "disabled"; 580 }; 581 582 tmu1: timer@e6fc0000 { 583 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 584 reg = <0 0xe6fc0000 0 0x30>; 585 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 586 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 587 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 588 clocks = <&cpg CPG_MOD 124>; 589 clock-names = "fck"; 590 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 591 resets = <&cpg 124>; 592 status = "disabled"; 593 }; 594 595 tmu2: timer@e6fd0000 { 596 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 597 reg = <0 0xe6fd0000 0 0x30>; 598 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 599 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 600 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 601 clocks = <&cpg CPG_MOD 123>; 602 clock-names = "fck"; 603 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 604 resets = <&cpg 123>; 605 status = "disabled"; 606 }; 607 608 tmu3: timer@e6fe0000 { 609 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 610 reg = <0 0xe6fe0000 0 0x30>; 611 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 612 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 613 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 614 clocks = <&cpg CPG_MOD 122>; 615 clock-names = "fck"; 616 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 617 resets = <&cpg 122>; 618 status = "disabled"; 619 }; 620 621 tmu4: timer@ffc00000 { 622 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 623 reg = <0 0xffc00000 0 0x30>; 624 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 626 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 627 clocks = <&cpg CPG_MOD 121>; 628 clock-names = "fck"; 629 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 630 resets = <&cpg 121>; 631 status = "disabled"; 632 }; 633 634 i2c0: i2c@e6500000 { 635 #address-cells = <1>; 636 #size-cells = <0>; 637 compatible = "renesas,i2c-r8a77961", 638 "renesas,rcar-gen3-i2c"; 639 reg = <0 0xe6500000 0 0x40>; 640 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 641 clocks = <&cpg CPG_MOD 931>; 642 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 643 resets = <&cpg 931>; 644 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 645 <&dmac2 0x91>, <&dmac2 0x90>; 646 dma-names = "tx", "rx", "tx", "rx"; 647 i2c-scl-internal-delay-ns = <110>; 648 status = "disabled"; 649 }; 650 651 i2c1: i2c@e6508000 { 652 #address-cells = <1>; 653 #size-cells = <0>; 654 compatible = "renesas,i2c-r8a77961", 655 "renesas,rcar-gen3-i2c"; 656 reg = <0 0xe6508000 0 0x40>; 657 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 658 clocks = <&cpg CPG_MOD 930>; 659 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 660 resets = <&cpg 930>; 661 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 662 <&dmac2 0x93>, <&dmac2 0x92>; 663 dma-names = "tx", "rx", "tx", "rx"; 664 i2c-scl-internal-delay-ns = <6>; 665 status = "disabled"; 666 }; 667 668 i2c2: i2c@e6510000 { 669 #address-cells = <1>; 670 #size-cells = <0>; 671 compatible = "renesas,i2c-r8a77961", 672 "renesas,rcar-gen3-i2c"; 673 reg = <0 0xe6510000 0 0x40>; 674 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 675 clocks = <&cpg CPG_MOD 929>; 676 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 677 resets = <&cpg 929>; 678 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 679 <&dmac2 0x95>, <&dmac2 0x94>; 680 dma-names = "tx", "rx", "tx", "rx"; 681 i2c-scl-internal-delay-ns = <6>; 682 status = "disabled"; 683 }; 684 685 i2c3: i2c@e66d0000 { 686 #address-cells = <1>; 687 #size-cells = <0>; 688 compatible = "renesas,i2c-r8a77961", 689 "renesas,rcar-gen3-i2c"; 690 reg = <0 0xe66d0000 0 0x40>; 691 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 692 clocks = <&cpg CPG_MOD 928>; 693 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 694 resets = <&cpg 928>; 695 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 696 dma-names = "tx", "rx"; 697 i2c-scl-internal-delay-ns = <110>; 698 status = "disabled"; 699 }; 700 701 i2c4: i2c@e66d8000 { 702 #address-cells = <1>; 703 #size-cells = <0>; 704 compatible = "renesas,i2c-r8a77961", 705 "renesas,rcar-gen3-i2c"; 706 reg = <0 0xe66d8000 0 0x40>; 707 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 708 clocks = <&cpg CPG_MOD 927>; 709 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 710 resets = <&cpg 927>; 711 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 712 dma-names = "tx", "rx"; 713 i2c-scl-internal-delay-ns = <110>; 714 status = "disabled"; 715 }; 716 717 i2c5: i2c@e66e0000 { 718 #address-cells = <1>; 719 #size-cells = <0>; 720 compatible = "renesas,i2c-r8a77961", 721 "renesas,rcar-gen3-i2c"; 722 reg = <0 0xe66e0000 0 0x40>; 723 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 724 clocks = <&cpg CPG_MOD 919>; 725 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 726 resets = <&cpg 919>; 727 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 728 dma-names = "tx", "rx"; 729 i2c-scl-internal-delay-ns = <110>; 730 status = "disabled"; 731 }; 732 733 i2c6: i2c@e66e8000 { 734 #address-cells = <1>; 735 #size-cells = <0>; 736 compatible = "renesas,i2c-r8a77961", 737 "renesas,rcar-gen3-i2c"; 738 reg = <0 0xe66e8000 0 0x40>; 739 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 740 clocks = <&cpg CPG_MOD 918>; 741 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 742 resets = <&cpg 918>; 743 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 744 dma-names = "tx", "rx"; 745 i2c-scl-internal-delay-ns = <6>; 746 status = "disabled"; 747 }; 748 749 i2c_dvfs: i2c@e60b0000 { 750 #address-cells = <1>; 751 #size-cells = <0>; 752 compatible = "renesas,iic-r8a77961", 753 "renesas,rcar-gen3-iic", 754 "renesas,rmobile-iic"; 755 reg = <0 0xe60b0000 0 0x425>; 756 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 757 clocks = <&cpg CPG_MOD 926>; 758 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 759 resets = <&cpg 926>; 760 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 761 dma-names = "tx", "rx"; 762 status = "disabled"; 763 }; 764 765 hscif0: serial@e6540000 { 766 compatible = "renesas,hscif-r8a77961", 767 "renesas,rcar-gen3-hscif", 768 "renesas,hscif"; 769 reg = <0 0xe6540000 0 0x60>; 770 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 771 clocks = <&cpg CPG_MOD 520>, 772 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 773 <&scif_clk>; 774 clock-names = "fck", "brg_int", "scif_clk"; 775 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 776 <&dmac2 0x31>, <&dmac2 0x30>; 777 dma-names = "tx", "rx", "tx", "rx"; 778 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 779 resets = <&cpg 520>; 780 status = "disabled"; 781 }; 782 783 hscif1: serial@e6550000 { 784 compatible = "renesas,hscif-r8a77961", 785 "renesas,rcar-gen3-hscif", 786 "renesas,hscif"; 787 reg = <0 0xe6550000 0 0x60>; 788 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 789 clocks = <&cpg CPG_MOD 519>, 790 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 791 <&scif_clk>; 792 clock-names = "fck", "brg_int", "scif_clk"; 793 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 794 <&dmac2 0x33>, <&dmac2 0x32>; 795 dma-names = "tx", "rx", "tx", "rx"; 796 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 797 resets = <&cpg 519>; 798 status = "disabled"; 799 }; 800 801 hscif2: serial@e6560000 { 802 compatible = "renesas,hscif-r8a77961", 803 "renesas,rcar-gen3-hscif", 804 "renesas,hscif"; 805 reg = <0 0xe6560000 0 0x60>; 806 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 807 clocks = <&cpg CPG_MOD 518>, 808 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 809 <&scif_clk>; 810 clock-names = "fck", "brg_int", "scif_clk"; 811 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 812 <&dmac2 0x35>, <&dmac2 0x34>; 813 dma-names = "tx", "rx", "tx", "rx"; 814 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 815 resets = <&cpg 518>; 816 status = "disabled"; 817 }; 818 819 hscif3: serial@e66a0000 { 820 compatible = "renesas,hscif-r8a77961", 821 "renesas,rcar-gen3-hscif", 822 "renesas,hscif"; 823 reg = <0 0xe66a0000 0 0x60>; 824 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 825 clocks = <&cpg CPG_MOD 517>, 826 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 827 <&scif_clk>; 828 clock-names = "fck", "brg_int", "scif_clk"; 829 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 830 dma-names = "tx", "rx"; 831 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 832 resets = <&cpg 517>; 833 status = "disabled"; 834 }; 835 836 hscif4: serial@e66b0000 { 837 compatible = "renesas,hscif-r8a77961", 838 "renesas,rcar-gen3-hscif", 839 "renesas,hscif"; 840 reg = <0 0xe66b0000 0 0x60>; 841 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 842 clocks = <&cpg CPG_MOD 516>, 843 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 844 <&scif_clk>; 845 clock-names = "fck", "brg_int", "scif_clk"; 846 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 847 dma-names = "tx", "rx"; 848 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 849 resets = <&cpg 516>; 850 status = "disabled"; 851 }; 852 853 hsusb: usb@e6590000 { 854 compatible = "renesas,usbhs-r8a77961", 855 "renesas,rcar-gen3-usbhs"; 856 reg = <0 0xe6590000 0 0x200>; 857 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 858 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 859 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 860 <&usb_dmac1 0>, <&usb_dmac1 1>; 861 dma-names = "ch0", "ch1", "ch2", "ch3"; 862 renesas,buswait = <11>; 863 phys = <&usb2_phy0 3>; 864 phy-names = "usb"; 865 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 866 resets = <&cpg 704>, <&cpg 703>; 867 status = "disabled"; 868 }; 869 870 usb_dmac0: dma-controller@e65a0000 { 871 compatible = "renesas,r8a77961-usb-dmac", 872 "renesas,usb-dmac"; 873 reg = <0 0xe65a0000 0 0x100>; 874 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 876 interrupt-names = "ch0", "ch1"; 877 clocks = <&cpg CPG_MOD 330>; 878 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 879 resets = <&cpg 330>; 880 #dma-cells = <1>; 881 dma-channels = <2>; 882 }; 883 884 usb_dmac1: dma-controller@e65b0000 { 885 compatible = "renesas,r8a77961-usb-dmac", 886 "renesas,usb-dmac"; 887 reg = <0 0xe65b0000 0 0x100>; 888 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 889 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 890 interrupt-names = "ch0", "ch1"; 891 clocks = <&cpg CPG_MOD 331>; 892 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 893 resets = <&cpg 331>; 894 #dma-cells = <1>; 895 dma-channels = <2>; 896 }; 897 898 usb3_phy0: usb-phy@e65ee000 { 899 compatible = "renesas,r8a77961-usb3-phy", 900 "renesas,rcar-gen3-usb3-phy"; 901 reg = <0 0xe65ee000 0 0x90>; 902 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 903 <&usb_extal_clk>; 904 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 905 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 906 resets = <&cpg 328>; 907 #phy-cells = <0>; 908 status = "disabled"; 909 }; 910 911 arm_cc630p: crypto@e6601000 { 912 compatible = "arm,cryptocell-630p-ree"; 913 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 914 reg = <0x0 0xe6601000 0 0x1000>; 915 clocks = <&cpg CPG_MOD 229>; 916 resets = <&cpg 229>; 917 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 918 }; 919 920 dmac0: dma-controller@e6700000 { 921 compatible = "renesas,dmac-r8a77961", 922 "renesas,rcar-dmac"; 923 reg = <0 0xe6700000 0 0x10000>; 924 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 926 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 927 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 928 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 929 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 930 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 931 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 932 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 933 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 934 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 936 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 937 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 938 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 939 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 940 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 941 interrupt-names = "error", 942 "ch0", "ch1", "ch2", "ch3", 943 "ch4", "ch5", "ch6", "ch7", 944 "ch8", "ch9", "ch10", "ch11", 945 "ch12", "ch13", "ch14", "ch15"; 946 clocks = <&cpg CPG_MOD 219>; 947 clock-names = "fck"; 948 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 949 resets = <&cpg 219>; 950 #dma-cells = <1>; 951 dma-channels = <16>; 952 }; 953 954 dmac1: dma-controller@e7300000 { 955 compatible = "renesas,dmac-r8a77961", 956 "renesas,rcar-dmac"; 957 reg = <0 0xe7300000 0 0x10000>; 958 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 975 interrupt-names = "error", 976 "ch0", "ch1", "ch2", "ch3", 977 "ch4", "ch5", "ch6", "ch7", 978 "ch8", "ch9", "ch10", "ch11", 979 "ch12", "ch13", "ch14", "ch15"; 980 clocks = <&cpg CPG_MOD 218>; 981 clock-names = "fck"; 982 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 983 resets = <&cpg 218>; 984 #dma-cells = <1>; 985 dma-channels = <16>; 986 }; 987 988 dmac2: dma-controller@e7310000 { 989 compatible = "renesas,dmac-r8a77961", 990 "renesas,rcar-dmac"; 991 reg = <0 0xe7310000 0 0x10000>; 992 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1004 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1005 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1006 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1007 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1008 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1009 interrupt-names = "error", 1010 "ch0", "ch1", "ch2", "ch3", 1011 "ch4", "ch5", "ch6", "ch7", 1012 "ch8", "ch9", "ch10", "ch11", 1013 "ch12", "ch13", "ch14", "ch15"; 1014 clocks = <&cpg CPG_MOD 217>; 1015 clock-names = "fck"; 1016 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1017 resets = <&cpg 217>; 1018 #dma-cells = <1>; 1019 dma-channels = <16>; 1020 }; 1021 1022 ipmmu_ds0: iommu@e6740000 { 1023 compatible = "renesas,ipmmu-r8a77961"; 1024 reg = <0 0xe6740000 0 0x1000>; 1025 renesas,ipmmu-main = <&ipmmu_mm 0>; 1026 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1027 #iommu-cells = <1>; 1028 }; 1029 1030 ipmmu_ds1: iommu@e7740000 { 1031 compatible = "renesas,ipmmu-r8a77961"; 1032 reg = <0 0xe7740000 0 0x1000>; 1033 renesas,ipmmu-main = <&ipmmu_mm 1>; 1034 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1035 #iommu-cells = <1>; 1036 }; 1037 1038 ipmmu_hc: iommu@e6570000 { 1039 compatible = "renesas,ipmmu-r8a77961"; 1040 reg = <0 0xe6570000 0 0x1000>; 1041 renesas,ipmmu-main = <&ipmmu_mm 2>; 1042 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1043 #iommu-cells = <1>; 1044 }; 1045 1046 ipmmu_ir: iommu@ff8b0000 { 1047 compatible = "renesas,ipmmu-r8a77961"; 1048 reg = <0 0xff8b0000 0 0x1000>; 1049 renesas,ipmmu-main = <&ipmmu_mm 3>; 1050 power-domains = <&sysc R8A77961_PD_A3IR>; 1051 #iommu-cells = <1>; 1052 }; 1053 1054 ipmmu_mm: iommu@e67b0000 { 1055 compatible = "renesas,ipmmu-r8a77961"; 1056 reg = <0 0xe67b0000 0 0x1000>; 1057 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1058 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1059 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1060 #iommu-cells = <1>; 1061 }; 1062 1063 ipmmu_mp: iommu@ec670000 { 1064 compatible = "renesas,ipmmu-r8a77961"; 1065 reg = <0 0xec670000 0 0x1000>; 1066 renesas,ipmmu-main = <&ipmmu_mm 4>; 1067 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1068 #iommu-cells = <1>; 1069 }; 1070 1071 ipmmu_pv0: iommu@fd800000 { 1072 compatible = "renesas,ipmmu-r8a77961"; 1073 reg = <0 0xfd800000 0 0x1000>; 1074 renesas,ipmmu-main = <&ipmmu_mm 5>; 1075 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1076 #iommu-cells = <1>; 1077 }; 1078 1079 ipmmu_pv1: iommu@fd950000 { 1080 compatible = "renesas,ipmmu-r8a77961"; 1081 reg = <0 0xfd950000 0 0x1000>; 1082 renesas,ipmmu-main = <&ipmmu_mm 6>; 1083 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1084 #iommu-cells = <1>; 1085 }; 1086 1087 ipmmu_rt: iommu@ffc80000 { 1088 compatible = "renesas,ipmmu-r8a77961"; 1089 reg = <0 0xffc80000 0 0x1000>; 1090 renesas,ipmmu-main = <&ipmmu_mm 7>; 1091 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1092 #iommu-cells = <1>; 1093 }; 1094 1095 ipmmu_vc0: iommu@fe6b0000 { 1096 compatible = "renesas,ipmmu-r8a77961"; 1097 reg = <0 0xfe6b0000 0 0x1000>; 1098 renesas,ipmmu-main = <&ipmmu_mm 8>; 1099 power-domains = <&sysc R8A77961_PD_A3VC>; 1100 #iommu-cells = <1>; 1101 }; 1102 1103 ipmmu_vi0: iommu@febd0000 { 1104 compatible = "renesas,ipmmu-r8a77961"; 1105 reg = <0 0xfebd0000 0 0x1000>; 1106 renesas,ipmmu-main = <&ipmmu_mm 9>; 1107 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1108 #iommu-cells = <1>; 1109 }; 1110 1111 avb: ethernet@e6800000 { 1112 compatible = "renesas,etheravb-r8a77961", 1113 "renesas,etheravb-rcar-gen3"; 1114 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1115 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1116 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1117 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1118 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1119 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1120 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1121 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1122 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1123 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1124 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1125 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1126 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1127 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1128 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1129 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1130 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1131 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1132 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1133 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1134 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1135 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1136 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1137 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1138 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1139 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1140 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1141 "ch4", "ch5", "ch6", "ch7", 1142 "ch8", "ch9", "ch10", "ch11", 1143 "ch12", "ch13", "ch14", "ch15", 1144 "ch16", "ch17", "ch18", "ch19", 1145 "ch20", "ch21", "ch22", "ch23", 1146 "ch24"; 1147 clocks = <&cpg CPG_MOD 812>; 1148 clock-names = "fck"; 1149 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1150 resets = <&cpg 812>; 1151 phy-mode = "rgmii"; 1152 rx-internal-delay-ps = <0>; 1153 tx-internal-delay-ps = <0>; 1154 #address-cells = <1>; 1155 #size-cells = <0>; 1156 status = "disabled"; 1157 }; 1158 1159 can0: can@e6c30000 { 1160 compatible = "renesas,can-r8a77961", 1161 "renesas,rcar-gen3-can"; 1162 reg = <0 0xe6c30000 0 0x1000>; 1163 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1164 clocks = <&cpg CPG_MOD 916>, 1165 <&cpg CPG_CORE R8A77961_CLK_CANFD>, 1166 <&can_clk>; 1167 clock-names = "clkp1", "clkp2", "can_clk"; 1168 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>; 1169 assigned-clock-rates = <40000000>; 1170 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1171 resets = <&cpg 916>; 1172 status = "disabled"; 1173 }; 1174 1175 can1: can@e6c38000 { 1176 compatible = "renesas,can-r8a77961", 1177 "renesas,rcar-gen3-can"; 1178 reg = <0 0xe6c38000 0 0x1000>; 1179 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1180 clocks = <&cpg CPG_MOD 915>, 1181 <&cpg CPG_CORE R8A77961_CLK_CANFD>, 1182 <&can_clk>; 1183 clock-names = "clkp1", "clkp2", "can_clk"; 1184 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>; 1185 assigned-clock-rates = <40000000>; 1186 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1187 resets = <&cpg 915>; 1188 status = "disabled"; 1189 }; 1190 1191 pwm0: pwm@e6e30000 { 1192 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1193 reg = <0 0xe6e30000 0 8>; 1194 #pwm-cells = <2>; 1195 clocks = <&cpg CPG_MOD 523>; 1196 resets = <&cpg 523>; 1197 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1198 status = "disabled"; 1199 }; 1200 1201 pwm1: pwm@e6e31000 { 1202 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1203 reg = <0 0xe6e31000 0 8>; 1204 #pwm-cells = <2>; 1205 clocks = <&cpg CPG_MOD 523>; 1206 resets = <&cpg 523>; 1207 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1208 status = "disabled"; 1209 }; 1210 1211 pwm2: pwm@e6e32000 { 1212 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1213 reg = <0 0xe6e32000 0 8>; 1214 #pwm-cells = <2>; 1215 clocks = <&cpg CPG_MOD 523>; 1216 resets = <&cpg 523>; 1217 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1218 status = "disabled"; 1219 }; 1220 1221 pwm3: pwm@e6e33000 { 1222 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1223 reg = <0 0xe6e33000 0 8>; 1224 #pwm-cells = <2>; 1225 clocks = <&cpg CPG_MOD 523>; 1226 resets = <&cpg 523>; 1227 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1228 status = "disabled"; 1229 }; 1230 1231 pwm4: pwm@e6e34000 { 1232 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1233 reg = <0 0xe6e34000 0 8>; 1234 #pwm-cells = <2>; 1235 clocks = <&cpg CPG_MOD 523>; 1236 resets = <&cpg 523>; 1237 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1238 status = "disabled"; 1239 }; 1240 1241 pwm5: pwm@e6e35000 { 1242 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1243 reg = <0 0xe6e35000 0 8>; 1244 #pwm-cells = <2>; 1245 clocks = <&cpg CPG_MOD 523>; 1246 resets = <&cpg 523>; 1247 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1248 status = "disabled"; 1249 }; 1250 1251 pwm6: pwm@e6e36000 { 1252 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1253 reg = <0 0xe6e36000 0 8>; 1254 #pwm-cells = <2>; 1255 clocks = <&cpg CPG_MOD 523>; 1256 resets = <&cpg 523>; 1257 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1258 status = "disabled"; 1259 }; 1260 1261 scif0: serial@e6e60000 { 1262 compatible = "renesas,scif-r8a77961", 1263 "renesas,rcar-gen3-scif", "renesas,scif"; 1264 reg = <0 0xe6e60000 0 64>; 1265 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1266 clocks = <&cpg CPG_MOD 207>, 1267 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1268 <&scif_clk>; 1269 clock-names = "fck", "brg_int", "scif_clk"; 1270 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1271 <&dmac2 0x51>, <&dmac2 0x50>; 1272 dma-names = "tx", "rx", "tx", "rx"; 1273 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1274 resets = <&cpg 207>; 1275 status = "disabled"; 1276 }; 1277 1278 scif1: serial@e6e68000 { 1279 compatible = "renesas,scif-r8a77961", 1280 "renesas,rcar-gen3-scif", "renesas,scif"; 1281 reg = <0 0xe6e68000 0 64>; 1282 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1283 clocks = <&cpg CPG_MOD 206>, 1284 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1285 <&scif_clk>; 1286 clock-names = "fck", "brg_int", "scif_clk"; 1287 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1288 <&dmac2 0x53>, <&dmac2 0x52>; 1289 dma-names = "tx", "rx", "tx", "rx"; 1290 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1291 resets = <&cpg 206>; 1292 status = "disabled"; 1293 }; 1294 1295 scif2: serial@e6e88000 { 1296 compatible = "renesas,scif-r8a77961", 1297 "renesas,rcar-gen3-scif", "renesas,scif"; 1298 reg = <0 0xe6e88000 0 64>; 1299 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1300 clocks = <&cpg CPG_MOD 310>, 1301 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1302 <&scif_clk>; 1303 clock-names = "fck", "brg_int", "scif_clk"; 1304 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1305 <&dmac2 0x13>, <&dmac2 0x12>; 1306 dma-names = "tx", "rx", "tx", "rx"; 1307 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1308 resets = <&cpg 310>; 1309 status = "disabled"; 1310 }; 1311 1312 scif3: serial@e6c50000 { 1313 compatible = "renesas,scif-r8a77961", 1314 "renesas,rcar-gen3-scif", "renesas,scif"; 1315 reg = <0 0xe6c50000 0 64>; 1316 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1317 clocks = <&cpg CPG_MOD 204>, 1318 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1319 <&scif_clk>; 1320 clock-names = "fck", "brg_int", "scif_clk"; 1321 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1322 dma-names = "tx", "rx"; 1323 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1324 resets = <&cpg 204>; 1325 status = "disabled"; 1326 }; 1327 1328 scif4: serial@e6c40000 { 1329 compatible = "renesas,scif-r8a77961", 1330 "renesas,rcar-gen3-scif", "renesas,scif"; 1331 reg = <0 0xe6c40000 0 64>; 1332 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1333 clocks = <&cpg CPG_MOD 203>, 1334 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1335 <&scif_clk>; 1336 clock-names = "fck", "brg_int", "scif_clk"; 1337 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1338 dma-names = "tx", "rx"; 1339 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1340 resets = <&cpg 203>; 1341 status = "disabled"; 1342 }; 1343 1344 scif5: serial@e6f30000 { 1345 compatible = "renesas,scif-r8a77961", 1346 "renesas,rcar-gen3-scif", "renesas,scif"; 1347 reg = <0 0xe6f30000 0 64>; 1348 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1349 clocks = <&cpg CPG_MOD 202>, 1350 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1351 <&scif_clk>; 1352 clock-names = "fck", "brg_int", "scif_clk"; 1353 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1354 <&dmac2 0x5b>, <&dmac2 0x5a>; 1355 dma-names = "tx", "rx", "tx", "rx"; 1356 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1357 resets = <&cpg 202>; 1358 status = "disabled"; 1359 }; 1360 1361 msiof0: spi@e6e90000 { 1362 compatible = "renesas,msiof-r8a77961", 1363 "renesas,rcar-gen3-msiof"; 1364 reg = <0 0xe6e90000 0 0x0064>; 1365 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1366 clocks = <&cpg CPG_MOD 211>; 1367 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1368 <&dmac2 0x41>, <&dmac2 0x40>; 1369 dma-names = "tx", "rx", "tx", "rx"; 1370 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1371 resets = <&cpg 211>; 1372 #address-cells = <1>; 1373 #size-cells = <0>; 1374 status = "disabled"; 1375 }; 1376 1377 msiof1: spi@e6ea0000 { 1378 compatible = "renesas,msiof-r8a77961", 1379 "renesas,rcar-gen3-msiof"; 1380 reg = <0 0xe6ea0000 0 0x0064>; 1381 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1382 clocks = <&cpg CPG_MOD 210>; 1383 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1384 <&dmac2 0x43>, <&dmac2 0x42>; 1385 dma-names = "tx", "rx", "tx", "rx"; 1386 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1387 resets = <&cpg 210>; 1388 #address-cells = <1>; 1389 #size-cells = <0>; 1390 status = "disabled"; 1391 }; 1392 1393 msiof2: spi@e6c00000 { 1394 compatible = "renesas,msiof-r8a77961", 1395 "renesas,rcar-gen3-msiof"; 1396 reg = <0 0xe6c00000 0 0x0064>; 1397 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1398 clocks = <&cpg CPG_MOD 209>; 1399 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1400 dma-names = "tx", "rx"; 1401 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1402 resets = <&cpg 209>; 1403 #address-cells = <1>; 1404 #size-cells = <0>; 1405 status = "disabled"; 1406 }; 1407 1408 msiof3: spi@e6c10000 { 1409 compatible = "renesas,msiof-r8a77961", 1410 "renesas,rcar-gen3-msiof"; 1411 reg = <0 0xe6c10000 0 0x0064>; 1412 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1413 clocks = <&cpg CPG_MOD 208>; 1414 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1415 dma-names = "tx", "rx"; 1416 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1417 resets = <&cpg 208>; 1418 #address-cells = <1>; 1419 #size-cells = <0>; 1420 status = "disabled"; 1421 }; 1422 1423 vin0: video@e6ef0000 { 1424 compatible = "renesas,vin-r8a77961"; 1425 reg = <0 0xe6ef0000 0 0x1000>; 1426 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1427 clocks = <&cpg CPG_MOD 811>; 1428 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1429 resets = <&cpg 811>; 1430 renesas,id = <0>; 1431 status = "disabled"; 1432 1433 ports { 1434 #address-cells = <1>; 1435 #size-cells = <0>; 1436 1437 port@1 { 1438 #address-cells = <1>; 1439 #size-cells = <0>; 1440 1441 reg = <1>; 1442 1443 vin0csi20: endpoint@0 { 1444 reg = <0>; 1445 remote-endpoint = <&csi20vin0>; 1446 }; 1447 vin0csi40: endpoint@2 { 1448 reg = <2>; 1449 remote-endpoint = <&csi40vin0>; 1450 }; 1451 }; 1452 }; 1453 }; 1454 1455 vin1: video@e6ef1000 { 1456 compatible = "renesas,vin-r8a77961"; 1457 reg = <0 0xe6ef1000 0 0x1000>; 1458 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1459 clocks = <&cpg CPG_MOD 810>; 1460 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1461 resets = <&cpg 810>; 1462 renesas,id = <1>; 1463 status = "disabled"; 1464 1465 ports { 1466 #address-cells = <1>; 1467 #size-cells = <0>; 1468 1469 port@1 { 1470 #address-cells = <1>; 1471 #size-cells = <0>; 1472 1473 reg = <1>; 1474 1475 vin1csi20: endpoint@0 { 1476 reg = <0>; 1477 remote-endpoint = <&csi20vin1>; 1478 }; 1479 vin1csi40: endpoint@2 { 1480 reg = <2>; 1481 remote-endpoint = <&csi40vin1>; 1482 }; 1483 }; 1484 }; 1485 }; 1486 1487 vin2: video@e6ef2000 { 1488 compatible = "renesas,vin-r8a77961"; 1489 reg = <0 0xe6ef2000 0 0x1000>; 1490 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1491 clocks = <&cpg CPG_MOD 809>; 1492 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1493 resets = <&cpg 809>; 1494 renesas,id = <2>; 1495 status = "disabled"; 1496 1497 ports { 1498 #address-cells = <1>; 1499 #size-cells = <0>; 1500 1501 port@1 { 1502 #address-cells = <1>; 1503 #size-cells = <0>; 1504 1505 reg = <1>; 1506 1507 vin2csi20: endpoint@0 { 1508 reg = <0>; 1509 remote-endpoint = <&csi20vin2>; 1510 }; 1511 vin2csi40: endpoint@2 { 1512 reg = <2>; 1513 remote-endpoint = <&csi40vin2>; 1514 }; 1515 }; 1516 }; 1517 }; 1518 1519 vin3: video@e6ef3000 { 1520 compatible = "renesas,vin-r8a77961"; 1521 reg = <0 0xe6ef3000 0 0x1000>; 1522 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1523 clocks = <&cpg CPG_MOD 808>; 1524 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1525 resets = <&cpg 808>; 1526 renesas,id = <3>; 1527 status = "disabled"; 1528 1529 ports { 1530 #address-cells = <1>; 1531 #size-cells = <0>; 1532 1533 port@1 { 1534 #address-cells = <1>; 1535 #size-cells = <0>; 1536 1537 reg = <1>; 1538 1539 vin3csi20: endpoint@0 { 1540 reg = <0>; 1541 remote-endpoint = <&csi20vin3>; 1542 }; 1543 vin3csi40: endpoint@2 { 1544 reg = <2>; 1545 remote-endpoint = <&csi40vin3>; 1546 }; 1547 }; 1548 }; 1549 }; 1550 1551 vin4: video@e6ef4000 { 1552 compatible = "renesas,vin-r8a77961"; 1553 reg = <0 0xe6ef4000 0 0x1000>; 1554 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1555 clocks = <&cpg CPG_MOD 807>; 1556 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1557 resets = <&cpg 807>; 1558 renesas,id = <4>; 1559 status = "disabled"; 1560 1561 ports { 1562 #address-cells = <1>; 1563 #size-cells = <0>; 1564 1565 port@1 { 1566 #address-cells = <1>; 1567 #size-cells = <0>; 1568 1569 reg = <1>; 1570 1571 vin4csi20: endpoint@0 { 1572 reg = <0>; 1573 remote-endpoint = <&csi20vin4>; 1574 }; 1575 vin4csi40: endpoint@2 { 1576 reg = <2>; 1577 remote-endpoint = <&csi40vin4>; 1578 }; 1579 }; 1580 }; 1581 }; 1582 1583 vin5: video@e6ef5000 { 1584 compatible = "renesas,vin-r8a77961"; 1585 reg = <0 0xe6ef5000 0 0x1000>; 1586 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1587 clocks = <&cpg CPG_MOD 806>; 1588 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1589 resets = <&cpg 806>; 1590 renesas,id = <5>; 1591 status = "disabled"; 1592 1593 ports { 1594 #address-cells = <1>; 1595 #size-cells = <0>; 1596 1597 port@1 { 1598 #address-cells = <1>; 1599 #size-cells = <0>; 1600 1601 reg = <1>; 1602 1603 vin5csi20: endpoint@0 { 1604 reg = <0>; 1605 remote-endpoint = <&csi20vin5>; 1606 }; 1607 vin5csi40: endpoint@2 { 1608 reg = <2>; 1609 remote-endpoint = <&csi40vin5>; 1610 }; 1611 }; 1612 }; 1613 }; 1614 1615 vin6: video@e6ef6000 { 1616 compatible = "renesas,vin-r8a77961"; 1617 reg = <0 0xe6ef6000 0 0x1000>; 1618 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1619 clocks = <&cpg CPG_MOD 805>; 1620 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1621 resets = <&cpg 805>; 1622 renesas,id = <6>; 1623 status = "disabled"; 1624 1625 ports { 1626 #address-cells = <1>; 1627 #size-cells = <0>; 1628 1629 port@1 { 1630 #address-cells = <1>; 1631 #size-cells = <0>; 1632 1633 reg = <1>; 1634 1635 vin6csi20: endpoint@0 { 1636 reg = <0>; 1637 remote-endpoint = <&csi20vin6>; 1638 }; 1639 vin6csi40: endpoint@2 { 1640 reg = <2>; 1641 remote-endpoint = <&csi40vin6>; 1642 }; 1643 }; 1644 }; 1645 }; 1646 1647 vin7: video@e6ef7000 { 1648 compatible = "renesas,vin-r8a77961"; 1649 reg = <0 0xe6ef7000 0 0x1000>; 1650 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1651 clocks = <&cpg CPG_MOD 804>; 1652 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1653 resets = <&cpg 804>; 1654 renesas,id = <7>; 1655 status = "disabled"; 1656 1657 ports { 1658 #address-cells = <1>; 1659 #size-cells = <0>; 1660 1661 port@1 { 1662 #address-cells = <1>; 1663 #size-cells = <0>; 1664 1665 reg = <1>; 1666 1667 vin7csi20: endpoint@0 { 1668 reg = <0>; 1669 remote-endpoint = <&csi20vin7>; 1670 }; 1671 vin7csi40: endpoint@2 { 1672 reg = <2>; 1673 remote-endpoint = <&csi40vin7>; 1674 }; 1675 }; 1676 }; 1677 }; 1678 1679 rcar_sound: sound@ec500000 { 1680 /* 1681 * #sound-dai-cells is required 1682 * 1683 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1684 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1685 */ 1686 /* 1687 * #clock-cells is required for audio_clkout0/1/2/3 1688 * 1689 * clkout : #clock-cells = <0>; <&rcar_sound>; 1690 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1691 */ 1692 compatible = "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3"; 1693 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1694 <0 0xec5a0000 0 0x100>, /* ADG */ 1695 <0 0xec540000 0 0x1000>, /* SSIU */ 1696 <0 0xec541000 0 0x280>, /* SSI */ 1697 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1698 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1699 1700 clocks = <&cpg CPG_MOD 1005>, 1701 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1702 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1703 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1704 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1705 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1706 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1707 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1708 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1709 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1710 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1711 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1712 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1713 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1714 <&audio_clk_a>, <&audio_clk_b>, 1715 <&audio_clk_c>, 1716 <&cpg CPG_CORE R8A77961_CLK_S0D4>; 1717 clock-names = "ssi-all", 1718 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1719 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1720 "ssi.1", "ssi.0", 1721 "src.9", "src.8", "src.7", "src.6", 1722 "src.5", "src.4", "src.3", "src.2", 1723 "src.1", "src.0", 1724 "mix.1", "mix.0", 1725 "ctu.1", "ctu.0", 1726 "dvc.0", "dvc.1", 1727 "clk_a", "clk_b", "clk_c", "clk_i"; 1728 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1729 resets = <&cpg 1005>, 1730 <&cpg 1006>, <&cpg 1007>, 1731 <&cpg 1008>, <&cpg 1009>, 1732 <&cpg 1010>, <&cpg 1011>, 1733 <&cpg 1012>, <&cpg 1013>, 1734 <&cpg 1014>, <&cpg 1015>; 1735 reset-names = "ssi-all", 1736 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1737 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1738 "ssi.1", "ssi.0"; 1739 status = "disabled"; 1740 1741 rcar_sound,ctu { 1742 ctu00: ctu-0 { }; 1743 ctu01: ctu-1 { }; 1744 ctu02: ctu-2 { }; 1745 ctu03: ctu-3 { }; 1746 ctu10: ctu-4 { }; 1747 ctu11: ctu-5 { }; 1748 ctu12: ctu-6 { }; 1749 ctu13: ctu-7 { }; 1750 }; 1751 1752 rcar_sound,dvc { 1753 dvc0: dvc-0 { 1754 dmas = <&audma1 0xbc>; 1755 dma-names = "tx"; 1756 }; 1757 dvc1: dvc-1 { 1758 dmas = <&audma1 0xbe>; 1759 dma-names = "tx"; 1760 }; 1761 }; 1762 1763 rcar_sound,mix { 1764 mix0: mix-0 { }; 1765 mix1: mix-1 { }; 1766 }; 1767 1768 rcar_sound,src { 1769 src0: src-0 { 1770 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1771 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1772 dma-names = "rx", "tx"; 1773 }; 1774 src1: src-1 { 1775 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1776 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1777 dma-names = "rx", "tx"; 1778 }; 1779 src2: src-2 { 1780 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1781 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1782 dma-names = "rx", "tx"; 1783 }; 1784 src3: src-3 { 1785 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1786 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1787 dma-names = "rx", "tx"; 1788 }; 1789 src4: src-4 { 1790 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1791 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1792 dma-names = "rx", "tx"; 1793 }; 1794 src5: src-5 { 1795 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1796 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1797 dma-names = "rx", "tx"; 1798 }; 1799 src6: src-6 { 1800 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1801 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1802 dma-names = "rx", "tx"; 1803 }; 1804 src7: src-7 { 1805 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1806 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1807 dma-names = "rx", "tx"; 1808 }; 1809 src8: src-8 { 1810 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1811 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1812 dma-names = "rx", "tx"; 1813 }; 1814 src9: src-9 { 1815 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1816 dmas = <&audma0 0x97>, <&audma1 0xba>; 1817 dma-names = "rx", "tx"; 1818 }; 1819 }; 1820 1821 rcar_sound,ssi { 1822 ssi0: ssi-0 { 1823 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1824 dmas = <&audma0 0x01>, <&audma1 0x02>; 1825 dma-names = "rx", "tx"; 1826 }; 1827 ssi1: ssi-1 { 1828 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1829 dmas = <&audma0 0x03>, <&audma1 0x04>; 1830 dma-names = "rx", "tx"; 1831 }; 1832 ssi2: ssi-2 { 1833 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1834 dmas = <&audma0 0x05>, <&audma1 0x06>; 1835 dma-names = "rx", "tx"; 1836 }; 1837 ssi3: ssi-3 { 1838 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1839 dmas = <&audma0 0x07>, <&audma1 0x08>; 1840 dma-names = "rx", "tx"; 1841 }; 1842 ssi4: ssi-4 { 1843 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1844 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1845 dma-names = "rx", "tx"; 1846 }; 1847 ssi5: ssi-5 { 1848 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1849 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1850 dma-names = "rx", "tx"; 1851 }; 1852 ssi6: ssi-6 { 1853 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1854 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1855 dma-names = "rx", "tx"; 1856 }; 1857 ssi7: ssi-7 { 1858 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1859 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1860 dma-names = "rx", "tx"; 1861 }; 1862 ssi8: ssi-8 { 1863 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1864 dmas = <&audma0 0x11>, <&audma1 0x12>; 1865 dma-names = "rx", "tx"; 1866 }; 1867 ssi9: ssi-9 { 1868 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1869 dmas = <&audma0 0x13>, <&audma1 0x14>; 1870 dma-names = "rx", "tx"; 1871 }; 1872 }; 1873 1874 rcar_sound,ssiu { 1875 ssiu00: ssiu-0 { 1876 dmas = <&audma0 0x15>, <&audma1 0x16>; 1877 dma-names = "rx", "tx"; 1878 }; 1879 ssiu01: ssiu-1 { 1880 dmas = <&audma0 0x35>, <&audma1 0x36>; 1881 dma-names = "rx", "tx"; 1882 }; 1883 ssiu02: ssiu-2 { 1884 dmas = <&audma0 0x37>, <&audma1 0x38>; 1885 dma-names = "rx", "tx"; 1886 }; 1887 ssiu03: ssiu-3 { 1888 dmas = <&audma0 0x47>, <&audma1 0x48>; 1889 dma-names = "rx", "tx"; 1890 }; 1891 ssiu04: ssiu-4 { 1892 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1893 dma-names = "rx", "tx"; 1894 }; 1895 ssiu05: ssiu-5 { 1896 dmas = <&audma0 0x43>, <&audma1 0x44>; 1897 dma-names = "rx", "tx"; 1898 }; 1899 ssiu06: ssiu-6 { 1900 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1901 dma-names = "rx", "tx"; 1902 }; 1903 ssiu07: ssiu-7 { 1904 dmas = <&audma0 0x53>, <&audma1 0x54>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 ssiu10: ssiu-8 { 1908 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1909 dma-names = "rx", "tx"; 1910 }; 1911 ssiu11: ssiu-9 { 1912 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1913 dma-names = "rx", "tx"; 1914 }; 1915 ssiu12: ssiu-10 { 1916 dmas = <&audma0 0x57>, <&audma1 0x58>; 1917 dma-names = "rx", "tx"; 1918 }; 1919 ssiu13: ssiu-11 { 1920 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1921 dma-names = "rx", "tx"; 1922 }; 1923 ssiu14: ssiu-12 { 1924 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 ssiu15: ssiu-13 { 1928 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1929 dma-names = "rx", "tx"; 1930 }; 1931 ssiu16: ssiu-14 { 1932 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1933 dma-names = "rx", "tx"; 1934 }; 1935 ssiu17: ssiu-15 { 1936 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1937 dma-names = "rx", "tx"; 1938 }; 1939 ssiu20: ssiu-16 { 1940 dmas = <&audma0 0x63>, <&audma1 0x64>; 1941 dma-names = "rx", "tx"; 1942 }; 1943 ssiu21: ssiu-17 { 1944 dmas = <&audma0 0x67>, <&audma1 0x68>; 1945 dma-names = "rx", "tx"; 1946 }; 1947 ssiu22: ssiu-18 { 1948 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1949 dma-names = "rx", "tx"; 1950 }; 1951 ssiu23: ssiu-19 { 1952 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1953 dma-names = "rx", "tx"; 1954 }; 1955 ssiu24: ssiu-20 { 1956 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1957 dma-names = "rx", "tx"; 1958 }; 1959 ssiu25: ssiu-21 { 1960 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1961 dma-names = "rx", "tx"; 1962 }; 1963 ssiu26: ssiu-22 { 1964 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1965 dma-names = "rx", "tx"; 1966 }; 1967 ssiu27: ssiu-23 { 1968 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1969 dma-names = "rx", "tx"; 1970 }; 1971 ssiu30: ssiu-24 { 1972 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1973 dma-names = "rx", "tx"; 1974 }; 1975 ssiu31: ssiu-25 { 1976 dmas = <&audma0 0x21>, <&audma1 0x22>; 1977 dma-names = "rx", "tx"; 1978 }; 1979 ssiu32: ssiu-26 { 1980 dmas = <&audma0 0x23>, <&audma1 0x24>; 1981 dma-names = "rx", "tx"; 1982 }; 1983 ssiu33: ssiu-27 { 1984 dmas = <&audma0 0x25>, <&audma1 0x26>; 1985 dma-names = "rx", "tx"; 1986 }; 1987 ssiu34: ssiu-28 { 1988 dmas = <&audma0 0x27>, <&audma1 0x28>; 1989 dma-names = "rx", "tx"; 1990 }; 1991 ssiu35: ssiu-29 { 1992 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1993 dma-names = "rx", "tx"; 1994 }; 1995 ssiu36: ssiu-30 { 1996 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1997 dma-names = "rx", "tx"; 1998 }; 1999 ssiu37: ssiu-31 { 2000 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2001 dma-names = "rx", "tx"; 2002 }; 2003 ssiu40: ssiu-32 { 2004 dmas = <&audma0 0x71>, <&audma1 0x72>; 2005 dma-names = "rx", "tx"; 2006 }; 2007 ssiu41: ssiu-33 { 2008 dmas = <&audma0 0x17>, <&audma1 0x18>; 2009 dma-names = "rx", "tx"; 2010 }; 2011 ssiu42: ssiu-34 { 2012 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2013 dma-names = "rx", "tx"; 2014 }; 2015 ssiu43: ssiu-35 { 2016 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2017 dma-names = "rx", "tx"; 2018 }; 2019 ssiu44: ssiu-36 { 2020 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2021 dma-names = "rx", "tx"; 2022 }; 2023 ssiu45: ssiu-37 { 2024 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2025 dma-names = "rx", "tx"; 2026 }; 2027 ssiu46: ssiu-38 { 2028 dmas = <&audma0 0x31>, <&audma1 0x32>; 2029 dma-names = "rx", "tx"; 2030 }; 2031 ssiu47: ssiu-39 { 2032 dmas = <&audma0 0x33>, <&audma1 0x34>; 2033 dma-names = "rx", "tx"; 2034 }; 2035 ssiu50: ssiu-40 { 2036 dmas = <&audma0 0x73>, <&audma1 0x74>; 2037 dma-names = "rx", "tx"; 2038 }; 2039 ssiu60: ssiu-41 { 2040 dmas = <&audma0 0x75>, <&audma1 0x76>; 2041 dma-names = "rx", "tx"; 2042 }; 2043 ssiu70: ssiu-42 { 2044 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2045 dma-names = "rx", "tx"; 2046 }; 2047 ssiu80: ssiu-43 { 2048 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2049 dma-names = "rx", "tx"; 2050 }; 2051 ssiu90: ssiu-44 { 2052 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2053 dma-names = "rx", "tx"; 2054 }; 2055 ssiu91: ssiu-45 { 2056 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2057 dma-names = "rx", "tx"; 2058 }; 2059 ssiu92: ssiu-46 { 2060 dmas = <&audma0 0x81>, <&audma1 0x82>; 2061 dma-names = "rx", "tx"; 2062 }; 2063 ssiu93: ssiu-47 { 2064 dmas = <&audma0 0x83>, <&audma1 0x84>; 2065 dma-names = "rx", "tx"; 2066 }; 2067 ssiu94: ssiu-48 { 2068 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2069 dma-names = "rx", "tx"; 2070 }; 2071 ssiu95: ssiu-49 { 2072 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2073 dma-names = "rx", "tx"; 2074 }; 2075 ssiu96: ssiu-50 { 2076 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2077 dma-names = "rx", "tx"; 2078 }; 2079 ssiu97: ssiu-51 { 2080 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2081 dma-names = "rx", "tx"; 2082 }; 2083 }; 2084 }; 2085 2086 audma0: dma-controller@ec700000 { 2087 compatible = "renesas,dmac-r8a77961", 2088 "renesas,rcar-dmac"; 2089 reg = <0 0xec700000 0 0x10000>; 2090 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2091 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2092 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2093 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2094 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2095 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2096 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2097 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2098 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2099 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2100 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2101 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2102 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2103 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2104 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2105 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2106 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2107 interrupt-names = "error", 2108 "ch0", "ch1", "ch2", "ch3", 2109 "ch4", "ch5", "ch6", "ch7", 2110 "ch8", "ch9", "ch10", "ch11", 2111 "ch12", "ch13", "ch14", "ch15"; 2112 clocks = <&cpg CPG_MOD 502>; 2113 clock-names = "fck"; 2114 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2115 resets = <&cpg 502>; 2116 #dma-cells = <1>; 2117 dma-channels = <16>; 2118 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2119 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2120 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2121 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2122 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2123 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2124 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2125 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2126 }; 2127 2128 audma1: dma-controller@ec720000 { 2129 compatible = "renesas,dmac-r8a77961", 2130 "renesas,rcar-dmac"; 2131 reg = <0 0xec720000 0 0x10000>; 2132 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2133 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2134 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2135 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2136 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2137 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2138 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2139 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2140 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2141 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2142 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2143 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2144 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2145 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2146 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2147 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2148 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2149 interrupt-names = "error", 2150 "ch0", "ch1", "ch2", "ch3", 2151 "ch4", "ch5", "ch6", "ch7", 2152 "ch8", "ch9", "ch10", "ch11", 2153 "ch12", "ch13", "ch14", "ch15"; 2154 clocks = <&cpg CPG_MOD 501>; 2155 clock-names = "fck"; 2156 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2157 resets = <&cpg 501>; 2158 #dma-cells = <1>; 2159 dma-channels = <16>; 2160 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2161 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2162 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2163 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2164 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2165 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2166 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2167 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2168 }; 2169 2170 xhci0: usb@ee000000 { 2171 compatible = "renesas,xhci-r8a77961", 2172 "renesas,rcar-gen3-xhci"; 2173 reg = <0 0xee000000 0 0xc00>; 2174 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2175 clocks = <&cpg CPG_MOD 328>; 2176 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2177 resets = <&cpg 328>; 2178 status = "disabled"; 2179 }; 2180 2181 usb3_peri0: usb@ee020000 { 2182 compatible = "renesas,r8a77961-usb3-peri", 2183 "renesas,rcar-gen3-usb3-peri"; 2184 reg = <0 0xee020000 0 0x400>; 2185 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2186 clocks = <&cpg CPG_MOD 328>; 2187 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2188 resets = <&cpg 328>; 2189 status = "disabled"; 2190 }; 2191 2192 ohci0: usb@ee080000 { 2193 compatible = "generic-ohci"; 2194 reg = <0 0xee080000 0 0x100>; 2195 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2196 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2197 phys = <&usb2_phy0 1>; 2198 phy-names = "usb"; 2199 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2200 resets = <&cpg 703>, <&cpg 704>; 2201 status = "disabled"; 2202 }; 2203 2204 ohci1: usb@ee0a0000 { 2205 compatible = "generic-ohci"; 2206 reg = <0 0xee0a0000 0 0x100>; 2207 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2208 clocks = <&cpg CPG_MOD 702>; 2209 phys = <&usb2_phy1 1>; 2210 phy-names = "usb"; 2211 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2212 resets = <&cpg 702>; 2213 status = "disabled"; 2214 }; 2215 2216 ehci0: usb@ee080100 { 2217 compatible = "generic-ehci"; 2218 reg = <0 0xee080100 0 0x100>; 2219 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2220 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2221 phys = <&usb2_phy0 2>; 2222 phy-names = "usb"; 2223 companion = <&ohci0>; 2224 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2225 resets = <&cpg 703>, <&cpg 704>; 2226 status = "disabled"; 2227 }; 2228 2229 ehci1: usb@ee0a0100 { 2230 compatible = "generic-ehci"; 2231 reg = <0 0xee0a0100 0 0x100>; 2232 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2233 clocks = <&cpg CPG_MOD 702>; 2234 phys = <&usb2_phy1 2>; 2235 phy-names = "usb"; 2236 companion = <&ohci1>; 2237 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2238 resets = <&cpg 702>; 2239 status = "disabled"; 2240 }; 2241 2242 usb2_phy0: usb-phy@ee080200 { 2243 compatible = "renesas,usb2-phy-r8a77961", 2244 "renesas,rcar-gen3-usb2-phy"; 2245 reg = <0 0xee080200 0 0x700>; 2246 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2247 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2248 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2249 resets = <&cpg 703>, <&cpg 704>; 2250 #phy-cells = <1>; 2251 status = "disabled"; 2252 }; 2253 2254 usb2_phy1: usb-phy@ee0a0200 { 2255 compatible = "renesas,usb2-phy-r8a77961", 2256 "renesas,rcar-gen3-usb2-phy"; 2257 reg = <0 0xee0a0200 0 0x700>; 2258 clocks = <&cpg CPG_MOD 702>; 2259 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2260 resets = <&cpg 702>; 2261 #phy-cells = <1>; 2262 status = "disabled"; 2263 }; 2264 2265 sdhi0: mmc@ee100000 { 2266 compatible = "renesas,sdhi-r8a77961", 2267 "renesas,rcar-gen3-sdhi"; 2268 reg = <0 0xee100000 0 0x2000>; 2269 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2270 clocks = <&cpg CPG_MOD 314>; 2271 max-frequency = <200000000>; 2272 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2273 resets = <&cpg 314>; 2274 status = "disabled"; 2275 }; 2276 2277 sdhi1: mmc@ee120000 { 2278 compatible = "renesas,sdhi-r8a77961", 2279 "renesas,rcar-gen3-sdhi"; 2280 reg = <0 0xee120000 0 0x2000>; 2281 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2282 clocks = <&cpg CPG_MOD 313>; 2283 max-frequency = <200000000>; 2284 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2285 resets = <&cpg 313>; 2286 status = "disabled"; 2287 }; 2288 2289 sdhi2: mmc@ee140000 { 2290 compatible = "renesas,sdhi-r8a77961", 2291 "renesas,rcar-gen3-sdhi"; 2292 reg = <0 0xee140000 0 0x2000>; 2293 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2294 clocks = <&cpg CPG_MOD 312>; 2295 max-frequency = <200000000>; 2296 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2297 resets = <&cpg 312>; 2298 status = "disabled"; 2299 }; 2300 2301 sdhi3: mmc@ee160000 { 2302 compatible = "renesas,sdhi-r8a77961", 2303 "renesas,rcar-gen3-sdhi"; 2304 reg = <0 0xee160000 0 0x2000>; 2305 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2306 clocks = <&cpg CPG_MOD 311>; 2307 max-frequency = <200000000>; 2308 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2309 resets = <&cpg 311>; 2310 status = "disabled"; 2311 }; 2312 2313 gic: interrupt-controller@f1010000 { 2314 compatible = "arm,gic-400"; 2315 #interrupt-cells = <3>; 2316 #address-cells = <0>; 2317 interrupt-controller; 2318 reg = <0x0 0xf1010000 0 0x1000>, 2319 <0x0 0xf1020000 0 0x20000>, 2320 <0x0 0xf1040000 0 0x20000>, 2321 <0x0 0xf1060000 0 0x20000>; 2322 interrupts = <GIC_PPI 9 2323 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2324 clocks = <&cpg CPG_MOD 408>; 2325 clock-names = "clk"; 2326 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2327 resets = <&cpg 408>; 2328 }; 2329 2330 pciec0: pcie@fe000000 { 2331 compatible = "renesas,pcie-r8a77961", 2332 "renesas,pcie-rcar-gen3"; 2333 reg = <0 0xfe000000 0 0x80000>; 2334 #address-cells = <3>; 2335 #size-cells = <2>; 2336 bus-range = <0x00 0xff>; 2337 device_type = "pci"; 2338 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2339 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2340 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2341 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2342 /* Map all possible DDR as inbound ranges */ 2343 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2344 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2345 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2346 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2347 #interrupt-cells = <1>; 2348 interrupt-map-mask = <0 0 0 0>; 2349 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2350 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2351 clock-names = "pcie", "pcie_bus"; 2352 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2353 resets = <&cpg 319>; 2354 status = "disabled"; 2355 }; 2356 2357 pciec1: pcie@ee800000 { 2358 compatible = "renesas,pcie-r8a77961", 2359 "renesas,pcie-rcar-gen3"; 2360 reg = <0 0xee800000 0 0x80000>; 2361 #address-cells = <3>; 2362 #size-cells = <2>; 2363 bus-range = <0x00 0xff>; 2364 device_type = "pci"; 2365 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2366 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2367 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2368 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2369 /* Map all possible DDR as inbound ranges */ 2370 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2371 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2372 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2373 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2374 #interrupt-cells = <1>; 2375 interrupt-map-mask = <0 0 0 0>; 2376 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2377 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2378 clock-names = "pcie", "pcie_bus"; 2379 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2380 resets = <&cpg 318>; 2381 status = "disabled"; 2382 }; 2383 2384 fcpf0: fcp@fe950000 { 2385 compatible = "renesas,fcpf"; 2386 reg = <0 0xfe950000 0 0x200>; 2387 clocks = <&cpg CPG_MOD 615>; 2388 power-domains = <&sysc R8A77961_PD_A3VC>; 2389 resets = <&cpg 615>; 2390 }; 2391 2392 fcpvb0: fcp@fe96f000 { 2393 compatible = "renesas,fcpv"; 2394 reg = <0 0xfe96f000 0 0x200>; 2395 clocks = <&cpg CPG_MOD 607>; 2396 power-domains = <&sysc R8A77961_PD_A3VC>; 2397 resets = <&cpg 607>; 2398 }; 2399 2400 fcpvi0: fcp@fe9af000 { 2401 compatible = "renesas,fcpv"; 2402 reg = <0 0xfe9af000 0 0x200>; 2403 clocks = <&cpg CPG_MOD 611>; 2404 power-domains = <&sysc R8A77961_PD_A3VC>; 2405 resets = <&cpg 611>; 2406 iommus = <&ipmmu_vc0 19>; 2407 }; 2408 2409 fcpvd0: fcp@fea27000 { 2410 compatible = "renesas,fcpv"; 2411 reg = <0 0xfea27000 0 0x200>; 2412 clocks = <&cpg CPG_MOD 603>; 2413 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2414 resets = <&cpg 603>; 2415 iommus = <&ipmmu_vi0 8>; 2416 }; 2417 2418 fcpvd1: fcp@fea2f000 { 2419 compatible = "renesas,fcpv"; 2420 reg = <0 0xfea2f000 0 0x200>; 2421 clocks = <&cpg CPG_MOD 602>; 2422 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2423 resets = <&cpg 602>; 2424 iommus = <&ipmmu_vi0 9>; 2425 }; 2426 2427 fcpvd2: fcp@fea37000 { 2428 compatible = "renesas,fcpv"; 2429 reg = <0 0xfea37000 0 0x200>; 2430 clocks = <&cpg CPG_MOD 601>; 2431 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2432 resets = <&cpg 601>; 2433 iommus = <&ipmmu_vi0 10>; 2434 }; 2435 2436 vspb: vsp@fe960000 { 2437 compatible = "renesas,vsp2"; 2438 reg = <0 0xfe960000 0 0x8000>; 2439 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2440 clocks = <&cpg CPG_MOD 626>; 2441 power-domains = <&sysc R8A77961_PD_A3VC>; 2442 resets = <&cpg 626>; 2443 2444 renesas,fcp = <&fcpvb0>; 2445 }; 2446 2447 vspd0: vsp@fea20000 { 2448 compatible = "renesas,vsp2"; 2449 reg = <0 0xfea20000 0 0x5000>; 2450 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2451 clocks = <&cpg CPG_MOD 623>; 2452 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2453 resets = <&cpg 623>; 2454 2455 renesas,fcp = <&fcpvd0>; 2456 }; 2457 2458 vspd1: vsp@fea28000 { 2459 compatible = "renesas,vsp2"; 2460 reg = <0 0xfea28000 0 0x5000>; 2461 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2462 clocks = <&cpg CPG_MOD 622>; 2463 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2464 resets = <&cpg 622>; 2465 2466 renesas,fcp = <&fcpvd1>; 2467 }; 2468 2469 vspd2: vsp@fea30000 { 2470 compatible = "renesas,vsp2"; 2471 reg = <0 0xfea30000 0 0x5000>; 2472 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2473 clocks = <&cpg CPG_MOD 621>; 2474 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2475 resets = <&cpg 621>; 2476 2477 renesas,fcp = <&fcpvd2>; 2478 }; 2479 2480 vspi0: vsp@fe9a0000 { 2481 compatible = "renesas,vsp2"; 2482 reg = <0 0xfe9a0000 0 0x8000>; 2483 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2484 clocks = <&cpg CPG_MOD 631>; 2485 power-domains = <&sysc R8A77961_PD_A3VC>; 2486 resets = <&cpg 631>; 2487 2488 renesas,fcp = <&fcpvi0>; 2489 }; 2490 2491 csi20: csi2@fea80000 { 2492 compatible = "renesas,r8a77961-csi2"; 2493 reg = <0 0xfea80000 0 0x10000>; 2494 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2495 clocks = <&cpg CPG_MOD 714>; 2496 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2497 resets = <&cpg 714>; 2498 status = "disabled"; 2499 2500 ports { 2501 #address-cells = <1>; 2502 #size-cells = <0>; 2503 2504 port@0 { 2505 reg = <0>; 2506 }; 2507 2508 port@1 { 2509 #address-cells = <1>; 2510 #size-cells = <0>; 2511 2512 reg = <1>; 2513 2514 csi20vin0: endpoint@0 { 2515 reg = <0>; 2516 remote-endpoint = <&vin0csi20>; 2517 }; 2518 csi20vin1: endpoint@1 { 2519 reg = <1>; 2520 remote-endpoint = <&vin1csi20>; 2521 }; 2522 csi20vin2: endpoint@2 { 2523 reg = <2>; 2524 remote-endpoint = <&vin2csi20>; 2525 }; 2526 csi20vin3: endpoint@3 { 2527 reg = <3>; 2528 remote-endpoint = <&vin3csi20>; 2529 }; 2530 csi20vin4: endpoint@4 { 2531 reg = <4>; 2532 remote-endpoint = <&vin4csi20>; 2533 }; 2534 csi20vin5: endpoint@5 { 2535 reg = <5>; 2536 remote-endpoint = <&vin5csi20>; 2537 }; 2538 csi20vin6: endpoint@6 { 2539 reg = <6>; 2540 remote-endpoint = <&vin6csi20>; 2541 }; 2542 csi20vin7: endpoint@7 { 2543 reg = <7>; 2544 remote-endpoint = <&vin7csi20>; 2545 }; 2546 }; 2547 }; 2548 }; 2549 2550 csi40: csi2@feaa0000 { 2551 compatible = "renesas,r8a77961-csi2"; 2552 reg = <0 0xfeaa0000 0 0x10000>; 2553 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2554 clocks = <&cpg CPG_MOD 716>; 2555 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2556 resets = <&cpg 716>; 2557 status = "disabled"; 2558 2559 ports { 2560 #address-cells = <1>; 2561 #size-cells = <0>; 2562 2563 port@0 { 2564 reg = <0>; 2565 }; 2566 2567 port@1 { 2568 #address-cells = <1>; 2569 #size-cells = <0>; 2570 2571 reg = <1>; 2572 2573 csi40vin0: endpoint@0 { 2574 reg = <0>; 2575 remote-endpoint = <&vin0csi40>; 2576 }; 2577 csi40vin1: endpoint@1 { 2578 reg = <1>; 2579 remote-endpoint = <&vin1csi40>; 2580 }; 2581 csi40vin2: endpoint@2 { 2582 reg = <2>; 2583 remote-endpoint = <&vin2csi40>; 2584 }; 2585 csi40vin3: endpoint@3 { 2586 reg = <3>; 2587 remote-endpoint = <&vin3csi40>; 2588 }; 2589 csi40vin4: endpoint@4 { 2590 reg = <4>; 2591 remote-endpoint = <&vin4csi40>; 2592 }; 2593 csi40vin5: endpoint@5 { 2594 reg = <5>; 2595 remote-endpoint = <&vin5csi40>; 2596 }; 2597 csi40vin6: endpoint@6 { 2598 reg = <6>; 2599 remote-endpoint = <&vin6csi40>; 2600 }; 2601 csi40vin7: endpoint@7 { 2602 reg = <7>; 2603 remote-endpoint = <&vin7csi40>; 2604 }; 2605 }; 2606 2607 }; 2608 }; 2609 2610 hdmi0: hdmi@fead0000 { 2611 compatible = "renesas,r8a77961-hdmi", "renesas,rcar-gen3-hdmi"; 2612 reg = <0 0xfead0000 0 0x10000>; 2613 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2614 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A77961_CLK_HDMI>; 2615 clock-names = "iahb", "isfr"; 2616 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2617 resets = <&cpg 729>; 2618 status = "disabled"; 2619 2620 ports { 2621 #address-cells = <1>; 2622 #size-cells = <0>; 2623 port@0 { 2624 reg = <0>; 2625 dw_hdmi0_in: endpoint { 2626 remote-endpoint = <&du_out_hdmi0>; 2627 }; 2628 }; 2629 port@1 { 2630 reg = <1>; 2631 }; 2632 port@2 { 2633 /* HDMI sound */ 2634 reg = <2>; 2635 }; 2636 }; 2637 }; 2638 2639 du: display@feb00000 { 2640 compatible = "renesas,du-r8a77961"; 2641 reg = <0 0xfeb00000 0 0x70000>; 2642 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2643 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2644 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2645 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2646 <&cpg CPG_MOD 722>; 2647 clock-names = "du.0", "du.1", "du.2"; 2648 resets = <&cpg 724>, <&cpg 722>; 2649 reset-names = "du.0", "du.2"; 2650 2651 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2652 status = "disabled"; 2653 2654 ports { 2655 #address-cells = <1>; 2656 #size-cells = <0>; 2657 2658 port@0 { 2659 reg = <0>; 2660 du_out_rgb: endpoint { 2661 }; 2662 }; 2663 port@1 { 2664 reg = <1>; 2665 du_out_hdmi0: endpoint { 2666 remote-endpoint = <&dw_hdmi0_in>; 2667 }; 2668 }; 2669 port@2 { 2670 reg = <2>; 2671 du_out_lvds0: endpoint { 2672 }; 2673 }; 2674 }; 2675 }; 2676 2677 prr: chipid@fff00044 { 2678 compatible = "renesas,prr"; 2679 reg = <0 0xfff00044 0 4>; 2680 }; 2681 }; 2682 2683 thermal-zones { 2684 sensor_thermal1: sensor-thermal1 { 2685 polling-delay-passive = <250>; 2686 polling-delay = <1000>; 2687 thermal-sensors = <&tsc 0>; 2688 sustainable-power = <3874>; 2689 2690 trips { 2691 sensor1_crit: sensor1-crit { 2692 temperature = <120000>; 2693 hysteresis = <1000>; 2694 type = "critical"; 2695 }; 2696 }; 2697 }; 2698 2699 sensor_thermal2: sensor-thermal2 { 2700 polling-delay-passive = <250>; 2701 polling-delay = <1000>; 2702 thermal-sensors = <&tsc 1>; 2703 sustainable-power = <3874>; 2704 2705 trips { 2706 sensor2_crit: sensor2-crit { 2707 temperature = <120000>; 2708 hysteresis = <1000>; 2709 type = "critical"; 2710 }; 2711 }; 2712 }; 2713 2714 sensor_thermal3: sensor-thermal3 { 2715 polling-delay-passive = <250>; 2716 polling-delay = <1000>; 2717 thermal-sensors = <&tsc 2>; 2718 sustainable-power = <3874>; 2719 2720 cooling-maps { 2721 map0 { 2722 trip = <&target>; 2723 cooling-device = <&a57_0 2 4>; 2724 contribution = <1024>; 2725 }; 2726 map1 { 2727 trip = <&target>; 2728 cooling-device = <&a53_0 0 2>; 2729 contribution = <1024>; 2730 }; 2731 }; 2732 trips { 2733 target: trip-point1 { 2734 temperature = <100000>; 2735 hysteresis = <1000>; 2736 type = "passive"; 2737 }; 2738 2739 sensor3_crit: sensor3-crit { 2740 temperature = <120000>; 2741 hysteresis = <1000>; 2742 type = "critical"; 2743 }; 2744 }; 2745 }; 2746 }; 2747 2748 timer { 2749 compatible = "arm,armv8-timer"; 2750 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2751 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2752 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2753 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 2754 }; 2755 2756 /* External USB clocks - can be overridden by the board */ 2757 usb3s0_clk: usb3s0 { 2758 compatible = "fixed-clock"; 2759 #clock-cells = <0>; 2760 clock-frequency = <0>; 2761 }; 2762 2763 usb_extal_clk: usb_extal { 2764 compatible = "fixed-clock"; 2765 #clock-cells = <0>; 2766 clock-frequency = <0>; 2767 }; 2768}; 2769