1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7796-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a7796"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c_dvfs; 28 }; 29 30 /* 31 * The external audio clocks are configured as 0 Hz fixed frequency 32 * clocks by default. 33 * Boards that provide audio clocks should override them. 34 */ 35 audio_clk_a: audio_clk_a { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_b: audio_clk_b { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 audio_clk_c: audio_clk_c { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 /* External CAN clock - to be overridden by boards that provide it */ 54 can_clk: can { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 cluster0_opp: opp_table0 { 61 compatible = "operating-points-v2"; 62 opp-shared; 63 64 opp-500000000 { 65 opp-hz = /bits/ 64 <500000000>; 66 opp-microvolt = <820000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1000000000 { 70 opp-hz = /bits/ 64 <1000000000>; 71 opp-microvolt = <820000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1500000000 { 75 opp-hz = /bits/ 64 <1500000000>; 76 opp-microvolt = <820000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1600000000 { 80 opp-hz = /bits/ 64 <1600000000>; 81 opp-microvolt = <900000>; 82 clock-latency-ns = <300000>; 83 turbo-mode; 84 }; 85 opp-1700000000 { 86 opp-hz = /bits/ 64 <1700000000>; 87 opp-microvolt = <900000>; 88 clock-latency-ns = <300000>; 89 turbo-mode; 90 }; 91 opp-1800000000 { 92 opp-hz = /bits/ 64 <1800000000>; 93 opp-microvolt = <960000>; 94 clock-latency-ns = <300000>; 95 turbo-mode; 96 }; 97 }; 98 99 cluster1_opp: opp_table1 { 100 compatible = "operating-points-v2"; 101 opp-shared; 102 103 opp-800000000 { 104 opp-hz = /bits/ 64 <800000000>; 105 opp-microvolt = <820000>; 106 clock-latency-ns = <300000>; 107 }; 108 opp-1000000000 { 109 opp-hz = /bits/ 64 <1000000000>; 110 opp-microvolt = <820000>; 111 clock-latency-ns = <300000>; 112 }; 113 opp-1200000000 { 114 opp-hz = /bits/ 64 <1200000000>; 115 opp-microvolt = <820000>; 116 clock-latency-ns = <300000>; 117 }; 118 opp-1300000000 { 119 opp-hz = /bits/ 64 <1300000000>; 120 opp-microvolt = <820000>; 121 clock-latency-ns = <300000>; 122 turbo-mode; 123 }; 124 }; 125 126 cpus { 127 #address-cells = <1>; 128 #size-cells = <0>; 129 130 cpu-map { 131 cluster0 { 132 core0 { 133 cpu = <&a57_0>; 134 }; 135 core1 { 136 cpu = <&a57_1>; 137 }; 138 }; 139 140 cluster1 { 141 core0 { 142 cpu = <&a53_0>; 143 }; 144 core1 { 145 cpu = <&a53_1>; 146 }; 147 core2 { 148 cpu = <&a53_2>; 149 }; 150 core3 { 151 cpu = <&a53_3>; 152 }; 153 }; 154 }; 155 156 a57_0: cpu@0 { 157 compatible = "arm,cortex-a57"; 158 reg = <0x0>; 159 device_type = "cpu"; 160 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 161 next-level-cache = <&L2_CA57>; 162 enable-method = "psci"; 163 cpu-idle-states = <&CPU_SLEEP_0>; 164 dynamic-power-coefficient = <854>; 165 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 166 operating-points-v2 = <&cluster0_opp>; 167 capacity-dmips-mhz = <1024>; 168 #cooling-cells = <2>; 169 }; 170 171 a57_1: cpu@1 { 172 compatible = "arm,cortex-a57"; 173 reg = <0x1>; 174 device_type = "cpu"; 175 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 176 next-level-cache = <&L2_CA57>; 177 enable-method = "psci"; 178 cpu-idle-states = <&CPU_SLEEP_0>; 179 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 180 operating-points-v2 = <&cluster0_opp>; 181 capacity-dmips-mhz = <1024>; 182 #cooling-cells = <2>; 183 }; 184 185 a53_0: cpu@100 { 186 compatible = "arm,cortex-a53"; 187 reg = <0x100>; 188 device_type = "cpu"; 189 power-domains = <&sysc R8A7796_PD_CA53_CPU0>; 190 next-level-cache = <&L2_CA53>; 191 enable-method = "psci"; 192 cpu-idle-states = <&CPU_SLEEP_1>; 193 #cooling-cells = <2>; 194 dynamic-power-coefficient = <277>; 195 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 196 operating-points-v2 = <&cluster1_opp>; 197 capacity-dmips-mhz = <535>; 198 }; 199 200 a53_1: cpu@101 { 201 compatible = "arm,cortex-a53"; 202 reg = <0x101>; 203 device_type = "cpu"; 204 power-domains = <&sysc R8A7796_PD_CA53_CPU1>; 205 next-level-cache = <&L2_CA53>; 206 enable-method = "psci"; 207 cpu-idle-states = <&CPU_SLEEP_1>; 208 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 209 operating-points-v2 = <&cluster1_opp>; 210 capacity-dmips-mhz = <535>; 211 }; 212 213 a53_2: cpu@102 { 214 compatible = "arm,cortex-a53"; 215 reg = <0x102>; 216 device_type = "cpu"; 217 power-domains = <&sysc R8A7796_PD_CA53_CPU2>; 218 next-level-cache = <&L2_CA53>; 219 enable-method = "psci"; 220 cpu-idle-states = <&CPU_SLEEP_1>; 221 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 222 operating-points-v2 = <&cluster1_opp>; 223 capacity-dmips-mhz = <535>; 224 }; 225 226 a53_3: cpu@103 { 227 compatible = "arm,cortex-a53"; 228 reg = <0x103>; 229 device_type = "cpu"; 230 power-domains = <&sysc R8A7796_PD_CA53_CPU3>; 231 next-level-cache = <&L2_CA53>; 232 enable-method = "psci"; 233 cpu-idle-states = <&CPU_SLEEP_1>; 234 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 235 operating-points-v2 = <&cluster1_opp>; 236 capacity-dmips-mhz = <535>; 237 }; 238 239 L2_CA57: cache-controller-0 { 240 compatible = "cache"; 241 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 242 cache-unified; 243 cache-level = <2>; 244 }; 245 246 L2_CA53: cache-controller-1 { 247 compatible = "cache"; 248 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 249 cache-unified; 250 cache-level = <2>; 251 }; 252 253 idle-states { 254 entry-method = "psci"; 255 256 CPU_SLEEP_0: cpu-sleep-0 { 257 compatible = "arm,idle-state"; 258 arm,psci-suspend-param = <0x0010000>; 259 local-timer-stop; 260 entry-latency-us = <400>; 261 exit-latency-us = <500>; 262 min-residency-us = <4000>; 263 }; 264 265 CPU_SLEEP_1: cpu-sleep-1 { 266 compatible = "arm,idle-state"; 267 arm,psci-suspend-param = <0x0010000>; 268 local-timer-stop; 269 entry-latency-us = <700>; 270 exit-latency-us = <700>; 271 min-residency-us = <5000>; 272 }; 273 }; 274 }; 275 276 extal_clk: extal { 277 compatible = "fixed-clock"; 278 #clock-cells = <0>; 279 /* This value must be overridden by the board */ 280 clock-frequency = <0>; 281 }; 282 283 extalr_clk: extalr { 284 compatible = "fixed-clock"; 285 #clock-cells = <0>; 286 /* This value must be overridden by the board */ 287 clock-frequency = <0>; 288 }; 289 290 /* External PCIe clock - can be overridden by the board */ 291 pcie_bus_clk: pcie_bus { 292 compatible = "fixed-clock"; 293 #clock-cells = <0>; 294 clock-frequency = <0>; 295 }; 296 297 pmu_a53 { 298 compatible = "arm,cortex-a53-pmu"; 299 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 300 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 301 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 302 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 303 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 304 }; 305 306 pmu_a57 { 307 compatible = "arm,cortex-a57-pmu"; 308 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 309 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 310 interrupt-affinity = <&a57_0>, <&a57_1>; 311 }; 312 313 psci { 314 compatible = "arm,psci-1.0", "arm,psci-0.2"; 315 method = "smc"; 316 }; 317 318 /* External SCIF clock - to be overridden by boards that provide it */ 319 scif_clk: scif { 320 compatible = "fixed-clock"; 321 #clock-cells = <0>; 322 clock-frequency = <0>; 323 }; 324 325 soc { 326 compatible = "simple-bus"; 327 interrupt-parent = <&gic>; 328 #address-cells = <2>; 329 #size-cells = <2>; 330 ranges; 331 332 rwdt: watchdog@e6020000 { 333 compatible = "renesas,r8a7796-wdt", 334 "renesas,rcar-gen3-wdt"; 335 reg = <0 0xe6020000 0 0x0c>; 336 clocks = <&cpg CPG_MOD 402>; 337 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 338 resets = <&cpg 402>; 339 status = "disabled"; 340 }; 341 342 gpio0: gpio@e6050000 { 343 compatible = "renesas,gpio-r8a7796", 344 "renesas,rcar-gen3-gpio"; 345 reg = <0 0xe6050000 0 0x50>; 346 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 347 #gpio-cells = <2>; 348 gpio-controller; 349 gpio-ranges = <&pfc 0 0 16>; 350 #interrupt-cells = <2>; 351 interrupt-controller; 352 clocks = <&cpg CPG_MOD 912>; 353 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 354 resets = <&cpg 912>; 355 }; 356 357 gpio1: gpio@e6051000 { 358 compatible = "renesas,gpio-r8a7796", 359 "renesas,rcar-gen3-gpio"; 360 reg = <0 0xe6051000 0 0x50>; 361 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 362 #gpio-cells = <2>; 363 gpio-controller; 364 gpio-ranges = <&pfc 0 32 29>; 365 #interrupt-cells = <2>; 366 interrupt-controller; 367 clocks = <&cpg CPG_MOD 911>; 368 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 369 resets = <&cpg 911>; 370 }; 371 372 gpio2: gpio@e6052000 { 373 compatible = "renesas,gpio-r8a7796", 374 "renesas,rcar-gen3-gpio"; 375 reg = <0 0xe6052000 0 0x50>; 376 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 377 #gpio-cells = <2>; 378 gpio-controller; 379 gpio-ranges = <&pfc 0 64 15>; 380 #interrupt-cells = <2>; 381 interrupt-controller; 382 clocks = <&cpg CPG_MOD 910>; 383 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 384 resets = <&cpg 910>; 385 }; 386 387 gpio3: gpio@e6053000 { 388 compatible = "renesas,gpio-r8a7796", 389 "renesas,rcar-gen3-gpio"; 390 reg = <0 0xe6053000 0 0x50>; 391 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 392 #gpio-cells = <2>; 393 gpio-controller; 394 gpio-ranges = <&pfc 0 96 16>; 395 #interrupt-cells = <2>; 396 interrupt-controller; 397 clocks = <&cpg CPG_MOD 909>; 398 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 399 resets = <&cpg 909>; 400 }; 401 402 gpio4: gpio@e6054000 { 403 compatible = "renesas,gpio-r8a7796", 404 "renesas,rcar-gen3-gpio"; 405 reg = <0 0xe6054000 0 0x50>; 406 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 407 #gpio-cells = <2>; 408 gpio-controller; 409 gpio-ranges = <&pfc 0 128 18>; 410 #interrupt-cells = <2>; 411 interrupt-controller; 412 clocks = <&cpg CPG_MOD 908>; 413 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 414 resets = <&cpg 908>; 415 }; 416 417 gpio5: gpio@e6055000 { 418 compatible = "renesas,gpio-r8a7796", 419 "renesas,rcar-gen3-gpio"; 420 reg = <0 0xe6055000 0 0x50>; 421 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 422 #gpio-cells = <2>; 423 gpio-controller; 424 gpio-ranges = <&pfc 0 160 26>; 425 #interrupt-cells = <2>; 426 interrupt-controller; 427 clocks = <&cpg CPG_MOD 907>; 428 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 429 resets = <&cpg 907>; 430 }; 431 432 gpio6: gpio@e6055400 { 433 compatible = "renesas,gpio-r8a7796", 434 "renesas,rcar-gen3-gpio"; 435 reg = <0 0xe6055400 0 0x50>; 436 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 437 #gpio-cells = <2>; 438 gpio-controller; 439 gpio-ranges = <&pfc 0 192 32>; 440 #interrupt-cells = <2>; 441 interrupt-controller; 442 clocks = <&cpg CPG_MOD 906>; 443 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 444 resets = <&cpg 906>; 445 }; 446 447 gpio7: gpio@e6055800 { 448 compatible = "renesas,gpio-r8a7796", 449 "renesas,rcar-gen3-gpio"; 450 reg = <0 0xe6055800 0 0x50>; 451 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 452 #gpio-cells = <2>; 453 gpio-controller; 454 gpio-ranges = <&pfc 0 224 4>; 455 #interrupt-cells = <2>; 456 interrupt-controller; 457 clocks = <&cpg CPG_MOD 905>; 458 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 459 resets = <&cpg 905>; 460 }; 461 462 pfc: pin-controller@e6060000 { 463 compatible = "renesas,pfc-r8a7796"; 464 reg = <0 0xe6060000 0 0x50c>; 465 }; 466 467 cmt0: timer@e60f0000 { 468 compatible = "renesas,r8a7796-cmt0", 469 "renesas,rcar-gen3-cmt0"; 470 reg = <0 0xe60f0000 0 0x1004>; 471 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 472 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 473 clocks = <&cpg CPG_MOD 303>; 474 clock-names = "fck"; 475 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 476 resets = <&cpg 303>; 477 status = "disabled"; 478 }; 479 480 cmt1: timer@e6130000 { 481 compatible = "renesas,r8a7796-cmt1", 482 "renesas,rcar-gen3-cmt1"; 483 reg = <0 0xe6130000 0 0x1004>; 484 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 485 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 486 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 492 clocks = <&cpg CPG_MOD 302>; 493 clock-names = "fck"; 494 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 495 resets = <&cpg 302>; 496 status = "disabled"; 497 }; 498 499 cmt2: timer@e6140000 { 500 compatible = "renesas,r8a7796-cmt1", 501 "renesas,rcar-gen3-cmt1"; 502 reg = <0 0xe6140000 0 0x1004>; 503 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 504 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 505 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 506 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 507 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 508 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 510 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 511 clocks = <&cpg CPG_MOD 301>; 512 clock-names = "fck"; 513 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 514 resets = <&cpg 301>; 515 status = "disabled"; 516 }; 517 518 cmt3: timer@e6148000 { 519 compatible = "renesas,r8a7796-cmt1", 520 "renesas,rcar-gen3-cmt1"; 521 reg = <0 0xe6148000 0 0x1004>; 522 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 523 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 524 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 300>; 531 clock-names = "fck"; 532 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 533 resets = <&cpg 300>; 534 status = "disabled"; 535 }; 536 537 cpg: clock-controller@e6150000 { 538 compatible = "renesas,r8a7796-cpg-mssr"; 539 reg = <0 0xe6150000 0 0x1000>; 540 clocks = <&extal_clk>, <&extalr_clk>; 541 clock-names = "extal", "extalr"; 542 #clock-cells = <2>; 543 #power-domain-cells = <0>; 544 #reset-cells = <1>; 545 }; 546 547 rst: reset-controller@e6160000 { 548 compatible = "renesas,r8a7796-rst"; 549 reg = <0 0xe6160000 0 0x0200>; 550 }; 551 552 sysc: system-controller@e6180000 { 553 compatible = "renesas,r8a7796-sysc"; 554 reg = <0 0xe6180000 0 0x0400>; 555 #power-domain-cells = <1>; 556 }; 557 558 tsc: thermal@e6198000 { 559 compatible = "renesas,r8a7796-thermal"; 560 reg = <0 0xe6198000 0 0x100>, 561 <0 0xe61a0000 0 0x100>, 562 <0 0xe61a8000 0 0x100>; 563 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 564 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 565 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 566 clocks = <&cpg CPG_MOD 522>; 567 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 568 resets = <&cpg 522>; 569 #thermal-sensor-cells = <1>; 570 }; 571 572 intc_ex: interrupt-controller@e61c0000 { 573 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; 574 #interrupt-cells = <2>; 575 interrupt-controller; 576 reg = <0 0xe61c0000 0 0x200>; 577 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 578 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 579 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 580 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 581 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&cpg CPG_MOD 407>; 584 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 585 resets = <&cpg 407>; 586 }; 587 588 i2c0: i2c@e6500000 { 589 #address-cells = <1>; 590 #size-cells = <0>; 591 compatible = "renesas,i2c-r8a7796", 592 "renesas,rcar-gen3-i2c"; 593 reg = <0 0xe6500000 0 0x40>; 594 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 931>; 596 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 597 resets = <&cpg 931>; 598 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 599 <&dmac2 0x91>, <&dmac2 0x90>; 600 dma-names = "tx", "rx", "tx", "rx"; 601 i2c-scl-internal-delay-ns = <110>; 602 status = "disabled"; 603 }; 604 605 i2c1: i2c@e6508000 { 606 #address-cells = <1>; 607 #size-cells = <0>; 608 compatible = "renesas,i2c-r8a7796", 609 "renesas,rcar-gen3-i2c"; 610 reg = <0 0xe6508000 0 0x40>; 611 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 930>; 613 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 614 resets = <&cpg 930>; 615 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 616 <&dmac2 0x93>, <&dmac2 0x92>; 617 dma-names = "tx", "rx", "tx", "rx"; 618 i2c-scl-internal-delay-ns = <6>; 619 status = "disabled"; 620 }; 621 622 i2c2: i2c@e6510000 { 623 #address-cells = <1>; 624 #size-cells = <0>; 625 compatible = "renesas,i2c-r8a7796", 626 "renesas,rcar-gen3-i2c"; 627 reg = <0 0xe6510000 0 0x40>; 628 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&cpg CPG_MOD 929>; 630 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 631 resets = <&cpg 929>; 632 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 633 <&dmac2 0x95>, <&dmac2 0x94>; 634 dma-names = "tx", "rx", "tx", "rx"; 635 i2c-scl-internal-delay-ns = <6>; 636 status = "disabled"; 637 }; 638 639 i2c3: i2c@e66d0000 { 640 #address-cells = <1>; 641 #size-cells = <0>; 642 compatible = "renesas,i2c-r8a7796", 643 "renesas,rcar-gen3-i2c"; 644 reg = <0 0xe66d0000 0 0x40>; 645 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 646 clocks = <&cpg CPG_MOD 928>; 647 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 648 resets = <&cpg 928>; 649 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 650 dma-names = "tx", "rx"; 651 i2c-scl-internal-delay-ns = <110>; 652 status = "disabled"; 653 }; 654 655 i2c4: i2c@e66d8000 { 656 #address-cells = <1>; 657 #size-cells = <0>; 658 compatible = "renesas,i2c-r8a7796", 659 "renesas,rcar-gen3-i2c"; 660 reg = <0 0xe66d8000 0 0x40>; 661 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 927>; 663 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 664 resets = <&cpg 927>; 665 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 666 dma-names = "tx", "rx"; 667 i2c-scl-internal-delay-ns = <110>; 668 status = "disabled"; 669 }; 670 671 i2c5: i2c@e66e0000 { 672 #address-cells = <1>; 673 #size-cells = <0>; 674 compatible = "renesas,i2c-r8a7796", 675 "renesas,rcar-gen3-i2c"; 676 reg = <0 0xe66e0000 0 0x40>; 677 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 678 clocks = <&cpg CPG_MOD 919>; 679 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 680 resets = <&cpg 919>; 681 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 682 dma-names = "tx", "rx"; 683 i2c-scl-internal-delay-ns = <110>; 684 status = "disabled"; 685 }; 686 687 i2c6: i2c@e66e8000 { 688 #address-cells = <1>; 689 #size-cells = <0>; 690 compatible = "renesas,i2c-r8a7796", 691 "renesas,rcar-gen3-i2c"; 692 reg = <0 0xe66e8000 0 0x40>; 693 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 694 clocks = <&cpg CPG_MOD 918>; 695 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 696 resets = <&cpg 918>; 697 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 698 dma-names = "tx", "rx"; 699 i2c-scl-internal-delay-ns = <6>; 700 status = "disabled"; 701 }; 702 703 i2c_dvfs: i2c@e60b0000 { 704 #address-cells = <1>; 705 #size-cells = <0>; 706 compatible = "renesas,iic-r8a7796", 707 "renesas,rcar-gen3-iic", 708 "renesas,rmobile-iic"; 709 reg = <0 0xe60b0000 0 0x425>; 710 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 711 clocks = <&cpg CPG_MOD 926>; 712 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 713 resets = <&cpg 926>; 714 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 715 dma-names = "tx", "rx"; 716 status = "disabled"; 717 }; 718 719 hscif0: serial@e6540000 { 720 compatible = "renesas,hscif-r8a7796", 721 "renesas,rcar-gen3-hscif", 722 "renesas,hscif"; 723 reg = <0 0xe6540000 0 0x60>; 724 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 725 clocks = <&cpg CPG_MOD 520>, 726 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 727 <&scif_clk>; 728 clock-names = "fck", "brg_int", "scif_clk"; 729 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 730 <&dmac2 0x31>, <&dmac2 0x30>; 731 dma-names = "tx", "rx", "tx", "rx"; 732 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 733 resets = <&cpg 520>; 734 status = "disabled"; 735 }; 736 737 hscif1: serial@e6550000 { 738 compatible = "renesas,hscif-r8a7796", 739 "renesas,rcar-gen3-hscif", 740 "renesas,hscif"; 741 reg = <0 0xe6550000 0 0x60>; 742 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 743 clocks = <&cpg CPG_MOD 519>, 744 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 745 <&scif_clk>; 746 clock-names = "fck", "brg_int", "scif_clk"; 747 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 748 <&dmac2 0x33>, <&dmac2 0x32>; 749 dma-names = "tx", "rx", "tx", "rx"; 750 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 751 resets = <&cpg 519>; 752 status = "disabled"; 753 }; 754 755 hscif2: serial@e6560000 { 756 compatible = "renesas,hscif-r8a7796", 757 "renesas,rcar-gen3-hscif", 758 "renesas,hscif"; 759 reg = <0 0xe6560000 0 0x60>; 760 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 761 clocks = <&cpg CPG_MOD 518>, 762 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 763 <&scif_clk>; 764 clock-names = "fck", "brg_int", "scif_clk"; 765 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 766 <&dmac2 0x35>, <&dmac2 0x34>; 767 dma-names = "tx", "rx", "tx", "rx"; 768 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 769 resets = <&cpg 518>; 770 status = "disabled"; 771 }; 772 773 hscif3: serial@e66a0000 { 774 compatible = "renesas,hscif-r8a7796", 775 "renesas,rcar-gen3-hscif", 776 "renesas,hscif"; 777 reg = <0 0xe66a0000 0 0x60>; 778 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 779 clocks = <&cpg CPG_MOD 517>, 780 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 781 <&scif_clk>; 782 clock-names = "fck", "brg_int", "scif_clk"; 783 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 784 dma-names = "tx", "rx"; 785 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 786 resets = <&cpg 517>; 787 status = "disabled"; 788 }; 789 790 hscif4: serial@e66b0000 { 791 compatible = "renesas,hscif-r8a7796", 792 "renesas,rcar-gen3-hscif", 793 "renesas,hscif"; 794 reg = <0 0xe66b0000 0 0x60>; 795 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 796 clocks = <&cpg CPG_MOD 516>, 797 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 798 <&scif_clk>; 799 clock-names = "fck", "brg_int", "scif_clk"; 800 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 801 dma-names = "tx", "rx"; 802 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 803 resets = <&cpg 516>; 804 status = "disabled"; 805 }; 806 807 hsusb: usb@e6590000 { 808 compatible = "renesas,usbhs-r8a7796", 809 "renesas,rcar-gen3-usbhs"; 810 reg = <0 0xe6590000 0 0x200>; 811 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 812 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 813 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 814 <&usb_dmac1 0>, <&usb_dmac1 1>; 815 dma-names = "ch0", "ch1", "ch2", "ch3"; 816 renesas,buswait = <11>; 817 phys = <&usb2_phy0 3>; 818 phy-names = "usb"; 819 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 820 resets = <&cpg 704>, <&cpg 703>; 821 status = "disabled"; 822 }; 823 824 usb_dmac0: dma-controller@e65a0000 { 825 compatible = "renesas,r8a7796-usb-dmac", 826 "renesas,usb-dmac"; 827 reg = <0 0xe65a0000 0 0x100>; 828 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 830 interrupt-names = "ch0", "ch1"; 831 clocks = <&cpg CPG_MOD 330>; 832 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 833 resets = <&cpg 330>; 834 #dma-cells = <1>; 835 dma-channels = <2>; 836 }; 837 838 usb_dmac1: dma-controller@e65b0000 { 839 compatible = "renesas,r8a7796-usb-dmac", 840 "renesas,usb-dmac"; 841 reg = <0 0xe65b0000 0 0x100>; 842 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 843 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 844 interrupt-names = "ch0", "ch1"; 845 clocks = <&cpg CPG_MOD 331>; 846 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 847 resets = <&cpg 331>; 848 #dma-cells = <1>; 849 dma-channels = <2>; 850 }; 851 852 usb3_phy0: usb-phy@e65ee000 { 853 compatible = "renesas,r8a7796-usb3-phy", 854 "renesas,rcar-gen3-usb3-phy"; 855 reg = <0 0xe65ee000 0 0x90>; 856 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 857 <&usb_extal_clk>; 858 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 859 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 860 resets = <&cpg 328>; 861 #phy-cells = <0>; 862 status = "disabled"; 863 }; 864 865 dmac0: dma-controller@e6700000 { 866 compatible = "renesas,dmac-r8a7796", 867 "renesas,rcar-dmac"; 868 reg = <0 0xe6700000 0 0x10000>; 869 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 886 interrupt-names = "error", 887 "ch0", "ch1", "ch2", "ch3", 888 "ch4", "ch5", "ch6", "ch7", 889 "ch8", "ch9", "ch10", "ch11", 890 "ch12", "ch13", "ch14", "ch15"; 891 clocks = <&cpg CPG_MOD 219>; 892 clock-names = "fck"; 893 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 894 resets = <&cpg 219>; 895 #dma-cells = <1>; 896 dma-channels = <16>; 897 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 898 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 899 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 900 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 901 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 902 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 903 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 904 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 905 }; 906 907 dmac1: dma-controller@e7300000 { 908 compatible = "renesas,dmac-r8a7796", 909 "renesas,rcar-dmac"; 910 reg = <0 0xe7300000 0 0x10000>; 911 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 914 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 915 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 916 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 917 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 918 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 919 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 920 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 921 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 922 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 923 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 924 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 926 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 927 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 928 interrupt-names = "error", 929 "ch0", "ch1", "ch2", "ch3", 930 "ch4", "ch5", "ch6", "ch7", 931 "ch8", "ch9", "ch10", "ch11", 932 "ch12", "ch13", "ch14", "ch15"; 933 clocks = <&cpg CPG_MOD 218>; 934 clock-names = "fck"; 935 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 936 resets = <&cpg 218>; 937 #dma-cells = <1>; 938 dma-channels = <16>; 939 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 940 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 941 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 942 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 943 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 944 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 945 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 946 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 947 }; 948 949 dmac2: dma-controller@e7310000 { 950 compatible = "renesas,dmac-r8a7796", 951 "renesas,rcar-dmac"; 952 reg = <0 0xe7310000 0 0x10000>; 953 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 954 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 970 interrupt-names = "error", 971 "ch0", "ch1", "ch2", "ch3", 972 "ch4", "ch5", "ch6", "ch7", 973 "ch8", "ch9", "ch10", "ch11", 974 "ch12", "ch13", "ch14", "ch15"; 975 clocks = <&cpg CPG_MOD 217>; 976 clock-names = "fck"; 977 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 978 resets = <&cpg 217>; 979 #dma-cells = <1>; 980 dma-channels = <16>; 981 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 982 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 983 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 984 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 985 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 986 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 987 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 988 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 989 }; 990 991 ipmmu_ds0: mmu@e6740000 { 992 compatible = "renesas,ipmmu-r8a7796"; 993 reg = <0 0xe6740000 0 0x1000>; 994 renesas,ipmmu-main = <&ipmmu_mm 0>; 995 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 996 #iommu-cells = <1>; 997 }; 998 999 ipmmu_ds1: mmu@e7740000 { 1000 compatible = "renesas,ipmmu-r8a7796"; 1001 reg = <0 0xe7740000 0 0x1000>; 1002 renesas,ipmmu-main = <&ipmmu_mm 1>; 1003 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1004 #iommu-cells = <1>; 1005 }; 1006 1007 ipmmu_hc: mmu@e6570000 { 1008 compatible = "renesas,ipmmu-r8a7796"; 1009 reg = <0 0xe6570000 0 0x1000>; 1010 renesas,ipmmu-main = <&ipmmu_mm 2>; 1011 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1012 #iommu-cells = <1>; 1013 }; 1014 1015 ipmmu_ir: mmu@ff8b0000 { 1016 compatible = "renesas,ipmmu-r8a7796"; 1017 reg = <0 0xff8b0000 0 0x1000>; 1018 renesas,ipmmu-main = <&ipmmu_mm 3>; 1019 power-domains = <&sysc R8A7796_PD_A3IR>; 1020 #iommu-cells = <1>; 1021 }; 1022 1023 ipmmu_mm: mmu@e67b0000 { 1024 compatible = "renesas,ipmmu-r8a7796"; 1025 reg = <0 0xe67b0000 0 0x1000>; 1026 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1028 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1029 #iommu-cells = <1>; 1030 }; 1031 1032 ipmmu_mp: mmu@ec670000 { 1033 compatible = "renesas,ipmmu-r8a7796"; 1034 reg = <0 0xec670000 0 0x1000>; 1035 renesas,ipmmu-main = <&ipmmu_mm 4>; 1036 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1037 #iommu-cells = <1>; 1038 }; 1039 1040 ipmmu_pv0: mmu@fd800000 { 1041 compatible = "renesas,ipmmu-r8a7796"; 1042 reg = <0 0xfd800000 0 0x1000>; 1043 renesas,ipmmu-main = <&ipmmu_mm 5>; 1044 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1045 #iommu-cells = <1>; 1046 }; 1047 1048 ipmmu_pv1: mmu@fd950000 { 1049 compatible = "renesas,ipmmu-r8a7796"; 1050 reg = <0 0xfd950000 0 0x1000>; 1051 renesas,ipmmu-main = <&ipmmu_mm 6>; 1052 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1053 #iommu-cells = <1>; 1054 }; 1055 1056 ipmmu_rt: mmu@ffc80000 { 1057 compatible = "renesas,ipmmu-r8a7796"; 1058 reg = <0 0xffc80000 0 0x1000>; 1059 renesas,ipmmu-main = <&ipmmu_mm 7>; 1060 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1061 #iommu-cells = <1>; 1062 }; 1063 1064 ipmmu_vc0: mmu@fe6b0000 { 1065 compatible = "renesas,ipmmu-r8a7796"; 1066 reg = <0 0xfe6b0000 0 0x1000>; 1067 renesas,ipmmu-main = <&ipmmu_mm 8>; 1068 power-domains = <&sysc R8A7796_PD_A3VC>; 1069 #iommu-cells = <1>; 1070 }; 1071 1072 ipmmu_vi0: mmu@febd0000 { 1073 compatible = "renesas,ipmmu-r8a7796"; 1074 reg = <0 0xfebd0000 0 0x1000>; 1075 renesas,ipmmu-main = <&ipmmu_mm 9>; 1076 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1077 #iommu-cells = <1>; 1078 }; 1079 1080 avb: ethernet@e6800000 { 1081 compatible = "renesas,etheravb-r8a7796", 1082 "renesas,etheravb-rcar-gen3"; 1083 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1084 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1085 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1086 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1087 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1088 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1089 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1090 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1091 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1092 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1093 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1094 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1095 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1096 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1097 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1098 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1099 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1100 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1101 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1102 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1103 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1104 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1105 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1106 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1107 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1108 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1109 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1110 "ch4", "ch5", "ch6", "ch7", 1111 "ch8", "ch9", "ch10", "ch11", 1112 "ch12", "ch13", "ch14", "ch15", 1113 "ch16", "ch17", "ch18", "ch19", 1114 "ch20", "ch21", "ch22", "ch23", 1115 "ch24"; 1116 clocks = <&cpg CPG_MOD 812>; 1117 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1118 resets = <&cpg 812>; 1119 phy-mode = "rgmii"; 1120 iommus = <&ipmmu_ds0 16>; 1121 #address-cells = <1>; 1122 #size-cells = <0>; 1123 status = "disabled"; 1124 }; 1125 1126 can0: can@e6c30000 { 1127 compatible = "renesas,can-r8a7796", 1128 "renesas,rcar-gen3-can"; 1129 reg = <0 0xe6c30000 0 0x1000>; 1130 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1131 clocks = <&cpg CPG_MOD 916>, 1132 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1133 <&can_clk>; 1134 clock-names = "clkp1", "clkp2", "can_clk"; 1135 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1136 assigned-clock-rates = <40000000>; 1137 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1138 resets = <&cpg 916>; 1139 status = "disabled"; 1140 }; 1141 1142 can1: can@e6c38000 { 1143 compatible = "renesas,can-r8a7796", 1144 "renesas,rcar-gen3-can"; 1145 reg = <0 0xe6c38000 0 0x1000>; 1146 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1147 clocks = <&cpg CPG_MOD 915>, 1148 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1149 <&can_clk>; 1150 clock-names = "clkp1", "clkp2", "can_clk"; 1151 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1152 assigned-clock-rates = <40000000>; 1153 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1154 resets = <&cpg 915>; 1155 status = "disabled"; 1156 }; 1157 1158 canfd: can@e66c0000 { 1159 compatible = "renesas,r8a7796-canfd", 1160 "renesas,rcar-gen3-canfd"; 1161 reg = <0 0xe66c0000 0 0x8000>; 1162 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1163 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1164 clocks = <&cpg CPG_MOD 914>, 1165 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1166 <&can_clk>; 1167 clock-names = "fck", "canfd", "can_clk"; 1168 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1169 assigned-clock-rates = <40000000>; 1170 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1171 resets = <&cpg 914>; 1172 status = "disabled"; 1173 1174 channel0 { 1175 status = "disabled"; 1176 }; 1177 1178 channel1 { 1179 status = "disabled"; 1180 }; 1181 }; 1182 1183 pwm0: pwm@e6e30000 { 1184 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1185 reg = <0 0xe6e30000 0 8>; 1186 #pwm-cells = <2>; 1187 clocks = <&cpg CPG_MOD 523>; 1188 resets = <&cpg 523>; 1189 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1190 status = "disabled"; 1191 }; 1192 1193 pwm1: pwm@e6e31000 { 1194 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1195 reg = <0 0xe6e31000 0 8>; 1196 #pwm-cells = <2>; 1197 clocks = <&cpg CPG_MOD 523>; 1198 resets = <&cpg 523>; 1199 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1200 status = "disabled"; 1201 }; 1202 1203 pwm2: pwm@e6e32000 { 1204 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1205 reg = <0 0xe6e32000 0 8>; 1206 #pwm-cells = <2>; 1207 clocks = <&cpg CPG_MOD 523>; 1208 resets = <&cpg 523>; 1209 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1210 status = "disabled"; 1211 }; 1212 1213 pwm3: pwm@e6e33000 { 1214 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1215 reg = <0 0xe6e33000 0 8>; 1216 #pwm-cells = <2>; 1217 clocks = <&cpg CPG_MOD 523>; 1218 resets = <&cpg 523>; 1219 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1220 status = "disabled"; 1221 }; 1222 1223 pwm4: pwm@e6e34000 { 1224 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1225 reg = <0 0xe6e34000 0 8>; 1226 #pwm-cells = <2>; 1227 clocks = <&cpg CPG_MOD 523>; 1228 resets = <&cpg 523>; 1229 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1230 status = "disabled"; 1231 }; 1232 1233 pwm5: pwm@e6e35000 { 1234 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1235 reg = <0 0xe6e35000 0 8>; 1236 #pwm-cells = <2>; 1237 clocks = <&cpg CPG_MOD 523>; 1238 resets = <&cpg 523>; 1239 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1240 status = "disabled"; 1241 }; 1242 1243 pwm6: pwm@e6e36000 { 1244 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1245 reg = <0 0xe6e36000 0 8>; 1246 #pwm-cells = <2>; 1247 clocks = <&cpg CPG_MOD 523>; 1248 resets = <&cpg 523>; 1249 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1250 status = "disabled"; 1251 }; 1252 1253 scif0: serial@e6e60000 { 1254 compatible = "renesas,scif-r8a7796", 1255 "renesas,rcar-gen3-scif", "renesas,scif"; 1256 reg = <0 0xe6e60000 0 64>; 1257 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1258 clocks = <&cpg CPG_MOD 207>, 1259 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1260 <&scif_clk>; 1261 clock-names = "fck", "brg_int", "scif_clk"; 1262 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1263 <&dmac2 0x51>, <&dmac2 0x50>; 1264 dma-names = "tx", "rx", "tx", "rx"; 1265 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1266 resets = <&cpg 207>; 1267 status = "disabled"; 1268 }; 1269 1270 scif1: serial@e6e68000 { 1271 compatible = "renesas,scif-r8a7796", 1272 "renesas,rcar-gen3-scif", "renesas,scif"; 1273 reg = <0 0xe6e68000 0 64>; 1274 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1275 clocks = <&cpg CPG_MOD 206>, 1276 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1277 <&scif_clk>; 1278 clock-names = "fck", "brg_int", "scif_clk"; 1279 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1280 <&dmac2 0x53>, <&dmac2 0x52>; 1281 dma-names = "tx", "rx", "tx", "rx"; 1282 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1283 resets = <&cpg 206>; 1284 status = "disabled"; 1285 }; 1286 1287 scif2: serial@e6e88000 { 1288 compatible = "renesas,scif-r8a7796", 1289 "renesas,rcar-gen3-scif", "renesas,scif"; 1290 reg = <0 0xe6e88000 0 64>; 1291 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1292 clocks = <&cpg CPG_MOD 310>, 1293 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1294 <&scif_clk>; 1295 clock-names = "fck", "brg_int", "scif_clk"; 1296 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1297 <&dmac2 0x13>, <&dmac2 0x12>; 1298 dma-names = "tx", "rx", "tx", "rx"; 1299 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1300 resets = <&cpg 310>; 1301 status = "disabled"; 1302 }; 1303 1304 scif3: serial@e6c50000 { 1305 compatible = "renesas,scif-r8a7796", 1306 "renesas,rcar-gen3-scif", "renesas,scif"; 1307 reg = <0 0xe6c50000 0 64>; 1308 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1309 clocks = <&cpg CPG_MOD 204>, 1310 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1311 <&scif_clk>; 1312 clock-names = "fck", "brg_int", "scif_clk"; 1313 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1314 dma-names = "tx", "rx"; 1315 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1316 resets = <&cpg 204>; 1317 status = "disabled"; 1318 }; 1319 1320 scif4: serial@e6c40000 { 1321 compatible = "renesas,scif-r8a7796", 1322 "renesas,rcar-gen3-scif", "renesas,scif"; 1323 reg = <0 0xe6c40000 0 64>; 1324 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1325 clocks = <&cpg CPG_MOD 203>, 1326 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1327 <&scif_clk>; 1328 clock-names = "fck", "brg_int", "scif_clk"; 1329 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1330 dma-names = "tx", "rx"; 1331 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1332 resets = <&cpg 203>; 1333 status = "disabled"; 1334 }; 1335 1336 scif5: serial@e6f30000 { 1337 compatible = "renesas,scif-r8a7796", 1338 "renesas,rcar-gen3-scif", "renesas,scif"; 1339 reg = <0 0xe6f30000 0 64>; 1340 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1341 clocks = <&cpg CPG_MOD 202>, 1342 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1343 <&scif_clk>; 1344 clock-names = "fck", "brg_int", "scif_clk"; 1345 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1346 <&dmac2 0x5b>, <&dmac2 0x5a>; 1347 dma-names = "tx", "rx", "tx", "rx"; 1348 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1349 resets = <&cpg 202>; 1350 status = "disabled"; 1351 }; 1352 1353 tpu: pwm@e6e80000 { 1354 compatible = "renesas,tpu-r8a7796", "renesas,tpu"; 1355 reg = <0 0xe6e80000 0 0x148>; 1356 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1357 clocks = <&cpg CPG_MOD 304>; 1358 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1359 resets = <&cpg 304>; 1360 #pwm-cells = <3>; 1361 status = "disabled"; 1362 }; 1363 1364 msiof0: spi@e6e90000 { 1365 compatible = "renesas,msiof-r8a7796", 1366 "renesas,rcar-gen3-msiof"; 1367 reg = <0 0xe6e90000 0 0x0064>; 1368 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1369 clocks = <&cpg CPG_MOD 211>; 1370 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1371 <&dmac2 0x41>, <&dmac2 0x40>; 1372 dma-names = "tx", "rx", "tx", "rx"; 1373 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1374 resets = <&cpg 211>; 1375 #address-cells = <1>; 1376 #size-cells = <0>; 1377 status = "disabled"; 1378 }; 1379 1380 msiof1: spi@e6ea0000 { 1381 compatible = "renesas,msiof-r8a7796", 1382 "renesas,rcar-gen3-msiof"; 1383 reg = <0 0xe6ea0000 0 0x0064>; 1384 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1385 clocks = <&cpg CPG_MOD 210>; 1386 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1387 <&dmac2 0x43>, <&dmac2 0x42>; 1388 dma-names = "tx", "rx", "tx", "rx"; 1389 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1390 resets = <&cpg 210>; 1391 #address-cells = <1>; 1392 #size-cells = <0>; 1393 status = "disabled"; 1394 }; 1395 1396 msiof2: spi@e6c00000 { 1397 compatible = "renesas,msiof-r8a7796", 1398 "renesas,rcar-gen3-msiof"; 1399 reg = <0 0xe6c00000 0 0x0064>; 1400 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1401 clocks = <&cpg CPG_MOD 209>; 1402 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1403 dma-names = "tx", "rx"; 1404 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1405 resets = <&cpg 209>; 1406 #address-cells = <1>; 1407 #size-cells = <0>; 1408 status = "disabled"; 1409 }; 1410 1411 msiof3: spi@e6c10000 { 1412 compatible = "renesas,msiof-r8a7796", 1413 "renesas,rcar-gen3-msiof"; 1414 reg = <0 0xe6c10000 0 0x0064>; 1415 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1416 clocks = <&cpg CPG_MOD 208>; 1417 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1418 dma-names = "tx", "rx"; 1419 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1420 resets = <&cpg 208>; 1421 #address-cells = <1>; 1422 #size-cells = <0>; 1423 status = "disabled"; 1424 }; 1425 1426 vin0: video@e6ef0000 { 1427 compatible = "renesas,vin-r8a7796"; 1428 reg = <0 0xe6ef0000 0 0x1000>; 1429 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1430 clocks = <&cpg CPG_MOD 811>; 1431 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1432 resets = <&cpg 811>; 1433 renesas,id = <0>; 1434 status = "disabled"; 1435 1436 ports { 1437 #address-cells = <1>; 1438 #size-cells = <0>; 1439 1440 port@1 { 1441 #address-cells = <1>; 1442 #size-cells = <0>; 1443 1444 reg = <1>; 1445 1446 vin0csi20: endpoint@0 { 1447 reg = <0>; 1448 remote-endpoint = <&csi20vin0>; 1449 }; 1450 vin0csi40: endpoint@2 { 1451 reg = <2>; 1452 remote-endpoint = <&csi40vin0>; 1453 }; 1454 }; 1455 }; 1456 }; 1457 1458 vin1: video@e6ef1000 { 1459 compatible = "renesas,vin-r8a7796"; 1460 reg = <0 0xe6ef1000 0 0x1000>; 1461 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1462 clocks = <&cpg CPG_MOD 810>; 1463 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1464 resets = <&cpg 810>; 1465 renesas,id = <1>; 1466 status = "disabled"; 1467 1468 ports { 1469 #address-cells = <1>; 1470 #size-cells = <0>; 1471 1472 port@1 { 1473 #address-cells = <1>; 1474 #size-cells = <0>; 1475 1476 reg = <1>; 1477 1478 vin1csi20: endpoint@0 { 1479 reg = <0>; 1480 remote-endpoint = <&csi20vin1>; 1481 }; 1482 vin1csi40: endpoint@2 { 1483 reg = <2>; 1484 remote-endpoint = <&csi40vin1>; 1485 }; 1486 }; 1487 }; 1488 }; 1489 1490 vin2: video@e6ef2000 { 1491 compatible = "renesas,vin-r8a7796"; 1492 reg = <0 0xe6ef2000 0 0x1000>; 1493 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1494 clocks = <&cpg CPG_MOD 809>; 1495 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1496 resets = <&cpg 809>; 1497 renesas,id = <2>; 1498 status = "disabled"; 1499 1500 ports { 1501 #address-cells = <1>; 1502 #size-cells = <0>; 1503 1504 port@1 { 1505 #address-cells = <1>; 1506 #size-cells = <0>; 1507 1508 reg = <1>; 1509 1510 vin2csi20: endpoint@0 { 1511 reg = <0>; 1512 remote-endpoint = <&csi20vin2>; 1513 }; 1514 vin2csi40: endpoint@2 { 1515 reg = <2>; 1516 remote-endpoint = <&csi40vin2>; 1517 }; 1518 }; 1519 }; 1520 }; 1521 1522 vin3: video@e6ef3000 { 1523 compatible = "renesas,vin-r8a7796"; 1524 reg = <0 0xe6ef3000 0 0x1000>; 1525 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1526 clocks = <&cpg CPG_MOD 808>; 1527 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1528 resets = <&cpg 808>; 1529 renesas,id = <3>; 1530 status = "disabled"; 1531 1532 ports { 1533 #address-cells = <1>; 1534 #size-cells = <0>; 1535 1536 port@1 { 1537 #address-cells = <1>; 1538 #size-cells = <0>; 1539 1540 reg = <1>; 1541 1542 vin3csi20: endpoint@0 { 1543 reg = <0>; 1544 remote-endpoint = <&csi20vin3>; 1545 }; 1546 vin3csi40: endpoint@2 { 1547 reg = <2>; 1548 remote-endpoint = <&csi40vin3>; 1549 }; 1550 }; 1551 }; 1552 }; 1553 1554 vin4: video@e6ef4000 { 1555 compatible = "renesas,vin-r8a7796"; 1556 reg = <0 0xe6ef4000 0 0x1000>; 1557 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1558 clocks = <&cpg CPG_MOD 807>; 1559 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1560 resets = <&cpg 807>; 1561 renesas,id = <4>; 1562 status = "disabled"; 1563 1564 ports { 1565 #address-cells = <1>; 1566 #size-cells = <0>; 1567 1568 port@1 { 1569 #address-cells = <1>; 1570 #size-cells = <0>; 1571 1572 reg = <1>; 1573 1574 vin4csi20: endpoint@0 { 1575 reg = <0>; 1576 remote-endpoint = <&csi20vin4>; 1577 }; 1578 vin4csi40: endpoint@2 { 1579 reg = <2>; 1580 remote-endpoint = <&csi40vin4>; 1581 }; 1582 }; 1583 }; 1584 }; 1585 1586 vin5: video@e6ef5000 { 1587 compatible = "renesas,vin-r8a7796"; 1588 reg = <0 0xe6ef5000 0 0x1000>; 1589 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1590 clocks = <&cpg CPG_MOD 806>; 1591 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1592 resets = <&cpg 806>; 1593 renesas,id = <5>; 1594 status = "disabled"; 1595 1596 ports { 1597 #address-cells = <1>; 1598 #size-cells = <0>; 1599 1600 port@1 { 1601 #address-cells = <1>; 1602 #size-cells = <0>; 1603 1604 reg = <1>; 1605 1606 vin5csi20: endpoint@0 { 1607 reg = <0>; 1608 remote-endpoint = <&csi20vin5>; 1609 }; 1610 vin5csi40: endpoint@2 { 1611 reg = <2>; 1612 remote-endpoint = <&csi40vin5>; 1613 }; 1614 }; 1615 }; 1616 }; 1617 1618 vin6: video@e6ef6000 { 1619 compatible = "renesas,vin-r8a7796"; 1620 reg = <0 0xe6ef6000 0 0x1000>; 1621 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1622 clocks = <&cpg CPG_MOD 805>; 1623 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1624 resets = <&cpg 805>; 1625 renesas,id = <6>; 1626 status = "disabled"; 1627 1628 ports { 1629 #address-cells = <1>; 1630 #size-cells = <0>; 1631 1632 port@1 { 1633 #address-cells = <1>; 1634 #size-cells = <0>; 1635 1636 reg = <1>; 1637 1638 vin6csi20: endpoint@0 { 1639 reg = <0>; 1640 remote-endpoint = <&csi20vin6>; 1641 }; 1642 vin6csi40: endpoint@2 { 1643 reg = <2>; 1644 remote-endpoint = <&csi40vin6>; 1645 }; 1646 }; 1647 }; 1648 }; 1649 1650 vin7: video@e6ef7000 { 1651 compatible = "renesas,vin-r8a7796"; 1652 reg = <0 0xe6ef7000 0 0x1000>; 1653 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1654 clocks = <&cpg CPG_MOD 804>; 1655 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1656 resets = <&cpg 804>; 1657 renesas,id = <7>; 1658 status = "disabled"; 1659 1660 ports { 1661 #address-cells = <1>; 1662 #size-cells = <0>; 1663 1664 port@1 { 1665 #address-cells = <1>; 1666 #size-cells = <0>; 1667 1668 reg = <1>; 1669 1670 vin7csi20: endpoint@0 { 1671 reg = <0>; 1672 remote-endpoint = <&csi20vin7>; 1673 }; 1674 vin7csi40: endpoint@2 { 1675 reg = <2>; 1676 remote-endpoint = <&csi40vin7>; 1677 }; 1678 }; 1679 }; 1680 }; 1681 1682 drif00: rif@e6f40000 { 1683 compatible = "renesas,r8a7796-drif", 1684 "renesas,rcar-gen3-drif"; 1685 reg = <0 0xe6f40000 0 0x64>; 1686 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1687 clocks = <&cpg CPG_MOD 515>; 1688 clock-names = "fck"; 1689 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1690 dma-names = "rx", "rx"; 1691 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1692 resets = <&cpg 515>; 1693 renesas,bonding = <&drif01>; 1694 status = "disabled"; 1695 }; 1696 1697 drif01: rif@e6f50000 { 1698 compatible = "renesas,r8a7796-drif", 1699 "renesas,rcar-gen3-drif"; 1700 reg = <0 0xe6f50000 0 0x64>; 1701 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1702 clocks = <&cpg CPG_MOD 514>; 1703 clock-names = "fck"; 1704 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1705 dma-names = "rx", "rx"; 1706 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1707 resets = <&cpg 514>; 1708 renesas,bonding = <&drif00>; 1709 status = "disabled"; 1710 }; 1711 1712 drif10: rif@e6f60000 { 1713 compatible = "renesas,r8a7796-drif", 1714 "renesas,rcar-gen3-drif"; 1715 reg = <0 0xe6f60000 0 0x64>; 1716 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1717 clocks = <&cpg CPG_MOD 513>; 1718 clock-names = "fck"; 1719 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1720 dma-names = "rx", "rx"; 1721 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1722 resets = <&cpg 513>; 1723 renesas,bonding = <&drif11>; 1724 status = "disabled"; 1725 }; 1726 1727 drif11: rif@e6f70000 { 1728 compatible = "renesas,r8a7796-drif", 1729 "renesas,rcar-gen3-drif"; 1730 reg = <0 0xe6f70000 0 0x64>; 1731 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1732 clocks = <&cpg CPG_MOD 512>; 1733 clock-names = "fck"; 1734 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1735 dma-names = "rx", "rx"; 1736 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1737 resets = <&cpg 512>; 1738 renesas,bonding = <&drif10>; 1739 status = "disabled"; 1740 }; 1741 1742 drif20: rif@e6f80000 { 1743 compatible = "renesas,r8a7796-drif", 1744 "renesas,rcar-gen3-drif"; 1745 reg = <0 0xe6f80000 0 0x64>; 1746 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1747 clocks = <&cpg CPG_MOD 511>; 1748 clock-names = "fck"; 1749 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1750 dma-names = "rx", "rx"; 1751 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1752 resets = <&cpg 511>; 1753 renesas,bonding = <&drif21>; 1754 status = "disabled"; 1755 }; 1756 1757 drif21: rif@e6f90000 { 1758 compatible = "renesas,r8a7796-drif", 1759 "renesas,rcar-gen3-drif"; 1760 reg = <0 0xe6f90000 0 0x64>; 1761 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1762 clocks = <&cpg CPG_MOD 510>; 1763 clock-names = "fck"; 1764 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1765 dma-names = "rx", "rx"; 1766 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1767 resets = <&cpg 510>; 1768 renesas,bonding = <&drif20>; 1769 status = "disabled"; 1770 }; 1771 1772 drif30: rif@e6fa0000 { 1773 compatible = "renesas,r8a7796-drif", 1774 "renesas,rcar-gen3-drif"; 1775 reg = <0 0xe6fa0000 0 0x64>; 1776 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1777 clocks = <&cpg CPG_MOD 509>; 1778 clock-names = "fck"; 1779 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1780 dma-names = "rx", "rx"; 1781 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1782 resets = <&cpg 509>; 1783 renesas,bonding = <&drif31>; 1784 status = "disabled"; 1785 }; 1786 1787 drif31: rif@e6fb0000 { 1788 compatible = "renesas,r8a7796-drif", 1789 "renesas,rcar-gen3-drif"; 1790 reg = <0 0xe6fb0000 0 0x64>; 1791 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1792 clocks = <&cpg CPG_MOD 508>; 1793 clock-names = "fck"; 1794 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1795 dma-names = "rx", "rx"; 1796 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1797 resets = <&cpg 508>; 1798 renesas,bonding = <&drif30>; 1799 status = "disabled"; 1800 }; 1801 1802 rcar_sound: sound@ec500000 { 1803 /* 1804 * #sound-dai-cells is required 1805 * 1806 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1807 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1808 */ 1809 /* 1810 * #clock-cells is required for audio_clkout0/1/2/3 1811 * 1812 * clkout : #clock-cells = <0>; <&rcar_sound>; 1813 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1814 */ 1815 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1816 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1817 <0 0xec5a0000 0 0x100>, /* ADG */ 1818 <0 0xec540000 0 0x1000>, /* SSIU */ 1819 <0 0xec541000 0 0x280>, /* SSI */ 1820 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1821 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1822 1823 clocks = <&cpg CPG_MOD 1005>, 1824 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1825 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1826 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1827 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1828 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1829 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1830 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1831 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1832 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1833 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1834 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1835 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1836 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1837 <&audio_clk_a>, <&audio_clk_b>, 1838 <&audio_clk_c>, 1839 <&cpg CPG_CORE R8A7796_CLK_S0D4>; 1840 clock-names = "ssi-all", 1841 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1842 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1843 "ssi.1", "ssi.0", 1844 "src.9", "src.8", "src.7", "src.6", 1845 "src.5", "src.4", "src.3", "src.2", 1846 "src.1", "src.0", 1847 "mix.1", "mix.0", 1848 "ctu.1", "ctu.0", 1849 "dvc.0", "dvc.1", 1850 "clk_a", "clk_b", "clk_c", "clk_i"; 1851 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1852 resets = <&cpg 1005>, 1853 <&cpg 1006>, <&cpg 1007>, 1854 <&cpg 1008>, <&cpg 1009>, 1855 <&cpg 1010>, <&cpg 1011>, 1856 <&cpg 1012>, <&cpg 1013>, 1857 <&cpg 1014>, <&cpg 1015>; 1858 reset-names = "ssi-all", 1859 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1860 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1861 "ssi.1", "ssi.0"; 1862 status = "disabled"; 1863 1864 rcar_sound,ctu { 1865 ctu00: ctu-0 { }; 1866 ctu01: ctu-1 { }; 1867 ctu02: ctu-2 { }; 1868 ctu03: ctu-3 { }; 1869 ctu10: ctu-4 { }; 1870 ctu11: ctu-5 { }; 1871 ctu12: ctu-6 { }; 1872 ctu13: ctu-7 { }; 1873 }; 1874 1875 rcar_sound,dvc { 1876 dvc0: dvc-0 { 1877 dmas = <&audma1 0xbc>; 1878 dma-names = "tx"; 1879 }; 1880 dvc1: dvc-1 { 1881 dmas = <&audma1 0xbe>; 1882 dma-names = "tx"; 1883 }; 1884 }; 1885 1886 rcar_sound,mix { 1887 mix0: mix-0 { }; 1888 mix1: mix-1 { }; 1889 }; 1890 1891 rcar_sound,src { 1892 src0: src-0 { 1893 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1894 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1895 dma-names = "rx", "tx"; 1896 }; 1897 src1: src-1 { 1898 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1899 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1900 dma-names = "rx", "tx"; 1901 }; 1902 src2: src-2 { 1903 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1904 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 src3: src-3 { 1908 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1909 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1910 dma-names = "rx", "tx"; 1911 }; 1912 src4: src-4 { 1913 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1914 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1915 dma-names = "rx", "tx"; 1916 }; 1917 src5: src-5 { 1918 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1919 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1920 dma-names = "rx", "tx"; 1921 }; 1922 src6: src-6 { 1923 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1924 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 src7: src-7 { 1928 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1929 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1930 dma-names = "rx", "tx"; 1931 }; 1932 src8: src-8 { 1933 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1934 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1935 dma-names = "rx", "tx"; 1936 }; 1937 src9: src-9 { 1938 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1939 dmas = <&audma0 0x97>, <&audma1 0xba>; 1940 dma-names = "rx", "tx"; 1941 }; 1942 }; 1943 1944 rcar_sound,ssi { 1945 ssi0: ssi-0 { 1946 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1947 dmas = <&audma0 0x01>, <&audma1 0x02>; 1948 dma-names = "rx", "tx"; 1949 }; 1950 ssi1: ssi-1 { 1951 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1952 dmas = <&audma0 0x03>, <&audma1 0x04>; 1953 dma-names = "rx", "tx"; 1954 }; 1955 ssi2: ssi-2 { 1956 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1957 dmas = <&audma0 0x05>, <&audma1 0x06>; 1958 dma-names = "rx", "tx"; 1959 }; 1960 ssi3: ssi-3 { 1961 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1962 dmas = <&audma0 0x07>, <&audma1 0x08>; 1963 dma-names = "rx", "tx"; 1964 }; 1965 ssi4: ssi-4 { 1966 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1967 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1968 dma-names = "rx", "tx"; 1969 }; 1970 ssi5: ssi-5 { 1971 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1972 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1973 dma-names = "rx", "tx"; 1974 }; 1975 ssi6: ssi-6 { 1976 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1977 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1978 dma-names = "rx", "tx"; 1979 }; 1980 ssi7: ssi-7 { 1981 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1982 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1983 dma-names = "rx", "tx"; 1984 }; 1985 ssi8: ssi-8 { 1986 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1987 dmas = <&audma0 0x11>, <&audma1 0x12>; 1988 dma-names = "rx", "tx"; 1989 }; 1990 ssi9: ssi-9 { 1991 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1992 dmas = <&audma0 0x13>, <&audma1 0x14>; 1993 dma-names = "rx", "tx"; 1994 }; 1995 }; 1996 1997 rcar_sound,ssiu { 1998 ssiu00: ssiu-0 { 1999 dmas = <&audma0 0x15>, <&audma1 0x16>; 2000 dma-names = "rx", "tx"; 2001 }; 2002 ssiu01: ssiu-1 { 2003 dmas = <&audma0 0x35>, <&audma1 0x36>; 2004 dma-names = "rx", "tx"; 2005 }; 2006 ssiu02: ssiu-2 { 2007 dmas = <&audma0 0x37>, <&audma1 0x38>; 2008 dma-names = "rx", "tx"; 2009 }; 2010 ssiu03: ssiu-3 { 2011 dmas = <&audma0 0x47>, <&audma1 0x48>; 2012 dma-names = "rx", "tx"; 2013 }; 2014 ssiu04: ssiu-4 { 2015 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2016 dma-names = "rx", "tx"; 2017 }; 2018 ssiu05: ssiu-5 { 2019 dmas = <&audma0 0x43>, <&audma1 0x44>; 2020 dma-names = "rx", "tx"; 2021 }; 2022 ssiu06: ssiu-6 { 2023 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2024 dma-names = "rx", "tx"; 2025 }; 2026 ssiu07: ssiu-7 { 2027 dmas = <&audma0 0x53>, <&audma1 0x54>; 2028 dma-names = "rx", "tx"; 2029 }; 2030 ssiu10: ssiu-8 { 2031 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2032 dma-names = "rx", "tx"; 2033 }; 2034 ssiu11: ssiu-9 { 2035 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2036 dma-names = "rx", "tx"; 2037 }; 2038 ssiu12: ssiu-10 { 2039 dmas = <&audma0 0x57>, <&audma1 0x58>; 2040 dma-names = "rx", "tx"; 2041 }; 2042 ssiu13: ssiu-11 { 2043 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2044 dma-names = "rx", "tx"; 2045 }; 2046 ssiu14: ssiu-12 { 2047 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2048 dma-names = "rx", "tx"; 2049 }; 2050 ssiu15: ssiu-13 { 2051 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2052 dma-names = "rx", "tx"; 2053 }; 2054 ssiu16: ssiu-14 { 2055 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2056 dma-names = "rx", "tx"; 2057 }; 2058 ssiu17: ssiu-15 { 2059 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2060 dma-names = "rx", "tx"; 2061 }; 2062 ssiu20: ssiu-16 { 2063 dmas = <&audma0 0x63>, <&audma1 0x64>; 2064 dma-names = "rx", "tx"; 2065 }; 2066 ssiu21: ssiu-17 { 2067 dmas = <&audma0 0x67>, <&audma1 0x68>; 2068 dma-names = "rx", "tx"; 2069 }; 2070 ssiu22: ssiu-18 { 2071 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2072 dma-names = "rx", "tx"; 2073 }; 2074 ssiu23: ssiu-19 { 2075 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2076 dma-names = "rx", "tx"; 2077 }; 2078 ssiu24: ssiu-20 { 2079 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2080 dma-names = "rx", "tx"; 2081 }; 2082 ssiu25: ssiu-21 { 2083 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2084 dma-names = "rx", "tx"; 2085 }; 2086 ssiu26: ssiu-22 { 2087 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2088 dma-names = "rx", "tx"; 2089 }; 2090 ssiu27: ssiu-23 { 2091 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2092 dma-names = "rx", "tx"; 2093 }; 2094 ssiu30: ssiu-24 { 2095 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2096 dma-names = "rx", "tx"; 2097 }; 2098 ssiu31: ssiu-25 { 2099 dmas = <&audma0 0x21>, <&audma1 0x22>; 2100 dma-names = "rx", "tx"; 2101 }; 2102 ssiu32: ssiu-26 { 2103 dmas = <&audma0 0x23>, <&audma1 0x24>; 2104 dma-names = "rx", "tx"; 2105 }; 2106 ssiu33: ssiu-27 { 2107 dmas = <&audma0 0x25>, <&audma1 0x26>; 2108 dma-names = "rx", "tx"; 2109 }; 2110 ssiu34: ssiu-28 { 2111 dmas = <&audma0 0x27>, <&audma1 0x28>; 2112 dma-names = "rx", "tx"; 2113 }; 2114 ssiu35: ssiu-29 { 2115 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2116 dma-names = "rx", "tx"; 2117 }; 2118 ssiu36: ssiu-30 { 2119 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2120 dma-names = "rx", "tx"; 2121 }; 2122 ssiu37: ssiu-31 { 2123 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2124 dma-names = "rx", "tx"; 2125 }; 2126 ssiu40: ssiu-32 { 2127 dmas = <&audma0 0x71>, <&audma1 0x72>; 2128 dma-names = "rx", "tx"; 2129 }; 2130 ssiu41: ssiu-33 { 2131 dmas = <&audma0 0x17>, <&audma1 0x18>; 2132 dma-names = "rx", "tx"; 2133 }; 2134 ssiu42: ssiu-34 { 2135 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2136 dma-names = "rx", "tx"; 2137 }; 2138 ssiu43: ssiu-35 { 2139 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2140 dma-names = "rx", "tx"; 2141 }; 2142 ssiu44: ssiu-36 { 2143 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2144 dma-names = "rx", "tx"; 2145 }; 2146 ssiu45: ssiu-37 { 2147 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2148 dma-names = "rx", "tx"; 2149 }; 2150 ssiu46: ssiu-38 { 2151 dmas = <&audma0 0x31>, <&audma1 0x32>; 2152 dma-names = "rx", "tx"; 2153 }; 2154 ssiu47: ssiu-39 { 2155 dmas = <&audma0 0x33>, <&audma1 0x34>; 2156 dma-names = "rx", "tx"; 2157 }; 2158 ssiu50: ssiu-40 { 2159 dmas = <&audma0 0x73>, <&audma1 0x74>; 2160 dma-names = "rx", "tx"; 2161 }; 2162 ssiu60: ssiu-41 { 2163 dmas = <&audma0 0x75>, <&audma1 0x76>; 2164 dma-names = "rx", "tx"; 2165 }; 2166 ssiu70: ssiu-42 { 2167 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2168 dma-names = "rx", "tx"; 2169 }; 2170 ssiu80: ssiu-43 { 2171 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2172 dma-names = "rx", "tx"; 2173 }; 2174 ssiu90: ssiu-44 { 2175 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2176 dma-names = "rx", "tx"; 2177 }; 2178 ssiu91: ssiu-45 { 2179 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2180 dma-names = "rx", "tx"; 2181 }; 2182 ssiu92: ssiu-46 { 2183 dmas = <&audma0 0x81>, <&audma1 0x82>; 2184 dma-names = "rx", "tx"; 2185 }; 2186 ssiu93: ssiu-47 { 2187 dmas = <&audma0 0x83>, <&audma1 0x84>; 2188 dma-names = "rx", "tx"; 2189 }; 2190 ssiu94: ssiu-48 { 2191 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2192 dma-names = "rx", "tx"; 2193 }; 2194 ssiu95: ssiu-49 { 2195 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2196 dma-names = "rx", "tx"; 2197 }; 2198 ssiu96: ssiu-50 { 2199 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2200 dma-names = "rx", "tx"; 2201 }; 2202 ssiu97: ssiu-51 { 2203 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2204 dma-names = "rx", "tx"; 2205 }; 2206 }; 2207 }; 2208 2209 audma0: dma-controller@ec700000 { 2210 compatible = "renesas,dmac-r8a7796", 2211 "renesas,rcar-dmac"; 2212 reg = <0 0xec700000 0 0x10000>; 2213 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2214 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2215 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2216 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2217 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2218 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2219 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2220 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2221 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2222 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2223 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2224 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2225 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2226 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2227 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2228 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2229 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2230 interrupt-names = "error", 2231 "ch0", "ch1", "ch2", "ch3", 2232 "ch4", "ch5", "ch6", "ch7", 2233 "ch8", "ch9", "ch10", "ch11", 2234 "ch12", "ch13", "ch14", "ch15"; 2235 clocks = <&cpg CPG_MOD 502>; 2236 clock-names = "fck"; 2237 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2238 resets = <&cpg 502>; 2239 #dma-cells = <1>; 2240 dma-channels = <16>; 2241 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2242 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2243 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2244 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2245 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2246 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2247 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2248 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2249 }; 2250 2251 audma1: dma-controller@ec720000 { 2252 compatible = "renesas,dmac-r8a7796", 2253 "renesas,rcar-dmac"; 2254 reg = <0 0xec720000 0 0x10000>; 2255 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2256 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2257 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2258 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2259 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2260 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2261 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2262 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2263 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2264 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2265 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2266 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2267 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2268 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2269 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2270 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2271 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2272 interrupt-names = "error", 2273 "ch0", "ch1", "ch2", "ch3", 2274 "ch4", "ch5", "ch6", "ch7", 2275 "ch8", "ch9", "ch10", "ch11", 2276 "ch12", "ch13", "ch14", "ch15"; 2277 clocks = <&cpg CPG_MOD 501>; 2278 clock-names = "fck"; 2279 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2280 resets = <&cpg 501>; 2281 #dma-cells = <1>; 2282 dma-channels = <16>; 2283 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2284 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2285 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2286 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2287 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2288 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2289 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2290 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2291 }; 2292 2293 xhci0: usb@ee000000 { 2294 compatible = "renesas,xhci-r8a7796", 2295 "renesas,rcar-gen3-xhci"; 2296 reg = <0 0xee000000 0 0xc00>; 2297 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2298 clocks = <&cpg CPG_MOD 328>; 2299 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2300 resets = <&cpg 328>; 2301 status = "disabled"; 2302 }; 2303 2304 usb3_peri0: usb@ee020000 { 2305 compatible = "renesas,r8a7796-usb3-peri", 2306 "renesas,rcar-gen3-usb3-peri"; 2307 reg = <0 0xee020000 0 0x400>; 2308 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2309 clocks = <&cpg CPG_MOD 328>; 2310 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2311 resets = <&cpg 328>; 2312 status = "disabled"; 2313 }; 2314 2315 ohci0: usb@ee080000 { 2316 compatible = "generic-ohci"; 2317 reg = <0 0xee080000 0 0x100>; 2318 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2319 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2320 phys = <&usb2_phy0 1>; 2321 phy-names = "usb"; 2322 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2323 resets = <&cpg 703>, <&cpg 704>; 2324 status = "disabled"; 2325 }; 2326 2327 ohci1: usb@ee0a0000 { 2328 compatible = "generic-ohci"; 2329 reg = <0 0xee0a0000 0 0x100>; 2330 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2331 clocks = <&cpg CPG_MOD 702>; 2332 phys = <&usb2_phy1 1>; 2333 phy-names = "usb"; 2334 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2335 resets = <&cpg 702>; 2336 status = "disabled"; 2337 }; 2338 2339 ehci0: usb@ee080100 { 2340 compatible = "generic-ehci"; 2341 reg = <0 0xee080100 0 0x100>; 2342 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2343 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2344 phys = <&usb2_phy0 2>; 2345 phy-names = "usb"; 2346 companion = <&ohci0>; 2347 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2348 resets = <&cpg 703>, <&cpg 704>; 2349 status = "disabled"; 2350 }; 2351 2352 ehci1: usb@ee0a0100 { 2353 compatible = "generic-ehci"; 2354 reg = <0 0xee0a0100 0 0x100>; 2355 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2356 clocks = <&cpg CPG_MOD 702>; 2357 phys = <&usb2_phy1 2>; 2358 phy-names = "usb"; 2359 companion = <&ohci1>; 2360 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2361 resets = <&cpg 702>; 2362 status = "disabled"; 2363 }; 2364 2365 usb2_phy0: usb-phy@ee080200 { 2366 compatible = "renesas,usb2-phy-r8a7796", 2367 "renesas,rcar-gen3-usb2-phy"; 2368 reg = <0 0xee080200 0 0x700>; 2369 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2370 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2371 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2372 resets = <&cpg 703>, <&cpg 704>; 2373 #phy-cells = <1>; 2374 status = "disabled"; 2375 }; 2376 2377 usb2_phy1: usb-phy@ee0a0200 { 2378 compatible = "renesas,usb2-phy-r8a7796", 2379 "renesas,rcar-gen3-usb2-phy"; 2380 reg = <0 0xee0a0200 0 0x700>; 2381 clocks = <&cpg CPG_MOD 702>; 2382 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2383 resets = <&cpg 702>; 2384 #phy-cells = <1>; 2385 status = "disabled"; 2386 }; 2387 2388 sdhi0: sd@ee100000 { 2389 compatible = "renesas,sdhi-r8a7796", 2390 "renesas,rcar-gen3-sdhi"; 2391 reg = <0 0xee100000 0 0x2000>; 2392 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2393 clocks = <&cpg CPG_MOD 314>; 2394 max-frequency = <200000000>; 2395 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2396 resets = <&cpg 314>; 2397 iommus = <&ipmmu_ds1 32>; 2398 status = "disabled"; 2399 }; 2400 2401 sdhi1: sd@ee120000 { 2402 compatible = "renesas,sdhi-r8a7796", 2403 "renesas,rcar-gen3-sdhi"; 2404 reg = <0 0xee120000 0 0x2000>; 2405 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2406 clocks = <&cpg CPG_MOD 313>; 2407 max-frequency = <200000000>; 2408 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2409 resets = <&cpg 313>; 2410 iommus = <&ipmmu_ds1 33>; 2411 status = "disabled"; 2412 }; 2413 2414 sdhi2: sd@ee140000 { 2415 compatible = "renesas,sdhi-r8a7796", 2416 "renesas,rcar-gen3-sdhi"; 2417 reg = <0 0xee140000 0 0x2000>; 2418 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2419 clocks = <&cpg CPG_MOD 312>; 2420 max-frequency = <200000000>; 2421 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2422 resets = <&cpg 312>; 2423 iommus = <&ipmmu_ds1 34>; 2424 status = "disabled"; 2425 }; 2426 2427 sdhi3: sd@ee160000 { 2428 compatible = "renesas,sdhi-r8a7796", 2429 "renesas,rcar-gen3-sdhi"; 2430 reg = <0 0xee160000 0 0x2000>; 2431 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2432 clocks = <&cpg CPG_MOD 311>; 2433 max-frequency = <200000000>; 2434 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2435 resets = <&cpg 311>; 2436 iommus = <&ipmmu_ds1 35>; 2437 status = "disabled"; 2438 }; 2439 2440 gic: interrupt-controller@f1010000 { 2441 compatible = "arm,gic-400"; 2442 #interrupt-cells = <3>; 2443 #address-cells = <0>; 2444 interrupt-controller; 2445 reg = <0x0 0xf1010000 0 0x1000>, 2446 <0x0 0xf1020000 0 0x20000>, 2447 <0x0 0xf1040000 0 0x20000>, 2448 <0x0 0xf1060000 0 0x20000>; 2449 interrupts = <GIC_PPI 9 2450 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2451 clocks = <&cpg CPG_MOD 408>; 2452 clock-names = "clk"; 2453 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2454 resets = <&cpg 408>; 2455 }; 2456 2457 pciec0: pcie@fe000000 { 2458 compatible = "renesas,pcie-r8a7796", 2459 "renesas,pcie-rcar-gen3"; 2460 reg = <0 0xfe000000 0 0x80000>; 2461 #address-cells = <3>; 2462 #size-cells = <2>; 2463 bus-range = <0x00 0xff>; 2464 device_type = "pci"; 2465 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2466 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2467 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2468 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2469 /* Map all possible DDR as inbound ranges */ 2470 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2471 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2472 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2473 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2474 #interrupt-cells = <1>; 2475 interrupt-map-mask = <0 0 0 0>; 2476 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2477 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2478 clock-names = "pcie", "pcie_bus"; 2479 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2480 resets = <&cpg 319>; 2481 status = "disabled"; 2482 }; 2483 2484 pciec1: pcie@ee800000 { 2485 compatible = "renesas,pcie-r8a7796", 2486 "renesas,pcie-rcar-gen3"; 2487 reg = <0 0xee800000 0 0x80000>; 2488 #address-cells = <3>; 2489 #size-cells = <2>; 2490 bus-range = <0x00 0xff>; 2491 device_type = "pci"; 2492 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2493 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2494 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2495 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2496 /* Map all possible DDR as inbound ranges */ 2497 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2498 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2499 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2500 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2501 #interrupt-cells = <1>; 2502 interrupt-map-mask = <0 0 0 0>; 2503 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2504 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2505 clock-names = "pcie", "pcie_bus"; 2506 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2507 resets = <&cpg 318>; 2508 status = "disabled"; 2509 }; 2510 2511 imr-lx4@fe860000 { 2512 compatible = "renesas,r8a7796-imr-lx4", 2513 "renesas,imr-lx4"; 2514 reg = <0 0xfe860000 0 0x2000>; 2515 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2516 clocks = <&cpg CPG_MOD 823>; 2517 power-domains = <&sysc R8A7796_PD_A3VC>; 2518 resets = <&cpg 823>; 2519 }; 2520 2521 imr-lx4@fe870000 { 2522 compatible = "renesas,r8a7796-imr-lx4", 2523 "renesas,imr-lx4"; 2524 reg = <0 0xfe870000 0 0x2000>; 2525 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2526 clocks = <&cpg CPG_MOD 822>; 2527 power-domains = <&sysc R8A7796_PD_A3VC>; 2528 resets = <&cpg 822>; 2529 }; 2530 2531 fdp1@fe940000 { 2532 compatible = "renesas,fdp1"; 2533 reg = <0 0xfe940000 0 0x2400>; 2534 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2535 clocks = <&cpg CPG_MOD 119>; 2536 power-domains = <&sysc R8A7796_PD_A3VC>; 2537 resets = <&cpg 119>; 2538 renesas,fcp = <&fcpf0>; 2539 }; 2540 2541 fcpf0: fcp@fe950000 { 2542 compatible = "renesas,fcpf"; 2543 reg = <0 0xfe950000 0 0x200>; 2544 clocks = <&cpg CPG_MOD 615>; 2545 power-domains = <&sysc R8A7796_PD_A3VC>; 2546 resets = <&cpg 615>; 2547 }; 2548 2549 fcpvb0: fcp@fe96f000 { 2550 compatible = "renesas,fcpv"; 2551 reg = <0 0xfe96f000 0 0x200>; 2552 clocks = <&cpg CPG_MOD 607>; 2553 power-domains = <&sysc R8A7796_PD_A3VC>; 2554 resets = <&cpg 607>; 2555 }; 2556 2557 fcpvi0: fcp@fe9af000 { 2558 compatible = "renesas,fcpv"; 2559 reg = <0 0xfe9af000 0 0x200>; 2560 clocks = <&cpg CPG_MOD 611>; 2561 power-domains = <&sysc R8A7796_PD_A3VC>; 2562 resets = <&cpg 611>; 2563 iommus = <&ipmmu_vc0 19>; 2564 }; 2565 2566 fcpvd0: fcp@fea27000 { 2567 compatible = "renesas,fcpv"; 2568 reg = <0 0xfea27000 0 0x200>; 2569 clocks = <&cpg CPG_MOD 603>; 2570 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2571 resets = <&cpg 603>; 2572 iommus = <&ipmmu_vi0 8>; 2573 }; 2574 2575 fcpvd1: fcp@fea2f000 { 2576 compatible = "renesas,fcpv"; 2577 reg = <0 0xfea2f000 0 0x200>; 2578 clocks = <&cpg CPG_MOD 602>; 2579 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2580 resets = <&cpg 602>; 2581 iommus = <&ipmmu_vi0 9>; 2582 }; 2583 2584 fcpvd2: fcp@fea37000 { 2585 compatible = "renesas,fcpv"; 2586 reg = <0 0xfea37000 0 0x200>; 2587 clocks = <&cpg CPG_MOD 601>; 2588 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2589 resets = <&cpg 601>; 2590 iommus = <&ipmmu_vi0 10>; 2591 }; 2592 2593 vspb: vsp@fe960000 { 2594 compatible = "renesas,vsp2"; 2595 reg = <0 0xfe960000 0 0x8000>; 2596 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2597 clocks = <&cpg CPG_MOD 626>; 2598 power-domains = <&sysc R8A7796_PD_A3VC>; 2599 resets = <&cpg 626>; 2600 2601 renesas,fcp = <&fcpvb0>; 2602 }; 2603 2604 vspd0: vsp@fea20000 { 2605 compatible = "renesas,vsp2"; 2606 reg = <0 0xfea20000 0 0x5000>; 2607 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2608 clocks = <&cpg CPG_MOD 623>; 2609 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2610 resets = <&cpg 623>; 2611 2612 renesas,fcp = <&fcpvd0>; 2613 }; 2614 2615 vspd1: vsp@fea28000 { 2616 compatible = "renesas,vsp2"; 2617 reg = <0 0xfea28000 0 0x5000>; 2618 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2619 clocks = <&cpg CPG_MOD 622>; 2620 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2621 resets = <&cpg 622>; 2622 2623 renesas,fcp = <&fcpvd1>; 2624 }; 2625 2626 vspd2: vsp@fea30000 { 2627 compatible = "renesas,vsp2"; 2628 reg = <0 0xfea30000 0 0x5000>; 2629 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2630 clocks = <&cpg CPG_MOD 621>; 2631 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2632 resets = <&cpg 621>; 2633 2634 renesas,fcp = <&fcpvd2>; 2635 }; 2636 2637 vspi0: vsp@fe9a0000 { 2638 compatible = "renesas,vsp2"; 2639 reg = <0 0xfe9a0000 0 0x8000>; 2640 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2641 clocks = <&cpg CPG_MOD 631>; 2642 power-domains = <&sysc R8A7796_PD_A3VC>; 2643 resets = <&cpg 631>; 2644 2645 renesas,fcp = <&fcpvi0>; 2646 }; 2647 2648 cmm0: cmm@fea40000 { 2649 compatible = "renesas,r8a7796-cmm", 2650 "renesas,rcar-gen3-cmm"; 2651 reg = <0 0xfea40000 0 0x1000>; 2652 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2653 clocks = <&cpg CPG_MOD 711>; 2654 resets = <&cpg 711>; 2655 }; 2656 2657 cmm1: cmm@fea50000 { 2658 compatible = "renesas,r8a7796-cmm", 2659 "renesas,rcar-gen3-cmm"; 2660 reg = <0 0xfea50000 0 0x1000>; 2661 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2662 clocks = <&cpg CPG_MOD 710>; 2663 resets = <&cpg 710>; 2664 }; 2665 2666 cmm2: cmm@fea60000 { 2667 compatible = "renesas,r8a7796-cmm", 2668 "renesas,rcar-gen3-cmm"; 2669 reg = <0 0xfea60000 0 0x1000>; 2670 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2671 clocks = <&cpg CPG_MOD 709>; 2672 resets = <&cpg 709>; 2673 }; 2674 2675 csi20: csi2@fea80000 { 2676 compatible = "renesas,r8a7796-csi2"; 2677 reg = <0 0xfea80000 0 0x10000>; 2678 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2679 clocks = <&cpg CPG_MOD 714>; 2680 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2681 resets = <&cpg 714>; 2682 status = "disabled"; 2683 2684 ports { 2685 #address-cells = <1>; 2686 #size-cells = <0>; 2687 2688 port@1 { 2689 #address-cells = <1>; 2690 #size-cells = <0>; 2691 2692 reg = <1>; 2693 2694 csi20vin0: endpoint@0 { 2695 reg = <0>; 2696 remote-endpoint = <&vin0csi20>; 2697 }; 2698 csi20vin1: endpoint@1 { 2699 reg = <1>; 2700 remote-endpoint = <&vin1csi20>; 2701 }; 2702 csi20vin2: endpoint@2 { 2703 reg = <2>; 2704 remote-endpoint = <&vin2csi20>; 2705 }; 2706 csi20vin3: endpoint@3 { 2707 reg = <3>; 2708 remote-endpoint = <&vin3csi20>; 2709 }; 2710 csi20vin4: endpoint@4 { 2711 reg = <4>; 2712 remote-endpoint = <&vin4csi20>; 2713 }; 2714 csi20vin5: endpoint@5 { 2715 reg = <5>; 2716 remote-endpoint = <&vin5csi20>; 2717 }; 2718 csi20vin6: endpoint@6 { 2719 reg = <6>; 2720 remote-endpoint = <&vin6csi20>; 2721 }; 2722 csi20vin7: endpoint@7 { 2723 reg = <7>; 2724 remote-endpoint = <&vin7csi20>; 2725 }; 2726 }; 2727 }; 2728 }; 2729 2730 csi40: csi2@feaa0000 { 2731 compatible = "renesas,r8a7796-csi2"; 2732 reg = <0 0xfeaa0000 0 0x10000>; 2733 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2734 clocks = <&cpg CPG_MOD 716>; 2735 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2736 resets = <&cpg 716>; 2737 status = "disabled"; 2738 2739 ports { 2740 #address-cells = <1>; 2741 #size-cells = <0>; 2742 2743 port@1 { 2744 #address-cells = <1>; 2745 #size-cells = <0>; 2746 2747 reg = <1>; 2748 2749 csi40vin0: endpoint@0 { 2750 reg = <0>; 2751 remote-endpoint = <&vin0csi40>; 2752 }; 2753 csi40vin1: endpoint@1 { 2754 reg = <1>; 2755 remote-endpoint = <&vin1csi40>; 2756 }; 2757 csi40vin2: endpoint@2 { 2758 reg = <2>; 2759 remote-endpoint = <&vin2csi40>; 2760 }; 2761 csi40vin3: endpoint@3 { 2762 reg = <3>; 2763 remote-endpoint = <&vin3csi40>; 2764 }; 2765 csi40vin4: endpoint@4 { 2766 reg = <4>; 2767 remote-endpoint = <&vin4csi40>; 2768 }; 2769 csi40vin5: endpoint@5 { 2770 reg = <5>; 2771 remote-endpoint = <&vin5csi40>; 2772 }; 2773 csi40vin6: endpoint@6 { 2774 reg = <6>; 2775 remote-endpoint = <&vin6csi40>; 2776 }; 2777 csi40vin7: endpoint@7 { 2778 reg = <7>; 2779 remote-endpoint = <&vin7csi40>; 2780 }; 2781 }; 2782 2783 }; 2784 }; 2785 2786 hdmi0: hdmi@fead0000 { 2787 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; 2788 reg = <0 0xfead0000 0 0x10000>; 2789 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2790 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; 2791 clock-names = "iahb", "isfr"; 2792 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2793 resets = <&cpg 729>; 2794 status = "disabled"; 2795 2796 ports { 2797 #address-cells = <1>; 2798 #size-cells = <0>; 2799 port@0 { 2800 reg = <0>; 2801 dw_hdmi0_in: endpoint { 2802 remote-endpoint = <&du_out_hdmi0>; 2803 }; 2804 }; 2805 port@1 { 2806 reg = <1>; 2807 }; 2808 port@2 { 2809 /* HDMI sound */ 2810 reg = <2>; 2811 }; 2812 }; 2813 }; 2814 2815 du: display@feb00000 { 2816 compatible = "renesas,du-r8a7796"; 2817 reg = <0 0xfeb00000 0 0x70000>; 2818 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2819 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2820 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2821 clocks = <&cpg CPG_MOD 724>, 2822 <&cpg CPG_MOD 723>, 2823 <&cpg CPG_MOD 722>; 2824 clock-names = "du.0", "du.1", "du.2"; 2825 2826 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>; 2827 vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2828 2829 status = "disabled"; 2830 2831 ports { 2832 #address-cells = <1>; 2833 #size-cells = <0>; 2834 2835 port@0 { 2836 reg = <0>; 2837 du_out_rgb: endpoint { 2838 }; 2839 }; 2840 port@1 { 2841 reg = <1>; 2842 du_out_hdmi0: endpoint { 2843 remote-endpoint = <&dw_hdmi0_in>; 2844 }; 2845 }; 2846 port@2 { 2847 reg = <2>; 2848 du_out_lvds0: endpoint { 2849 remote-endpoint = <&lvds0_in>; 2850 }; 2851 }; 2852 }; 2853 }; 2854 2855 lvds0: lvds@feb90000 { 2856 compatible = "renesas,r8a7796-lvds"; 2857 reg = <0 0xfeb90000 0 0x14>; 2858 clocks = <&cpg CPG_MOD 727>; 2859 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2860 resets = <&cpg 727>; 2861 status = "disabled"; 2862 2863 ports { 2864 #address-cells = <1>; 2865 #size-cells = <0>; 2866 2867 port@0 { 2868 reg = <0>; 2869 lvds0_in: endpoint { 2870 remote-endpoint = <&du_out_lvds0>; 2871 }; 2872 }; 2873 port@1 { 2874 reg = <1>; 2875 lvds0_out: endpoint { 2876 }; 2877 }; 2878 }; 2879 }; 2880 2881 prr: chipid@fff00044 { 2882 compatible = "renesas,prr"; 2883 reg = <0 0xfff00044 0 4>; 2884 }; 2885 }; 2886 2887 thermal-zones { 2888 sensor_thermal1: sensor-thermal1 { 2889 polling-delay-passive = <250>; 2890 polling-delay = <1000>; 2891 thermal-sensors = <&tsc 0>; 2892 sustainable-power = <3874>; 2893 2894 trips { 2895 sensor1_crit: sensor1-crit { 2896 temperature = <120000>; 2897 hysteresis = <1000>; 2898 type = "critical"; 2899 }; 2900 }; 2901 }; 2902 2903 sensor_thermal2: sensor-thermal2 { 2904 polling-delay-passive = <250>; 2905 polling-delay = <1000>; 2906 thermal-sensors = <&tsc 1>; 2907 sustainable-power = <3874>; 2908 2909 trips { 2910 sensor2_crit: sensor2-crit { 2911 temperature = <120000>; 2912 hysteresis = <1000>; 2913 type = "critical"; 2914 }; 2915 }; 2916 }; 2917 2918 sensor_thermal3: sensor-thermal3 { 2919 polling-delay-passive = <250>; 2920 polling-delay = <1000>; 2921 thermal-sensors = <&tsc 2>; 2922 sustainable-power = <3874>; 2923 2924 cooling-maps { 2925 map0 { 2926 trip = <&target>; 2927 cooling-device = <&a57_0 2 4>; 2928 contribution = <1024>; 2929 }; 2930 map1 { 2931 trip = <&target>; 2932 cooling-device = <&a53_0 0 2>; 2933 contribution = <1024>; 2934 }; 2935 }; 2936 trips { 2937 target: trip-point1 { 2938 temperature = <100000>; 2939 hysteresis = <1000>; 2940 type = "passive"; 2941 }; 2942 2943 sensor3_crit: sensor3-crit { 2944 temperature = <120000>; 2945 hysteresis = <1000>; 2946 type = "critical"; 2947 }; 2948 }; 2949 }; 2950 }; 2951 2952 timer { 2953 compatible = "arm,armv8-timer"; 2954 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2955 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2956 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2957 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 2958 }; 2959 2960 /* External USB clocks - can be overridden by the board */ 2961 usb3s0_clk: usb3s0 { 2962 compatible = "fixed-clock"; 2963 #clock-cells = <0>; 2964 clock-frequency = <0>; 2965 }; 2966 2967 usb_extal_clk: usb_extal { 2968 compatible = "fixed-clock"; 2969 #clock-cells = <0>; 2970 clock-frequency = <0>; 2971 }; 2972}; 2973