1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7796-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a7796"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c_dvfs; 28 }; 29 30 /* 31 * The external audio clocks are configured as 0 Hz fixed frequency 32 * clocks by default. 33 * Boards that provide audio clocks should override them. 34 */ 35 audio_clk_a: audio_clk_a { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_b: audio_clk_b { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 audio_clk_c: audio_clk_c { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 /* External CAN clock - to be overridden by boards that provide it */ 54 can_clk: can { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 cluster0_opp: opp_table0 { 61 compatible = "operating-points-v2"; 62 opp-shared; 63 64 opp-500000000 { 65 opp-hz = /bits/ 64 <500000000>; 66 opp-microvolt = <820000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1000000000 { 70 opp-hz = /bits/ 64 <1000000000>; 71 opp-microvolt = <820000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1500000000 { 75 opp-hz = /bits/ 64 <1500000000>; 76 opp-microvolt = <820000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1600000000 { 80 opp-hz = /bits/ 64 <1600000000>; 81 opp-microvolt = <900000>; 82 clock-latency-ns = <300000>; 83 turbo-mode; 84 }; 85 opp-1700000000 { 86 opp-hz = /bits/ 64 <1700000000>; 87 opp-microvolt = <900000>; 88 clock-latency-ns = <300000>; 89 turbo-mode; 90 }; 91 opp-1800000000 { 92 opp-hz = /bits/ 64 <1800000000>; 93 opp-microvolt = <960000>; 94 clock-latency-ns = <300000>; 95 turbo-mode; 96 }; 97 }; 98 99 cluster1_opp: opp_table1 { 100 compatible = "operating-points-v2"; 101 opp-shared; 102 103 opp-800000000 { 104 opp-hz = /bits/ 64 <800000000>; 105 opp-microvolt = <820000>; 106 clock-latency-ns = <300000>; 107 }; 108 opp-1000000000 { 109 opp-hz = /bits/ 64 <1000000000>; 110 opp-microvolt = <820000>; 111 clock-latency-ns = <300000>; 112 }; 113 opp-1200000000 { 114 opp-hz = /bits/ 64 <1200000000>; 115 opp-microvolt = <820000>; 116 clock-latency-ns = <300000>; 117 }; 118 opp-1300000000 { 119 opp-hz = /bits/ 64 <1300000000>; 120 opp-microvolt = <820000>; 121 clock-latency-ns = <300000>; 122 turbo-mode; 123 }; 124 }; 125 126 cpus { 127 #address-cells = <1>; 128 #size-cells = <0>; 129 130 cpu-map { 131 cluster0 { 132 core0 { 133 cpu = <&a57_0>; 134 }; 135 core1 { 136 cpu = <&a57_1>; 137 }; 138 }; 139 140 cluster1 { 141 core0 { 142 cpu = <&a53_0>; 143 }; 144 core1 { 145 cpu = <&a53_1>; 146 }; 147 core2 { 148 cpu = <&a53_2>; 149 }; 150 core3 { 151 cpu = <&a53_3>; 152 }; 153 }; 154 }; 155 156 a57_0: cpu@0 { 157 compatible = "arm,cortex-a57"; 158 reg = <0x0>; 159 device_type = "cpu"; 160 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 161 next-level-cache = <&L2_CA57>; 162 enable-method = "psci"; 163 cpu-idle-states = <&CPU_SLEEP_0>; 164 dynamic-power-coefficient = <854>; 165 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 166 operating-points-v2 = <&cluster0_opp>; 167 capacity-dmips-mhz = <1024>; 168 #cooling-cells = <2>; 169 }; 170 171 a57_1: cpu@1 { 172 compatible = "arm,cortex-a57"; 173 reg = <0x1>; 174 device_type = "cpu"; 175 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 176 next-level-cache = <&L2_CA57>; 177 enable-method = "psci"; 178 cpu-idle-states = <&CPU_SLEEP_0>; 179 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 180 operating-points-v2 = <&cluster0_opp>; 181 capacity-dmips-mhz = <1024>; 182 #cooling-cells = <2>; 183 }; 184 185 a53_0: cpu@100 { 186 compatible = "arm,cortex-a53"; 187 reg = <0x100>; 188 device_type = "cpu"; 189 power-domains = <&sysc R8A7796_PD_CA53_CPU0>; 190 next-level-cache = <&L2_CA53>; 191 enable-method = "psci"; 192 cpu-idle-states = <&CPU_SLEEP_1>; 193 #cooling-cells = <2>; 194 dynamic-power-coefficient = <277>; 195 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 196 operating-points-v2 = <&cluster1_opp>; 197 capacity-dmips-mhz = <535>; 198 }; 199 200 a53_1: cpu@101 { 201 compatible = "arm,cortex-a53"; 202 reg = <0x101>; 203 device_type = "cpu"; 204 power-domains = <&sysc R8A7796_PD_CA53_CPU1>; 205 next-level-cache = <&L2_CA53>; 206 enable-method = "psci"; 207 cpu-idle-states = <&CPU_SLEEP_1>; 208 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 209 operating-points-v2 = <&cluster1_opp>; 210 capacity-dmips-mhz = <535>; 211 }; 212 213 a53_2: cpu@102 { 214 compatible = "arm,cortex-a53"; 215 reg = <0x102>; 216 device_type = "cpu"; 217 power-domains = <&sysc R8A7796_PD_CA53_CPU2>; 218 next-level-cache = <&L2_CA53>; 219 enable-method = "psci"; 220 cpu-idle-states = <&CPU_SLEEP_1>; 221 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 222 operating-points-v2 = <&cluster1_opp>; 223 capacity-dmips-mhz = <535>; 224 }; 225 226 a53_3: cpu@103 { 227 compatible = "arm,cortex-a53"; 228 reg = <0x103>; 229 device_type = "cpu"; 230 power-domains = <&sysc R8A7796_PD_CA53_CPU3>; 231 next-level-cache = <&L2_CA53>; 232 enable-method = "psci"; 233 cpu-idle-states = <&CPU_SLEEP_1>; 234 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 235 operating-points-v2 = <&cluster1_opp>; 236 capacity-dmips-mhz = <535>; 237 }; 238 239 L2_CA57: cache-controller-0 { 240 compatible = "cache"; 241 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 242 cache-unified; 243 cache-level = <2>; 244 }; 245 246 L2_CA53: cache-controller-1 { 247 compatible = "cache"; 248 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 249 cache-unified; 250 cache-level = <2>; 251 }; 252 253 idle-states { 254 entry-method = "psci"; 255 256 CPU_SLEEP_0: cpu-sleep-0 { 257 compatible = "arm,idle-state"; 258 arm,psci-suspend-param = <0x0010000>; 259 local-timer-stop; 260 entry-latency-us = <400>; 261 exit-latency-us = <500>; 262 min-residency-us = <4000>; 263 }; 264 265 CPU_SLEEP_1: cpu-sleep-1 { 266 compatible = "arm,idle-state"; 267 arm,psci-suspend-param = <0x0010000>; 268 local-timer-stop; 269 entry-latency-us = <700>; 270 exit-latency-us = <700>; 271 min-residency-us = <5000>; 272 }; 273 }; 274 }; 275 276 extal_clk: extal { 277 compatible = "fixed-clock"; 278 #clock-cells = <0>; 279 /* This value must be overridden by the board */ 280 clock-frequency = <0>; 281 }; 282 283 extalr_clk: extalr { 284 compatible = "fixed-clock"; 285 #clock-cells = <0>; 286 /* This value must be overridden by the board */ 287 clock-frequency = <0>; 288 }; 289 290 /* External PCIe clock - can be overridden by the board */ 291 pcie_bus_clk: pcie_bus { 292 compatible = "fixed-clock"; 293 #clock-cells = <0>; 294 clock-frequency = <0>; 295 }; 296 297 pmu_a53 { 298 compatible = "arm,cortex-a53-pmu"; 299 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 300 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 301 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 302 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 303 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 304 }; 305 306 pmu_a57 { 307 compatible = "arm,cortex-a57-pmu"; 308 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 309 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 310 interrupt-affinity = <&a57_0>, <&a57_1>; 311 }; 312 313 psci { 314 compatible = "arm,psci-1.0", "arm,psci-0.2"; 315 method = "smc"; 316 }; 317 318 /* External SCIF clock - to be overridden by boards that provide it */ 319 scif_clk: scif { 320 compatible = "fixed-clock"; 321 #clock-cells = <0>; 322 clock-frequency = <0>; 323 }; 324 325 soc { 326 compatible = "simple-bus"; 327 interrupt-parent = <&gic>; 328 #address-cells = <2>; 329 #size-cells = <2>; 330 ranges; 331 332 rwdt: watchdog@e6020000 { 333 compatible = "renesas,r8a7796-wdt", 334 "renesas,rcar-gen3-wdt"; 335 reg = <0 0xe6020000 0 0x0c>; 336 clocks = <&cpg CPG_MOD 402>; 337 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 338 resets = <&cpg 402>; 339 status = "disabled"; 340 }; 341 342 gpio0: gpio@e6050000 { 343 compatible = "renesas,gpio-r8a7796", 344 "renesas,rcar-gen3-gpio"; 345 reg = <0 0xe6050000 0 0x50>; 346 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 347 #gpio-cells = <2>; 348 gpio-controller; 349 gpio-ranges = <&pfc 0 0 16>; 350 #interrupt-cells = <2>; 351 interrupt-controller; 352 clocks = <&cpg CPG_MOD 912>; 353 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 354 resets = <&cpg 912>; 355 }; 356 357 gpio1: gpio@e6051000 { 358 compatible = "renesas,gpio-r8a7796", 359 "renesas,rcar-gen3-gpio"; 360 reg = <0 0xe6051000 0 0x50>; 361 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 362 #gpio-cells = <2>; 363 gpio-controller; 364 gpio-ranges = <&pfc 0 32 29>; 365 #interrupt-cells = <2>; 366 interrupt-controller; 367 clocks = <&cpg CPG_MOD 911>; 368 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 369 resets = <&cpg 911>; 370 }; 371 372 gpio2: gpio@e6052000 { 373 compatible = "renesas,gpio-r8a7796", 374 "renesas,rcar-gen3-gpio"; 375 reg = <0 0xe6052000 0 0x50>; 376 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 377 #gpio-cells = <2>; 378 gpio-controller; 379 gpio-ranges = <&pfc 0 64 15>; 380 #interrupt-cells = <2>; 381 interrupt-controller; 382 clocks = <&cpg CPG_MOD 910>; 383 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 384 resets = <&cpg 910>; 385 }; 386 387 gpio3: gpio@e6053000 { 388 compatible = "renesas,gpio-r8a7796", 389 "renesas,rcar-gen3-gpio"; 390 reg = <0 0xe6053000 0 0x50>; 391 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 392 #gpio-cells = <2>; 393 gpio-controller; 394 gpio-ranges = <&pfc 0 96 16>; 395 #interrupt-cells = <2>; 396 interrupt-controller; 397 clocks = <&cpg CPG_MOD 909>; 398 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 399 resets = <&cpg 909>; 400 }; 401 402 gpio4: gpio@e6054000 { 403 compatible = "renesas,gpio-r8a7796", 404 "renesas,rcar-gen3-gpio"; 405 reg = <0 0xe6054000 0 0x50>; 406 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 407 #gpio-cells = <2>; 408 gpio-controller; 409 gpio-ranges = <&pfc 0 128 18>; 410 #interrupt-cells = <2>; 411 interrupt-controller; 412 clocks = <&cpg CPG_MOD 908>; 413 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 414 resets = <&cpg 908>; 415 }; 416 417 gpio5: gpio@e6055000 { 418 compatible = "renesas,gpio-r8a7796", 419 "renesas,rcar-gen3-gpio"; 420 reg = <0 0xe6055000 0 0x50>; 421 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 422 #gpio-cells = <2>; 423 gpio-controller; 424 gpio-ranges = <&pfc 0 160 26>; 425 #interrupt-cells = <2>; 426 interrupt-controller; 427 clocks = <&cpg CPG_MOD 907>; 428 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 429 resets = <&cpg 907>; 430 }; 431 432 gpio6: gpio@e6055400 { 433 compatible = "renesas,gpio-r8a7796", 434 "renesas,rcar-gen3-gpio"; 435 reg = <0 0xe6055400 0 0x50>; 436 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 437 #gpio-cells = <2>; 438 gpio-controller; 439 gpio-ranges = <&pfc 0 192 32>; 440 #interrupt-cells = <2>; 441 interrupt-controller; 442 clocks = <&cpg CPG_MOD 906>; 443 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 444 resets = <&cpg 906>; 445 }; 446 447 gpio7: gpio@e6055800 { 448 compatible = "renesas,gpio-r8a7796", 449 "renesas,rcar-gen3-gpio"; 450 reg = <0 0xe6055800 0 0x50>; 451 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 452 #gpio-cells = <2>; 453 gpio-controller; 454 gpio-ranges = <&pfc 0 224 4>; 455 #interrupt-cells = <2>; 456 interrupt-controller; 457 clocks = <&cpg CPG_MOD 905>; 458 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 459 resets = <&cpg 905>; 460 }; 461 462 pfc: pinctrl@e6060000 { 463 compatible = "renesas,pfc-r8a7796"; 464 reg = <0 0xe6060000 0 0x50c>; 465 }; 466 467 cmt0: timer@e60f0000 { 468 compatible = "renesas,r8a7796-cmt0", 469 "renesas,rcar-gen3-cmt0"; 470 reg = <0 0xe60f0000 0 0x1004>; 471 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 472 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 473 clocks = <&cpg CPG_MOD 303>; 474 clock-names = "fck"; 475 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 476 resets = <&cpg 303>; 477 status = "disabled"; 478 }; 479 480 cmt1: timer@e6130000 { 481 compatible = "renesas,r8a7796-cmt1", 482 "renesas,rcar-gen3-cmt1"; 483 reg = <0 0xe6130000 0 0x1004>; 484 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 485 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 486 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 487 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 488 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 489 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 490 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 491 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 492 clocks = <&cpg CPG_MOD 302>; 493 clock-names = "fck"; 494 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 495 resets = <&cpg 302>; 496 status = "disabled"; 497 }; 498 499 cmt2: timer@e6140000 { 500 compatible = "renesas,r8a7796-cmt1", 501 "renesas,rcar-gen3-cmt1"; 502 reg = <0 0xe6140000 0 0x1004>; 503 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 504 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 505 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 506 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 507 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 508 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 510 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 511 clocks = <&cpg CPG_MOD 301>; 512 clock-names = "fck"; 513 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 514 resets = <&cpg 301>; 515 status = "disabled"; 516 }; 517 518 cmt3: timer@e6148000 { 519 compatible = "renesas,r8a7796-cmt1", 520 "renesas,rcar-gen3-cmt1"; 521 reg = <0 0xe6148000 0 0x1004>; 522 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 523 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 524 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 529 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 300>; 531 clock-names = "fck"; 532 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 533 resets = <&cpg 300>; 534 status = "disabled"; 535 }; 536 537 cpg: clock-controller@e6150000 { 538 compatible = "renesas,r8a7796-cpg-mssr"; 539 reg = <0 0xe6150000 0 0x1000>; 540 clocks = <&extal_clk>, <&extalr_clk>; 541 clock-names = "extal", "extalr"; 542 #clock-cells = <2>; 543 #power-domain-cells = <0>; 544 #reset-cells = <1>; 545 }; 546 547 rst: reset-controller@e6160000 { 548 compatible = "renesas,r8a7796-rst"; 549 reg = <0 0xe6160000 0 0x0200>; 550 }; 551 552 sysc: system-controller@e6180000 { 553 compatible = "renesas,r8a7796-sysc"; 554 reg = <0 0xe6180000 0 0x0400>; 555 #power-domain-cells = <1>; 556 }; 557 558 tsc: thermal@e6198000 { 559 compatible = "renesas,r8a7796-thermal"; 560 reg = <0 0xe6198000 0 0x100>, 561 <0 0xe61a0000 0 0x100>, 562 <0 0xe61a8000 0 0x100>; 563 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 564 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 565 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 566 clocks = <&cpg CPG_MOD 522>; 567 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 568 resets = <&cpg 522>; 569 #thermal-sensor-cells = <1>; 570 }; 571 572 intc_ex: interrupt-controller@e61c0000 { 573 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; 574 #interrupt-cells = <2>; 575 interrupt-controller; 576 reg = <0 0xe61c0000 0 0x200>; 577 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 578 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 579 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 580 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 581 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&cpg CPG_MOD 407>; 584 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 585 resets = <&cpg 407>; 586 }; 587 588 tmu0: timer@e61e0000 { 589 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 590 reg = <0 0xe61e0000 0 0x30>; 591 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 592 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 593 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 594 clocks = <&cpg CPG_MOD 125>; 595 clock-names = "fck"; 596 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 597 resets = <&cpg 125>; 598 status = "disabled"; 599 }; 600 601 tmu1: timer@e6fc0000 { 602 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 603 reg = <0 0xe6fc0000 0 0x30>; 604 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 605 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 606 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 607 clocks = <&cpg CPG_MOD 124>; 608 clock-names = "fck"; 609 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 610 resets = <&cpg 124>; 611 status = "disabled"; 612 }; 613 614 tmu2: timer@e6fd0000 { 615 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 616 reg = <0 0xe6fd0000 0 0x30>; 617 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 618 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 619 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 620 clocks = <&cpg CPG_MOD 123>; 621 clock-names = "fck"; 622 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 623 resets = <&cpg 123>; 624 status = "disabled"; 625 }; 626 627 tmu3: timer@e6fe0000 { 628 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 629 reg = <0 0xe6fe0000 0 0x30>; 630 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 631 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 632 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 633 clocks = <&cpg CPG_MOD 122>; 634 clock-names = "fck"; 635 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 636 resets = <&cpg 122>; 637 status = "disabled"; 638 }; 639 640 tmu4: timer@ffc00000 { 641 compatible = "renesas,tmu-r8a7796", "renesas,tmu"; 642 reg = <0 0xffc00000 0 0x30>; 643 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 646 clocks = <&cpg CPG_MOD 121>; 647 clock-names = "fck"; 648 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 649 resets = <&cpg 121>; 650 status = "disabled"; 651 }; 652 653 i2c0: i2c@e6500000 { 654 #address-cells = <1>; 655 #size-cells = <0>; 656 compatible = "renesas,i2c-r8a7796", 657 "renesas,rcar-gen3-i2c"; 658 reg = <0 0xe6500000 0 0x40>; 659 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 660 clocks = <&cpg CPG_MOD 931>; 661 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 662 resets = <&cpg 931>; 663 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 664 <&dmac2 0x91>, <&dmac2 0x90>; 665 dma-names = "tx", "rx", "tx", "rx"; 666 i2c-scl-internal-delay-ns = <110>; 667 status = "disabled"; 668 }; 669 670 i2c1: i2c@e6508000 { 671 #address-cells = <1>; 672 #size-cells = <0>; 673 compatible = "renesas,i2c-r8a7796", 674 "renesas,rcar-gen3-i2c"; 675 reg = <0 0xe6508000 0 0x40>; 676 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 677 clocks = <&cpg CPG_MOD 930>; 678 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 679 resets = <&cpg 930>; 680 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 681 <&dmac2 0x93>, <&dmac2 0x92>; 682 dma-names = "tx", "rx", "tx", "rx"; 683 i2c-scl-internal-delay-ns = <6>; 684 status = "disabled"; 685 }; 686 687 i2c2: i2c@e6510000 { 688 #address-cells = <1>; 689 #size-cells = <0>; 690 compatible = "renesas,i2c-r8a7796", 691 "renesas,rcar-gen3-i2c"; 692 reg = <0 0xe6510000 0 0x40>; 693 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 694 clocks = <&cpg CPG_MOD 929>; 695 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 696 resets = <&cpg 929>; 697 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 698 <&dmac2 0x95>, <&dmac2 0x94>; 699 dma-names = "tx", "rx", "tx", "rx"; 700 i2c-scl-internal-delay-ns = <6>; 701 status = "disabled"; 702 }; 703 704 i2c3: i2c@e66d0000 { 705 #address-cells = <1>; 706 #size-cells = <0>; 707 compatible = "renesas,i2c-r8a7796", 708 "renesas,rcar-gen3-i2c"; 709 reg = <0 0xe66d0000 0 0x40>; 710 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 711 clocks = <&cpg CPG_MOD 928>; 712 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 713 resets = <&cpg 928>; 714 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 715 dma-names = "tx", "rx"; 716 i2c-scl-internal-delay-ns = <110>; 717 status = "disabled"; 718 }; 719 720 i2c4: i2c@e66d8000 { 721 #address-cells = <1>; 722 #size-cells = <0>; 723 compatible = "renesas,i2c-r8a7796", 724 "renesas,rcar-gen3-i2c"; 725 reg = <0 0xe66d8000 0 0x40>; 726 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 727 clocks = <&cpg CPG_MOD 927>; 728 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 729 resets = <&cpg 927>; 730 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 731 dma-names = "tx", "rx"; 732 i2c-scl-internal-delay-ns = <110>; 733 status = "disabled"; 734 }; 735 736 i2c5: i2c@e66e0000 { 737 #address-cells = <1>; 738 #size-cells = <0>; 739 compatible = "renesas,i2c-r8a7796", 740 "renesas,rcar-gen3-i2c"; 741 reg = <0 0xe66e0000 0 0x40>; 742 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 743 clocks = <&cpg CPG_MOD 919>; 744 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 745 resets = <&cpg 919>; 746 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 747 dma-names = "tx", "rx"; 748 i2c-scl-internal-delay-ns = <110>; 749 status = "disabled"; 750 }; 751 752 i2c6: i2c@e66e8000 { 753 #address-cells = <1>; 754 #size-cells = <0>; 755 compatible = "renesas,i2c-r8a7796", 756 "renesas,rcar-gen3-i2c"; 757 reg = <0 0xe66e8000 0 0x40>; 758 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 759 clocks = <&cpg CPG_MOD 918>; 760 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 761 resets = <&cpg 918>; 762 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 763 dma-names = "tx", "rx"; 764 i2c-scl-internal-delay-ns = <6>; 765 status = "disabled"; 766 }; 767 768 i2c_dvfs: i2c@e60b0000 { 769 #address-cells = <1>; 770 #size-cells = <0>; 771 compatible = "renesas,iic-r8a7796", 772 "renesas,rcar-gen3-iic", 773 "renesas,rmobile-iic"; 774 reg = <0 0xe60b0000 0 0x425>; 775 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 776 clocks = <&cpg CPG_MOD 926>; 777 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 778 resets = <&cpg 926>; 779 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 780 dma-names = "tx", "rx"; 781 status = "disabled"; 782 }; 783 784 hscif0: serial@e6540000 { 785 compatible = "renesas,hscif-r8a7796", 786 "renesas,rcar-gen3-hscif", 787 "renesas,hscif"; 788 reg = <0 0xe6540000 0 0x60>; 789 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 790 clocks = <&cpg CPG_MOD 520>, 791 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 792 <&scif_clk>; 793 clock-names = "fck", "brg_int", "scif_clk"; 794 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 795 <&dmac2 0x31>, <&dmac2 0x30>; 796 dma-names = "tx", "rx", "tx", "rx"; 797 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 798 resets = <&cpg 520>; 799 status = "disabled"; 800 }; 801 802 hscif1: serial@e6550000 { 803 compatible = "renesas,hscif-r8a7796", 804 "renesas,rcar-gen3-hscif", 805 "renesas,hscif"; 806 reg = <0 0xe6550000 0 0x60>; 807 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 808 clocks = <&cpg CPG_MOD 519>, 809 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 810 <&scif_clk>; 811 clock-names = "fck", "brg_int", "scif_clk"; 812 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 813 <&dmac2 0x33>, <&dmac2 0x32>; 814 dma-names = "tx", "rx", "tx", "rx"; 815 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 816 resets = <&cpg 519>; 817 status = "disabled"; 818 }; 819 820 hscif2: serial@e6560000 { 821 compatible = "renesas,hscif-r8a7796", 822 "renesas,rcar-gen3-hscif", 823 "renesas,hscif"; 824 reg = <0 0xe6560000 0 0x60>; 825 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 826 clocks = <&cpg CPG_MOD 518>, 827 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 828 <&scif_clk>; 829 clock-names = "fck", "brg_int", "scif_clk"; 830 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 831 <&dmac2 0x35>, <&dmac2 0x34>; 832 dma-names = "tx", "rx", "tx", "rx"; 833 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 834 resets = <&cpg 518>; 835 status = "disabled"; 836 }; 837 838 hscif3: serial@e66a0000 { 839 compatible = "renesas,hscif-r8a7796", 840 "renesas,rcar-gen3-hscif", 841 "renesas,hscif"; 842 reg = <0 0xe66a0000 0 0x60>; 843 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 844 clocks = <&cpg CPG_MOD 517>, 845 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 846 <&scif_clk>; 847 clock-names = "fck", "brg_int", "scif_clk"; 848 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 849 dma-names = "tx", "rx"; 850 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 851 resets = <&cpg 517>; 852 status = "disabled"; 853 }; 854 855 hscif4: serial@e66b0000 { 856 compatible = "renesas,hscif-r8a7796", 857 "renesas,rcar-gen3-hscif", 858 "renesas,hscif"; 859 reg = <0 0xe66b0000 0 0x60>; 860 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 861 clocks = <&cpg CPG_MOD 516>, 862 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 863 <&scif_clk>; 864 clock-names = "fck", "brg_int", "scif_clk"; 865 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 866 dma-names = "tx", "rx"; 867 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 868 resets = <&cpg 516>; 869 status = "disabled"; 870 }; 871 872 hsusb: usb@e6590000 { 873 compatible = "renesas,usbhs-r8a7796", 874 "renesas,rcar-gen3-usbhs"; 875 reg = <0 0xe6590000 0 0x200>; 876 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 877 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 878 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 879 <&usb_dmac1 0>, <&usb_dmac1 1>; 880 dma-names = "ch0", "ch1", "ch2", "ch3"; 881 renesas,buswait = <11>; 882 phys = <&usb2_phy0 3>; 883 phy-names = "usb"; 884 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 885 resets = <&cpg 704>, <&cpg 703>; 886 status = "disabled"; 887 }; 888 889 usb_dmac0: dma-controller@e65a0000 { 890 compatible = "renesas,r8a7796-usb-dmac", 891 "renesas,usb-dmac"; 892 reg = <0 0xe65a0000 0 0x100>; 893 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 894 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 895 interrupt-names = "ch0", "ch1"; 896 clocks = <&cpg CPG_MOD 330>; 897 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 898 resets = <&cpg 330>; 899 #dma-cells = <1>; 900 dma-channels = <2>; 901 }; 902 903 usb_dmac1: dma-controller@e65b0000 { 904 compatible = "renesas,r8a7796-usb-dmac", 905 "renesas,usb-dmac"; 906 reg = <0 0xe65b0000 0 0x100>; 907 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 908 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 909 interrupt-names = "ch0", "ch1"; 910 clocks = <&cpg CPG_MOD 331>; 911 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 912 resets = <&cpg 331>; 913 #dma-cells = <1>; 914 dma-channels = <2>; 915 }; 916 917 usb3_phy0: usb-phy@e65ee000 { 918 compatible = "renesas,r8a7796-usb3-phy", 919 "renesas,rcar-gen3-usb3-phy"; 920 reg = <0 0xe65ee000 0 0x90>; 921 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 922 <&usb_extal_clk>; 923 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 924 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 925 resets = <&cpg 328>; 926 #phy-cells = <0>; 927 status = "disabled"; 928 }; 929 930 arm_cc630p: crypto@e6601000 { 931 compatible = "arm,cryptocell-630p-ree"; 932 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 933 reg = <0x0 0xe6601000 0 0x1000>; 934 clocks = <&cpg CPG_MOD 229>; 935 resets = <&cpg 229>; 936 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 937 }; 938 939 dmac0: dma-controller@e6700000 { 940 compatible = "renesas,dmac-r8a7796", 941 "renesas,rcar-dmac"; 942 reg = <0 0xe6700000 0 0x10000>; 943 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 944 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 945 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 949 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 950 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 951 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 952 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 953 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 954 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 960 interrupt-names = "error", 961 "ch0", "ch1", "ch2", "ch3", 962 "ch4", "ch5", "ch6", "ch7", 963 "ch8", "ch9", "ch10", "ch11", 964 "ch12", "ch13", "ch14", "ch15"; 965 clocks = <&cpg CPG_MOD 219>; 966 clock-names = "fck"; 967 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 968 resets = <&cpg 219>; 969 #dma-cells = <1>; 970 dma-channels = <16>; 971 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 972 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 973 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 974 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 975 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 976 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 977 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 978 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 979 }; 980 981 dmac1: dma-controller@e7300000 { 982 compatible = "renesas,dmac-r8a7796", 983 "renesas,rcar-dmac"; 984 reg = <0 0xe7300000 0 0x10000>; 985 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1002 interrupt-names = "error", 1003 "ch0", "ch1", "ch2", "ch3", 1004 "ch4", "ch5", "ch6", "ch7", 1005 "ch8", "ch9", "ch10", "ch11", 1006 "ch12", "ch13", "ch14", "ch15"; 1007 clocks = <&cpg CPG_MOD 218>; 1008 clock-names = "fck"; 1009 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1010 resets = <&cpg 218>; 1011 #dma-cells = <1>; 1012 dma-channels = <16>; 1013 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 1014 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 1015 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 1016 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 1017 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 1018 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 1019 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 1020 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 1021 }; 1022 1023 dmac2: dma-controller@e7310000 { 1024 compatible = "renesas,dmac-r8a7796", 1025 "renesas,rcar-dmac"; 1026 reg = <0 0xe7310000 0 0x10000>; 1027 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1044 interrupt-names = "error", 1045 "ch0", "ch1", "ch2", "ch3", 1046 "ch4", "ch5", "ch6", "ch7", 1047 "ch8", "ch9", "ch10", "ch11", 1048 "ch12", "ch13", "ch14", "ch15"; 1049 clocks = <&cpg CPG_MOD 217>; 1050 clock-names = "fck"; 1051 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1052 resets = <&cpg 217>; 1053 #dma-cells = <1>; 1054 dma-channels = <16>; 1055 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 1056 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 1057 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 1058 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 1059 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 1060 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 1061 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 1062 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 1063 }; 1064 1065 ipmmu_ds0: iommu@e6740000 { 1066 compatible = "renesas,ipmmu-r8a7796"; 1067 reg = <0 0xe6740000 0 0x1000>; 1068 renesas,ipmmu-main = <&ipmmu_mm 0>; 1069 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1070 #iommu-cells = <1>; 1071 }; 1072 1073 ipmmu_ds1: iommu@e7740000 { 1074 compatible = "renesas,ipmmu-r8a7796"; 1075 reg = <0 0xe7740000 0 0x1000>; 1076 renesas,ipmmu-main = <&ipmmu_mm 1>; 1077 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1078 #iommu-cells = <1>; 1079 }; 1080 1081 ipmmu_hc: iommu@e6570000 { 1082 compatible = "renesas,ipmmu-r8a7796"; 1083 reg = <0 0xe6570000 0 0x1000>; 1084 renesas,ipmmu-main = <&ipmmu_mm 2>; 1085 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1086 #iommu-cells = <1>; 1087 }; 1088 1089 ipmmu_ir: iommu@ff8b0000 { 1090 compatible = "renesas,ipmmu-r8a7796"; 1091 reg = <0 0xff8b0000 0 0x1000>; 1092 renesas,ipmmu-main = <&ipmmu_mm 3>; 1093 power-domains = <&sysc R8A7796_PD_A3IR>; 1094 #iommu-cells = <1>; 1095 }; 1096 1097 ipmmu_mm: iommu@e67b0000 { 1098 compatible = "renesas,ipmmu-r8a7796"; 1099 reg = <0 0xe67b0000 0 0x1000>; 1100 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1101 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1102 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1103 #iommu-cells = <1>; 1104 }; 1105 1106 ipmmu_mp: iommu@ec670000 { 1107 compatible = "renesas,ipmmu-r8a7796"; 1108 reg = <0 0xec670000 0 0x1000>; 1109 renesas,ipmmu-main = <&ipmmu_mm 4>; 1110 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1111 #iommu-cells = <1>; 1112 }; 1113 1114 ipmmu_pv0: iommu@fd800000 { 1115 compatible = "renesas,ipmmu-r8a7796"; 1116 reg = <0 0xfd800000 0 0x1000>; 1117 renesas,ipmmu-main = <&ipmmu_mm 5>; 1118 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1119 #iommu-cells = <1>; 1120 }; 1121 1122 ipmmu_pv1: iommu@fd950000 { 1123 compatible = "renesas,ipmmu-r8a7796"; 1124 reg = <0 0xfd950000 0 0x1000>; 1125 renesas,ipmmu-main = <&ipmmu_mm 6>; 1126 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1127 #iommu-cells = <1>; 1128 }; 1129 1130 ipmmu_rt: iommu@ffc80000 { 1131 compatible = "renesas,ipmmu-r8a7796"; 1132 reg = <0 0xffc80000 0 0x1000>; 1133 renesas,ipmmu-main = <&ipmmu_mm 7>; 1134 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1135 #iommu-cells = <1>; 1136 }; 1137 1138 ipmmu_vc0: iommu@fe6b0000 { 1139 compatible = "renesas,ipmmu-r8a7796"; 1140 reg = <0 0xfe6b0000 0 0x1000>; 1141 renesas,ipmmu-main = <&ipmmu_mm 8>; 1142 power-domains = <&sysc R8A7796_PD_A3VC>; 1143 #iommu-cells = <1>; 1144 }; 1145 1146 ipmmu_vi0: iommu@febd0000 { 1147 compatible = "renesas,ipmmu-r8a7796"; 1148 reg = <0 0xfebd0000 0 0x1000>; 1149 renesas,ipmmu-main = <&ipmmu_mm 9>; 1150 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1151 #iommu-cells = <1>; 1152 }; 1153 1154 avb: ethernet@e6800000 { 1155 compatible = "renesas,etheravb-r8a7796", 1156 "renesas,etheravb-rcar-gen3"; 1157 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1158 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1159 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1160 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1161 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1162 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1163 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1164 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1165 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1166 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1167 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1168 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1169 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1170 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1171 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1172 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1173 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1174 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1175 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1176 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1177 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1178 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1179 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1180 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1181 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1182 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1183 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1184 "ch4", "ch5", "ch6", "ch7", 1185 "ch8", "ch9", "ch10", "ch11", 1186 "ch12", "ch13", "ch14", "ch15", 1187 "ch16", "ch17", "ch18", "ch19", 1188 "ch20", "ch21", "ch22", "ch23", 1189 "ch24"; 1190 clocks = <&cpg CPG_MOD 812>; 1191 clock-names = "fck"; 1192 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1193 resets = <&cpg 812>; 1194 phy-mode = "rgmii"; 1195 rx-internal-delay-ps = <0>; 1196 tx-internal-delay-ps = <0>; 1197 iommus = <&ipmmu_ds0 16>; 1198 #address-cells = <1>; 1199 #size-cells = <0>; 1200 status = "disabled"; 1201 }; 1202 1203 can0: can@e6c30000 { 1204 compatible = "renesas,can-r8a7796", 1205 "renesas,rcar-gen3-can"; 1206 reg = <0 0xe6c30000 0 0x1000>; 1207 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1208 clocks = <&cpg CPG_MOD 916>, 1209 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1210 <&can_clk>; 1211 clock-names = "clkp1", "clkp2", "can_clk"; 1212 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1213 assigned-clock-rates = <40000000>; 1214 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1215 resets = <&cpg 916>; 1216 status = "disabled"; 1217 }; 1218 1219 can1: can@e6c38000 { 1220 compatible = "renesas,can-r8a7796", 1221 "renesas,rcar-gen3-can"; 1222 reg = <0 0xe6c38000 0 0x1000>; 1223 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1224 clocks = <&cpg CPG_MOD 915>, 1225 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1226 <&can_clk>; 1227 clock-names = "clkp1", "clkp2", "can_clk"; 1228 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1229 assigned-clock-rates = <40000000>; 1230 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1231 resets = <&cpg 915>; 1232 status = "disabled"; 1233 }; 1234 1235 canfd: can@e66c0000 { 1236 compatible = "renesas,r8a7796-canfd", 1237 "renesas,rcar-gen3-canfd"; 1238 reg = <0 0xe66c0000 0 0x8000>; 1239 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1240 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1241 clocks = <&cpg CPG_MOD 914>, 1242 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1243 <&can_clk>; 1244 clock-names = "fck", "canfd", "can_clk"; 1245 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1246 assigned-clock-rates = <40000000>; 1247 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1248 resets = <&cpg 914>; 1249 status = "disabled"; 1250 1251 channel0 { 1252 status = "disabled"; 1253 }; 1254 1255 channel1 { 1256 status = "disabled"; 1257 }; 1258 }; 1259 1260 pwm0: pwm@e6e30000 { 1261 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1262 reg = <0 0xe6e30000 0 8>; 1263 #pwm-cells = <2>; 1264 clocks = <&cpg CPG_MOD 523>; 1265 resets = <&cpg 523>; 1266 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1267 status = "disabled"; 1268 }; 1269 1270 pwm1: pwm@e6e31000 { 1271 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1272 reg = <0 0xe6e31000 0 8>; 1273 #pwm-cells = <2>; 1274 clocks = <&cpg CPG_MOD 523>; 1275 resets = <&cpg 523>; 1276 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1277 status = "disabled"; 1278 }; 1279 1280 pwm2: pwm@e6e32000 { 1281 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1282 reg = <0 0xe6e32000 0 8>; 1283 #pwm-cells = <2>; 1284 clocks = <&cpg CPG_MOD 523>; 1285 resets = <&cpg 523>; 1286 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1287 status = "disabled"; 1288 }; 1289 1290 pwm3: pwm@e6e33000 { 1291 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1292 reg = <0 0xe6e33000 0 8>; 1293 #pwm-cells = <2>; 1294 clocks = <&cpg CPG_MOD 523>; 1295 resets = <&cpg 523>; 1296 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1297 status = "disabled"; 1298 }; 1299 1300 pwm4: pwm@e6e34000 { 1301 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1302 reg = <0 0xe6e34000 0 8>; 1303 #pwm-cells = <2>; 1304 clocks = <&cpg CPG_MOD 523>; 1305 resets = <&cpg 523>; 1306 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1307 status = "disabled"; 1308 }; 1309 1310 pwm5: pwm@e6e35000 { 1311 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1312 reg = <0 0xe6e35000 0 8>; 1313 #pwm-cells = <2>; 1314 clocks = <&cpg CPG_MOD 523>; 1315 resets = <&cpg 523>; 1316 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1317 status = "disabled"; 1318 }; 1319 1320 pwm6: pwm@e6e36000 { 1321 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1322 reg = <0 0xe6e36000 0 8>; 1323 #pwm-cells = <2>; 1324 clocks = <&cpg CPG_MOD 523>; 1325 resets = <&cpg 523>; 1326 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1327 status = "disabled"; 1328 }; 1329 1330 scif0: serial@e6e60000 { 1331 compatible = "renesas,scif-r8a7796", 1332 "renesas,rcar-gen3-scif", "renesas,scif"; 1333 reg = <0 0xe6e60000 0 64>; 1334 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1335 clocks = <&cpg CPG_MOD 207>, 1336 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1337 <&scif_clk>; 1338 clock-names = "fck", "brg_int", "scif_clk"; 1339 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1340 <&dmac2 0x51>, <&dmac2 0x50>; 1341 dma-names = "tx", "rx", "tx", "rx"; 1342 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1343 resets = <&cpg 207>; 1344 status = "disabled"; 1345 }; 1346 1347 scif1: serial@e6e68000 { 1348 compatible = "renesas,scif-r8a7796", 1349 "renesas,rcar-gen3-scif", "renesas,scif"; 1350 reg = <0 0xe6e68000 0 64>; 1351 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1352 clocks = <&cpg CPG_MOD 206>, 1353 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1354 <&scif_clk>; 1355 clock-names = "fck", "brg_int", "scif_clk"; 1356 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1357 <&dmac2 0x53>, <&dmac2 0x52>; 1358 dma-names = "tx", "rx", "tx", "rx"; 1359 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1360 resets = <&cpg 206>; 1361 status = "disabled"; 1362 }; 1363 1364 scif2: serial@e6e88000 { 1365 compatible = "renesas,scif-r8a7796", 1366 "renesas,rcar-gen3-scif", "renesas,scif"; 1367 reg = <0 0xe6e88000 0 64>; 1368 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1369 clocks = <&cpg CPG_MOD 310>, 1370 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1371 <&scif_clk>; 1372 clock-names = "fck", "brg_int", "scif_clk"; 1373 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1374 <&dmac2 0x13>, <&dmac2 0x12>; 1375 dma-names = "tx", "rx", "tx", "rx"; 1376 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1377 resets = <&cpg 310>; 1378 status = "disabled"; 1379 }; 1380 1381 scif3: serial@e6c50000 { 1382 compatible = "renesas,scif-r8a7796", 1383 "renesas,rcar-gen3-scif", "renesas,scif"; 1384 reg = <0 0xe6c50000 0 64>; 1385 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1386 clocks = <&cpg CPG_MOD 204>, 1387 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1388 <&scif_clk>; 1389 clock-names = "fck", "brg_int", "scif_clk"; 1390 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1391 dma-names = "tx", "rx"; 1392 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1393 resets = <&cpg 204>; 1394 status = "disabled"; 1395 }; 1396 1397 scif4: serial@e6c40000 { 1398 compatible = "renesas,scif-r8a7796", 1399 "renesas,rcar-gen3-scif", "renesas,scif"; 1400 reg = <0 0xe6c40000 0 64>; 1401 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1402 clocks = <&cpg CPG_MOD 203>, 1403 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1404 <&scif_clk>; 1405 clock-names = "fck", "brg_int", "scif_clk"; 1406 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1407 dma-names = "tx", "rx"; 1408 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1409 resets = <&cpg 203>; 1410 status = "disabled"; 1411 }; 1412 1413 scif5: serial@e6f30000 { 1414 compatible = "renesas,scif-r8a7796", 1415 "renesas,rcar-gen3-scif", "renesas,scif"; 1416 reg = <0 0xe6f30000 0 64>; 1417 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1418 clocks = <&cpg CPG_MOD 202>, 1419 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1420 <&scif_clk>; 1421 clock-names = "fck", "brg_int", "scif_clk"; 1422 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1423 <&dmac2 0x5b>, <&dmac2 0x5a>; 1424 dma-names = "tx", "rx", "tx", "rx"; 1425 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1426 resets = <&cpg 202>; 1427 status = "disabled"; 1428 }; 1429 1430 tpu: pwm@e6e80000 { 1431 compatible = "renesas,tpu-r8a7796", "renesas,tpu"; 1432 reg = <0 0xe6e80000 0 0x148>; 1433 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1434 clocks = <&cpg CPG_MOD 304>; 1435 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1436 resets = <&cpg 304>; 1437 #pwm-cells = <3>; 1438 status = "disabled"; 1439 }; 1440 1441 msiof0: spi@e6e90000 { 1442 compatible = "renesas,msiof-r8a7796", 1443 "renesas,rcar-gen3-msiof"; 1444 reg = <0 0xe6e90000 0 0x0064>; 1445 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1446 clocks = <&cpg CPG_MOD 211>; 1447 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1448 <&dmac2 0x41>, <&dmac2 0x40>; 1449 dma-names = "tx", "rx", "tx", "rx"; 1450 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1451 resets = <&cpg 211>; 1452 #address-cells = <1>; 1453 #size-cells = <0>; 1454 status = "disabled"; 1455 }; 1456 1457 msiof1: spi@e6ea0000 { 1458 compatible = "renesas,msiof-r8a7796", 1459 "renesas,rcar-gen3-msiof"; 1460 reg = <0 0xe6ea0000 0 0x0064>; 1461 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1462 clocks = <&cpg CPG_MOD 210>; 1463 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1464 <&dmac2 0x43>, <&dmac2 0x42>; 1465 dma-names = "tx", "rx", "tx", "rx"; 1466 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1467 resets = <&cpg 210>; 1468 #address-cells = <1>; 1469 #size-cells = <0>; 1470 status = "disabled"; 1471 }; 1472 1473 msiof2: spi@e6c00000 { 1474 compatible = "renesas,msiof-r8a7796", 1475 "renesas,rcar-gen3-msiof"; 1476 reg = <0 0xe6c00000 0 0x0064>; 1477 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1478 clocks = <&cpg CPG_MOD 209>; 1479 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1480 dma-names = "tx", "rx"; 1481 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1482 resets = <&cpg 209>; 1483 #address-cells = <1>; 1484 #size-cells = <0>; 1485 status = "disabled"; 1486 }; 1487 1488 msiof3: spi@e6c10000 { 1489 compatible = "renesas,msiof-r8a7796", 1490 "renesas,rcar-gen3-msiof"; 1491 reg = <0 0xe6c10000 0 0x0064>; 1492 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1493 clocks = <&cpg CPG_MOD 208>; 1494 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1495 dma-names = "tx", "rx"; 1496 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1497 resets = <&cpg 208>; 1498 #address-cells = <1>; 1499 #size-cells = <0>; 1500 status = "disabled"; 1501 }; 1502 1503 vin0: video@e6ef0000 { 1504 compatible = "renesas,vin-r8a7796"; 1505 reg = <0 0xe6ef0000 0 0x1000>; 1506 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1507 clocks = <&cpg CPG_MOD 811>; 1508 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1509 resets = <&cpg 811>; 1510 renesas,id = <0>; 1511 status = "disabled"; 1512 1513 ports { 1514 #address-cells = <1>; 1515 #size-cells = <0>; 1516 1517 port@1 { 1518 #address-cells = <1>; 1519 #size-cells = <0>; 1520 1521 reg = <1>; 1522 1523 vin0csi20: endpoint@0 { 1524 reg = <0>; 1525 remote-endpoint = <&csi20vin0>; 1526 }; 1527 vin0csi40: endpoint@2 { 1528 reg = <2>; 1529 remote-endpoint = <&csi40vin0>; 1530 }; 1531 }; 1532 }; 1533 }; 1534 1535 vin1: video@e6ef1000 { 1536 compatible = "renesas,vin-r8a7796"; 1537 reg = <0 0xe6ef1000 0 0x1000>; 1538 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1539 clocks = <&cpg CPG_MOD 810>; 1540 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1541 resets = <&cpg 810>; 1542 renesas,id = <1>; 1543 status = "disabled"; 1544 1545 ports { 1546 #address-cells = <1>; 1547 #size-cells = <0>; 1548 1549 port@1 { 1550 #address-cells = <1>; 1551 #size-cells = <0>; 1552 1553 reg = <1>; 1554 1555 vin1csi20: endpoint@0 { 1556 reg = <0>; 1557 remote-endpoint = <&csi20vin1>; 1558 }; 1559 vin1csi40: endpoint@2 { 1560 reg = <2>; 1561 remote-endpoint = <&csi40vin1>; 1562 }; 1563 }; 1564 }; 1565 }; 1566 1567 vin2: video@e6ef2000 { 1568 compatible = "renesas,vin-r8a7796"; 1569 reg = <0 0xe6ef2000 0 0x1000>; 1570 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1571 clocks = <&cpg CPG_MOD 809>; 1572 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1573 resets = <&cpg 809>; 1574 renesas,id = <2>; 1575 status = "disabled"; 1576 1577 ports { 1578 #address-cells = <1>; 1579 #size-cells = <0>; 1580 1581 port@1 { 1582 #address-cells = <1>; 1583 #size-cells = <0>; 1584 1585 reg = <1>; 1586 1587 vin2csi20: endpoint@0 { 1588 reg = <0>; 1589 remote-endpoint = <&csi20vin2>; 1590 }; 1591 vin2csi40: endpoint@2 { 1592 reg = <2>; 1593 remote-endpoint = <&csi40vin2>; 1594 }; 1595 }; 1596 }; 1597 }; 1598 1599 vin3: video@e6ef3000 { 1600 compatible = "renesas,vin-r8a7796"; 1601 reg = <0 0xe6ef3000 0 0x1000>; 1602 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1603 clocks = <&cpg CPG_MOD 808>; 1604 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1605 resets = <&cpg 808>; 1606 renesas,id = <3>; 1607 status = "disabled"; 1608 1609 ports { 1610 #address-cells = <1>; 1611 #size-cells = <0>; 1612 1613 port@1 { 1614 #address-cells = <1>; 1615 #size-cells = <0>; 1616 1617 reg = <1>; 1618 1619 vin3csi20: endpoint@0 { 1620 reg = <0>; 1621 remote-endpoint = <&csi20vin3>; 1622 }; 1623 vin3csi40: endpoint@2 { 1624 reg = <2>; 1625 remote-endpoint = <&csi40vin3>; 1626 }; 1627 }; 1628 }; 1629 }; 1630 1631 vin4: video@e6ef4000 { 1632 compatible = "renesas,vin-r8a7796"; 1633 reg = <0 0xe6ef4000 0 0x1000>; 1634 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1635 clocks = <&cpg CPG_MOD 807>; 1636 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1637 resets = <&cpg 807>; 1638 renesas,id = <4>; 1639 status = "disabled"; 1640 1641 ports { 1642 #address-cells = <1>; 1643 #size-cells = <0>; 1644 1645 port@1 { 1646 #address-cells = <1>; 1647 #size-cells = <0>; 1648 1649 reg = <1>; 1650 1651 vin4csi20: endpoint@0 { 1652 reg = <0>; 1653 remote-endpoint = <&csi20vin4>; 1654 }; 1655 vin4csi40: endpoint@2 { 1656 reg = <2>; 1657 remote-endpoint = <&csi40vin4>; 1658 }; 1659 }; 1660 }; 1661 }; 1662 1663 vin5: video@e6ef5000 { 1664 compatible = "renesas,vin-r8a7796"; 1665 reg = <0 0xe6ef5000 0 0x1000>; 1666 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1667 clocks = <&cpg CPG_MOD 806>; 1668 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1669 resets = <&cpg 806>; 1670 renesas,id = <5>; 1671 status = "disabled"; 1672 1673 ports { 1674 #address-cells = <1>; 1675 #size-cells = <0>; 1676 1677 port@1 { 1678 #address-cells = <1>; 1679 #size-cells = <0>; 1680 1681 reg = <1>; 1682 1683 vin5csi20: endpoint@0 { 1684 reg = <0>; 1685 remote-endpoint = <&csi20vin5>; 1686 }; 1687 vin5csi40: endpoint@2 { 1688 reg = <2>; 1689 remote-endpoint = <&csi40vin5>; 1690 }; 1691 }; 1692 }; 1693 }; 1694 1695 vin6: video@e6ef6000 { 1696 compatible = "renesas,vin-r8a7796"; 1697 reg = <0 0xe6ef6000 0 0x1000>; 1698 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1699 clocks = <&cpg CPG_MOD 805>; 1700 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1701 resets = <&cpg 805>; 1702 renesas,id = <6>; 1703 status = "disabled"; 1704 1705 ports { 1706 #address-cells = <1>; 1707 #size-cells = <0>; 1708 1709 port@1 { 1710 #address-cells = <1>; 1711 #size-cells = <0>; 1712 1713 reg = <1>; 1714 1715 vin6csi20: endpoint@0 { 1716 reg = <0>; 1717 remote-endpoint = <&csi20vin6>; 1718 }; 1719 vin6csi40: endpoint@2 { 1720 reg = <2>; 1721 remote-endpoint = <&csi40vin6>; 1722 }; 1723 }; 1724 }; 1725 }; 1726 1727 vin7: video@e6ef7000 { 1728 compatible = "renesas,vin-r8a7796"; 1729 reg = <0 0xe6ef7000 0 0x1000>; 1730 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1731 clocks = <&cpg CPG_MOD 804>; 1732 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1733 resets = <&cpg 804>; 1734 renesas,id = <7>; 1735 status = "disabled"; 1736 1737 ports { 1738 #address-cells = <1>; 1739 #size-cells = <0>; 1740 1741 port@1 { 1742 #address-cells = <1>; 1743 #size-cells = <0>; 1744 1745 reg = <1>; 1746 1747 vin7csi20: endpoint@0 { 1748 reg = <0>; 1749 remote-endpoint = <&csi20vin7>; 1750 }; 1751 vin7csi40: endpoint@2 { 1752 reg = <2>; 1753 remote-endpoint = <&csi40vin7>; 1754 }; 1755 }; 1756 }; 1757 }; 1758 1759 drif00: rif@e6f40000 { 1760 compatible = "renesas,r8a7796-drif", 1761 "renesas,rcar-gen3-drif"; 1762 reg = <0 0xe6f40000 0 0x64>; 1763 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1764 clocks = <&cpg CPG_MOD 515>; 1765 clock-names = "fck"; 1766 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1767 dma-names = "rx", "rx"; 1768 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1769 resets = <&cpg 515>; 1770 renesas,bonding = <&drif01>; 1771 status = "disabled"; 1772 }; 1773 1774 drif01: rif@e6f50000 { 1775 compatible = "renesas,r8a7796-drif", 1776 "renesas,rcar-gen3-drif"; 1777 reg = <0 0xe6f50000 0 0x64>; 1778 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1779 clocks = <&cpg CPG_MOD 514>; 1780 clock-names = "fck"; 1781 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1782 dma-names = "rx", "rx"; 1783 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1784 resets = <&cpg 514>; 1785 renesas,bonding = <&drif00>; 1786 status = "disabled"; 1787 }; 1788 1789 drif10: rif@e6f60000 { 1790 compatible = "renesas,r8a7796-drif", 1791 "renesas,rcar-gen3-drif"; 1792 reg = <0 0xe6f60000 0 0x64>; 1793 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1794 clocks = <&cpg CPG_MOD 513>; 1795 clock-names = "fck"; 1796 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1797 dma-names = "rx", "rx"; 1798 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1799 resets = <&cpg 513>; 1800 renesas,bonding = <&drif11>; 1801 status = "disabled"; 1802 }; 1803 1804 drif11: rif@e6f70000 { 1805 compatible = "renesas,r8a7796-drif", 1806 "renesas,rcar-gen3-drif"; 1807 reg = <0 0xe6f70000 0 0x64>; 1808 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1809 clocks = <&cpg CPG_MOD 512>; 1810 clock-names = "fck"; 1811 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1812 dma-names = "rx", "rx"; 1813 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1814 resets = <&cpg 512>; 1815 renesas,bonding = <&drif10>; 1816 status = "disabled"; 1817 }; 1818 1819 drif20: rif@e6f80000 { 1820 compatible = "renesas,r8a7796-drif", 1821 "renesas,rcar-gen3-drif"; 1822 reg = <0 0xe6f80000 0 0x64>; 1823 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1824 clocks = <&cpg CPG_MOD 511>; 1825 clock-names = "fck"; 1826 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1827 dma-names = "rx", "rx"; 1828 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1829 resets = <&cpg 511>; 1830 renesas,bonding = <&drif21>; 1831 status = "disabled"; 1832 }; 1833 1834 drif21: rif@e6f90000 { 1835 compatible = "renesas,r8a7796-drif", 1836 "renesas,rcar-gen3-drif"; 1837 reg = <0 0xe6f90000 0 0x64>; 1838 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1839 clocks = <&cpg CPG_MOD 510>; 1840 clock-names = "fck"; 1841 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1842 dma-names = "rx", "rx"; 1843 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1844 resets = <&cpg 510>; 1845 renesas,bonding = <&drif20>; 1846 status = "disabled"; 1847 }; 1848 1849 drif30: rif@e6fa0000 { 1850 compatible = "renesas,r8a7796-drif", 1851 "renesas,rcar-gen3-drif"; 1852 reg = <0 0xe6fa0000 0 0x64>; 1853 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1854 clocks = <&cpg CPG_MOD 509>; 1855 clock-names = "fck"; 1856 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1857 dma-names = "rx", "rx"; 1858 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1859 resets = <&cpg 509>; 1860 renesas,bonding = <&drif31>; 1861 status = "disabled"; 1862 }; 1863 1864 drif31: rif@e6fb0000 { 1865 compatible = "renesas,r8a7796-drif", 1866 "renesas,rcar-gen3-drif"; 1867 reg = <0 0xe6fb0000 0 0x64>; 1868 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1869 clocks = <&cpg CPG_MOD 508>; 1870 clock-names = "fck"; 1871 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1872 dma-names = "rx", "rx"; 1873 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1874 resets = <&cpg 508>; 1875 renesas,bonding = <&drif30>; 1876 status = "disabled"; 1877 }; 1878 1879 rcar_sound: sound@ec500000 { 1880 /* 1881 * #sound-dai-cells is required 1882 * 1883 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1884 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1885 */ 1886 /* 1887 * #clock-cells is required for audio_clkout0/1/2/3 1888 * 1889 * clkout : #clock-cells = <0>; <&rcar_sound>; 1890 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1891 */ 1892 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1893 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1894 <0 0xec5a0000 0 0x100>, /* ADG */ 1895 <0 0xec540000 0 0x1000>, /* SSIU */ 1896 <0 0xec541000 0 0x280>, /* SSI */ 1897 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1898 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1899 1900 clocks = <&cpg CPG_MOD 1005>, 1901 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1902 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1903 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1904 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1905 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1906 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1907 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1908 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1909 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1910 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1911 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1912 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1913 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1914 <&audio_clk_a>, <&audio_clk_b>, 1915 <&audio_clk_c>, 1916 <&cpg CPG_CORE R8A7796_CLK_S0D4>; 1917 clock-names = "ssi-all", 1918 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1919 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1920 "ssi.1", "ssi.0", 1921 "src.9", "src.8", "src.7", "src.6", 1922 "src.5", "src.4", "src.3", "src.2", 1923 "src.1", "src.0", 1924 "mix.1", "mix.0", 1925 "ctu.1", "ctu.0", 1926 "dvc.0", "dvc.1", 1927 "clk_a", "clk_b", "clk_c", "clk_i"; 1928 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1929 resets = <&cpg 1005>, 1930 <&cpg 1006>, <&cpg 1007>, 1931 <&cpg 1008>, <&cpg 1009>, 1932 <&cpg 1010>, <&cpg 1011>, 1933 <&cpg 1012>, <&cpg 1013>, 1934 <&cpg 1014>, <&cpg 1015>; 1935 reset-names = "ssi-all", 1936 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1937 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1938 "ssi.1", "ssi.0"; 1939 status = "disabled"; 1940 1941 rcar_sound,ctu { 1942 ctu00: ctu-0 { }; 1943 ctu01: ctu-1 { }; 1944 ctu02: ctu-2 { }; 1945 ctu03: ctu-3 { }; 1946 ctu10: ctu-4 { }; 1947 ctu11: ctu-5 { }; 1948 ctu12: ctu-6 { }; 1949 ctu13: ctu-7 { }; 1950 }; 1951 1952 rcar_sound,dvc { 1953 dvc0: dvc-0 { 1954 dmas = <&audma1 0xbc>; 1955 dma-names = "tx"; 1956 }; 1957 dvc1: dvc-1 { 1958 dmas = <&audma1 0xbe>; 1959 dma-names = "tx"; 1960 }; 1961 }; 1962 1963 rcar_sound,mix { 1964 mix0: mix-0 { }; 1965 mix1: mix-1 { }; 1966 }; 1967 1968 rcar_sound,src { 1969 src0: src-0 { 1970 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1971 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1972 dma-names = "rx", "tx"; 1973 }; 1974 src1: src-1 { 1975 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1976 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1977 dma-names = "rx", "tx"; 1978 }; 1979 src2: src-2 { 1980 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1981 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1982 dma-names = "rx", "tx"; 1983 }; 1984 src3: src-3 { 1985 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1986 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1987 dma-names = "rx", "tx"; 1988 }; 1989 src4: src-4 { 1990 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1991 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1992 dma-names = "rx", "tx"; 1993 }; 1994 src5: src-5 { 1995 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1996 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1997 dma-names = "rx", "tx"; 1998 }; 1999 src6: src-6 { 2000 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 2001 dmas = <&audma0 0x91>, <&audma1 0xb4>; 2002 dma-names = "rx", "tx"; 2003 }; 2004 src7: src-7 { 2005 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 2006 dmas = <&audma0 0x93>, <&audma1 0xb6>; 2007 dma-names = "rx", "tx"; 2008 }; 2009 src8: src-8 { 2010 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 2011 dmas = <&audma0 0x95>, <&audma1 0xb8>; 2012 dma-names = "rx", "tx"; 2013 }; 2014 src9: src-9 { 2015 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 2016 dmas = <&audma0 0x97>, <&audma1 0xba>; 2017 dma-names = "rx", "tx"; 2018 }; 2019 }; 2020 2021 rcar_sound,ssi { 2022 ssi0: ssi-0 { 2023 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2024 dmas = <&audma0 0x01>, <&audma1 0x02>; 2025 dma-names = "rx", "tx"; 2026 }; 2027 ssi1: ssi-1 { 2028 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2029 dmas = <&audma0 0x03>, <&audma1 0x04>; 2030 dma-names = "rx", "tx"; 2031 }; 2032 ssi2: ssi-2 { 2033 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2034 dmas = <&audma0 0x05>, <&audma1 0x06>; 2035 dma-names = "rx", "tx"; 2036 }; 2037 ssi3: ssi-3 { 2038 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2039 dmas = <&audma0 0x07>, <&audma1 0x08>; 2040 dma-names = "rx", "tx"; 2041 }; 2042 ssi4: ssi-4 { 2043 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2044 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2045 dma-names = "rx", "tx"; 2046 }; 2047 ssi5: ssi-5 { 2048 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2049 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2050 dma-names = "rx", "tx"; 2051 }; 2052 ssi6: ssi-6 { 2053 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2054 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2055 dma-names = "rx", "tx"; 2056 }; 2057 ssi7: ssi-7 { 2058 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2059 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2060 dma-names = "rx", "tx"; 2061 }; 2062 ssi8: ssi-8 { 2063 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2064 dmas = <&audma0 0x11>, <&audma1 0x12>; 2065 dma-names = "rx", "tx"; 2066 }; 2067 ssi9: ssi-9 { 2068 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2069 dmas = <&audma0 0x13>, <&audma1 0x14>; 2070 dma-names = "rx", "tx"; 2071 }; 2072 }; 2073 2074 rcar_sound,ssiu { 2075 ssiu00: ssiu-0 { 2076 dmas = <&audma0 0x15>, <&audma1 0x16>; 2077 dma-names = "rx", "tx"; 2078 }; 2079 ssiu01: ssiu-1 { 2080 dmas = <&audma0 0x35>, <&audma1 0x36>; 2081 dma-names = "rx", "tx"; 2082 }; 2083 ssiu02: ssiu-2 { 2084 dmas = <&audma0 0x37>, <&audma1 0x38>; 2085 dma-names = "rx", "tx"; 2086 }; 2087 ssiu03: ssiu-3 { 2088 dmas = <&audma0 0x47>, <&audma1 0x48>; 2089 dma-names = "rx", "tx"; 2090 }; 2091 ssiu04: ssiu-4 { 2092 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2093 dma-names = "rx", "tx"; 2094 }; 2095 ssiu05: ssiu-5 { 2096 dmas = <&audma0 0x43>, <&audma1 0x44>; 2097 dma-names = "rx", "tx"; 2098 }; 2099 ssiu06: ssiu-6 { 2100 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2101 dma-names = "rx", "tx"; 2102 }; 2103 ssiu07: ssiu-7 { 2104 dmas = <&audma0 0x53>, <&audma1 0x54>; 2105 dma-names = "rx", "tx"; 2106 }; 2107 ssiu10: ssiu-8 { 2108 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2109 dma-names = "rx", "tx"; 2110 }; 2111 ssiu11: ssiu-9 { 2112 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2113 dma-names = "rx", "tx"; 2114 }; 2115 ssiu12: ssiu-10 { 2116 dmas = <&audma0 0x57>, <&audma1 0x58>; 2117 dma-names = "rx", "tx"; 2118 }; 2119 ssiu13: ssiu-11 { 2120 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2121 dma-names = "rx", "tx"; 2122 }; 2123 ssiu14: ssiu-12 { 2124 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2125 dma-names = "rx", "tx"; 2126 }; 2127 ssiu15: ssiu-13 { 2128 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2129 dma-names = "rx", "tx"; 2130 }; 2131 ssiu16: ssiu-14 { 2132 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2133 dma-names = "rx", "tx"; 2134 }; 2135 ssiu17: ssiu-15 { 2136 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2137 dma-names = "rx", "tx"; 2138 }; 2139 ssiu20: ssiu-16 { 2140 dmas = <&audma0 0x63>, <&audma1 0x64>; 2141 dma-names = "rx", "tx"; 2142 }; 2143 ssiu21: ssiu-17 { 2144 dmas = <&audma0 0x67>, <&audma1 0x68>; 2145 dma-names = "rx", "tx"; 2146 }; 2147 ssiu22: ssiu-18 { 2148 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2149 dma-names = "rx", "tx"; 2150 }; 2151 ssiu23: ssiu-19 { 2152 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2153 dma-names = "rx", "tx"; 2154 }; 2155 ssiu24: ssiu-20 { 2156 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2157 dma-names = "rx", "tx"; 2158 }; 2159 ssiu25: ssiu-21 { 2160 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2161 dma-names = "rx", "tx"; 2162 }; 2163 ssiu26: ssiu-22 { 2164 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2165 dma-names = "rx", "tx"; 2166 }; 2167 ssiu27: ssiu-23 { 2168 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2169 dma-names = "rx", "tx"; 2170 }; 2171 ssiu30: ssiu-24 { 2172 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2173 dma-names = "rx", "tx"; 2174 }; 2175 ssiu31: ssiu-25 { 2176 dmas = <&audma0 0x21>, <&audma1 0x22>; 2177 dma-names = "rx", "tx"; 2178 }; 2179 ssiu32: ssiu-26 { 2180 dmas = <&audma0 0x23>, <&audma1 0x24>; 2181 dma-names = "rx", "tx"; 2182 }; 2183 ssiu33: ssiu-27 { 2184 dmas = <&audma0 0x25>, <&audma1 0x26>; 2185 dma-names = "rx", "tx"; 2186 }; 2187 ssiu34: ssiu-28 { 2188 dmas = <&audma0 0x27>, <&audma1 0x28>; 2189 dma-names = "rx", "tx"; 2190 }; 2191 ssiu35: ssiu-29 { 2192 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2193 dma-names = "rx", "tx"; 2194 }; 2195 ssiu36: ssiu-30 { 2196 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2197 dma-names = "rx", "tx"; 2198 }; 2199 ssiu37: ssiu-31 { 2200 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2201 dma-names = "rx", "tx"; 2202 }; 2203 ssiu40: ssiu-32 { 2204 dmas = <&audma0 0x71>, <&audma1 0x72>; 2205 dma-names = "rx", "tx"; 2206 }; 2207 ssiu41: ssiu-33 { 2208 dmas = <&audma0 0x17>, <&audma1 0x18>; 2209 dma-names = "rx", "tx"; 2210 }; 2211 ssiu42: ssiu-34 { 2212 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2213 dma-names = "rx", "tx"; 2214 }; 2215 ssiu43: ssiu-35 { 2216 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2217 dma-names = "rx", "tx"; 2218 }; 2219 ssiu44: ssiu-36 { 2220 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2221 dma-names = "rx", "tx"; 2222 }; 2223 ssiu45: ssiu-37 { 2224 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2225 dma-names = "rx", "tx"; 2226 }; 2227 ssiu46: ssiu-38 { 2228 dmas = <&audma0 0x31>, <&audma1 0x32>; 2229 dma-names = "rx", "tx"; 2230 }; 2231 ssiu47: ssiu-39 { 2232 dmas = <&audma0 0x33>, <&audma1 0x34>; 2233 dma-names = "rx", "tx"; 2234 }; 2235 ssiu50: ssiu-40 { 2236 dmas = <&audma0 0x73>, <&audma1 0x74>; 2237 dma-names = "rx", "tx"; 2238 }; 2239 ssiu60: ssiu-41 { 2240 dmas = <&audma0 0x75>, <&audma1 0x76>; 2241 dma-names = "rx", "tx"; 2242 }; 2243 ssiu70: ssiu-42 { 2244 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2245 dma-names = "rx", "tx"; 2246 }; 2247 ssiu80: ssiu-43 { 2248 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2249 dma-names = "rx", "tx"; 2250 }; 2251 ssiu90: ssiu-44 { 2252 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2253 dma-names = "rx", "tx"; 2254 }; 2255 ssiu91: ssiu-45 { 2256 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2257 dma-names = "rx", "tx"; 2258 }; 2259 ssiu92: ssiu-46 { 2260 dmas = <&audma0 0x81>, <&audma1 0x82>; 2261 dma-names = "rx", "tx"; 2262 }; 2263 ssiu93: ssiu-47 { 2264 dmas = <&audma0 0x83>, <&audma1 0x84>; 2265 dma-names = "rx", "tx"; 2266 }; 2267 ssiu94: ssiu-48 { 2268 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2269 dma-names = "rx", "tx"; 2270 }; 2271 ssiu95: ssiu-49 { 2272 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2273 dma-names = "rx", "tx"; 2274 }; 2275 ssiu96: ssiu-50 { 2276 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2277 dma-names = "rx", "tx"; 2278 }; 2279 ssiu97: ssiu-51 { 2280 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2281 dma-names = "rx", "tx"; 2282 }; 2283 }; 2284 }; 2285 2286 audma0: dma-controller@ec700000 { 2287 compatible = "renesas,dmac-r8a7796", 2288 "renesas,rcar-dmac"; 2289 reg = <0 0xec700000 0 0x10000>; 2290 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2291 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2292 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2293 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2294 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2295 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2296 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2297 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2298 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2299 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2300 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2301 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2302 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2303 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2304 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2305 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2306 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2307 interrupt-names = "error", 2308 "ch0", "ch1", "ch2", "ch3", 2309 "ch4", "ch5", "ch6", "ch7", 2310 "ch8", "ch9", "ch10", "ch11", 2311 "ch12", "ch13", "ch14", "ch15"; 2312 clocks = <&cpg CPG_MOD 502>; 2313 clock-names = "fck"; 2314 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2315 resets = <&cpg 502>; 2316 #dma-cells = <1>; 2317 dma-channels = <16>; 2318 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2319 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2320 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2321 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2322 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2323 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2324 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2325 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2326 }; 2327 2328 audma1: dma-controller@ec720000 { 2329 compatible = "renesas,dmac-r8a7796", 2330 "renesas,rcar-dmac"; 2331 reg = <0 0xec720000 0 0x10000>; 2332 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2333 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2334 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2335 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2336 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2337 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2338 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2339 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2340 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2341 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2342 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2343 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2344 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2345 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2346 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2347 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2348 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2349 interrupt-names = "error", 2350 "ch0", "ch1", "ch2", "ch3", 2351 "ch4", "ch5", "ch6", "ch7", 2352 "ch8", "ch9", "ch10", "ch11", 2353 "ch12", "ch13", "ch14", "ch15"; 2354 clocks = <&cpg CPG_MOD 501>; 2355 clock-names = "fck"; 2356 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2357 resets = <&cpg 501>; 2358 #dma-cells = <1>; 2359 dma-channels = <16>; 2360 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2361 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2362 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2363 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2364 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2365 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2366 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2367 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2368 }; 2369 2370 xhci0: usb@ee000000 { 2371 compatible = "renesas,xhci-r8a7796", 2372 "renesas,rcar-gen3-xhci"; 2373 reg = <0 0xee000000 0 0xc00>; 2374 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2375 clocks = <&cpg CPG_MOD 328>; 2376 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2377 resets = <&cpg 328>; 2378 status = "disabled"; 2379 }; 2380 2381 usb3_peri0: usb@ee020000 { 2382 compatible = "renesas,r8a7796-usb3-peri", 2383 "renesas,rcar-gen3-usb3-peri"; 2384 reg = <0 0xee020000 0 0x400>; 2385 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2386 clocks = <&cpg CPG_MOD 328>; 2387 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2388 resets = <&cpg 328>; 2389 status = "disabled"; 2390 }; 2391 2392 ohci0: usb@ee080000 { 2393 compatible = "generic-ohci"; 2394 reg = <0 0xee080000 0 0x100>; 2395 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2396 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2397 phys = <&usb2_phy0 1>; 2398 phy-names = "usb"; 2399 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2400 resets = <&cpg 703>, <&cpg 704>; 2401 status = "disabled"; 2402 }; 2403 2404 ohci1: usb@ee0a0000 { 2405 compatible = "generic-ohci"; 2406 reg = <0 0xee0a0000 0 0x100>; 2407 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2408 clocks = <&cpg CPG_MOD 702>; 2409 phys = <&usb2_phy1 1>; 2410 phy-names = "usb"; 2411 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2412 resets = <&cpg 702>; 2413 status = "disabled"; 2414 }; 2415 2416 ehci0: usb@ee080100 { 2417 compatible = "generic-ehci"; 2418 reg = <0 0xee080100 0 0x100>; 2419 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2420 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2421 phys = <&usb2_phy0 2>; 2422 phy-names = "usb"; 2423 companion = <&ohci0>; 2424 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2425 resets = <&cpg 703>, <&cpg 704>; 2426 status = "disabled"; 2427 }; 2428 2429 ehci1: usb@ee0a0100 { 2430 compatible = "generic-ehci"; 2431 reg = <0 0xee0a0100 0 0x100>; 2432 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2433 clocks = <&cpg CPG_MOD 702>; 2434 phys = <&usb2_phy1 2>; 2435 phy-names = "usb"; 2436 companion = <&ohci1>; 2437 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2438 resets = <&cpg 702>; 2439 status = "disabled"; 2440 }; 2441 2442 usb2_phy0: usb-phy@ee080200 { 2443 compatible = "renesas,usb2-phy-r8a7796", 2444 "renesas,rcar-gen3-usb2-phy"; 2445 reg = <0 0xee080200 0 0x700>; 2446 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2447 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2448 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2449 resets = <&cpg 703>, <&cpg 704>; 2450 #phy-cells = <1>; 2451 status = "disabled"; 2452 }; 2453 2454 usb2_phy1: usb-phy@ee0a0200 { 2455 compatible = "renesas,usb2-phy-r8a7796", 2456 "renesas,rcar-gen3-usb2-phy"; 2457 reg = <0 0xee0a0200 0 0x700>; 2458 clocks = <&cpg CPG_MOD 702>; 2459 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2460 resets = <&cpg 702>; 2461 #phy-cells = <1>; 2462 status = "disabled"; 2463 }; 2464 2465 sdhi0: mmc@ee100000 { 2466 compatible = "renesas,sdhi-r8a7796", 2467 "renesas,rcar-gen3-sdhi"; 2468 reg = <0 0xee100000 0 0x2000>; 2469 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2470 clocks = <&cpg CPG_MOD 314>; 2471 max-frequency = <200000000>; 2472 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2473 resets = <&cpg 314>; 2474 iommus = <&ipmmu_ds1 32>; 2475 status = "disabled"; 2476 }; 2477 2478 sdhi1: mmc@ee120000 { 2479 compatible = "renesas,sdhi-r8a7796", 2480 "renesas,rcar-gen3-sdhi"; 2481 reg = <0 0xee120000 0 0x2000>; 2482 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2483 clocks = <&cpg CPG_MOD 313>; 2484 max-frequency = <200000000>; 2485 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2486 resets = <&cpg 313>; 2487 iommus = <&ipmmu_ds1 33>; 2488 status = "disabled"; 2489 }; 2490 2491 sdhi2: mmc@ee140000 { 2492 compatible = "renesas,sdhi-r8a7796", 2493 "renesas,rcar-gen3-sdhi"; 2494 reg = <0 0xee140000 0 0x2000>; 2495 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2496 clocks = <&cpg CPG_MOD 312>; 2497 max-frequency = <200000000>; 2498 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2499 resets = <&cpg 312>; 2500 iommus = <&ipmmu_ds1 34>; 2501 status = "disabled"; 2502 }; 2503 2504 sdhi3: mmc@ee160000 { 2505 compatible = "renesas,sdhi-r8a7796", 2506 "renesas,rcar-gen3-sdhi"; 2507 reg = <0 0xee160000 0 0x2000>; 2508 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2509 clocks = <&cpg CPG_MOD 311>; 2510 max-frequency = <200000000>; 2511 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2512 resets = <&cpg 311>; 2513 iommus = <&ipmmu_ds1 35>; 2514 status = "disabled"; 2515 }; 2516 2517 gic: interrupt-controller@f1010000 { 2518 compatible = "arm,gic-400"; 2519 #interrupt-cells = <3>; 2520 #address-cells = <0>; 2521 interrupt-controller; 2522 reg = <0x0 0xf1010000 0 0x1000>, 2523 <0x0 0xf1020000 0 0x20000>, 2524 <0x0 0xf1040000 0 0x20000>, 2525 <0x0 0xf1060000 0 0x20000>; 2526 interrupts = <GIC_PPI 9 2527 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2528 clocks = <&cpg CPG_MOD 408>; 2529 clock-names = "clk"; 2530 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2531 resets = <&cpg 408>; 2532 }; 2533 2534 pciec0: pcie@fe000000 { 2535 compatible = "renesas,pcie-r8a7796", 2536 "renesas,pcie-rcar-gen3"; 2537 reg = <0 0xfe000000 0 0x80000>; 2538 #address-cells = <3>; 2539 #size-cells = <2>; 2540 bus-range = <0x00 0xff>; 2541 device_type = "pci"; 2542 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2543 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2544 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2545 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2546 /* Map all possible DDR as inbound ranges */ 2547 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2548 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2549 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2550 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2551 #interrupt-cells = <1>; 2552 interrupt-map-mask = <0 0 0 0>; 2553 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2554 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2555 clock-names = "pcie", "pcie_bus"; 2556 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2557 resets = <&cpg 319>; 2558 status = "disabled"; 2559 }; 2560 2561 pciec1: pcie@ee800000 { 2562 compatible = "renesas,pcie-r8a7796", 2563 "renesas,pcie-rcar-gen3"; 2564 reg = <0 0xee800000 0 0x80000>; 2565 #address-cells = <3>; 2566 #size-cells = <2>; 2567 bus-range = <0x00 0xff>; 2568 device_type = "pci"; 2569 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2570 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2571 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2572 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2573 /* Map all possible DDR as inbound ranges */ 2574 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2575 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2576 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2577 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2578 #interrupt-cells = <1>; 2579 interrupt-map-mask = <0 0 0 0>; 2580 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2581 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2582 clock-names = "pcie", "pcie_bus"; 2583 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2584 resets = <&cpg 318>; 2585 status = "disabled"; 2586 }; 2587 2588 imr-lx4@fe860000 { 2589 compatible = "renesas,r8a7796-imr-lx4", 2590 "renesas,imr-lx4"; 2591 reg = <0 0xfe860000 0 0x2000>; 2592 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2593 clocks = <&cpg CPG_MOD 823>; 2594 power-domains = <&sysc R8A7796_PD_A3VC>; 2595 resets = <&cpg 823>; 2596 }; 2597 2598 imr-lx4@fe870000 { 2599 compatible = "renesas,r8a7796-imr-lx4", 2600 "renesas,imr-lx4"; 2601 reg = <0 0xfe870000 0 0x2000>; 2602 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2603 clocks = <&cpg CPG_MOD 822>; 2604 power-domains = <&sysc R8A7796_PD_A3VC>; 2605 resets = <&cpg 822>; 2606 }; 2607 2608 fdp1@fe940000 { 2609 compatible = "renesas,fdp1"; 2610 reg = <0 0xfe940000 0 0x2400>; 2611 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2612 clocks = <&cpg CPG_MOD 119>; 2613 power-domains = <&sysc R8A7796_PD_A3VC>; 2614 resets = <&cpg 119>; 2615 renesas,fcp = <&fcpf0>; 2616 }; 2617 2618 fcpf0: fcp@fe950000 { 2619 compatible = "renesas,fcpf"; 2620 reg = <0 0xfe950000 0 0x200>; 2621 clocks = <&cpg CPG_MOD 615>; 2622 power-domains = <&sysc R8A7796_PD_A3VC>; 2623 resets = <&cpg 615>; 2624 }; 2625 2626 fcpvb0: fcp@fe96f000 { 2627 compatible = "renesas,fcpv"; 2628 reg = <0 0xfe96f000 0 0x200>; 2629 clocks = <&cpg CPG_MOD 607>; 2630 power-domains = <&sysc R8A7796_PD_A3VC>; 2631 resets = <&cpg 607>; 2632 }; 2633 2634 fcpvi0: fcp@fe9af000 { 2635 compatible = "renesas,fcpv"; 2636 reg = <0 0xfe9af000 0 0x200>; 2637 clocks = <&cpg CPG_MOD 611>; 2638 power-domains = <&sysc R8A7796_PD_A3VC>; 2639 resets = <&cpg 611>; 2640 iommus = <&ipmmu_vc0 19>; 2641 }; 2642 2643 fcpvd0: fcp@fea27000 { 2644 compatible = "renesas,fcpv"; 2645 reg = <0 0xfea27000 0 0x200>; 2646 clocks = <&cpg CPG_MOD 603>; 2647 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2648 resets = <&cpg 603>; 2649 iommus = <&ipmmu_vi0 8>; 2650 }; 2651 2652 fcpvd1: fcp@fea2f000 { 2653 compatible = "renesas,fcpv"; 2654 reg = <0 0xfea2f000 0 0x200>; 2655 clocks = <&cpg CPG_MOD 602>; 2656 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2657 resets = <&cpg 602>; 2658 iommus = <&ipmmu_vi0 9>; 2659 }; 2660 2661 fcpvd2: fcp@fea37000 { 2662 compatible = "renesas,fcpv"; 2663 reg = <0 0xfea37000 0 0x200>; 2664 clocks = <&cpg CPG_MOD 601>; 2665 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2666 resets = <&cpg 601>; 2667 iommus = <&ipmmu_vi0 10>; 2668 }; 2669 2670 vspb: vsp@fe960000 { 2671 compatible = "renesas,vsp2"; 2672 reg = <0 0xfe960000 0 0x8000>; 2673 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2674 clocks = <&cpg CPG_MOD 626>; 2675 power-domains = <&sysc R8A7796_PD_A3VC>; 2676 resets = <&cpg 626>; 2677 2678 renesas,fcp = <&fcpvb0>; 2679 }; 2680 2681 vspd0: vsp@fea20000 { 2682 compatible = "renesas,vsp2"; 2683 reg = <0 0xfea20000 0 0x5000>; 2684 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2685 clocks = <&cpg CPG_MOD 623>; 2686 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2687 resets = <&cpg 623>; 2688 2689 renesas,fcp = <&fcpvd0>; 2690 }; 2691 2692 vspd1: vsp@fea28000 { 2693 compatible = "renesas,vsp2"; 2694 reg = <0 0xfea28000 0 0x5000>; 2695 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2696 clocks = <&cpg CPG_MOD 622>; 2697 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2698 resets = <&cpg 622>; 2699 2700 renesas,fcp = <&fcpvd1>; 2701 }; 2702 2703 vspd2: vsp@fea30000 { 2704 compatible = "renesas,vsp2"; 2705 reg = <0 0xfea30000 0 0x5000>; 2706 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2707 clocks = <&cpg CPG_MOD 621>; 2708 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2709 resets = <&cpg 621>; 2710 2711 renesas,fcp = <&fcpvd2>; 2712 }; 2713 2714 vspi0: vsp@fe9a0000 { 2715 compatible = "renesas,vsp2"; 2716 reg = <0 0xfe9a0000 0 0x8000>; 2717 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2718 clocks = <&cpg CPG_MOD 631>; 2719 power-domains = <&sysc R8A7796_PD_A3VC>; 2720 resets = <&cpg 631>; 2721 2722 renesas,fcp = <&fcpvi0>; 2723 }; 2724 2725 cmm0: cmm@fea40000 { 2726 compatible = "renesas,r8a7796-cmm", 2727 "renesas,rcar-gen3-cmm"; 2728 reg = <0 0xfea40000 0 0x1000>; 2729 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2730 clocks = <&cpg CPG_MOD 711>; 2731 resets = <&cpg 711>; 2732 }; 2733 2734 cmm1: cmm@fea50000 { 2735 compatible = "renesas,r8a7796-cmm", 2736 "renesas,rcar-gen3-cmm"; 2737 reg = <0 0xfea50000 0 0x1000>; 2738 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2739 clocks = <&cpg CPG_MOD 710>; 2740 resets = <&cpg 710>; 2741 }; 2742 2743 cmm2: cmm@fea60000 { 2744 compatible = "renesas,r8a7796-cmm", 2745 "renesas,rcar-gen3-cmm"; 2746 reg = <0 0xfea60000 0 0x1000>; 2747 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2748 clocks = <&cpg CPG_MOD 709>; 2749 resets = <&cpg 709>; 2750 }; 2751 2752 csi20: csi2@fea80000 { 2753 compatible = "renesas,r8a7796-csi2"; 2754 reg = <0 0xfea80000 0 0x10000>; 2755 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2756 clocks = <&cpg CPG_MOD 714>; 2757 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2758 resets = <&cpg 714>; 2759 status = "disabled"; 2760 2761 ports { 2762 #address-cells = <1>; 2763 #size-cells = <0>; 2764 2765 port@0 { 2766 reg = <0>; 2767 }; 2768 2769 port@1 { 2770 #address-cells = <1>; 2771 #size-cells = <0>; 2772 2773 reg = <1>; 2774 2775 csi20vin0: endpoint@0 { 2776 reg = <0>; 2777 remote-endpoint = <&vin0csi20>; 2778 }; 2779 csi20vin1: endpoint@1 { 2780 reg = <1>; 2781 remote-endpoint = <&vin1csi20>; 2782 }; 2783 csi20vin2: endpoint@2 { 2784 reg = <2>; 2785 remote-endpoint = <&vin2csi20>; 2786 }; 2787 csi20vin3: endpoint@3 { 2788 reg = <3>; 2789 remote-endpoint = <&vin3csi20>; 2790 }; 2791 csi20vin4: endpoint@4 { 2792 reg = <4>; 2793 remote-endpoint = <&vin4csi20>; 2794 }; 2795 csi20vin5: endpoint@5 { 2796 reg = <5>; 2797 remote-endpoint = <&vin5csi20>; 2798 }; 2799 csi20vin6: endpoint@6 { 2800 reg = <6>; 2801 remote-endpoint = <&vin6csi20>; 2802 }; 2803 csi20vin7: endpoint@7 { 2804 reg = <7>; 2805 remote-endpoint = <&vin7csi20>; 2806 }; 2807 }; 2808 }; 2809 }; 2810 2811 csi40: csi2@feaa0000 { 2812 compatible = "renesas,r8a7796-csi2"; 2813 reg = <0 0xfeaa0000 0 0x10000>; 2814 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2815 clocks = <&cpg CPG_MOD 716>; 2816 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2817 resets = <&cpg 716>; 2818 status = "disabled"; 2819 2820 ports { 2821 #address-cells = <1>; 2822 #size-cells = <0>; 2823 2824 port@0 { 2825 reg = <0>; 2826 }; 2827 2828 port@1 { 2829 #address-cells = <1>; 2830 #size-cells = <0>; 2831 2832 reg = <1>; 2833 2834 csi40vin0: endpoint@0 { 2835 reg = <0>; 2836 remote-endpoint = <&vin0csi40>; 2837 }; 2838 csi40vin1: endpoint@1 { 2839 reg = <1>; 2840 remote-endpoint = <&vin1csi40>; 2841 }; 2842 csi40vin2: endpoint@2 { 2843 reg = <2>; 2844 remote-endpoint = <&vin2csi40>; 2845 }; 2846 csi40vin3: endpoint@3 { 2847 reg = <3>; 2848 remote-endpoint = <&vin3csi40>; 2849 }; 2850 csi40vin4: endpoint@4 { 2851 reg = <4>; 2852 remote-endpoint = <&vin4csi40>; 2853 }; 2854 csi40vin5: endpoint@5 { 2855 reg = <5>; 2856 remote-endpoint = <&vin5csi40>; 2857 }; 2858 csi40vin6: endpoint@6 { 2859 reg = <6>; 2860 remote-endpoint = <&vin6csi40>; 2861 }; 2862 csi40vin7: endpoint@7 { 2863 reg = <7>; 2864 remote-endpoint = <&vin7csi40>; 2865 }; 2866 }; 2867 2868 }; 2869 }; 2870 2871 hdmi0: hdmi@fead0000 { 2872 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; 2873 reg = <0 0xfead0000 0 0x10000>; 2874 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2875 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; 2876 clock-names = "iahb", "isfr"; 2877 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2878 resets = <&cpg 729>; 2879 status = "disabled"; 2880 2881 ports { 2882 #address-cells = <1>; 2883 #size-cells = <0>; 2884 port@0 { 2885 reg = <0>; 2886 dw_hdmi0_in: endpoint { 2887 remote-endpoint = <&du_out_hdmi0>; 2888 }; 2889 }; 2890 port@1 { 2891 reg = <1>; 2892 }; 2893 port@2 { 2894 /* HDMI sound */ 2895 reg = <2>; 2896 }; 2897 }; 2898 }; 2899 2900 du: display@feb00000 { 2901 compatible = "renesas,du-r8a7796"; 2902 reg = <0 0xfeb00000 0 0x70000>; 2903 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2904 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2905 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2906 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2907 <&cpg CPG_MOD 722>; 2908 clock-names = "du.0", "du.1", "du.2"; 2909 resets = <&cpg 724>, <&cpg 722>; 2910 reset-names = "du.0", "du.2"; 2911 2912 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>; 2913 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2914 2915 status = "disabled"; 2916 2917 ports { 2918 #address-cells = <1>; 2919 #size-cells = <0>; 2920 2921 port@0 { 2922 reg = <0>; 2923 du_out_rgb: endpoint { 2924 }; 2925 }; 2926 port@1 { 2927 reg = <1>; 2928 du_out_hdmi0: endpoint { 2929 remote-endpoint = <&dw_hdmi0_in>; 2930 }; 2931 }; 2932 port@2 { 2933 reg = <2>; 2934 du_out_lvds0: endpoint { 2935 remote-endpoint = <&lvds0_in>; 2936 }; 2937 }; 2938 }; 2939 }; 2940 2941 lvds0: lvds@feb90000 { 2942 compatible = "renesas,r8a7796-lvds"; 2943 reg = <0 0xfeb90000 0 0x14>; 2944 clocks = <&cpg CPG_MOD 727>; 2945 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2946 resets = <&cpg 727>; 2947 status = "disabled"; 2948 2949 ports { 2950 #address-cells = <1>; 2951 #size-cells = <0>; 2952 2953 port@0 { 2954 reg = <0>; 2955 lvds0_in: endpoint { 2956 remote-endpoint = <&du_out_lvds0>; 2957 }; 2958 }; 2959 port@1 { 2960 reg = <1>; 2961 lvds0_out: endpoint { 2962 }; 2963 }; 2964 }; 2965 }; 2966 2967 prr: chipid@fff00044 { 2968 compatible = "renesas,prr"; 2969 reg = <0 0xfff00044 0 4>; 2970 }; 2971 }; 2972 2973 thermal-zones { 2974 sensor_thermal1: sensor-thermal1 { 2975 polling-delay-passive = <250>; 2976 polling-delay = <1000>; 2977 thermal-sensors = <&tsc 0>; 2978 sustainable-power = <3874>; 2979 2980 trips { 2981 sensor1_crit: sensor1-crit { 2982 temperature = <120000>; 2983 hysteresis = <1000>; 2984 type = "critical"; 2985 }; 2986 }; 2987 }; 2988 2989 sensor_thermal2: sensor-thermal2 { 2990 polling-delay-passive = <250>; 2991 polling-delay = <1000>; 2992 thermal-sensors = <&tsc 1>; 2993 sustainable-power = <3874>; 2994 2995 trips { 2996 sensor2_crit: sensor2-crit { 2997 temperature = <120000>; 2998 hysteresis = <1000>; 2999 type = "critical"; 3000 }; 3001 }; 3002 }; 3003 3004 sensor_thermal3: sensor-thermal3 { 3005 polling-delay-passive = <250>; 3006 polling-delay = <1000>; 3007 thermal-sensors = <&tsc 2>; 3008 sustainable-power = <3874>; 3009 3010 cooling-maps { 3011 map0 { 3012 trip = <&target>; 3013 cooling-device = <&a57_0 2 4>; 3014 contribution = <1024>; 3015 }; 3016 map1 { 3017 trip = <&target>; 3018 cooling-device = <&a53_0 0 2>; 3019 contribution = <1024>; 3020 }; 3021 }; 3022 trips { 3023 target: trip-point1 { 3024 temperature = <100000>; 3025 hysteresis = <1000>; 3026 type = "passive"; 3027 }; 3028 3029 sensor3_crit: sensor3-crit { 3030 temperature = <120000>; 3031 hysteresis = <1000>; 3032 type = "critical"; 3033 }; 3034 }; 3035 }; 3036 }; 3037 3038 timer { 3039 compatible = "arm,armv8-timer"; 3040 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 3041 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 3042 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 3043 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 3044 }; 3045 3046 /* External USB clocks - can be overridden by the board */ 3047 usb3s0_clk: usb3s0 { 3048 compatible = "fixed-clock"; 3049 #clock-cells = <0>; 3050 clock-frequency = <0>; 3051 }; 3052 3053 usb_extal_clk: usb_extal { 3054 compatible = "fixed-clock"; 3055 #clock-cells = <0>; 3056 clock-frequency = <0>; 3057 }; 3058}; 3059