1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car H3 (R8A77951) SoC 4 * 5 * Copyright (C) 2015 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7795-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7795-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A7795_CLK_S0D4 13 14#define SOC_HAS_HDMI1 15#define SOC_HAS_SATA 16#define SOC_HAS_USB2_CH2 17#define SOC_HAS_USB2_CH3 18 19/ { 20 compatible = "renesas,r8a7795"; 21 #address-cells = <2>; 22 #size-cells = <2>; 23 24 aliases { 25 i2c0 = &i2c0; 26 i2c1 = &i2c1; 27 i2c2 = &i2c2; 28 i2c3 = &i2c3; 29 i2c4 = &i2c4; 30 i2c5 = &i2c5; 31 i2c6 = &i2c6; 32 i2c7 = &i2c_dvfs; 33 }; 34 35 /* 36 * The external audio clocks are configured as 0 Hz fixed frequency 37 * clocks by default. 38 * Boards that provide audio clocks should override them. 39 */ 40 audio_clk_a: audio_clk_a { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <0>; 44 }; 45 46 audio_clk_b: audio_clk_b { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <0>; 50 }; 51 52 audio_clk_c: audio_clk_c { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 /* External CAN clock - to be overridden by boards that provide it */ 59 can_clk: can { 60 compatible = "fixed-clock"; 61 #clock-cells = <0>; 62 clock-frequency = <0>; 63 }; 64 65 cluster0_opp: opp-table-0 { 66 compatible = "operating-points-v2"; 67 opp-shared; 68 69 opp-500000000 { 70 opp-hz = /bits/ 64 <500000000>; 71 opp-microvolt = <830000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1000000000 { 75 opp-hz = /bits/ 64 <1000000000>; 76 opp-microvolt = <830000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1500000000 { 80 opp-hz = /bits/ 64 <1500000000>; 81 opp-microvolt = <830000>; 82 clock-latency-ns = <300000>; 83 opp-suspend; 84 }; 85 opp-1600000000 { 86 opp-hz = /bits/ 64 <1600000000>; 87 opp-microvolt = <900000>; 88 clock-latency-ns = <300000>; 89 turbo-mode; 90 }; 91 opp-1700000000 { 92 opp-hz = /bits/ 64 <1700000000>; 93 opp-microvolt = <960000>; 94 clock-latency-ns = <300000>; 95 turbo-mode; 96 }; 97 }; 98 99 cluster1_opp: opp-table-1 { 100 compatible = "operating-points-v2"; 101 opp-shared; 102 103 opp-800000000 { 104 opp-hz = /bits/ 64 <800000000>; 105 opp-microvolt = <820000>; 106 clock-latency-ns = <300000>; 107 }; 108 opp-1000000000 { 109 opp-hz = /bits/ 64 <1000000000>; 110 opp-microvolt = <820000>; 111 clock-latency-ns = <300000>; 112 }; 113 opp-1200000000 { 114 opp-hz = /bits/ 64 <1200000000>; 115 opp-microvolt = <820000>; 116 clock-latency-ns = <300000>; 117 }; 118 }; 119 120 cpus { 121 #address-cells = <1>; 122 #size-cells = <0>; 123 124 cpu-map { 125 cluster0 { 126 core0 { 127 cpu = <&a57_0>; 128 }; 129 core1 { 130 cpu = <&a57_1>; 131 }; 132 core2 { 133 cpu = <&a57_2>; 134 }; 135 core3 { 136 cpu = <&a57_3>; 137 }; 138 }; 139 140 cluster1 { 141 core0 { 142 cpu = <&a53_0>; 143 }; 144 core1 { 145 cpu = <&a53_1>; 146 }; 147 core2 { 148 cpu = <&a53_2>; 149 }; 150 core3 { 151 cpu = <&a53_3>; 152 }; 153 }; 154 }; 155 156 a57_0: cpu@0 { 157 compatible = "arm,cortex-a57"; 158 reg = <0x0>; 159 device_type = "cpu"; 160 power-domains = <&sysc R8A7795_PD_CA57_CPU0>; 161 next-level-cache = <&L2_CA57>; 162 enable-method = "psci"; 163 cpu-idle-states = <&CPU_SLEEP_0>; 164 dynamic-power-coefficient = <854>; 165 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 166 operating-points-v2 = <&cluster0_opp>; 167 capacity-dmips-mhz = <1024>; 168 #cooling-cells = <2>; 169 }; 170 171 a57_1: cpu@1 { 172 compatible = "arm,cortex-a57"; 173 reg = <0x1>; 174 device_type = "cpu"; 175 power-domains = <&sysc R8A7795_PD_CA57_CPU1>; 176 next-level-cache = <&L2_CA57>; 177 enable-method = "psci"; 178 cpu-idle-states = <&CPU_SLEEP_0>; 179 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 180 operating-points-v2 = <&cluster0_opp>; 181 capacity-dmips-mhz = <1024>; 182 #cooling-cells = <2>; 183 }; 184 185 a57_2: cpu@2 { 186 compatible = "arm,cortex-a57"; 187 reg = <0x2>; 188 device_type = "cpu"; 189 power-domains = <&sysc R8A7795_PD_CA57_CPU2>; 190 next-level-cache = <&L2_CA57>; 191 enable-method = "psci"; 192 cpu-idle-states = <&CPU_SLEEP_0>; 193 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 194 operating-points-v2 = <&cluster0_opp>; 195 capacity-dmips-mhz = <1024>; 196 #cooling-cells = <2>; 197 }; 198 199 a57_3: cpu@3 { 200 compatible = "arm,cortex-a57"; 201 reg = <0x3>; 202 device_type = "cpu"; 203 power-domains = <&sysc R8A7795_PD_CA57_CPU3>; 204 next-level-cache = <&L2_CA57>; 205 enable-method = "psci"; 206 cpu-idle-states = <&CPU_SLEEP_0>; 207 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 208 operating-points-v2 = <&cluster0_opp>; 209 capacity-dmips-mhz = <1024>; 210 #cooling-cells = <2>; 211 }; 212 213 a53_0: cpu@100 { 214 compatible = "arm,cortex-a53"; 215 reg = <0x100>; 216 device_type = "cpu"; 217 power-domains = <&sysc R8A7795_PD_CA53_CPU0>; 218 next-level-cache = <&L2_CA53>; 219 enable-method = "psci"; 220 cpu-idle-states = <&CPU_SLEEP_1>; 221 #cooling-cells = <2>; 222 dynamic-power-coefficient = <277>; 223 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 224 operating-points-v2 = <&cluster1_opp>; 225 capacity-dmips-mhz = <535>; 226 }; 227 228 a53_1: cpu@101 { 229 compatible = "arm,cortex-a53"; 230 reg = <0x101>; 231 device_type = "cpu"; 232 power-domains = <&sysc R8A7795_PD_CA53_CPU1>; 233 next-level-cache = <&L2_CA53>; 234 enable-method = "psci"; 235 cpu-idle-states = <&CPU_SLEEP_1>; 236 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 237 operating-points-v2 = <&cluster1_opp>; 238 capacity-dmips-mhz = <535>; 239 }; 240 241 a53_2: cpu@102 { 242 compatible = "arm,cortex-a53"; 243 reg = <0x102>; 244 device_type = "cpu"; 245 power-domains = <&sysc R8A7795_PD_CA53_CPU2>; 246 next-level-cache = <&L2_CA53>; 247 enable-method = "psci"; 248 cpu-idle-states = <&CPU_SLEEP_1>; 249 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 250 operating-points-v2 = <&cluster1_opp>; 251 capacity-dmips-mhz = <535>; 252 }; 253 254 a53_3: cpu@103 { 255 compatible = "arm,cortex-a53"; 256 reg = <0x103>; 257 device_type = "cpu"; 258 power-domains = <&sysc R8A7795_PD_CA53_CPU3>; 259 next-level-cache = <&L2_CA53>; 260 enable-method = "psci"; 261 cpu-idle-states = <&CPU_SLEEP_1>; 262 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 263 operating-points-v2 = <&cluster1_opp>; 264 capacity-dmips-mhz = <535>; 265 }; 266 267 L2_CA57: cache-controller-0 { 268 compatible = "cache"; 269 power-domains = <&sysc R8A7795_PD_CA57_SCU>; 270 cache-unified; 271 cache-level = <2>; 272 }; 273 274 L2_CA53: cache-controller-1 { 275 compatible = "cache"; 276 power-domains = <&sysc R8A7795_PD_CA53_SCU>; 277 cache-unified; 278 cache-level = <2>; 279 }; 280 281 idle-states { 282 entry-method = "psci"; 283 284 CPU_SLEEP_0: cpu-sleep-0 { 285 compatible = "arm,idle-state"; 286 arm,psci-suspend-param = <0x0010000>; 287 local-timer-stop; 288 entry-latency-us = <400>; 289 exit-latency-us = <500>; 290 min-residency-us = <4000>; 291 }; 292 293 CPU_SLEEP_1: cpu-sleep-1 { 294 compatible = "arm,idle-state"; 295 arm,psci-suspend-param = <0x0010000>; 296 local-timer-stop; 297 entry-latency-us = <700>; 298 exit-latency-us = <700>; 299 min-residency-us = <5000>; 300 }; 301 }; 302 }; 303 304 extal_clk: extal { 305 compatible = "fixed-clock"; 306 #clock-cells = <0>; 307 /* This value must be overridden by the board */ 308 clock-frequency = <0>; 309 }; 310 311 extalr_clk: extalr { 312 compatible = "fixed-clock"; 313 #clock-cells = <0>; 314 /* This value must be overridden by the board */ 315 clock-frequency = <0>; 316 }; 317 318 /* External PCIe clock - can be overridden by the board */ 319 pcie_bus_clk: pcie_bus { 320 compatible = "fixed-clock"; 321 #clock-cells = <0>; 322 clock-frequency = <0>; 323 }; 324 325 pmu_a53 { 326 compatible = "arm,cortex-a53-pmu"; 327 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 328 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 329 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 330 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 331 interrupt-affinity = <&a53_0>, 332 <&a53_1>, 333 <&a53_2>, 334 <&a53_3>; 335 }; 336 337 pmu_a57 { 338 compatible = "arm,cortex-a57-pmu"; 339 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 340 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 341 <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 342 <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 343 interrupt-affinity = <&a57_0>, 344 <&a57_1>, 345 <&a57_2>, 346 <&a57_3>; 347 }; 348 349 psci { 350 compatible = "arm,psci-1.0", "arm,psci-0.2"; 351 method = "smc"; 352 }; 353 354 /* External SCIF clock - to be overridden by boards that provide it */ 355 scif_clk: scif { 356 compatible = "fixed-clock"; 357 #clock-cells = <0>; 358 clock-frequency = <0>; 359 }; 360 361 soc: soc { 362 compatible = "simple-bus"; 363 interrupt-parent = <&gic>; 364 365 #address-cells = <2>; 366 #size-cells = <2>; 367 ranges; 368 369 rwdt: watchdog@e6020000 { 370 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; 371 reg = <0 0xe6020000 0 0x0c>; 372 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 373 clocks = <&cpg CPG_MOD 402>; 374 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 375 resets = <&cpg 402>; 376 status = "disabled"; 377 }; 378 379 gpio0: gpio@e6050000 { 380 compatible = "renesas,gpio-r8a7795", 381 "renesas,rcar-gen3-gpio"; 382 reg = <0 0xe6050000 0 0x50>; 383 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 384 #gpio-cells = <2>; 385 gpio-controller; 386 gpio-ranges = <&pfc 0 0 16>; 387 #interrupt-cells = <2>; 388 interrupt-controller; 389 clocks = <&cpg CPG_MOD 912>; 390 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 391 resets = <&cpg 912>; 392 }; 393 394 gpio1: gpio@e6051000 { 395 compatible = "renesas,gpio-r8a7795", 396 "renesas,rcar-gen3-gpio"; 397 reg = <0 0xe6051000 0 0x50>; 398 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 399 #gpio-cells = <2>; 400 gpio-controller; 401 gpio-ranges = <&pfc 0 32 29>; 402 #interrupt-cells = <2>; 403 interrupt-controller; 404 clocks = <&cpg CPG_MOD 911>; 405 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 406 resets = <&cpg 911>; 407 }; 408 409 gpio2: gpio@e6052000 { 410 compatible = "renesas,gpio-r8a7795", 411 "renesas,rcar-gen3-gpio"; 412 reg = <0 0xe6052000 0 0x50>; 413 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 414 #gpio-cells = <2>; 415 gpio-controller; 416 gpio-ranges = <&pfc 0 64 15>; 417 #interrupt-cells = <2>; 418 interrupt-controller; 419 clocks = <&cpg CPG_MOD 910>; 420 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 421 resets = <&cpg 910>; 422 }; 423 424 gpio3: gpio@e6053000 { 425 compatible = "renesas,gpio-r8a7795", 426 "renesas,rcar-gen3-gpio"; 427 reg = <0 0xe6053000 0 0x50>; 428 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 429 #gpio-cells = <2>; 430 gpio-controller; 431 gpio-ranges = <&pfc 0 96 16>; 432 #interrupt-cells = <2>; 433 interrupt-controller; 434 clocks = <&cpg CPG_MOD 909>; 435 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 436 resets = <&cpg 909>; 437 }; 438 439 gpio4: gpio@e6054000 { 440 compatible = "renesas,gpio-r8a7795", 441 "renesas,rcar-gen3-gpio"; 442 reg = <0 0xe6054000 0 0x50>; 443 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 444 #gpio-cells = <2>; 445 gpio-controller; 446 gpio-ranges = <&pfc 0 128 18>; 447 #interrupt-cells = <2>; 448 interrupt-controller; 449 clocks = <&cpg CPG_MOD 908>; 450 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 451 resets = <&cpg 908>; 452 }; 453 454 gpio5: gpio@e6055000 { 455 compatible = "renesas,gpio-r8a7795", 456 "renesas,rcar-gen3-gpio"; 457 reg = <0 0xe6055000 0 0x50>; 458 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 459 #gpio-cells = <2>; 460 gpio-controller; 461 gpio-ranges = <&pfc 0 160 26>; 462 #interrupt-cells = <2>; 463 interrupt-controller; 464 clocks = <&cpg CPG_MOD 907>; 465 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 466 resets = <&cpg 907>; 467 }; 468 469 gpio6: gpio@e6055400 { 470 compatible = "renesas,gpio-r8a7795", 471 "renesas,rcar-gen3-gpio"; 472 reg = <0 0xe6055400 0 0x50>; 473 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 474 #gpio-cells = <2>; 475 gpio-controller; 476 gpio-ranges = <&pfc 0 192 32>; 477 #interrupt-cells = <2>; 478 interrupt-controller; 479 clocks = <&cpg CPG_MOD 906>; 480 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 481 resets = <&cpg 906>; 482 }; 483 484 gpio7: gpio@e6055800 { 485 compatible = "renesas,gpio-r8a7795", 486 "renesas,rcar-gen3-gpio"; 487 reg = <0 0xe6055800 0 0x50>; 488 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 489 #gpio-cells = <2>; 490 gpio-controller; 491 gpio-ranges = <&pfc 0 224 4>; 492 #interrupt-cells = <2>; 493 interrupt-controller; 494 clocks = <&cpg CPG_MOD 905>; 495 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 496 resets = <&cpg 905>; 497 }; 498 499 pfc: pinctrl@e6060000 { 500 compatible = "renesas,pfc-r8a7795"; 501 reg = <0 0xe6060000 0 0x50c>; 502 }; 503 504 cmt0: timer@e60f0000 { 505 compatible = "renesas,r8a7795-cmt0", 506 "renesas,rcar-gen3-cmt0"; 507 reg = <0 0xe60f0000 0 0x1004>; 508 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 510 clocks = <&cpg CPG_MOD 303>; 511 clock-names = "fck"; 512 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 513 resets = <&cpg 303>; 514 status = "disabled"; 515 }; 516 517 cmt1: timer@e6130000 { 518 compatible = "renesas,r8a7795-cmt1", 519 "renesas,rcar-gen3-cmt1"; 520 reg = <0 0xe6130000 0 0x1004>; 521 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 522 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 523 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 524 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 529 clocks = <&cpg CPG_MOD 302>; 530 clock-names = "fck"; 531 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 532 resets = <&cpg 302>; 533 status = "disabled"; 534 }; 535 536 cmt2: timer@e6140000 { 537 compatible = "renesas,r8a7795-cmt1", 538 "renesas,rcar-gen3-cmt1"; 539 reg = <0 0xe6140000 0 0x1004>; 540 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 541 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 542 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 543 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 544 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 545 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 546 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 547 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 548 clocks = <&cpg CPG_MOD 301>; 549 clock-names = "fck"; 550 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 551 resets = <&cpg 301>; 552 status = "disabled"; 553 }; 554 555 cmt3: timer@e6148000 { 556 compatible = "renesas,r8a7795-cmt1", 557 "renesas,rcar-gen3-cmt1"; 558 reg = <0 0xe6148000 0 0x1004>; 559 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 560 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 561 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 562 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 563 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 564 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 565 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 566 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&cpg CPG_MOD 300>; 568 clock-names = "fck"; 569 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 570 resets = <&cpg 300>; 571 status = "disabled"; 572 }; 573 574 cpg: clock-controller@e6150000 { 575 compatible = "renesas,r8a7795-cpg-mssr"; 576 reg = <0 0xe6150000 0 0x1000>; 577 clocks = <&extal_clk>, <&extalr_clk>; 578 clock-names = "extal", "extalr"; 579 #clock-cells = <2>; 580 #power-domain-cells = <0>; 581 #reset-cells = <1>; 582 }; 583 584 rst: reset-controller@e6160000 { 585 compatible = "renesas,r8a7795-rst"; 586 reg = <0 0xe6160000 0 0x0200>; 587 }; 588 589 sysc: system-controller@e6180000 { 590 compatible = "renesas,r8a7795-sysc"; 591 reg = <0 0xe6180000 0 0x0400>; 592 #power-domain-cells = <1>; 593 }; 594 595 tsc: thermal@e6198000 { 596 compatible = "renesas,r8a7795-thermal"; 597 reg = <0 0xe6198000 0 0x100>, 598 <0 0xe61a0000 0 0x100>, 599 <0 0xe61a8000 0 0x100>; 600 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 601 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 602 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 603 clocks = <&cpg CPG_MOD 522>; 604 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 605 resets = <&cpg 522>; 606 #thermal-sensor-cells = <1>; 607 }; 608 609 intc_ex: interrupt-controller@e61c0000 { 610 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc"; 611 #interrupt-cells = <2>; 612 interrupt-controller; 613 reg = <0 0xe61c0000 0 0x200>; 614 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 615 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 616 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 617 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 618 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 619 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 620 clocks = <&cpg CPG_MOD 407>; 621 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 622 resets = <&cpg 407>; 623 }; 624 625 tmu0: timer@e61e0000 { 626 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 627 reg = <0 0xe61e0000 0 0x30>; 628 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 629 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 630 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 631 clocks = <&cpg CPG_MOD 125>; 632 clock-names = "fck"; 633 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 634 resets = <&cpg 125>; 635 status = "disabled"; 636 }; 637 638 tmu1: timer@e6fc0000 { 639 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 640 reg = <0 0xe6fc0000 0 0x30>; 641 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 644 clocks = <&cpg CPG_MOD 124>; 645 clock-names = "fck"; 646 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 647 resets = <&cpg 124>; 648 status = "disabled"; 649 }; 650 651 tmu2: timer@e6fd0000 { 652 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 653 reg = <0 0xe6fd0000 0 0x30>; 654 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 655 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 656 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 657 clocks = <&cpg CPG_MOD 123>; 658 clock-names = "fck"; 659 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 660 resets = <&cpg 123>; 661 status = "disabled"; 662 }; 663 664 tmu3: timer@e6fe0000 { 665 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 666 reg = <0 0xe6fe0000 0 0x30>; 667 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 668 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 669 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 670 clocks = <&cpg CPG_MOD 122>; 671 clock-names = "fck"; 672 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 673 resets = <&cpg 122>; 674 status = "disabled"; 675 }; 676 677 tmu4: timer@ffc00000 { 678 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 679 reg = <0 0xffc00000 0 0x30>; 680 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 681 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 682 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 683 clocks = <&cpg CPG_MOD 121>; 684 clock-names = "fck"; 685 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 686 resets = <&cpg 121>; 687 status = "disabled"; 688 }; 689 690 i2c0: i2c@e6500000 { 691 #address-cells = <1>; 692 #size-cells = <0>; 693 compatible = "renesas,i2c-r8a7795", 694 "renesas,rcar-gen3-i2c"; 695 reg = <0 0xe6500000 0 0x40>; 696 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 697 clocks = <&cpg CPG_MOD 931>; 698 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 699 resets = <&cpg 931>; 700 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 701 <&dmac2 0x91>, <&dmac2 0x90>; 702 dma-names = "tx", "rx", "tx", "rx"; 703 i2c-scl-internal-delay-ns = <110>; 704 status = "disabled"; 705 }; 706 707 i2c1: i2c@e6508000 { 708 #address-cells = <1>; 709 #size-cells = <0>; 710 compatible = "renesas,i2c-r8a7795", 711 "renesas,rcar-gen3-i2c"; 712 reg = <0 0xe6508000 0 0x40>; 713 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 714 clocks = <&cpg CPG_MOD 930>; 715 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 716 resets = <&cpg 930>; 717 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 718 <&dmac2 0x93>, <&dmac2 0x92>; 719 dma-names = "tx", "rx", "tx", "rx"; 720 i2c-scl-internal-delay-ns = <6>; 721 status = "disabled"; 722 }; 723 724 i2c2: i2c@e6510000 { 725 #address-cells = <1>; 726 #size-cells = <0>; 727 compatible = "renesas,i2c-r8a7795", 728 "renesas,rcar-gen3-i2c"; 729 reg = <0 0xe6510000 0 0x40>; 730 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 731 clocks = <&cpg CPG_MOD 929>; 732 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 733 resets = <&cpg 929>; 734 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 735 <&dmac2 0x95>, <&dmac2 0x94>; 736 dma-names = "tx", "rx", "tx", "rx"; 737 i2c-scl-internal-delay-ns = <6>; 738 status = "disabled"; 739 }; 740 741 i2c3: i2c@e66d0000 { 742 #address-cells = <1>; 743 #size-cells = <0>; 744 compatible = "renesas,i2c-r8a7795", 745 "renesas,rcar-gen3-i2c"; 746 reg = <0 0xe66d0000 0 0x40>; 747 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 748 clocks = <&cpg CPG_MOD 928>; 749 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 750 resets = <&cpg 928>; 751 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 752 dma-names = "tx", "rx"; 753 i2c-scl-internal-delay-ns = <110>; 754 status = "disabled"; 755 }; 756 757 i2c4: i2c@e66d8000 { 758 #address-cells = <1>; 759 #size-cells = <0>; 760 compatible = "renesas,i2c-r8a7795", 761 "renesas,rcar-gen3-i2c"; 762 reg = <0 0xe66d8000 0 0x40>; 763 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 764 clocks = <&cpg CPG_MOD 927>; 765 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 766 resets = <&cpg 927>; 767 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 768 dma-names = "tx", "rx"; 769 i2c-scl-internal-delay-ns = <110>; 770 status = "disabled"; 771 }; 772 773 i2c5: i2c@e66e0000 { 774 #address-cells = <1>; 775 #size-cells = <0>; 776 compatible = "renesas,i2c-r8a7795", 777 "renesas,rcar-gen3-i2c"; 778 reg = <0 0xe66e0000 0 0x40>; 779 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 780 clocks = <&cpg CPG_MOD 919>; 781 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 782 resets = <&cpg 919>; 783 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 784 dma-names = "tx", "rx"; 785 i2c-scl-internal-delay-ns = <110>; 786 status = "disabled"; 787 }; 788 789 i2c6: i2c@e66e8000 { 790 #address-cells = <1>; 791 #size-cells = <0>; 792 compatible = "renesas,i2c-r8a7795", 793 "renesas,rcar-gen3-i2c"; 794 reg = <0 0xe66e8000 0 0x40>; 795 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 796 clocks = <&cpg CPG_MOD 918>; 797 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 798 resets = <&cpg 918>; 799 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 800 dma-names = "tx", "rx"; 801 i2c-scl-internal-delay-ns = <6>; 802 status = "disabled"; 803 }; 804 805 i2c_dvfs: i2c@e60b0000 { 806 #address-cells = <1>; 807 #size-cells = <0>; 808 compatible = "renesas,iic-r8a7795", 809 "renesas,rcar-gen3-iic", 810 "renesas,rmobile-iic"; 811 reg = <0 0xe60b0000 0 0x425>; 812 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 813 clocks = <&cpg CPG_MOD 926>; 814 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 815 resets = <&cpg 926>; 816 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 817 dma-names = "tx", "rx"; 818 status = "disabled"; 819 }; 820 821 hscif0: serial@e6540000 { 822 compatible = "renesas,hscif-r8a7795", 823 "renesas,rcar-gen3-hscif", 824 "renesas,hscif"; 825 reg = <0 0xe6540000 0 96>; 826 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 827 clocks = <&cpg CPG_MOD 520>, 828 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 829 <&scif_clk>; 830 clock-names = "fck", "brg_int", "scif_clk"; 831 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 832 <&dmac2 0x31>, <&dmac2 0x30>; 833 dma-names = "tx", "rx", "tx", "rx"; 834 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 835 resets = <&cpg 520>; 836 status = "disabled"; 837 }; 838 839 hscif1: serial@e6550000 { 840 compatible = "renesas,hscif-r8a7795", 841 "renesas,rcar-gen3-hscif", 842 "renesas,hscif"; 843 reg = <0 0xe6550000 0 96>; 844 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 845 clocks = <&cpg CPG_MOD 519>, 846 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 847 <&scif_clk>; 848 clock-names = "fck", "brg_int", "scif_clk"; 849 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 850 <&dmac2 0x33>, <&dmac2 0x32>; 851 dma-names = "tx", "rx", "tx", "rx"; 852 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 853 resets = <&cpg 519>; 854 status = "disabled"; 855 }; 856 857 hscif2: serial@e6560000 { 858 compatible = "renesas,hscif-r8a7795", 859 "renesas,rcar-gen3-hscif", 860 "renesas,hscif"; 861 reg = <0 0xe6560000 0 96>; 862 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 863 clocks = <&cpg CPG_MOD 518>, 864 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 865 <&scif_clk>; 866 clock-names = "fck", "brg_int", "scif_clk"; 867 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 868 <&dmac2 0x35>, <&dmac2 0x34>; 869 dma-names = "tx", "rx", "tx", "rx"; 870 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 871 resets = <&cpg 518>; 872 status = "disabled"; 873 }; 874 875 hscif3: serial@e66a0000 { 876 compatible = "renesas,hscif-r8a7795", 877 "renesas,rcar-gen3-hscif", 878 "renesas,hscif"; 879 reg = <0 0xe66a0000 0 96>; 880 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 881 clocks = <&cpg CPG_MOD 517>, 882 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 883 <&scif_clk>; 884 clock-names = "fck", "brg_int", "scif_clk"; 885 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 886 dma-names = "tx", "rx"; 887 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 888 resets = <&cpg 517>; 889 status = "disabled"; 890 }; 891 892 hscif4: serial@e66b0000 { 893 compatible = "renesas,hscif-r8a7795", 894 "renesas,rcar-gen3-hscif", 895 "renesas,hscif"; 896 reg = <0 0xe66b0000 0 96>; 897 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 898 clocks = <&cpg CPG_MOD 516>, 899 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 900 <&scif_clk>; 901 clock-names = "fck", "brg_int", "scif_clk"; 902 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 903 dma-names = "tx", "rx"; 904 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 905 resets = <&cpg 516>; 906 status = "disabled"; 907 }; 908 909 hsusb: usb@e6590000 { 910 compatible = "renesas,usbhs-r8a7795", 911 "renesas,rcar-gen3-usbhs"; 912 reg = <0 0xe6590000 0 0x200>; 913 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 914 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 915 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 916 <&usb_dmac1 0>, <&usb_dmac1 1>; 917 dma-names = "ch0", "ch1", "ch2", "ch3"; 918 renesas,buswait = <11>; 919 phys = <&usb2_phy0 3>; 920 phy-names = "usb"; 921 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 922 resets = <&cpg 704>, <&cpg 703>; 923 status = "disabled"; 924 }; 925 926 hsusb3: usb@e659c000 { 927 compatible = "renesas,usbhs-r8a7795", 928 "renesas,rcar-gen3-usbhs"; 929 reg = <0 0xe659c000 0 0x200>; 930 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 931 clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>; 932 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>, 933 <&usb_dmac3 0>, <&usb_dmac3 1>; 934 dma-names = "ch0", "ch1", "ch2", "ch3"; 935 renesas,buswait = <11>; 936 phys = <&usb2_phy3 3>; 937 phy-names = "usb"; 938 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 939 resets = <&cpg 705>, <&cpg 700>; 940 status = "disabled"; 941 }; 942 943 usb_dmac0: dma-controller@e65a0000 { 944 compatible = "renesas,r8a7795-usb-dmac", 945 "renesas,usb-dmac"; 946 reg = <0 0xe65a0000 0 0x100>; 947 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 949 interrupt-names = "ch0", "ch1"; 950 clocks = <&cpg CPG_MOD 330>; 951 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 952 resets = <&cpg 330>; 953 #dma-cells = <1>; 954 dma-channels = <2>; 955 }; 956 957 usb_dmac1: dma-controller@e65b0000 { 958 compatible = "renesas,r8a7795-usb-dmac", 959 "renesas,usb-dmac"; 960 reg = <0 0xe65b0000 0 0x100>; 961 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 963 interrupt-names = "ch0", "ch1"; 964 clocks = <&cpg CPG_MOD 331>; 965 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 966 resets = <&cpg 331>; 967 #dma-cells = <1>; 968 dma-channels = <2>; 969 }; 970 971 usb_dmac2: dma-controller@e6460000 { 972 compatible = "renesas,r8a7795-usb-dmac", 973 "renesas,usb-dmac"; 974 reg = <0 0xe6460000 0 0x100>; 975 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 977 interrupt-names = "ch0", "ch1"; 978 clocks = <&cpg CPG_MOD 326>; 979 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 980 resets = <&cpg 326>; 981 #dma-cells = <1>; 982 dma-channels = <2>; 983 }; 984 985 usb_dmac3: dma-controller@e6470000 { 986 compatible = "renesas,r8a7795-usb-dmac", 987 "renesas,usb-dmac"; 988 reg = <0 0xe6470000 0 0x100>; 989 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 991 interrupt-names = "ch0", "ch1"; 992 clocks = <&cpg CPG_MOD 329>; 993 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 994 resets = <&cpg 329>; 995 #dma-cells = <1>; 996 dma-channels = <2>; 997 }; 998 999 usb3_phy0: usb-phy@e65ee000 { 1000 compatible = "renesas,r8a7795-usb3-phy", 1001 "renesas,rcar-gen3-usb3-phy"; 1002 reg = <0 0xe65ee000 0 0x90>; 1003 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 1004 <&usb_extal_clk>; 1005 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 1006 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1007 resets = <&cpg 328>; 1008 #phy-cells = <0>; 1009 status = "disabled"; 1010 }; 1011 1012 arm_cc630p: crypto@e6601000 { 1013 compatible = "arm,cryptocell-630p-ree"; 1014 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 1015 reg = <0x0 0xe6601000 0 0x1000>; 1016 clocks = <&cpg CPG_MOD 229>; 1017 resets = <&cpg 229>; 1018 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1019 }; 1020 1021 dmac0: dma-controller@e6700000 { 1022 compatible = "renesas,dmac-r8a7795", 1023 "renesas,rcar-dmac"; 1024 reg = <0 0xe6700000 0 0x10000>; 1025 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 1026 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 1027 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 1028 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 1042 interrupt-names = "error", 1043 "ch0", "ch1", "ch2", "ch3", 1044 "ch4", "ch5", "ch6", "ch7", 1045 "ch8", "ch9", "ch10", "ch11", 1046 "ch12", "ch13", "ch14", "ch15"; 1047 clocks = <&cpg CPG_MOD 219>; 1048 clock-names = "fck"; 1049 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1050 resets = <&cpg 219>; 1051 #dma-cells = <1>; 1052 dma-channels = <16>; 1053 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1054 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1055 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1056 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1057 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1058 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1059 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1060 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1061 }; 1062 1063 dmac1: dma-controller@e7300000 { 1064 compatible = "renesas,dmac-r8a7795", 1065 "renesas,rcar-dmac"; 1066 reg = <0 0xe7300000 0 0x10000>; 1067 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 1068 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 1069 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 1070 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 1071 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 1072 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 1073 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 1074 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 1075 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 1076 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 1077 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 1078 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 1079 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1080 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1081 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1082 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1083 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1084 interrupt-names = "error", 1085 "ch0", "ch1", "ch2", "ch3", 1086 "ch4", "ch5", "ch6", "ch7", 1087 "ch8", "ch9", "ch10", "ch11", 1088 "ch12", "ch13", "ch14", "ch15"; 1089 clocks = <&cpg CPG_MOD 218>; 1090 clock-names = "fck"; 1091 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1092 resets = <&cpg 218>; 1093 #dma-cells = <1>; 1094 dma-channels = <16>; 1095 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 1096 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 1097 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 1098 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 1099 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 1100 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 1101 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 1102 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 1103 }; 1104 1105 dmac2: dma-controller@e7310000 { 1106 compatible = "renesas,dmac-r8a7795", 1107 "renesas,rcar-dmac"; 1108 reg = <0 0xe7310000 0 0x10000>; 1109 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 1110 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 1111 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1112 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1113 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 1114 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1115 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 1116 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1117 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1118 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1119 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1120 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1121 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1122 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1123 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1124 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1125 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1126 interrupt-names = "error", 1127 "ch0", "ch1", "ch2", "ch3", 1128 "ch4", "ch5", "ch6", "ch7", 1129 "ch8", "ch9", "ch10", "ch11", 1130 "ch12", "ch13", "ch14", "ch15"; 1131 clocks = <&cpg CPG_MOD 217>; 1132 clock-names = "fck"; 1133 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1134 resets = <&cpg 217>; 1135 #dma-cells = <1>; 1136 dma-channels = <16>; 1137 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 1138 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 1139 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 1140 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 1141 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 1142 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 1143 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 1144 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 1145 }; 1146 1147 ipmmu_ds0: iommu@e6740000 { 1148 compatible = "renesas,ipmmu-r8a7795"; 1149 reg = <0 0xe6740000 0 0x1000>; 1150 renesas,ipmmu-main = <&ipmmu_mm 0>; 1151 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1152 #iommu-cells = <1>; 1153 }; 1154 1155 ipmmu_ds1: iommu@e7740000 { 1156 compatible = "renesas,ipmmu-r8a7795"; 1157 reg = <0 0xe7740000 0 0x1000>; 1158 renesas,ipmmu-main = <&ipmmu_mm 1>; 1159 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1160 #iommu-cells = <1>; 1161 }; 1162 1163 ipmmu_hc: iommu@e6570000 { 1164 compatible = "renesas,ipmmu-r8a7795"; 1165 reg = <0 0xe6570000 0 0x1000>; 1166 renesas,ipmmu-main = <&ipmmu_mm 2>; 1167 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1168 #iommu-cells = <1>; 1169 }; 1170 1171 ipmmu_ir: iommu@ff8b0000 { 1172 compatible = "renesas,ipmmu-r8a7795"; 1173 reg = <0 0xff8b0000 0 0x1000>; 1174 renesas,ipmmu-main = <&ipmmu_mm 3>; 1175 power-domains = <&sysc R8A7795_PD_A3IR>; 1176 #iommu-cells = <1>; 1177 }; 1178 1179 ipmmu_mm: iommu@e67b0000 { 1180 compatible = "renesas,ipmmu-r8a7795"; 1181 reg = <0 0xe67b0000 0 0x1000>; 1182 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1183 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1184 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1185 #iommu-cells = <1>; 1186 }; 1187 1188 ipmmu_mp0: iommu@ec670000 { 1189 compatible = "renesas,ipmmu-r8a7795"; 1190 reg = <0 0xec670000 0 0x1000>; 1191 renesas,ipmmu-main = <&ipmmu_mm 4>; 1192 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1193 #iommu-cells = <1>; 1194 }; 1195 1196 ipmmu_pv0: iommu@fd800000 { 1197 compatible = "renesas,ipmmu-r8a7795"; 1198 reg = <0 0xfd800000 0 0x1000>; 1199 renesas,ipmmu-main = <&ipmmu_mm 6>; 1200 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1201 #iommu-cells = <1>; 1202 }; 1203 1204 ipmmu_pv1: iommu@fd950000 { 1205 compatible = "renesas,ipmmu-r8a7795"; 1206 reg = <0 0xfd950000 0 0x1000>; 1207 renesas,ipmmu-main = <&ipmmu_mm 7>; 1208 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1209 #iommu-cells = <1>; 1210 }; 1211 1212 ipmmu_pv2: iommu@fd960000 { 1213 compatible = "renesas,ipmmu-r8a7795"; 1214 reg = <0 0xfd960000 0 0x1000>; 1215 renesas,ipmmu-main = <&ipmmu_mm 8>; 1216 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1217 #iommu-cells = <1>; 1218 }; 1219 1220 ipmmu_pv3: iommu@fd970000 { 1221 compatible = "renesas,ipmmu-r8a7795"; 1222 reg = <0 0xfd970000 0 0x1000>; 1223 renesas,ipmmu-main = <&ipmmu_mm 9>; 1224 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1225 #iommu-cells = <1>; 1226 }; 1227 1228 ipmmu_rt: iommu@ffc80000 { 1229 compatible = "renesas,ipmmu-r8a7795"; 1230 reg = <0 0xffc80000 0 0x1000>; 1231 renesas,ipmmu-main = <&ipmmu_mm 10>; 1232 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1233 #iommu-cells = <1>; 1234 }; 1235 1236 ipmmu_vc0: iommu@fe6b0000 { 1237 compatible = "renesas,ipmmu-r8a7795"; 1238 reg = <0 0xfe6b0000 0 0x1000>; 1239 renesas,ipmmu-main = <&ipmmu_mm 12>; 1240 power-domains = <&sysc R8A7795_PD_A3VC>; 1241 #iommu-cells = <1>; 1242 }; 1243 1244 ipmmu_vc1: iommu@fe6f0000 { 1245 compatible = "renesas,ipmmu-r8a7795"; 1246 reg = <0 0xfe6f0000 0 0x1000>; 1247 renesas,ipmmu-main = <&ipmmu_mm 13>; 1248 power-domains = <&sysc R8A7795_PD_A3VC>; 1249 #iommu-cells = <1>; 1250 }; 1251 1252 ipmmu_vi0: iommu@febd0000 { 1253 compatible = "renesas,ipmmu-r8a7795"; 1254 reg = <0 0xfebd0000 0 0x1000>; 1255 renesas,ipmmu-main = <&ipmmu_mm 14>; 1256 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1257 #iommu-cells = <1>; 1258 }; 1259 1260 ipmmu_vi1: iommu@febe0000 { 1261 compatible = "renesas,ipmmu-r8a7795"; 1262 reg = <0 0xfebe0000 0 0x1000>; 1263 renesas,ipmmu-main = <&ipmmu_mm 15>; 1264 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1265 #iommu-cells = <1>; 1266 }; 1267 1268 ipmmu_vp0: iommu@fe990000 { 1269 compatible = "renesas,ipmmu-r8a7795"; 1270 reg = <0 0xfe990000 0 0x1000>; 1271 renesas,ipmmu-main = <&ipmmu_mm 16>; 1272 power-domains = <&sysc R8A7795_PD_A3VP>; 1273 #iommu-cells = <1>; 1274 }; 1275 1276 ipmmu_vp1: iommu@fe980000 { 1277 compatible = "renesas,ipmmu-r8a7795"; 1278 reg = <0 0xfe980000 0 0x1000>; 1279 renesas,ipmmu-main = <&ipmmu_mm 17>; 1280 power-domains = <&sysc R8A7795_PD_A3VP>; 1281 #iommu-cells = <1>; 1282 }; 1283 1284 avb: ethernet@e6800000 { 1285 compatible = "renesas,etheravb-r8a7795", 1286 "renesas,etheravb-rcar-gen3"; 1287 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1288 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1289 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1290 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1291 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1292 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1293 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1294 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1295 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1296 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1297 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1298 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1299 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1300 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1301 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1302 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1303 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1304 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1305 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1306 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1307 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1308 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1309 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1310 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1311 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1312 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1313 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1314 "ch4", "ch5", "ch6", "ch7", 1315 "ch8", "ch9", "ch10", "ch11", 1316 "ch12", "ch13", "ch14", "ch15", 1317 "ch16", "ch17", "ch18", "ch19", 1318 "ch20", "ch21", "ch22", "ch23", 1319 "ch24"; 1320 clocks = <&cpg CPG_MOD 812>; 1321 clock-names = "fck"; 1322 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1323 resets = <&cpg 812>; 1324 phy-mode = "rgmii"; 1325 rx-internal-delay-ps = <0>; 1326 tx-internal-delay-ps = <0>; 1327 iommus = <&ipmmu_ds0 16>; 1328 #address-cells = <1>; 1329 #size-cells = <0>; 1330 status = "disabled"; 1331 }; 1332 1333 can0: can@e6c30000 { 1334 compatible = "renesas,can-r8a7795", 1335 "renesas,rcar-gen3-can"; 1336 reg = <0 0xe6c30000 0 0x1000>; 1337 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1338 clocks = <&cpg CPG_MOD 916>, 1339 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1340 <&can_clk>; 1341 clock-names = "clkp1", "clkp2", "can_clk"; 1342 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1343 assigned-clock-rates = <40000000>; 1344 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1345 resets = <&cpg 916>; 1346 status = "disabled"; 1347 }; 1348 1349 can1: can@e6c38000 { 1350 compatible = "renesas,can-r8a7795", 1351 "renesas,rcar-gen3-can"; 1352 reg = <0 0xe6c38000 0 0x1000>; 1353 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1354 clocks = <&cpg CPG_MOD 915>, 1355 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1356 <&can_clk>; 1357 clock-names = "clkp1", "clkp2", "can_clk"; 1358 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1359 assigned-clock-rates = <40000000>; 1360 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1361 resets = <&cpg 915>; 1362 status = "disabled"; 1363 }; 1364 1365 canfd: can@e66c0000 { 1366 compatible = "renesas,r8a7795-canfd", 1367 "renesas,rcar-gen3-canfd"; 1368 reg = <0 0xe66c0000 0 0x8000>; 1369 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1370 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1371 clocks = <&cpg CPG_MOD 914>, 1372 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1373 <&can_clk>; 1374 clock-names = "fck", "canfd", "can_clk"; 1375 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1376 assigned-clock-rates = <40000000>; 1377 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1378 resets = <&cpg 914>; 1379 status = "disabled"; 1380 1381 channel0 { 1382 status = "disabled"; 1383 }; 1384 1385 channel1 { 1386 status = "disabled"; 1387 }; 1388 }; 1389 1390 pwm0: pwm@e6e30000 { 1391 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1392 reg = <0 0xe6e30000 0 0x8>; 1393 clocks = <&cpg CPG_MOD 523>; 1394 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1395 resets = <&cpg 523>; 1396 #pwm-cells = <2>; 1397 status = "disabled"; 1398 }; 1399 1400 pwm1: pwm@e6e31000 { 1401 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1402 reg = <0 0xe6e31000 0 0x8>; 1403 clocks = <&cpg CPG_MOD 523>; 1404 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1405 resets = <&cpg 523>; 1406 #pwm-cells = <2>; 1407 status = "disabled"; 1408 }; 1409 1410 pwm2: pwm@e6e32000 { 1411 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1412 reg = <0 0xe6e32000 0 0x8>; 1413 clocks = <&cpg CPG_MOD 523>; 1414 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1415 resets = <&cpg 523>; 1416 #pwm-cells = <2>; 1417 status = "disabled"; 1418 }; 1419 1420 pwm3: pwm@e6e33000 { 1421 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1422 reg = <0 0xe6e33000 0 0x8>; 1423 clocks = <&cpg CPG_MOD 523>; 1424 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1425 resets = <&cpg 523>; 1426 #pwm-cells = <2>; 1427 status = "disabled"; 1428 }; 1429 1430 pwm4: pwm@e6e34000 { 1431 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1432 reg = <0 0xe6e34000 0 0x8>; 1433 clocks = <&cpg CPG_MOD 523>; 1434 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1435 resets = <&cpg 523>; 1436 #pwm-cells = <2>; 1437 status = "disabled"; 1438 }; 1439 1440 pwm5: pwm@e6e35000 { 1441 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1442 reg = <0 0xe6e35000 0 0x8>; 1443 clocks = <&cpg CPG_MOD 523>; 1444 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1445 resets = <&cpg 523>; 1446 #pwm-cells = <2>; 1447 status = "disabled"; 1448 }; 1449 1450 pwm6: pwm@e6e36000 { 1451 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1452 reg = <0 0xe6e36000 0 0x8>; 1453 clocks = <&cpg CPG_MOD 523>; 1454 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1455 resets = <&cpg 523>; 1456 #pwm-cells = <2>; 1457 status = "disabled"; 1458 }; 1459 1460 scif0: serial@e6e60000 { 1461 compatible = "renesas,scif-r8a7795", 1462 "renesas,rcar-gen3-scif", "renesas,scif"; 1463 reg = <0 0xe6e60000 0 64>; 1464 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1465 clocks = <&cpg CPG_MOD 207>, 1466 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1467 <&scif_clk>; 1468 clock-names = "fck", "brg_int", "scif_clk"; 1469 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1470 <&dmac2 0x51>, <&dmac2 0x50>; 1471 dma-names = "tx", "rx", "tx", "rx"; 1472 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1473 resets = <&cpg 207>; 1474 status = "disabled"; 1475 }; 1476 1477 scif1: serial@e6e68000 { 1478 compatible = "renesas,scif-r8a7795", 1479 "renesas,rcar-gen3-scif", "renesas,scif"; 1480 reg = <0 0xe6e68000 0 64>; 1481 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1482 clocks = <&cpg CPG_MOD 206>, 1483 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1484 <&scif_clk>; 1485 clock-names = "fck", "brg_int", "scif_clk"; 1486 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1487 <&dmac2 0x53>, <&dmac2 0x52>; 1488 dma-names = "tx", "rx", "tx", "rx"; 1489 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1490 resets = <&cpg 206>; 1491 status = "disabled"; 1492 }; 1493 1494 scif2: serial@e6e88000 { 1495 compatible = "renesas,scif-r8a7795", 1496 "renesas,rcar-gen3-scif", "renesas,scif"; 1497 reg = <0 0xe6e88000 0 64>; 1498 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1499 clocks = <&cpg CPG_MOD 310>, 1500 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1501 <&scif_clk>; 1502 clock-names = "fck", "brg_int", "scif_clk"; 1503 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1504 <&dmac2 0x13>, <&dmac2 0x12>; 1505 dma-names = "tx", "rx", "tx", "rx"; 1506 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1507 resets = <&cpg 310>; 1508 status = "disabled"; 1509 }; 1510 1511 scif3: serial@e6c50000 { 1512 compatible = "renesas,scif-r8a7795", 1513 "renesas,rcar-gen3-scif", "renesas,scif"; 1514 reg = <0 0xe6c50000 0 64>; 1515 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1516 clocks = <&cpg CPG_MOD 204>, 1517 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1518 <&scif_clk>; 1519 clock-names = "fck", "brg_int", "scif_clk"; 1520 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1521 dma-names = "tx", "rx"; 1522 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1523 resets = <&cpg 204>; 1524 status = "disabled"; 1525 }; 1526 1527 scif4: serial@e6c40000 { 1528 compatible = "renesas,scif-r8a7795", 1529 "renesas,rcar-gen3-scif", "renesas,scif"; 1530 reg = <0 0xe6c40000 0 64>; 1531 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1532 clocks = <&cpg CPG_MOD 203>, 1533 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1534 <&scif_clk>; 1535 clock-names = "fck", "brg_int", "scif_clk"; 1536 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1537 dma-names = "tx", "rx"; 1538 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1539 resets = <&cpg 203>; 1540 status = "disabled"; 1541 }; 1542 1543 scif5: serial@e6f30000 { 1544 compatible = "renesas,scif-r8a7795", 1545 "renesas,rcar-gen3-scif", "renesas,scif"; 1546 reg = <0 0xe6f30000 0 64>; 1547 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1548 clocks = <&cpg CPG_MOD 202>, 1549 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1550 <&scif_clk>; 1551 clock-names = "fck", "brg_int", "scif_clk"; 1552 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1553 <&dmac2 0x5b>, <&dmac2 0x5a>; 1554 dma-names = "tx", "rx", "tx", "rx"; 1555 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1556 resets = <&cpg 202>; 1557 status = "disabled"; 1558 }; 1559 1560 tpu: pwm@e6e80000 { 1561 compatible = "renesas,tpu-r8a7795", "renesas,tpu"; 1562 reg = <0 0xe6e80000 0 0x148>; 1563 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1564 clocks = <&cpg CPG_MOD 304>; 1565 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1566 resets = <&cpg 304>; 1567 #pwm-cells = <3>; 1568 status = "disabled"; 1569 }; 1570 1571 msiof0: spi@e6e90000 { 1572 compatible = "renesas,msiof-r8a7795", 1573 "renesas,rcar-gen3-msiof"; 1574 reg = <0 0xe6e90000 0 0x0064>; 1575 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1576 clocks = <&cpg CPG_MOD 211>; 1577 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1578 <&dmac2 0x41>, <&dmac2 0x40>; 1579 dma-names = "tx", "rx", "tx", "rx"; 1580 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1581 resets = <&cpg 211>; 1582 #address-cells = <1>; 1583 #size-cells = <0>; 1584 status = "disabled"; 1585 }; 1586 1587 msiof1: spi@e6ea0000 { 1588 compatible = "renesas,msiof-r8a7795", 1589 "renesas,rcar-gen3-msiof"; 1590 reg = <0 0xe6ea0000 0 0x0064>; 1591 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1592 clocks = <&cpg CPG_MOD 210>; 1593 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1594 <&dmac2 0x43>, <&dmac2 0x42>; 1595 dma-names = "tx", "rx", "tx", "rx"; 1596 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1597 resets = <&cpg 210>; 1598 #address-cells = <1>; 1599 #size-cells = <0>; 1600 status = "disabled"; 1601 }; 1602 1603 msiof2: spi@e6c00000 { 1604 compatible = "renesas,msiof-r8a7795", 1605 "renesas,rcar-gen3-msiof"; 1606 reg = <0 0xe6c00000 0 0x0064>; 1607 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1608 clocks = <&cpg CPG_MOD 209>; 1609 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1610 dma-names = "tx", "rx"; 1611 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1612 resets = <&cpg 209>; 1613 #address-cells = <1>; 1614 #size-cells = <0>; 1615 status = "disabled"; 1616 }; 1617 1618 msiof3: spi@e6c10000 { 1619 compatible = "renesas,msiof-r8a7795", 1620 "renesas,rcar-gen3-msiof"; 1621 reg = <0 0xe6c10000 0 0x0064>; 1622 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1623 clocks = <&cpg CPG_MOD 208>; 1624 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1625 dma-names = "tx", "rx"; 1626 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1627 resets = <&cpg 208>; 1628 #address-cells = <1>; 1629 #size-cells = <0>; 1630 status = "disabled"; 1631 }; 1632 1633 vin0: video@e6ef0000 { 1634 compatible = "renesas,vin-r8a7795"; 1635 reg = <0 0xe6ef0000 0 0x1000>; 1636 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1637 clocks = <&cpg CPG_MOD 811>; 1638 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1639 resets = <&cpg 811>; 1640 renesas,id = <0>; 1641 status = "disabled"; 1642 1643 ports { 1644 #address-cells = <1>; 1645 #size-cells = <0>; 1646 1647 port@1 { 1648 #address-cells = <1>; 1649 #size-cells = <0>; 1650 1651 reg = <1>; 1652 1653 vin0csi20: endpoint@0 { 1654 reg = <0>; 1655 remote-endpoint = <&csi20vin0>; 1656 }; 1657 vin0csi40: endpoint@2 { 1658 reg = <2>; 1659 remote-endpoint = <&csi40vin0>; 1660 }; 1661 }; 1662 }; 1663 }; 1664 1665 vin1: video@e6ef1000 { 1666 compatible = "renesas,vin-r8a7795"; 1667 reg = <0 0xe6ef1000 0 0x1000>; 1668 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1669 clocks = <&cpg CPG_MOD 810>; 1670 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1671 resets = <&cpg 810>; 1672 renesas,id = <1>; 1673 status = "disabled"; 1674 1675 ports { 1676 #address-cells = <1>; 1677 #size-cells = <0>; 1678 1679 port@1 { 1680 #address-cells = <1>; 1681 #size-cells = <0>; 1682 1683 reg = <1>; 1684 1685 vin1csi20: endpoint@0 { 1686 reg = <0>; 1687 remote-endpoint = <&csi20vin1>; 1688 }; 1689 vin1csi40: endpoint@2 { 1690 reg = <2>; 1691 remote-endpoint = <&csi40vin1>; 1692 }; 1693 }; 1694 }; 1695 }; 1696 1697 vin2: video@e6ef2000 { 1698 compatible = "renesas,vin-r8a7795"; 1699 reg = <0 0xe6ef2000 0 0x1000>; 1700 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1701 clocks = <&cpg CPG_MOD 809>; 1702 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1703 resets = <&cpg 809>; 1704 renesas,id = <2>; 1705 status = "disabled"; 1706 1707 ports { 1708 #address-cells = <1>; 1709 #size-cells = <0>; 1710 1711 port@1 { 1712 #address-cells = <1>; 1713 #size-cells = <0>; 1714 1715 reg = <1>; 1716 1717 vin2csi20: endpoint@0 { 1718 reg = <0>; 1719 remote-endpoint = <&csi20vin2>; 1720 }; 1721 vin2csi40: endpoint@2 { 1722 reg = <2>; 1723 remote-endpoint = <&csi40vin2>; 1724 }; 1725 }; 1726 }; 1727 }; 1728 1729 vin3: video@e6ef3000 { 1730 compatible = "renesas,vin-r8a7795"; 1731 reg = <0 0xe6ef3000 0 0x1000>; 1732 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1733 clocks = <&cpg CPG_MOD 808>; 1734 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1735 resets = <&cpg 808>; 1736 renesas,id = <3>; 1737 status = "disabled"; 1738 1739 ports { 1740 #address-cells = <1>; 1741 #size-cells = <0>; 1742 1743 port@1 { 1744 #address-cells = <1>; 1745 #size-cells = <0>; 1746 1747 reg = <1>; 1748 1749 vin3csi20: endpoint@0 { 1750 reg = <0>; 1751 remote-endpoint = <&csi20vin3>; 1752 }; 1753 vin3csi40: endpoint@2 { 1754 reg = <2>; 1755 remote-endpoint = <&csi40vin3>; 1756 }; 1757 }; 1758 }; 1759 }; 1760 1761 vin4: video@e6ef4000 { 1762 compatible = "renesas,vin-r8a7795"; 1763 reg = <0 0xe6ef4000 0 0x1000>; 1764 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1765 clocks = <&cpg CPG_MOD 807>; 1766 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1767 resets = <&cpg 807>; 1768 renesas,id = <4>; 1769 status = "disabled"; 1770 1771 ports { 1772 #address-cells = <1>; 1773 #size-cells = <0>; 1774 1775 port@1 { 1776 #address-cells = <1>; 1777 #size-cells = <0>; 1778 1779 reg = <1>; 1780 1781 vin4csi20: endpoint@0 { 1782 reg = <0>; 1783 remote-endpoint = <&csi20vin4>; 1784 }; 1785 vin4csi41: endpoint@3 { 1786 reg = <3>; 1787 remote-endpoint = <&csi41vin4>; 1788 }; 1789 }; 1790 }; 1791 }; 1792 1793 vin5: video@e6ef5000 { 1794 compatible = "renesas,vin-r8a7795"; 1795 reg = <0 0xe6ef5000 0 0x1000>; 1796 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1797 clocks = <&cpg CPG_MOD 806>; 1798 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1799 resets = <&cpg 806>; 1800 renesas,id = <5>; 1801 status = "disabled"; 1802 1803 ports { 1804 #address-cells = <1>; 1805 #size-cells = <0>; 1806 1807 port@1 { 1808 #address-cells = <1>; 1809 #size-cells = <0>; 1810 1811 reg = <1>; 1812 1813 vin5csi20: endpoint@0 { 1814 reg = <0>; 1815 remote-endpoint = <&csi20vin5>; 1816 }; 1817 vin5csi41: endpoint@3 { 1818 reg = <3>; 1819 remote-endpoint = <&csi41vin5>; 1820 }; 1821 }; 1822 }; 1823 }; 1824 1825 vin6: video@e6ef6000 { 1826 compatible = "renesas,vin-r8a7795"; 1827 reg = <0 0xe6ef6000 0 0x1000>; 1828 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1829 clocks = <&cpg CPG_MOD 805>; 1830 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1831 resets = <&cpg 805>; 1832 renesas,id = <6>; 1833 status = "disabled"; 1834 1835 ports { 1836 #address-cells = <1>; 1837 #size-cells = <0>; 1838 1839 port@1 { 1840 #address-cells = <1>; 1841 #size-cells = <0>; 1842 1843 reg = <1>; 1844 1845 vin6csi20: endpoint@0 { 1846 reg = <0>; 1847 remote-endpoint = <&csi20vin6>; 1848 }; 1849 vin6csi41: endpoint@3 { 1850 reg = <3>; 1851 remote-endpoint = <&csi41vin6>; 1852 }; 1853 }; 1854 }; 1855 }; 1856 1857 vin7: video@e6ef7000 { 1858 compatible = "renesas,vin-r8a7795"; 1859 reg = <0 0xe6ef7000 0 0x1000>; 1860 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1861 clocks = <&cpg CPG_MOD 804>; 1862 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1863 resets = <&cpg 804>; 1864 renesas,id = <7>; 1865 status = "disabled"; 1866 1867 ports { 1868 #address-cells = <1>; 1869 #size-cells = <0>; 1870 1871 port@1 { 1872 #address-cells = <1>; 1873 #size-cells = <0>; 1874 1875 reg = <1>; 1876 1877 vin7csi20: endpoint@0 { 1878 reg = <0>; 1879 remote-endpoint = <&csi20vin7>; 1880 }; 1881 vin7csi41: endpoint@3 { 1882 reg = <3>; 1883 remote-endpoint = <&csi41vin7>; 1884 }; 1885 }; 1886 }; 1887 }; 1888 1889 drif00: rif@e6f40000 { 1890 compatible = "renesas,r8a7795-drif", 1891 "renesas,rcar-gen3-drif"; 1892 reg = <0 0xe6f40000 0 0x64>; 1893 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1894 clocks = <&cpg CPG_MOD 515>; 1895 clock-names = "fck"; 1896 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1897 dma-names = "rx", "rx"; 1898 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1899 resets = <&cpg 515>; 1900 renesas,bonding = <&drif01>; 1901 status = "disabled"; 1902 }; 1903 1904 drif01: rif@e6f50000 { 1905 compatible = "renesas,r8a7795-drif", 1906 "renesas,rcar-gen3-drif"; 1907 reg = <0 0xe6f50000 0 0x64>; 1908 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1909 clocks = <&cpg CPG_MOD 514>; 1910 clock-names = "fck"; 1911 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1912 dma-names = "rx", "rx"; 1913 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1914 resets = <&cpg 514>; 1915 renesas,bonding = <&drif00>; 1916 status = "disabled"; 1917 }; 1918 1919 drif10: rif@e6f60000 { 1920 compatible = "renesas,r8a7795-drif", 1921 "renesas,rcar-gen3-drif"; 1922 reg = <0 0xe6f60000 0 0x64>; 1923 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1924 clocks = <&cpg CPG_MOD 513>; 1925 clock-names = "fck"; 1926 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1927 dma-names = "rx", "rx"; 1928 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1929 resets = <&cpg 513>; 1930 renesas,bonding = <&drif11>; 1931 status = "disabled"; 1932 }; 1933 1934 drif11: rif@e6f70000 { 1935 compatible = "renesas,r8a7795-drif", 1936 "renesas,rcar-gen3-drif"; 1937 reg = <0 0xe6f70000 0 0x64>; 1938 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1939 clocks = <&cpg CPG_MOD 512>; 1940 clock-names = "fck"; 1941 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1942 dma-names = "rx", "rx"; 1943 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1944 resets = <&cpg 512>; 1945 renesas,bonding = <&drif10>; 1946 status = "disabled"; 1947 }; 1948 1949 drif20: rif@e6f80000 { 1950 compatible = "renesas,r8a7795-drif", 1951 "renesas,rcar-gen3-drif"; 1952 reg = <0 0xe6f80000 0 0x64>; 1953 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1954 clocks = <&cpg CPG_MOD 511>; 1955 clock-names = "fck"; 1956 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1957 dma-names = "rx", "rx"; 1958 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1959 resets = <&cpg 511>; 1960 renesas,bonding = <&drif21>; 1961 status = "disabled"; 1962 }; 1963 1964 drif21: rif@e6f90000 { 1965 compatible = "renesas,r8a7795-drif", 1966 "renesas,rcar-gen3-drif"; 1967 reg = <0 0xe6f90000 0 0x64>; 1968 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1969 clocks = <&cpg CPG_MOD 510>; 1970 clock-names = "fck"; 1971 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1972 dma-names = "rx", "rx"; 1973 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1974 resets = <&cpg 510>; 1975 renesas,bonding = <&drif20>; 1976 status = "disabled"; 1977 }; 1978 1979 drif30: rif@e6fa0000 { 1980 compatible = "renesas,r8a7795-drif", 1981 "renesas,rcar-gen3-drif"; 1982 reg = <0 0xe6fa0000 0 0x64>; 1983 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1984 clocks = <&cpg CPG_MOD 509>; 1985 clock-names = "fck"; 1986 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1987 dma-names = "rx", "rx"; 1988 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1989 resets = <&cpg 509>; 1990 renesas,bonding = <&drif31>; 1991 status = "disabled"; 1992 }; 1993 1994 drif31: rif@e6fb0000 { 1995 compatible = "renesas,r8a7795-drif", 1996 "renesas,rcar-gen3-drif"; 1997 reg = <0 0xe6fb0000 0 0x64>; 1998 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1999 clocks = <&cpg CPG_MOD 508>; 2000 clock-names = "fck"; 2001 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 2002 dma-names = "rx", "rx"; 2003 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2004 resets = <&cpg 508>; 2005 renesas,bonding = <&drif30>; 2006 status = "disabled"; 2007 }; 2008 2009 rcar_sound: sound@ec500000 { 2010 /* 2011 * #sound-dai-cells is required 2012 * 2013 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 2014 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 2015 */ 2016 /* 2017 * #clock-cells is required for audio_clkout0/1/2/3 2018 * 2019 * clkout : #clock-cells = <0>; <&rcar_sound>; 2020 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 2021 */ 2022 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; 2023 reg = <0 0xec500000 0 0x1000>, /* SCU */ 2024 <0 0xec5a0000 0 0x100>, /* ADG */ 2025 <0 0xec540000 0 0x1000>, /* SSIU */ 2026 <0 0xec541000 0 0x280>, /* SSI */ 2027 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 2028 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 2029 2030 clocks = <&cpg CPG_MOD 1005>, 2031 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 2032 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 2033 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 2034 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 2035 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 2036 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 2037 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 2038 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 2039 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 2040 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 2041 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 2042 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 2043 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 2044 <&audio_clk_a>, <&audio_clk_b>, 2045 <&audio_clk_c>, 2046 <&cpg CPG_CORE R8A7795_CLK_S0D4>; 2047 clock-names = "ssi-all", 2048 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 2049 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 2050 "ssi.1", "ssi.0", 2051 "src.9", "src.8", "src.7", "src.6", 2052 "src.5", "src.4", "src.3", "src.2", 2053 "src.1", "src.0", 2054 "mix.1", "mix.0", 2055 "ctu.1", "ctu.0", 2056 "dvc.0", "dvc.1", 2057 "clk_a", "clk_b", "clk_c", "clk_i"; 2058 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2059 resets = <&cpg 1005>, 2060 <&cpg 1006>, <&cpg 1007>, 2061 <&cpg 1008>, <&cpg 1009>, 2062 <&cpg 1010>, <&cpg 1011>, 2063 <&cpg 1012>, <&cpg 1013>, 2064 <&cpg 1014>, <&cpg 1015>; 2065 reset-names = "ssi-all", 2066 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 2067 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 2068 "ssi.1", "ssi.0"; 2069 status = "disabled"; 2070 2071 rcar_sound,dvc { 2072 dvc0: dvc-0 { 2073 dmas = <&audma1 0xbc>; 2074 dma-names = "tx"; 2075 }; 2076 dvc1: dvc-1 { 2077 dmas = <&audma1 0xbe>; 2078 dma-names = "tx"; 2079 }; 2080 }; 2081 2082 rcar_sound,mix { 2083 mix0: mix-0 { }; 2084 mix1: mix-1 { }; 2085 }; 2086 2087 rcar_sound,ctu { 2088 ctu00: ctu-0 { }; 2089 ctu01: ctu-1 { }; 2090 ctu02: ctu-2 { }; 2091 ctu03: ctu-3 { }; 2092 ctu10: ctu-4 { }; 2093 ctu11: ctu-5 { }; 2094 ctu12: ctu-6 { }; 2095 ctu13: ctu-7 { }; 2096 }; 2097 2098 rcar_sound,src { 2099 src0: src-0 { 2100 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 2101 dmas = <&audma0 0x85>, <&audma1 0x9a>; 2102 dma-names = "rx", "tx"; 2103 }; 2104 src1: src-1 { 2105 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 2106 dmas = <&audma0 0x87>, <&audma1 0x9c>; 2107 dma-names = "rx", "tx"; 2108 }; 2109 src2: src-2 { 2110 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 2111 dmas = <&audma0 0x89>, <&audma1 0x9e>; 2112 dma-names = "rx", "tx"; 2113 }; 2114 src3: src-3 { 2115 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 2116 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 2117 dma-names = "rx", "tx"; 2118 }; 2119 src4: src-4 { 2120 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 2121 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 2122 dma-names = "rx", "tx"; 2123 }; 2124 src5: src-5 { 2125 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 2126 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 2127 dma-names = "rx", "tx"; 2128 }; 2129 src6: src-6 { 2130 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 2131 dmas = <&audma0 0x91>, <&audma1 0xb4>; 2132 dma-names = "rx", "tx"; 2133 }; 2134 src7: src-7 { 2135 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 2136 dmas = <&audma0 0x93>, <&audma1 0xb6>; 2137 dma-names = "rx", "tx"; 2138 }; 2139 src8: src-8 { 2140 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 2141 dmas = <&audma0 0x95>, <&audma1 0xb8>; 2142 dma-names = "rx", "tx"; 2143 }; 2144 src9: src-9 { 2145 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 2146 dmas = <&audma0 0x97>, <&audma1 0xba>; 2147 dma-names = "rx", "tx"; 2148 }; 2149 }; 2150 2151 rcar_sound,ssiu { 2152 ssiu00: ssiu-0 { 2153 dmas = <&audma0 0x15>, <&audma1 0x16>; 2154 dma-names = "rx", "tx"; 2155 }; 2156 ssiu01: ssiu-1 { 2157 dmas = <&audma0 0x35>, <&audma1 0x36>; 2158 dma-names = "rx", "tx"; 2159 }; 2160 ssiu02: ssiu-2 { 2161 dmas = <&audma0 0x37>, <&audma1 0x38>; 2162 dma-names = "rx", "tx"; 2163 }; 2164 ssiu03: ssiu-3 { 2165 dmas = <&audma0 0x47>, <&audma1 0x48>; 2166 dma-names = "rx", "tx"; 2167 }; 2168 ssiu04: ssiu-4 { 2169 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2170 dma-names = "rx", "tx"; 2171 }; 2172 ssiu05: ssiu-5 { 2173 dmas = <&audma0 0x43>, <&audma1 0x44>; 2174 dma-names = "rx", "tx"; 2175 }; 2176 ssiu06: ssiu-6 { 2177 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2178 dma-names = "rx", "tx"; 2179 }; 2180 ssiu07: ssiu-7 { 2181 dmas = <&audma0 0x53>, <&audma1 0x54>; 2182 dma-names = "rx", "tx"; 2183 }; 2184 ssiu10: ssiu-8 { 2185 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2186 dma-names = "rx", "tx"; 2187 }; 2188 ssiu11: ssiu-9 { 2189 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2190 dma-names = "rx", "tx"; 2191 }; 2192 ssiu12: ssiu-10 { 2193 dmas = <&audma0 0x57>, <&audma1 0x58>; 2194 dma-names = "rx", "tx"; 2195 }; 2196 ssiu13: ssiu-11 { 2197 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2198 dma-names = "rx", "tx"; 2199 }; 2200 ssiu14: ssiu-12 { 2201 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2202 dma-names = "rx", "tx"; 2203 }; 2204 ssiu15: ssiu-13 { 2205 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2206 dma-names = "rx", "tx"; 2207 }; 2208 ssiu16: ssiu-14 { 2209 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2210 dma-names = "rx", "tx"; 2211 }; 2212 ssiu17: ssiu-15 { 2213 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2214 dma-names = "rx", "tx"; 2215 }; 2216 ssiu20: ssiu-16 { 2217 dmas = <&audma0 0x63>, <&audma1 0x64>; 2218 dma-names = "rx", "tx"; 2219 }; 2220 ssiu21: ssiu-17 { 2221 dmas = <&audma0 0x67>, <&audma1 0x68>; 2222 dma-names = "rx", "tx"; 2223 }; 2224 ssiu22: ssiu-18 { 2225 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2226 dma-names = "rx", "tx"; 2227 }; 2228 ssiu23: ssiu-19 { 2229 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2230 dma-names = "rx", "tx"; 2231 }; 2232 ssiu24: ssiu-20 { 2233 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2234 dma-names = "rx", "tx"; 2235 }; 2236 ssiu25: ssiu-21 { 2237 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2238 dma-names = "rx", "tx"; 2239 }; 2240 ssiu26: ssiu-22 { 2241 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2242 dma-names = "rx", "tx"; 2243 }; 2244 ssiu27: ssiu-23 { 2245 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2246 dma-names = "rx", "tx"; 2247 }; 2248 ssiu30: ssiu-24 { 2249 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2250 dma-names = "rx", "tx"; 2251 }; 2252 ssiu31: ssiu-25 { 2253 dmas = <&audma0 0x21>, <&audma1 0x22>; 2254 dma-names = "rx", "tx"; 2255 }; 2256 ssiu32: ssiu-26 { 2257 dmas = <&audma0 0x23>, <&audma1 0x24>; 2258 dma-names = "rx", "tx"; 2259 }; 2260 ssiu33: ssiu-27 { 2261 dmas = <&audma0 0x25>, <&audma1 0x26>; 2262 dma-names = "rx", "tx"; 2263 }; 2264 ssiu34: ssiu-28 { 2265 dmas = <&audma0 0x27>, <&audma1 0x28>; 2266 dma-names = "rx", "tx"; 2267 }; 2268 ssiu35: ssiu-29 { 2269 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2270 dma-names = "rx", "tx"; 2271 }; 2272 ssiu36: ssiu-30 { 2273 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2274 dma-names = "rx", "tx"; 2275 }; 2276 ssiu37: ssiu-31 { 2277 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2278 dma-names = "rx", "tx"; 2279 }; 2280 ssiu40: ssiu-32 { 2281 dmas = <&audma0 0x71>, <&audma1 0x72>; 2282 dma-names = "rx", "tx"; 2283 }; 2284 ssiu41: ssiu-33 { 2285 dmas = <&audma0 0x17>, <&audma1 0x18>; 2286 dma-names = "rx", "tx"; 2287 }; 2288 ssiu42: ssiu-34 { 2289 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2290 dma-names = "rx", "tx"; 2291 }; 2292 ssiu43: ssiu-35 { 2293 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2294 dma-names = "rx", "tx"; 2295 }; 2296 ssiu44: ssiu-36 { 2297 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2298 dma-names = "rx", "tx"; 2299 }; 2300 ssiu45: ssiu-37 { 2301 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2302 dma-names = "rx", "tx"; 2303 }; 2304 ssiu46: ssiu-38 { 2305 dmas = <&audma0 0x31>, <&audma1 0x32>; 2306 dma-names = "rx", "tx"; 2307 }; 2308 ssiu47: ssiu-39 { 2309 dmas = <&audma0 0x33>, <&audma1 0x34>; 2310 dma-names = "rx", "tx"; 2311 }; 2312 ssiu50: ssiu-40 { 2313 dmas = <&audma0 0x73>, <&audma1 0x74>; 2314 dma-names = "rx", "tx"; 2315 }; 2316 ssiu60: ssiu-41 { 2317 dmas = <&audma0 0x75>, <&audma1 0x76>; 2318 dma-names = "rx", "tx"; 2319 }; 2320 ssiu70: ssiu-42 { 2321 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2322 dma-names = "rx", "tx"; 2323 }; 2324 ssiu80: ssiu-43 { 2325 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2326 dma-names = "rx", "tx"; 2327 }; 2328 ssiu90: ssiu-44 { 2329 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2330 dma-names = "rx", "tx"; 2331 }; 2332 ssiu91: ssiu-45 { 2333 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2334 dma-names = "rx", "tx"; 2335 }; 2336 ssiu92: ssiu-46 { 2337 dmas = <&audma0 0x81>, <&audma1 0x82>; 2338 dma-names = "rx", "tx"; 2339 }; 2340 ssiu93: ssiu-47 { 2341 dmas = <&audma0 0x83>, <&audma1 0x84>; 2342 dma-names = "rx", "tx"; 2343 }; 2344 ssiu94: ssiu-48 { 2345 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2346 dma-names = "rx", "tx"; 2347 }; 2348 ssiu95: ssiu-49 { 2349 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2350 dma-names = "rx", "tx"; 2351 }; 2352 ssiu96: ssiu-50 { 2353 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2354 dma-names = "rx", "tx"; 2355 }; 2356 ssiu97: ssiu-51 { 2357 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2358 dma-names = "rx", "tx"; 2359 }; 2360 }; 2361 2362 rcar_sound,ssi { 2363 ssi0: ssi-0 { 2364 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2365 dmas = <&audma0 0x01>, <&audma1 0x02>; 2366 dma-names = "rx", "tx"; 2367 }; 2368 ssi1: ssi-1 { 2369 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2370 dmas = <&audma0 0x03>, <&audma1 0x04>; 2371 dma-names = "rx", "tx"; 2372 }; 2373 ssi2: ssi-2 { 2374 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2375 dmas = <&audma0 0x05>, <&audma1 0x06>; 2376 dma-names = "rx", "tx"; 2377 }; 2378 ssi3: ssi-3 { 2379 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2380 dmas = <&audma0 0x07>, <&audma1 0x08>; 2381 dma-names = "rx", "tx"; 2382 }; 2383 ssi4: ssi-4 { 2384 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2385 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2386 dma-names = "rx", "tx"; 2387 }; 2388 ssi5: ssi-5 { 2389 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2390 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2391 dma-names = "rx", "tx"; 2392 }; 2393 ssi6: ssi-6 { 2394 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2395 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2396 dma-names = "rx", "tx"; 2397 }; 2398 ssi7: ssi-7 { 2399 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2400 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2401 dma-names = "rx", "tx"; 2402 }; 2403 ssi8: ssi-8 { 2404 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2405 dmas = <&audma0 0x11>, <&audma1 0x12>; 2406 dma-names = "rx", "tx"; 2407 }; 2408 ssi9: ssi-9 { 2409 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2410 dmas = <&audma0 0x13>, <&audma1 0x14>; 2411 dma-names = "rx", "tx"; 2412 }; 2413 }; 2414 }; 2415 2416 mlp: mlp@ec520000 { 2417 compatible = "renesas,r8a7795-mlp", 2418 "renesas,rcar-gen3-mlp"; 2419 reg = <0 0xec520000 0 0x800>; 2420 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2421 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2422 clocks = <&cpg CPG_MOD 802>; 2423 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2424 resets = <&cpg 802>; 2425 status = "disabled"; 2426 }; 2427 2428 audma0: dma-controller@ec700000 { 2429 compatible = "renesas,dmac-r8a7795", 2430 "renesas,rcar-dmac"; 2431 reg = <0 0xec700000 0 0x10000>; 2432 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2433 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2434 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2435 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2436 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2437 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2438 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2439 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2440 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2441 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2442 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2443 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2444 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2445 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2446 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2447 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2448 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2449 interrupt-names = "error", 2450 "ch0", "ch1", "ch2", "ch3", 2451 "ch4", "ch5", "ch6", "ch7", 2452 "ch8", "ch9", "ch10", "ch11", 2453 "ch12", "ch13", "ch14", "ch15"; 2454 clocks = <&cpg CPG_MOD 502>; 2455 clock-names = "fck"; 2456 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2457 resets = <&cpg 502>; 2458 #dma-cells = <1>; 2459 dma-channels = <16>; 2460 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>, 2461 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>, 2462 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>, 2463 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>, 2464 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>, 2465 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>, 2466 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>, 2467 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>; 2468 }; 2469 2470 audma1: dma-controller@ec720000 { 2471 compatible = "renesas,dmac-r8a7795", 2472 "renesas,rcar-dmac"; 2473 reg = <0 0xec720000 0 0x10000>; 2474 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2475 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2476 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2477 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2478 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2479 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2480 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2481 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2482 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2483 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2484 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2485 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2486 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2487 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2488 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2489 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2490 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2491 interrupt-names = "error", 2492 "ch0", "ch1", "ch2", "ch3", 2493 "ch4", "ch5", "ch6", "ch7", 2494 "ch8", "ch9", "ch10", "ch11", 2495 "ch12", "ch13", "ch14", "ch15"; 2496 clocks = <&cpg CPG_MOD 501>; 2497 clock-names = "fck"; 2498 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2499 resets = <&cpg 501>; 2500 #dma-cells = <1>; 2501 dma-channels = <16>; 2502 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>, 2503 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>, 2504 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>, 2505 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>, 2506 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>, 2507 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>, 2508 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>, 2509 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>; 2510 }; 2511 2512 xhci0: usb@ee000000 { 2513 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; 2514 reg = <0 0xee000000 0 0xc00>; 2515 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2516 clocks = <&cpg CPG_MOD 328>; 2517 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2518 resets = <&cpg 328>; 2519 status = "disabled"; 2520 }; 2521 2522 usb3_peri0: usb@ee020000 { 2523 compatible = "renesas,r8a7795-usb3-peri", 2524 "renesas,rcar-gen3-usb3-peri"; 2525 reg = <0 0xee020000 0 0x400>; 2526 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2527 clocks = <&cpg CPG_MOD 328>; 2528 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2529 resets = <&cpg 328>; 2530 status = "disabled"; 2531 }; 2532 2533 ohci0: usb@ee080000 { 2534 compatible = "generic-ohci"; 2535 reg = <0 0xee080000 0 0x100>; 2536 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2537 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2538 phys = <&usb2_phy0 1>; 2539 phy-names = "usb"; 2540 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2541 resets = <&cpg 703>, <&cpg 704>; 2542 status = "disabled"; 2543 }; 2544 2545 ohci1: usb@ee0a0000 { 2546 compatible = "generic-ohci"; 2547 reg = <0 0xee0a0000 0 0x100>; 2548 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2549 clocks = <&cpg CPG_MOD 702>; 2550 phys = <&usb2_phy1 1>; 2551 phy-names = "usb"; 2552 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2553 resets = <&cpg 702>; 2554 status = "disabled"; 2555 }; 2556 2557 ohci2: usb@ee0c0000 { 2558 compatible = "generic-ohci"; 2559 reg = <0 0xee0c0000 0 0x100>; 2560 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2561 clocks = <&cpg CPG_MOD 701>; 2562 phys = <&usb2_phy2 1>; 2563 phy-names = "usb"; 2564 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2565 resets = <&cpg 701>; 2566 status = "disabled"; 2567 }; 2568 2569 ohci3: usb@ee0e0000 { 2570 compatible = "generic-ohci"; 2571 reg = <0 0xee0e0000 0 0x100>; 2572 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2573 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2574 phys = <&usb2_phy3 1>; 2575 phy-names = "usb"; 2576 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2577 resets = <&cpg 700>, <&cpg 705>; 2578 status = "disabled"; 2579 }; 2580 2581 ehci0: usb@ee080100 { 2582 compatible = "generic-ehci"; 2583 reg = <0 0xee080100 0 0x100>; 2584 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2585 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2586 phys = <&usb2_phy0 2>; 2587 phy-names = "usb"; 2588 companion = <&ohci0>; 2589 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2590 resets = <&cpg 703>, <&cpg 704>; 2591 status = "disabled"; 2592 }; 2593 2594 ehci1: usb@ee0a0100 { 2595 compatible = "generic-ehci"; 2596 reg = <0 0xee0a0100 0 0x100>; 2597 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2598 clocks = <&cpg CPG_MOD 702>; 2599 phys = <&usb2_phy1 2>; 2600 phy-names = "usb"; 2601 companion = <&ohci1>; 2602 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2603 resets = <&cpg 702>; 2604 status = "disabled"; 2605 }; 2606 2607 ehci2: usb@ee0c0100 { 2608 compatible = "generic-ehci"; 2609 reg = <0 0xee0c0100 0 0x100>; 2610 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2611 clocks = <&cpg CPG_MOD 701>; 2612 phys = <&usb2_phy2 2>; 2613 phy-names = "usb"; 2614 companion = <&ohci2>; 2615 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2616 resets = <&cpg 701>; 2617 status = "disabled"; 2618 }; 2619 2620 ehci3: usb@ee0e0100 { 2621 compatible = "generic-ehci"; 2622 reg = <0 0xee0e0100 0 0x100>; 2623 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2624 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2625 phys = <&usb2_phy3 2>; 2626 phy-names = "usb"; 2627 companion = <&ohci3>; 2628 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2629 resets = <&cpg 700>, <&cpg 705>; 2630 status = "disabled"; 2631 }; 2632 2633 usb2_phy0: usb-phy@ee080200 { 2634 compatible = "renesas,usb2-phy-r8a7795", 2635 "renesas,rcar-gen3-usb2-phy"; 2636 reg = <0 0xee080200 0 0x700>; 2637 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2638 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2639 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2640 resets = <&cpg 703>, <&cpg 704>; 2641 #phy-cells = <1>; 2642 status = "disabled"; 2643 }; 2644 2645 usb2_phy1: usb-phy@ee0a0200 { 2646 compatible = "renesas,usb2-phy-r8a7795", 2647 "renesas,rcar-gen3-usb2-phy"; 2648 reg = <0 0xee0a0200 0 0x700>; 2649 clocks = <&cpg CPG_MOD 702>; 2650 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2651 resets = <&cpg 702>; 2652 #phy-cells = <1>; 2653 status = "disabled"; 2654 }; 2655 2656 usb2_phy2: usb-phy@ee0c0200 { 2657 compatible = "renesas,usb2-phy-r8a7795", 2658 "renesas,rcar-gen3-usb2-phy"; 2659 reg = <0 0xee0c0200 0 0x700>; 2660 clocks = <&cpg CPG_MOD 701>; 2661 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2662 resets = <&cpg 701>; 2663 #phy-cells = <1>; 2664 status = "disabled"; 2665 }; 2666 2667 usb2_phy3: usb-phy@ee0e0200 { 2668 compatible = "renesas,usb2-phy-r8a7795", 2669 "renesas,rcar-gen3-usb2-phy"; 2670 reg = <0 0xee0e0200 0 0x700>; 2671 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2672 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2673 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2674 resets = <&cpg 700>, <&cpg 705>; 2675 #phy-cells = <1>; 2676 status = "disabled"; 2677 }; 2678 2679 sdhi0: mmc@ee100000 { 2680 compatible = "renesas,sdhi-r8a7795", 2681 "renesas,rcar-gen3-sdhi"; 2682 reg = <0 0xee100000 0 0x2000>; 2683 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2684 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>; 2685 clock-names = "core", "clkh"; 2686 max-frequency = <200000000>; 2687 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2688 resets = <&cpg 314>; 2689 iommus = <&ipmmu_ds1 32>; 2690 status = "disabled"; 2691 }; 2692 2693 sdhi1: mmc@ee120000 { 2694 compatible = "renesas,sdhi-r8a7795", 2695 "renesas,rcar-gen3-sdhi"; 2696 reg = <0 0xee120000 0 0x2000>; 2697 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2698 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>; 2699 clock-names = "core", "clkh"; 2700 max-frequency = <200000000>; 2701 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2702 resets = <&cpg 313>; 2703 iommus = <&ipmmu_ds1 33>; 2704 status = "disabled"; 2705 }; 2706 2707 sdhi2: mmc@ee140000 { 2708 compatible = "renesas,sdhi-r8a7795", 2709 "renesas,rcar-gen3-sdhi"; 2710 reg = <0 0xee140000 0 0x2000>; 2711 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2712 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>; 2713 clock-names = "core", "clkh"; 2714 max-frequency = <200000000>; 2715 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2716 resets = <&cpg 312>; 2717 iommus = <&ipmmu_ds1 34>; 2718 status = "disabled"; 2719 }; 2720 2721 sdhi3: mmc@ee160000 { 2722 compatible = "renesas,sdhi-r8a7795", 2723 "renesas,rcar-gen3-sdhi"; 2724 reg = <0 0xee160000 0 0x2000>; 2725 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2726 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>; 2727 clock-names = "core", "clkh"; 2728 max-frequency = <200000000>; 2729 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2730 resets = <&cpg 311>; 2731 iommus = <&ipmmu_ds1 35>; 2732 status = "disabled"; 2733 }; 2734 2735 rpc: spi@ee200000 { 2736 compatible = "renesas,r8a7795-rpc-if", 2737 "renesas,rcar-gen3-rpc-if"; 2738 reg = <0 0xee200000 0 0x200>, 2739 <0 0x08000000 0 0x04000000>, 2740 <0 0xee208000 0 0x100>; 2741 reg-names = "regs", "dirmap", "wbuf"; 2742 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2743 clocks = <&cpg CPG_MOD 917>; 2744 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2745 resets = <&cpg 917>; 2746 #address-cells = <1>; 2747 #size-cells = <0>; 2748 status = "disabled"; 2749 }; 2750 2751 sata: sata@ee300000 { 2752 compatible = "renesas,sata-r8a7795", 2753 "renesas,rcar-gen3-sata"; 2754 reg = <0 0xee300000 0 0x200000>; 2755 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2756 clocks = <&cpg CPG_MOD 815>; 2757 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2758 resets = <&cpg 815>; 2759 status = "disabled"; 2760 iommus = <&ipmmu_hc 2>; 2761 }; 2762 2763 gic: interrupt-controller@f1010000 { 2764 compatible = "arm,gic-400"; 2765 #interrupt-cells = <3>; 2766 #address-cells = <0>; 2767 interrupt-controller; 2768 reg = <0x0 0xf1010000 0 0x1000>, 2769 <0x0 0xf1020000 0 0x20000>, 2770 <0x0 0xf1040000 0 0x20000>, 2771 <0x0 0xf1060000 0 0x20000>; 2772 interrupts = <GIC_PPI 9 2773 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 2774 clocks = <&cpg CPG_MOD 408>; 2775 clock-names = "clk"; 2776 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2777 resets = <&cpg 408>; 2778 }; 2779 2780 pciec0: pcie@fe000000 { 2781 compatible = "renesas,pcie-r8a7795", 2782 "renesas,pcie-rcar-gen3"; 2783 reg = <0 0xfe000000 0 0x80000>; 2784 #address-cells = <3>; 2785 #size-cells = <2>; 2786 bus-range = <0x00 0xff>; 2787 device_type = "pci"; 2788 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2789 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2790 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2791 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2792 /* Map all possible DDR as inbound ranges */ 2793 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 2794 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2795 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2796 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2797 #interrupt-cells = <1>; 2798 interrupt-map-mask = <0 0 0 0>; 2799 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2800 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2801 clock-names = "pcie", "pcie_bus"; 2802 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2803 resets = <&cpg 319>; 2804 status = "disabled"; 2805 }; 2806 2807 pciec1: pcie@ee800000 { 2808 compatible = "renesas,pcie-r8a7795", 2809 "renesas,pcie-rcar-gen3"; 2810 reg = <0 0xee800000 0 0x80000>; 2811 #address-cells = <3>; 2812 #size-cells = <2>; 2813 bus-range = <0x00 0xff>; 2814 device_type = "pci"; 2815 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2816 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2817 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2818 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2819 /* Map all possible DDR as inbound ranges */ 2820 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 2821 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2822 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2823 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2824 #interrupt-cells = <1>; 2825 interrupt-map-mask = <0 0 0 0>; 2826 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2827 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2828 clock-names = "pcie", "pcie_bus"; 2829 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2830 resets = <&cpg 318>; 2831 status = "disabled"; 2832 }; 2833 2834 pciec0_ep: pcie-ep@fe000000 { 2835 compatible = "renesas,r8a7795-pcie-ep", 2836 "renesas,rcar-gen3-pcie-ep"; 2837 reg = <0x0 0xfe000000 0 0x80000>, 2838 <0x0 0xfe100000 0 0x100000>, 2839 <0x0 0xfe200000 0 0x200000>, 2840 <0x0 0x30000000 0 0x8000000>, 2841 <0x0 0x38000000 0 0x8000000>; 2842 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2843 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2844 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2845 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2846 clocks = <&cpg CPG_MOD 319>; 2847 clock-names = "pcie"; 2848 resets = <&cpg 319>; 2849 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2850 status = "disabled"; 2851 }; 2852 2853 pciec1_ep: pcie-ep@ee800000 { 2854 compatible = "renesas,r8a7795-pcie-ep", 2855 "renesas,rcar-gen3-pcie-ep"; 2856 reg = <0x0 0xee800000 0 0x80000>, 2857 <0x0 0xee900000 0 0x100000>, 2858 <0x0 0xeea00000 0 0x200000>, 2859 <0x0 0xc0000000 0 0x8000000>, 2860 <0x0 0xc8000000 0 0x8000000>; 2861 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2862 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2863 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2864 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2865 clocks = <&cpg CPG_MOD 318>; 2866 clock-names = "pcie"; 2867 resets = <&cpg 318>; 2868 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2869 status = "disabled"; 2870 }; 2871 2872 imr-lx4@fe860000 { 2873 compatible = "renesas,r8a7795-imr-lx4", 2874 "renesas,imr-lx4"; 2875 reg = <0 0xfe860000 0 0x2000>; 2876 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2877 clocks = <&cpg CPG_MOD 823>; 2878 power-domains = <&sysc R8A7795_PD_A3VC>; 2879 resets = <&cpg 823>; 2880 }; 2881 2882 imr-lx4@fe870000 { 2883 compatible = "renesas,r8a7795-imr-lx4", 2884 "renesas,imr-lx4"; 2885 reg = <0 0xfe870000 0 0x2000>; 2886 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2887 clocks = <&cpg CPG_MOD 822>; 2888 power-domains = <&sysc R8A7795_PD_A3VC>; 2889 resets = <&cpg 822>; 2890 }; 2891 2892 imr-lx4@fe880000 { 2893 compatible = "renesas,r8a7795-imr-lx4", 2894 "renesas,imr-lx4"; 2895 reg = <0 0xfe880000 0 0x2000>; 2896 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 2897 clocks = <&cpg CPG_MOD 821>; 2898 power-domains = <&sysc R8A7795_PD_A3VC>; 2899 resets = <&cpg 821>; 2900 }; 2901 2902 imr-lx4@fe890000 { 2903 compatible = "renesas,r8a7795-imr-lx4", 2904 "renesas,imr-lx4"; 2905 reg = <0 0xfe890000 0 0x2000>; 2906 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 2907 clocks = <&cpg CPG_MOD 820>; 2908 power-domains = <&sysc R8A7795_PD_A3VC>; 2909 resets = <&cpg 820>; 2910 }; 2911 2912 vspbc: vsp@fe920000 { 2913 compatible = "renesas,vsp2"; 2914 reg = <0 0xfe920000 0 0x8000>; 2915 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; 2916 clocks = <&cpg CPG_MOD 624>; 2917 power-domains = <&sysc R8A7795_PD_A3VP>; 2918 resets = <&cpg 624>; 2919 2920 renesas,fcp = <&fcpvb1>; 2921 }; 2922 2923 vspbd: vsp@fe960000 { 2924 compatible = "renesas,vsp2"; 2925 reg = <0 0xfe960000 0 0x8000>; 2926 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2927 clocks = <&cpg CPG_MOD 626>; 2928 power-domains = <&sysc R8A7795_PD_A3VP>; 2929 resets = <&cpg 626>; 2930 2931 renesas,fcp = <&fcpvb0>; 2932 }; 2933 2934 vspd0: vsp@fea20000 { 2935 compatible = "renesas,vsp2"; 2936 reg = <0 0xfea20000 0 0x5000>; 2937 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2938 clocks = <&cpg CPG_MOD 623>; 2939 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2940 resets = <&cpg 623>; 2941 2942 renesas,fcp = <&fcpvd0>; 2943 }; 2944 2945 vspd1: vsp@fea28000 { 2946 compatible = "renesas,vsp2"; 2947 reg = <0 0xfea28000 0 0x5000>; 2948 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2949 clocks = <&cpg CPG_MOD 622>; 2950 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2951 resets = <&cpg 622>; 2952 2953 renesas,fcp = <&fcpvd1>; 2954 }; 2955 2956 vspd2: vsp@fea30000 { 2957 compatible = "renesas,vsp2"; 2958 reg = <0 0xfea30000 0 0x5000>; 2959 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2960 clocks = <&cpg CPG_MOD 621>; 2961 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2962 resets = <&cpg 621>; 2963 2964 renesas,fcp = <&fcpvd2>; 2965 }; 2966 2967 vspi0: vsp@fe9a0000 { 2968 compatible = "renesas,vsp2"; 2969 reg = <0 0xfe9a0000 0 0x8000>; 2970 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2971 clocks = <&cpg CPG_MOD 631>; 2972 power-domains = <&sysc R8A7795_PD_A3VP>; 2973 resets = <&cpg 631>; 2974 2975 renesas,fcp = <&fcpvi0>; 2976 }; 2977 2978 vspi1: vsp@fe9b0000 { 2979 compatible = "renesas,vsp2"; 2980 reg = <0 0xfe9b0000 0 0x8000>; 2981 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; 2982 clocks = <&cpg CPG_MOD 630>; 2983 power-domains = <&sysc R8A7795_PD_A3VP>; 2984 resets = <&cpg 630>; 2985 2986 renesas,fcp = <&fcpvi1>; 2987 }; 2988 2989 fdp1@fe940000 { 2990 compatible = "renesas,fdp1"; 2991 reg = <0 0xfe940000 0 0x2400>; 2992 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2993 clocks = <&cpg CPG_MOD 119>; 2994 power-domains = <&sysc R8A7795_PD_A3VP>; 2995 resets = <&cpg 119>; 2996 renesas,fcp = <&fcpf0>; 2997 }; 2998 2999 fdp1@fe944000 { 3000 compatible = "renesas,fdp1"; 3001 reg = <0 0xfe944000 0 0x2400>; 3002 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 3003 clocks = <&cpg CPG_MOD 118>; 3004 power-domains = <&sysc R8A7795_PD_A3VP>; 3005 resets = <&cpg 118>; 3006 renesas,fcp = <&fcpf1>; 3007 }; 3008 3009 fcpf0: fcp@fe950000 { 3010 compatible = "renesas,fcpf"; 3011 reg = <0 0xfe950000 0 0x200>; 3012 clocks = <&cpg CPG_MOD 615>; 3013 power-domains = <&sysc R8A7795_PD_A3VP>; 3014 resets = <&cpg 615>; 3015 iommus = <&ipmmu_vp0 0>; 3016 }; 3017 3018 fcpf1: fcp@fe951000 { 3019 compatible = "renesas,fcpf"; 3020 reg = <0 0xfe951000 0 0x200>; 3021 clocks = <&cpg CPG_MOD 614>; 3022 power-domains = <&sysc R8A7795_PD_A3VP>; 3023 resets = <&cpg 614>; 3024 iommus = <&ipmmu_vp1 1>; 3025 }; 3026 3027 fcpvb0: fcp@fe96f000 { 3028 compatible = "renesas,fcpv"; 3029 reg = <0 0xfe96f000 0 0x200>; 3030 clocks = <&cpg CPG_MOD 607>; 3031 power-domains = <&sysc R8A7795_PD_A3VP>; 3032 resets = <&cpg 607>; 3033 iommus = <&ipmmu_vp0 5>; 3034 }; 3035 3036 fcpvb1: fcp@fe92f000 { 3037 compatible = "renesas,fcpv"; 3038 reg = <0 0xfe92f000 0 0x200>; 3039 clocks = <&cpg CPG_MOD 606>; 3040 power-domains = <&sysc R8A7795_PD_A3VP>; 3041 resets = <&cpg 606>; 3042 iommus = <&ipmmu_vp1 7>; 3043 }; 3044 3045 fcpvi0: fcp@fe9af000 { 3046 compatible = "renesas,fcpv"; 3047 reg = <0 0xfe9af000 0 0x200>; 3048 clocks = <&cpg CPG_MOD 611>; 3049 power-domains = <&sysc R8A7795_PD_A3VP>; 3050 resets = <&cpg 611>; 3051 iommus = <&ipmmu_vp0 8>; 3052 }; 3053 3054 fcpvi1: fcp@fe9bf000 { 3055 compatible = "renesas,fcpv"; 3056 reg = <0 0xfe9bf000 0 0x200>; 3057 clocks = <&cpg CPG_MOD 610>; 3058 power-domains = <&sysc R8A7795_PD_A3VP>; 3059 resets = <&cpg 610>; 3060 iommus = <&ipmmu_vp1 9>; 3061 }; 3062 3063 fcpvd0: fcp@fea27000 { 3064 compatible = "renesas,fcpv"; 3065 reg = <0 0xfea27000 0 0x200>; 3066 clocks = <&cpg CPG_MOD 603>; 3067 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3068 resets = <&cpg 603>; 3069 iommus = <&ipmmu_vi0 8>; 3070 }; 3071 3072 fcpvd1: fcp@fea2f000 { 3073 compatible = "renesas,fcpv"; 3074 reg = <0 0xfea2f000 0 0x200>; 3075 clocks = <&cpg CPG_MOD 602>; 3076 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3077 resets = <&cpg 602>; 3078 iommus = <&ipmmu_vi0 9>; 3079 }; 3080 3081 fcpvd2: fcp@fea37000 { 3082 compatible = "renesas,fcpv"; 3083 reg = <0 0xfea37000 0 0x200>; 3084 clocks = <&cpg CPG_MOD 601>; 3085 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3086 resets = <&cpg 601>; 3087 iommus = <&ipmmu_vi1 10>; 3088 }; 3089 3090 cmm0: cmm@fea40000 { 3091 compatible = "renesas,r8a7795-cmm", 3092 "renesas,rcar-gen3-cmm"; 3093 reg = <0 0xfea40000 0 0x1000>; 3094 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3095 clocks = <&cpg CPG_MOD 711>; 3096 resets = <&cpg 711>; 3097 }; 3098 3099 cmm1: cmm@fea50000 { 3100 compatible = "renesas,r8a7795-cmm", 3101 "renesas,rcar-gen3-cmm"; 3102 reg = <0 0xfea50000 0 0x1000>; 3103 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3104 clocks = <&cpg CPG_MOD 710>; 3105 resets = <&cpg 710>; 3106 }; 3107 3108 cmm2: cmm@fea60000 { 3109 compatible = "renesas,r8a7795-cmm", 3110 "renesas,rcar-gen3-cmm"; 3111 reg = <0 0xfea60000 0 0x1000>; 3112 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3113 clocks = <&cpg CPG_MOD 709>; 3114 resets = <&cpg 709>; 3115 }; 3116 3117 cmm3: cmm@fea70000 { 3118 compatible = "renesas,r8a7795-cmm", 3119 "renesas,rcar-gen3-cmm"; 3120 reg = <0 0xfea70000 0 0x1000>; 3121 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3122 clocks = <&cpg CPG_MOD 708>; 3123 resets = <&cpg 708>; 3124 }; 3125 3126 csi20: csi2@fea80000 { 3127 compatible = "renesas,r8a7795-csi2"; 3128 reg = <0 0xfea80000 0 0x10000>; 3129 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 3130 clocks = <&cpg CPG_MOD 714>; 3131 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3132 resets = <&cpg 714>; 3133 status = "disabled"; 3134 3135 ports { 3136 #address-cells = <1>; 3137 #size-cells = <0>; 3138 3139 port@0 { 3140 reg = <0>; 3141 }; 3142 3143 port@1 { 3144 #address-cells = <1>; 3145 #size-cells = <0>; 3146 3147 reg = <1>; 3148 3149 csi20vin0: endpoint@0 { 3150 reg = <0>; 3151 remote-endpoint = <&vin0csi20>; 3152 }; 3153 csi20vin1: endpoint@1 { 3154 reg = <1>; 3155 remote-endpoint = <&vin1csi20>; 3156 }; 3157 csi20vin2: endpoint@2 { 3158 reg = <2>; 3159 remote-endpoint = <&vin2csi20>; 3160 }; 3161 csi20vin3: endpoint@3 { 3162 reg = <3>; 3163 remote-endpoint = <&vin3csi20>; 3164 }; 3165 csi20vin4: endpoint@4 { 3166 reg = <4>; 3167 remote-endpoint = <&vin4csi20>; 3168 }; 3169 csi20vin5: endpoint@5 { 3170 reg = <5>; 3171 remote-endpoint = <&vin5csi20>; 3172 }; 3173 csi20vin6: endpoint@6 { 3174 reg = <6>; 3175 remote-endpoint = <&vin6csi20>; 3176 }; 3177 csi20vin7: endpoint@7 { 3178 reg = <7>; 3179 remote-endpoint = <&vin7csi20>; 3180 }; 3181 }; 3182 }; 3183 }; 3184 3185 csi40: csi2@feaa0000 { 3186 compatible = "renesas,r8a7795-csi2"; 3187 reg = <0 0xfeaa0000 0 0x10000>; 3188 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 3189 clocks = <&cpg CPG_MOD 716>; 3190 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3191 resets = <&cpg 716>; 3192 status = "disabled"; 3193 3194 ports { 3195 #address-cells = <1>; 3196 #size-cells = <0>; 3197 3198 port@0 { 3199 reg = <0>; 3200 }; 3201 3202 port@1 { 3203 #address-cells = <1>; 3204 #size-cells = <0>; 3205 3206 reg = <1>; 3207 3208 csi40vin0: endpoint@0 { 3209 reg = <0>; 3210 remote-endpoint = <&vin0csi40>; 3211 }; 3212 csi40vin1: endpoint@1 { 3213 reg = <1>; 3214 remote-endpoint = <&vin1csi40>; 3215 }; 3216 csi40vin2: endpoint@2 { 3217 reg = <2>; 3218 remote-endpoint = <&vin2csi40>; 3219 }; 3220 csi40vin3: endpoint@3 { 3221 reg = <3>; 3222 remote-endpoint = <&vin3csi40>; 3223 }; 3224 }; 3225 }; 3226 }; 3227 3228 csi41: csi2@feab0000 { 3229 compatible = "renesas,r8a7795-csi2"; 3230 reg = <0 0xfeab0000 0 0x10000>; 3231 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 3232 clocks = <&cpg CPG_MOD 715>; 3233 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3234 resets = <&cpg 715>; 3235 status = "disabled"; 3236 3237 ports { 3238 #address-cells = <1>; 3239 #size-cells = <0>; 3240 3241 port@0 { 3242 reg = <0>; 3243 }; 3244 3245 port@1 { 3246 #address-cells = <1>; 3247 #size-cells = <0>; 3248 3249 reg = <1>; 3250 3251 csi41vin4: endpoint@0 { 3252 reg = <0>; 3253 remote-endpoint = <&vin4csi41>; 3254 }; 3255 csi41vin5: endpoint@1 { 3256 reg = <1>; 3257 remote-endpoint = <&vin5csi41>; 3258 }; 3259 csi41vin6: endpoint@2 { 3260 reg = <2>; 3261 remote-endpoint = <&vin6csi41>; 3262 }; 3263 csi41vin7: endpoint@3 { 3264 reg = <3>; 3265 remote-endpoint = <&vin7csi41>; 3266 }; 3267 }; 3268 }; 3269 }; 3270 3271 hdmi0: hdmi@fead0000 { 3272 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 3273 reg = <0 0xfead0000 0 0x10000>; 3274 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 3275 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 3276 clock-names = "iahb", "isfr"; 3277 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3278 resets = <&cpg 729>; 3279 status = "disabled"; 3280 3281 ports { 3282 #address-cells = <1>; 3283 #size-cells = <0>; 3284 port@0 { 3285 reg = <0>; 3286 dw_hdmi0_in: endpoint { 3287 remote-endpoint = <&du_out_hdmi0>; 3288 }; 3289 }; 3290 port@1 { 3291 reg = <1>; 3292 }; 3293 port@2 { 3294 /* HDMI sound */ 3295 reg = <2>; 3296 }; 3297 }; 3298 }; 3299 3300 hdmi1: hdmi@feae0000 { 3301 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 3302 reg = <0 0xfeae0000 0 0x10000>; 3303 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>; 3304 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 3305 clock-names = "iahb", "isfr"; 3306 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3307 resets = <&cpg 728>; 3308 status = "disabled"; 3309 3310 ports { 3311 #address-cells = <1>; 3312 #size-cells = <0>; 3313 port@0 { 3314 reg = <0>; 3315 dw_hdmi1_in: endpoint { 3316 remote-endpoint = <&du_out_hdmi1>; 3317 }; 3318 }; 3319 port@1 { 3320 reg = <1>; 3321 }; 3322 port@2 { 3323 /* HDMI sound */ 3324 reg = <2>; 3325 }; 3326 }; 3327 }; 3328 3329 du: display@feb00000 { 3330 compatible = "renesas,du-r8a7795"; 3331 reg = <0 0xfeb00000 0 0x80000>; 3332 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 3333 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 3334 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 3335 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 3336 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 3337 <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>; 3338 clock-names = "du.0", "du.1", "du.2", "du.3"; 3339 resets = <&cpg 724>, <&cpg 722>; 3340 reset-names = "du.0", "du.2"; 3341 3342 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>; 3343 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, 3344 <&vspd0 1>; 3345 3346 status = "disabled"; 3347 3348 ports { 3349 #address-cells = <1>; 3350 #size-cells = <0>; 3351 3352 port@0 { 3353 reg = <0>; 3354 du_out_rgb: endpoint { 3355 }; 3356 }; 3357 port@1 { 3358 reg = <1>; 3359 du_out_hdmi0: endpoint { 3360 remote-endpoint = <&dw_hdmi0_in>; 3361 }; 3362 }; 3363 port@2 { 3364 reg = <2>; 3365 du_out_hdmi1: endpoint { 3366 remote-endpoint = <&dw_hdmi1_in>; 3367 }; 3368 }; 3369 port@3 { 3370 reg = <3>; 3371 du_out_lvds0: endpoint { 3372 remote-endpoint = <&lvds0_in>; 3373 }; 3374 }; 3375 }; 3376 }; 3377 3378 lvds0: lvds@feb90000 { 3379 compatible = "renesas,r8a7795-lvds"; 3380 reg = <0 0xfeb90000 0 0x14>; 3381 clocks = <&cpg CPG_MOD 727>; 3382 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3383 resets = <&cpg 727>; 3384 status = "disabled"; 3385 3386 ports { 3387 #address-cells = <1>; 3388 #size-cells = <0>; 3389 3390 port@0 { 3391 reg = <0>; 3392 lvds0_in: endpoint { 3393 remote-endpoint = <&du_out_lvds0>; 3394 }; 3395 }; 3396 port@1 { 3397 reg = <1>; 3398 lvds0_out: endpoint { 3399 }; 3400 }; 3401 }; 3402 }; 3403 3404 prr: chipid@fff00044 { 3405 compatible = "renesas,prr"; 3406 reg = <0 0xfff00044 0 4>; 3407 }; 3408 }; 3409 3410 thermal-zones { 3411 sensor1_thermal: sensor1-thermal { 3412 polling-delay-passive = <250>; 3413 polling-delay = <1000>; 3414 thermal-sensors = <&tsc 0>; 3415 sustainable-power = <6313>; 3416 3417 trips { 3418 sensor1_crit: sensor1-crit { 3419 temperature = <120000>; 3420 hysteresis = <1000>; 3421 type = "critical"; 3422 }; 3423 }; 3424 }; 3425 3426 sensor2_thermal: sensor2-thermal { 3427 polling-delay-passive = <250>; 3428 polling-delay = <1000>; 3429 thermal-sensors = <&tsc 1>; 3430 sustainable-power = <6313>; 3431 3432 trips { 3433 sensor2_crit: sensor2-crit { 3434 temperature = <120000>; 3435 hysteresis = <1000>; 3436 type = "critical"; 3437 }; 3438 }; 3439 }; 3440 3441 sensor3_thermal: sensor3-thermal { 3442 polling-delay-passive = <250>; 3443 polling-delay = <1000>; 3444 thermal-sensors = <&tsc 2>; 3445 3446 trips { 3447 target: trip-point1 { 3448 temperature = <100000>; 3449 hysteresis = <1000>; 3450 type = "passive"; 3451 }; 3452 3453 sensor3_crit: sensor3-crit { 3454 temperature = <120000>; 3455 hysteresis = <1000>; 3456 type = "critical"; 3457 }; 3458 }; 3459 3460 cooling-maps { 3461 map0 { 3462 trip = <&target>; 3463 cooling-device = <&a57_0 2 4>; 3464 contribution = <1024>; 3465 }; 3466 3467 map1 { 3468 trip = <&target>; 3469 cooling-device = <&a53_0 0 2>; 3470 contribution = <1024>; 3471 }; 3472 }; 3473 }; 3474 }; 3475 3476 timer { 3477 compatible = "arm,armv8-timer"; 3478 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3479 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3480 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3481 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3482 }; 3483 3484 /* External USB clocks - can be overridden by the board */ 3485 usb3s0_clk: usb3s0 { 3486 compatible = "fixed-clock"; 3487 #clock-cells = <0>; 3488 clock-frequency = <0>; 3489 }; 3490 3491 usb_extal_clk: usb_extal { 3492 compatible = "fixed-clock"; 3493 #clock-cells = <0>; 3494 clock-frequency = <0>; 3495 }; 3496}; 3497