1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774b1 SoC 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a774b1-cpg-mssr.h> 11#include <dt-bindings/power/r8a774b1-sysc.h> 12 13#define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4 14 15/ { 16 compatible = "renesas,r8a774b1"; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 /* 21 * The external audio clocks are configured as 0 Hz fixed frequency 22 * clocks by default. 23 * Boards that provide audio clocks should override them. 24 */ 25 audio_clk_a: audio_clk_a { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 audio_clk_b: audio_clk_b { 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; 34 clock-frequency = <0>; 35 }; 36 37 audio_clk_c: audio_clk_c { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <0>; 41 }; 42 43 /* External CAN clock - to be overridden by boards that provide it */ 44 can_clk: can { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 cluster0_opp: opp_table0 { 51 compatible = "operating-points-v2"; 52 opp-shared; 53 54 opp-500000000 { 55 opp-hz = /bits/ 64 <500000000>; 56 opp-microvolt = <830000>; 57 clock-latency-ns = <300000>; 58 }; 59 opp-1000000000 { 60 opp-hz = /bits/ 64 <1000000000>; 61 opp-microvolt = <830000>; 62 clock-latency-ns = <300000>; 63 }; 64 opp-1500000000 { 65 opp-hz = /bits/ 64 <1500000000>; 66 opp-microvolt = <830000>; 67 clock-latency-ns = <300000>; 68 opp-suspend; 69 }; 70 }; 71 72 cpus { 73 #address-cells = <1>; 74 #size-cells = <0>; 75 76 a57_0: cpu@0 { 77 compatible = "arm,cortex-a57"; 78 reg = <0x0>; 79 device_type = "cpu"; 80 power-domains = <&sysc R8A774B1_PD_CA57_CPU0>; 81 next-level-cache = <&L2_CA57>; 82 enable-method = "psci"; 83 #cooling-cells = <2>; 84 dynamic-power-coefficient = <854>; 85 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 86 operating-points-v2 = <&cluster0_opp>; 87 }; 88 89 a57_1: cpu@1 { 90 compatible = "arm,cortex-a57"; 91 reg = <0x1>; 92 device_type = "cpu"; 93 power-domains = <&sysc R8A774B1_PD_CA57_CPU1>; 94 next-level-cache = <&L2_CA57>; 95 enable-method = "psci"; 96 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 97 operating-points-v2 = <&cluster0_opp>; 98 }; 99 100 L2_CA57: cache-controller-0 { 101 compatible = "cache"; 102 power-domains = <&sysc R8A774B1_PD_CA57_SCU>; 103 cache-unified; 104 cache-level = <2>; 105 }; 106 }; 107 108 extal_clk: extal { 109 compatible = "fixed-clock"; 110 #clock-cells = <0>; 111 /* This value must be overridden by the board */ 112 clock-frequency = <0>; 113 }; 114 115 extalr_clk: extalr { 116 compatible = "fixed-clock"; 117 #clock-cells = <0>; 118 /* This value must be overridden by the board */ 119 clock-frequency = <0>; 120 }; 121 122 /* External PCIe clock - can be overridden by the board */ 123 pcie_bus_clk: pcie_bus { 124 compatible = "fixed-clock"; 125 #clock-cells = <0>; 126 clock-frequency = <0>; 127 }; 128 129 pmu_a57 { 130 compatible = "arm,cortex-a57-pmu"; 131 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 132 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 133 interrupt-affinity = <&a57_0>, <&a57_1>; 134 }; 135 136 psci { 137 compatible = "arm,psci-1.0", "arm,psci-0.2"; 138 method = "smc"; 139 }; 140 141 /* External SCIF clock - to be overridden by boards that provide it */ 142 scif_clk: scif { 143 compatible = "fixed-clock"; 144 #clock-cells = <0>; 145 clock-frequency = <0>; 146 }; 147 148 soc { 149 compatible = "simple-bus"; 150 interrupt-parent = <&gic>; 151 #address-cells = <2>; 152 #size-cells = <2>; 153 ranges; 154 155 rwdt: watchdog@e6020000 { 156 compatible = "renesas,r8a774b1-wdt", 157 "renesas,rcar-gen3-wdt"; 158 reg = <0 0xe6020000 0 0x0c>; 159 clocks = <&cpg CPG_MOD 402>; 160 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 161 resets = <&cpg 402>; 162 status = "disabled"; 163 }; 164 165 gpio0: gpio@e6050000 { 166 compatible = "renesas,gpio-r8a774b1", 167 "renesas,rcar-gen3-gpio"; 168 reg = <0 0xe6050000 0 0x50>; 169 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 170 #gpio-cells = <2>; 171 gpio-controller; 172 gpio-ranges = <&pfc 0 0 16>; 173 #interrupt-cells = <2>; 174 interrupt-controller; 175 clocks = <&cpg CPG_MOD 912>; 176 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 177 resets = <&cpg 912>; 178 }; 179 180 gpio1: gpio@e6051000 { 181 compatible = "renesas,gpio-r8a774b1", 182 "renesas,rcar-gen3-gpio"; 183 reg = <0 0xe6051000 0 0x50>; 184 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 185 #gpio-cells = <2>; 186 gpio-controller; 187 gpio-ranges = <&pfc 0 32 29>; 188 #interrupt-cells = <2>; 189 interrupt-controller; 190 clocks = <&cpg CPG_MOD 911>; 191 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 192 resets = <&cpg 911>; 193 }; 194 195 gpio2: gpio@e6052000 { 196 compatible = "renesas,gpio-r8a774b1", 197 "renesas,rcar-gen3-gpio"; 198 reg = <0 0xe6052000 0 0x50>; 199 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 200 #gpio-cells = <2>; 201 gpio-controller; 202 gpio-ranges = <&pfc 0 64 15>; 203 #interrupt-cells = <2>; 204 interrupt-controller; 205 clocks = <&cpg CPG_MOD 910>; 206 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 207 resets = <&cpg 910>; 208 }; 209 210 gpio3: gpio@e6053000 { 211 compatible = "renesas,gpio-r8a774b1", 212 "renesas,rcar-gen3-gpio"; 213 reg = <0 0xe6053000 0 0x50>; 214 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 215 #gpio-cells = <2>; 216 gpio-controller; 217 gpio-ranges = <&pfc 0 96 16>; 218 #interrupt-cells = <2>; 219 interrupt-controller; 220 clocks = <&cpg CPG_MOD 909>; 221 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 222 resets = <&cpg 909>; 223 }; 224 225 gpio4: gpio@e6054000 { 226 compatible = "renesas,gpio-r8a774b1", 227 "renesas,rcar-gen3-gpio"; 228 reg = <0 0xe6054000 0 0x50>; 229 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 230 #gpio-cells = <2>; 231 gpio-controller; 232 gpio-ranges = <&pfc 0 128 18>; 233 #interrupt-cells = <2>; 234 interrupt-controller; 235 clocks = <&cpg CPG_MOD 908>; 236 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 237 resets = <&cpg 908>; 238 }; 239 240 gpio5: gpio@e6055000 { 241 compatible = "renesas,gpio-r8a774b1", 242 "renesas,rcar-gen3-gpio"; 243 reg = <0 0xe6055000 0 0x50>; 244 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 245 #gpio-cells = <2>; 246 gpio-controller; 247 gpio-ranges = <&pfc 0 160 26>; 248 #interrupt-cells = <2>; 249 interrupt-controller; 250 clocks = <&cpg CPG_MOD 907>; 251 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 252 resets = <&cpg 907>; 253 }; 254 255 gpio6: gpio@e6055400 { 256 compatible = "renesas,gpio-r8a774b1", 257 "renesas,rcar-gen3-gpio"; 258 reg = <0 0xe6055400 0 0x50>; 259 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 260 #gpio-cells = <2>; 261 gpio-controller; 262 gpio-ranges = <&pfc 0 192 32>; 263 #interrupt-cells = <2>; 264 interrupt-controller; 265 clocks = <&cpg CPG_MOD 906>; 266 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 267 resets = <&cpg 906>; 268 }; 269 270 gpio7: gpio@e6055800 { 271 compatible = "renesas,gpio-r8a774b1", 272 "renesas,rcar-gen3-gpio"; 273 reg = <0 0xe6055800 0 0x50>; 274 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 275 #gpio-cells = <2>; 276 gpio-controller; 277 gpio-ranges = <&pfc 0 224 4>; 278 #interrupt-cells = <2>; 279 interrupt-controller; 280 clocks = <&cpg CPG_MOD 905>; 281 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 282 resets = <&cpg 905>; 283 }; 284 285 pfc: pinctrl@e6060000 { 286 compatible = "renesas,pfc-r8a774b1"; 287 reg = <0 0xe6060000 0 0x50c>; 288 }; 289 290 cmt0: timer@e60f0000 { 291 compatible = "renesas,r8a774b1-cmt0", 292 "renesas,rcar-gen3-cmt0"; 293 reg = <0 0xe60f0000 0 0x1004>; 294 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 295 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 296 clocks = <&cpg CPG_MOD 303>; 297 clock-names = "fck"; 298 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 299 resets = <&cpg 303>; 300 status = "disabled"; 301 }; 302 303 cmt1: timer@e6130000 { 304 compatible = "renesas,r8a774b1-cmt1", 305 "renesas,rcar-gen3-cmt1"; 306 reg = <0 0xe6130000 0 0x1004>; 307 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 314 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 315 clocks = <&cpg CPG_MOD 302>; 316 clock-names = "fck"; 317 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 318 resets = <&cpg 302>; 319 status = "disabled"; 320 }; 321 322 cmt2: timer@e6140000 { 323 compatible = "renesas,r8a774b1-cmt1", 324 "renesas,rcar-gen3-cmt1"; 325 reg = <0 0xe6140000 0 0x1004>; 326 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 333 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 334 clocks = <&cpg CPG_MOD 301>; 335 clock-names = "fck"; 336 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 337 resets = <&cpg 301>; 338 status = "disabled"; 339 }; 340 341 cmt3: timer@e6148000 { 342 compatible = "renesas,r8a774b1-cmt1", 343 "renesas,rcar-gen3-cmt1"; 344 reg = <0 0xe6148000 0 0x1004>; 345 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 353 clocks = <&cpg CPG_MOD 300>; 354 clock-names = "fck"; 355 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 356 resets = <&cpg 300>; 357 status = "disabled"; 358 }; 359 360 cpg: clock-controller@e6150000 { 361 compatible = "renesas,r8a774b1-cpg-mssr"; 362 reg = <0 0xe6150000 0 0x1000>; 363 clocks = <&extal_clk>, <&extalr_clk>; 364 clock-names = "extal", "extalr"; 365 #clock-cells = <2>; 366 #power-domain-cells = <0>; 367 #reset-cells = <1>; 368 }; 369 370 rst: reset-controller@e6160000 { 371 compatible = "renesas,r8a774b1-rst"; 372 reg = <0 0xe6160000 0 0x0200>; 373 }; 374 375 sysc: system-controller@e6180000 { 376 compatible = "renesas,r8a774b1-sysc"; 377 reg = <0 0xe6180000 0 0x0400>; 378 #power-domain-cells = <1>; 379 }; 380 381 tsc: thermal@e6198000 { 382 compatible = "renesas,r8a774b1-thermal"; 383 reg = <0 0xe6198000 0 0x100>, 384 <0 0xe61a0000 0 0x100>, 385 <0 0xe61a8000 0 0x100>; 386 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 388 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 389 clocks = <&cpg CPG_MOD 522>; 390 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 391 resets = <&cpg 522>; 392 #thermal-sensor-cells = <1>; 393 }; 394 395 intc_ex: interrupt-controller@e61c0000 { 396 compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc"; 397 #interrupt-cells = <2>; 398 interrupt-controller; 399 reg = <0 0xe61c0000 0 0x200>; 400 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 404 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 405 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 406 clocks = <&cpg CPG_MOD 407>; 407 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 408 resets = <&cpg 407>; 409 }; 410 411 tmu0: timer@e61e0000 { 412 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 413 reg = <0 0xe61e0000 0 0x30>; 414 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 415 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 416 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 417 clocks = <&cpg CPG_MOD 125>; 418 clock-names = "fck"; 419 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 420 resets = <&cpg 125>; 421 status = "disabled"; 422 }; 423 424 tmu1: timer@e6fc0000 { 425 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 426 reg = <0 0xe6fc0000 0 0x30>; 427 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 428 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 429 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 430 clocks = <&cpg CPG_MOD 124>; 431 clock-names = "fck"; 432 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 433 resets = <&cpg 124>; 434 status = "disabled"; 435 }; 436 437 tmu2: timer@e6fd0000 { 438 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 439 reg = <0 0xe6fd0000 0 0x30>; 440 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 441 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 442 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 443 clocks = <&cpg CPG_MOD 123>; 444 clock-names = "fck"; 445 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 446 resets = <&cpg 123>; 447 status = "disabled"; 448 }; 449 450 tmu3: timer@e6fe0000 { 451 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 452 reg = <0 0xe6fe0000 0 0x30>; 453 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 454 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 455 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 456 clocks = <&cpg CPG_MOD 122>; 457 clock-names = "fck"; 458 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 459 resets = <&cpg 122>; 460 status = "disabled"; 461 }; 462 463 tmu4: timer@ffc00000 { 464 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 465 reg = <0 0xffc00000 0 0x30>; 466 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 467 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 468 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 469 clocks = <&cpg CPG_MOD 121>; 470 clock-names = "fck"; 471 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 472 resets = <&cpg 121>; 473 status = "disabled"; 474 }; 475 476 i2c0: i2c@e6500000 { 477 #address-cells = <1>; 478 #size-cells = <0>; 479 compatible = "renesas,i2c-r8a774b1", 480 "renesas,rcar-gen3-i2c"; 481 reg = <0 0xe6500000 0 0x40>; 482 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 483 clocks = <&cpg CPG_MOD 931>; 484 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 485 resets = <&cpg 931>; 486 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 487 <&dmac2 0x91>, <&dmac2 0x90>; 488 dma-names = "tx", "rx", "tx", "rx"; 489 i2c-scl-internal-delay-ns = <110>; 490 status = "disabled"; 491 }; 492 493 i2c1: i2c@e6508000 { 494 #address-cells = <1>; 495 #size-cells = <0>; 496 compatible = "renesas,i2c-r8a774b1", 497 "renesas,rcar-gen3-i2c"; 498 reg = <0 0xe6508000 0 0x40>; 499 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 500 clocks = <&cpg CPG_MOD 930>; 501 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 502 resets = <&cpg 930>; 503 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 504 <&dmac2 0x93>, <&dmac2 0x92>; 505 dma-names = "tx", "rx", "tx", "rx"; 506 i2c-scl-internal-delay-ns = <6>; 507 status = "disabled"; 508 }; 509 510 i2c2: i2c@e6510000 { 511 #address-cells = <1>; 512 #size-cells = <0>; 513 compatible = "renesas,i2c-r8a774b1", 514 "renesas,rcar-gen3-i2c"; 515 reg = <0 0xe6510000 0 0x40>; 516 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 517 clocks = <&cpg CPG_MOD 929>; 518 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 519 resets = <&cpg 929>; 520 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 521 <&dmac2 0x95>, <&dmac2 0x94>; 522 dma-names = "tx", "rx", "tx", "rx"; 523 i2c-scl-internal-delay-ns = <6>; 524 status = "disabled"; 525 }; 526 527 i2c3: i2c@e66d0000 { 528 #address-cells = <1>; 529 #size-cells = <0>; 530 compatible = "renesas,i2c-r8a774b1", 531 "renesas,rcar-gen3-i2c"; 532 reg = <0 0xe66d0000 0 0x40>; 533 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 534 clocks = <&cpg CPG_MOD 928>; 535 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 536 resets = <&cpg 928>; 537 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 538 dma-names = "tx", "rx"; 539 i2c-scl-internal-delay-ns = <110>; 540 status = "disabled"; 541 }; 542 543 i2c4: i2c@e66d8000 { 544 #address-cells = <1>; 545 #size-cells = <0>; 546 compatible = "renesas,i2c-r8a774b1", 547 "renesas,rcar-gen3-i2c"; 548 reg = <0 0xe66d8000 0 0x40>; 549 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 550 clocks = <&cpg CPG_MOD 927>; 551 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 552 resets = <&cpg 927>; 553 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 554 dma-names = "tx", "rx"; 555 i2c-scl-internal-delay-ns = <110>; 556 status = "disabled"; 557 }; 558 559 i2c5: i2c@e66e0000 { 560 #address-cells = <1>; 561 #size-cells = <0>; 562 compatible = "renesas,i2c-r8a774b1", 563 "renesas,rcar-gen3-i2c"; 564 reg = <0 0xe66e0000 0 0x40>; 565 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 566 clocks = <&cpg CPG_MOD 919>; 567 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 568 resets = <&cpg 919>; 569 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 570 dma-names = "tx", "rx"; 571 i2c-scl-internal-delay-ns = <110>; 572 status = "disabled"; 573 }; 574 575 i2c6: i2c@e66e8000 { 576 #address-cells = <1>; 577 #size-cells = <0>; 578 compatible = "renesas,i2c-r8a774b1", 579 "renesas,rcar-gen3-i2c"; 580 reg = <0 0xe66e8000 0 0x40>; 581 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 582 clocks = <&cpg CPG_MOD 918>; 583 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 584 resets = <&cpg 918>; 585 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 586 dma-names = "tx", "rx"; 587 i2c-scl-internal-delay-ns = <6>; 588 status = "disabled"; 589 }; 590 591 i2c_dvfs: i2c@e60b0000 { 592 #address-cells = <1>; 593 #size-cells = <0>; 594 compatible = "renesas,iic-r8a774b1", 595 "renesas,rcar-gen3-iic", 596 "renesas,rmobile-iic"; 597 reg = <0 0xe60b0000 0 0x425>; 598 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 599 clocks = <&cpg CPG_MOD 926>; 600 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 601 resets = <&cpg 926>; 602 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 603 dma-names = "tx", "rx"; 604 status = "disabled"; 605 }; 606 607 hscif0: serial@e6540000 { 608 compatible = "renesas,hscif-r8a774b1", 609 "renesas,rcar-gen3-hscif", 610 "renesas,hscif"; 611 reg = <0 0xe6540000 0 0x60>; 612 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 613 clocks = <&cpg CPG_MOD 520>, 614 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 615 <&scif_clk>; 616 clock-names = "fck", "brg_int", "scif_clk"; 617 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 618 <&dmac2 0x31>, <&dmac2 0x30>; 619 dma-names = "tx", "rx", "tx", "rx"; 620 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 621 resets = <&cpg 520>; 622 status = "disabled"; 623 }; 624 625 hscif1: serial@e6550000 { 626 compatible = "renesas,hscif-r8a774b1", 627 "renesas,rcar-gen3-hscif", 628 "renesas,hscif"; 629 reg = <0 0xe6550000 0 0x60>; 630 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 631 clocks = <&cpg CPG_MOD 519>, 632 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 633 <&scif_clk>; 634 clock-names = "fck", "brg_int", "scif_clk"; 635 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 636 <&dmac2 0x33>, <&dmac2 0x32>; 637 dma-names = "tx", "rx", "tx", "rx"; 638 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 639 resets = <&cpg 519>; 640 status = "disabled"; 641 }; 642 643 hscif2: serial@e6560000 { 644 compatible = "renesas,hscif-r8a774b1", 645 "renesas,rcar-gen3-hscif", 646 "renesas,hscif"; 647 reg = <0 0xe6560000 0 0x60>; 648 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 649 clocks = <&cpg CPG_MOD 518>, 650 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 651 <&scif_clk>; 652 clock-names = "fck", "brg_int", "scif_clk"; 653 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 654 <&dmac2 0x35>, <&dmac2 0x34>; 655 dma-names = "tx", "rx", "tx", "rx"; 656 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 657 resets = <&cpg 518>; 658 status = "disabled"; 659 }; 660 661 hscif3: serial@e66a0000 { 662 compatible = "renesas,hscif-r8a774b1", 663 "renesas,rcar-gen3-hscif", 664 "renesas,hscif"; 665 reg = <0 0xe66a0000 0 0x60>; 666 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 667 clocks = <&cpg CPG_MOD 517>, 668 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 669 <&scif_clk>; 670 clock-names = "fck", "brg_int", "scif_clk"; 671 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 672 dma-names = "tx", "rx"; 673 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 674 resets = <&cpg 517>; 675 status = "disabled"; 676 }; 677 678 hscif4: serial@e66b0000 { 679 compatible = "renesas,hscif-r8a774b1", 680 "renesas,rcar-gen3-hscif", 681 "renesas,hscif"; 682 reg = <0 0xe66b0000 0 0x60>; 683 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 684 clocks = <&cpg CPG_MOD 516>, 685 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 686 <&scif_clk>; 687 clock-names = "fck", "brg_int", "scif_clk"; 688 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 689 dma-names = "tx", "rx"; 690 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 691 resets = <&cpg 516>; 692 status = "disabled"; 693 }; 694 695 hsusb: usb@e6590000 { 696 compatible = "renesas,usbhs-r8a774b1", 697 "renesas,rcar-gen3-usbhs"; 698 reg = <0 0xe6590000 0 0x200>; 699 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 700 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 701 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 702 <&usb_dmac1 0>, <&usb_dmac1 1>; 703 dma-names = "ch0", "ch1", "ch2", "ch3"; 704 renesas,buswait = <11>; 705 phys = <&usb2_phy0 3>; 706 phy-names = "usb"; 707 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 708 resets = <&cpg 704>, <&cpg 703>; 709 status = "disabled"; 710 }; 711 712 usb2_clksel: clock-controller@e6590630 { 713 compatible = "renesas,r8a774b1-rcar-usb2-clock-sel", 714 "renesas,rcar-gen3-usb2-clock-sel"; 715 reg = <0 0xe6590630 0 0x02>; 716 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, 717 <&usb_extal_clk>, <&usb3s0_clk>; 718 clock-names = "ehci_ohci", "hs-usb-if", 719 "usb_extal", "usb_xtal"; 720 #clock-cells = <0>; 721 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 722 resets = <&cpg 703>, <&cpg 704>; 723 reset-names = "ehci_ohci", "hs-usb-if"; 724 status = "disabled"; 725 }; 726 727 usb_dmac0: dma-controller@e65a0000 { 728 compatible = "renesas,r8a774b1-usb-dmac", 729 "renesas,usb-dmac"; 730 reg = <0 0xe65a0000 0 0x100>; 731 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 732 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 733 interrupt-names = "ch0", "ch1"; 734 clocks = <&cpg CPG_MOD 330>; 735 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 736 resets = <&cpg 330>; 737 #dma-cells = <1>; 738 dma-channels = <2>; 739 }; 740 741 usb_dmac1: dma-controller@e65b0000 { 742 compatible = "renesas,r8a774b1-usb-dmac", 743 "renesas,usb-dmac"; 744 reg = <0 0xe65b0000 0 0x100>; 745 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 746 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 747 interrupt-names = "ch0", "ch1"; 748 clocks = <&cpg CPG_MOD 331>; 749 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 750 resets = <&cpg 331>; 751 #dma-cells = <1>; 752 dma-channels = <2>; 753 }; 754 755 usb3_phy0: usb-phy@e65ee000 { 756 compatible = "renesas,r8a774b1-usb3-phy", 757 "renesas,rcar-gen3-usb3-phy"; 758 reg = <0 0xe65ee000 0 0x90>; 759 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 760 <&usb_extal_clk>; 761 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 762 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 763 resets = <&cpg 328>; 764 #phy-cells = <0>; 765 status = "disabled"; 766 }; 767 768 dmac0: dma-controller@e6700000 { 769 compatible = "renesas,dmac-r8a774b1", 770 "renesas,rcar-dmac"; 771 reg = <0 0xe6700000 0 0x10000>; 772 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 789 interrupt-names = "error", 790 "ch0", "ch1", "ch2", "ch3", 791 "ch4", "ch5", "ch6", "ch7", 792 "ch8", "ch9", "ch10", "ch11", 793 "ch12", "ch13", "ch14", "ch15"; 794 clocks = <&cpg CPG_MOD 219>; 795 clock-names = "fck"; 796 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 797 resets = <&cpg 219>; 798 #dma-cells = <1>; 799 dma-channels = <16>; 800 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 801 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 802 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 803 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 804 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 805 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 806 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 807 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 808 }; 809 810 dmac1: dma-controller@e7300000 { 811 compatible = "renesas,dmac-r8a774b1", 812 "renesas,rcar-dmac"; 813 reg = <0 0xe7300000 0 0x10000>; 814 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 831 interrupt-names = "error", 832 "ch0", "ch1", "ch2", "ch3", 833 "ch4", "ch5", "ch6", "ch7", 834 "ch8", "ch9", "ch10", "ch11", 835 "ch12", "ch13", "ch14", "ch15"; 836 clocks = <&cpg CPG_MOD 218>; 837 clock-names = "fck"; 838 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 839 resets = <&cpg 218>; 840 #dma-cells = <1>; 841 dma-channels = <16>; 842 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 843 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 844 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 845 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 846 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 847 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 848 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 849 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 850 }; 851 852 dmac2: dma-controller@e7310000 { 853 compatible = "renesas,dmac-r8a774b1", 854 "renesas,rcar-dmac"; 855 reg = <0 0xe7310000 0 0x10000>; 856 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 873 interrupt-names = "error", 874 "ch0", "ch1", "ch2", "ch3", 875 "ch4", "ch5", "ch6", "ch7", 876 "ch8", "ch9", "ch10", "ch11", 877 "ch12", "ch13", "ch14", "ch15"; 878 clocks = <&cpg CPG_MOD 217>; 879 clock-names = "fck"; 880 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 881 resets = <&cpg 217>; 882 #dma-cells = <1>; 883 dma-channels = <16>; 884 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 885 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 886 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 887 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 888 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 889 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 890 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 891 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 892 }; 893 894 ipmmu_ds0: iommu@e6740000 { 895 compatible = "renesas,ipmmu-r8a774b1"; 896 reg = <0 0xe6740000 0 0x1000>; 897 renesas,ipmmu-main = <&ipmmu_mm 0>; 898 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 899 #iommu-cells = <1>; 900 }; 901 902 ipmmu_ds1: iommu@e7740000 { 903 compatible = "renesas,ipmmu-r8a774b1"; 904 reg = <0 0xe7740000 0 0x1000>; 905 renesas,ipmmu-main = <&ipmmu_mm 1>; 906 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 907 #iommu-cells = <1>; 908 }; 909 910 ipmmu_hc: iommu@e6570000 { 911 compatible = "renesas,ipmmu-r8a774b1"; 912 reg = <0 0xe6570000 0 0x1000>; 913 renesas,ipmmu-main = <&ipmmu_mm 2>; 914 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 915 #iommu-cells = <1>; 916 }; 917 918 ipmmu_mm: iommu@e67b0000 { 919 compatible = "renesas,ipmmu-r8a774b1"; 920 reg = <0 0xe67b0000 0 0x1000>; 921 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 922 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 923 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 924 #iommu-cells = <1>; 925 }; 926 927 ipmmu_mp: iommu@ec670000 { 928 compatible = "renesas,ipmmu-r8a774b1"; 929 reg = <0 0xec670000 0 0x1000>; 930 renesas,ipmmu-main = <&ipmmu_mm 4>; 931 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 932 #iommu-cells = <1>; 933 }; 934 935 ipmmu_pv0: iommu@fd800000 { 936 compatible = "renesas,ipmmu-r8a774b1"; 937 reg = <0 0xfd800000 0 0x1000>; 938 renesas,ipmmu-main = <&ipmmu_mm 6>; 939 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 940 #iommu-cells = <1>; 941 }; 942 943 ipmmu_vc0: iommu@fe6b0000 { 944 compatible = "renesas,ipmmu-r8a774b1"; 945 reg = <0 0xfe6b0000 0 0x1000>; 946 renesas,ipmmu-main = <&ipmmu_mm 12>; 947 power-domains = <&sysc R8A774B1_PD_A3VC>; 948 #iommu-cells = <1>; 949 }; 950 951 ipmmu_vi0: iommu@febd0000 { 952 compatible = "renesas,ipmmu-r8a774b1"; 953 reg = <0 0xfebd0000 0 0x1000>; 954 renesas,ipmmu-main = <&ipmmu_mm 14>; 955 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 956 #iommu-cells = <1>; 957 }; 958 959 ipmmu_vp0: iommu@fe990000 { 960 compatible = "renesas,ipmmu-r8a774b1"; 961 reg = <0 0xfe990000 0 0x1000>; 962 renesas,ipmmu-main = <&ipmmu_mm 16>; 963 power-domains = <&sysc R8A774B1_PD_A3VP>; 964 #iommu-cells = <1>; 965 }; 966 967 avb: ethernet@e6800000 { 968 compatible = "renesas,etheravb-r8a774b1", 969 "renesas,etheravb-rcar-gen3"; 970 reg = <0 0xe6800000 0 0x800>; 971 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 996 interrupt-names = "ch0", "ch1", "ch2", "ch3", 997 "ch4", "ch5", "ch6", "ch7", 998 "ch8", "ch9", "ch10", "ch11", 999 "ch12", "ch13", "ch14", "ch15", 1000 "ch16", "ch17", "ch18", "ch19", 1001 "ch20", "ch21", "ch22", "ch23", 1002 "ch24"; 1003 clocks = <&cpg CPG_MOD 812>; 1004 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1005 resets = <&cpg 812>; 1006 phy-mode = "rgmii"; 1007 rx-internal-delay-ps = <0>; 1008 tx-internal-delay-ps = <0>; 1009 iommus = <&ipmmu_ds0 16>; 1010 #address-cells = <1>; 1011 #size-cells = <0>; 1012 status = "disabled"; 1013 }; 1014 1015 can0: can@e6c30000 { 1016 compatible = "renesas,can-r8a774b1", 1017 "renesas,rcar-gen3-can"; 1018 reg = <0 0xe6c30000 0 0x1000>; 1019 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1020 clocks = <&cpg CPG_MOD 916>, 1021 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1022 <&can_clk>; 1023 clock-names = "clkp1", "clkp2", "can_clk"; 1024 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1025 assigned-clock-rates = <40000000>; 1026 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1027 resets = <&cpg 916>; 1028 status = "disabled"; 1029 }; 1030 1031 can1: can@e6c38000 { 1032 compatible = "renesas,can-r8a774b1", 1033 "renesas,rcar-gen3-can"; 1034 reg = <0 0xe6c38000 0 0x1000>; 1035 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1036 clocks = <&cpg CPG_MOD 915>, 1037 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1038 <&can_clk>; 1039 clock-names = "clkp1", "clkp2", "can_clk"; 1040 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1041 assigned-clock-rates = <40000000>; 1042 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1043 resets = <&cpg 915>; 1044 status = "disabled"; 1045 }; 1046 1047 canfd: can@e66c0000 { 1048 compatible = "renesas,r8a774b1-canfd", 1049 "renesas,rcar-gen3-canfd"; 1050 reg = <0 0xe66c0000 0 0x8000>; 1051 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1052 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1053 clocks = <&cpg CPG_MOD 914>, 1054 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1055 <&can_clk>; 1056 clock-names = "fck", "canfd", "can_clk"; 1057 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1058 assigned-clock-rates = <40000000>; 1059 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1060 resets = <&cpg 914>; 1061 status = "disabled"; 1062 1063 channel0 { 1064 status = "disabled"; 1065 }; 1066 1067 channel1 { 1068 status = "disabled"; 1069 }; 1070 }; 1071 1072 pwm0: pwm@e6e30000 { 1073 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1074 reg = <0 0xe6e30000 0 0x8>; 1075 #pwm-cells = <2>; 1076 clocks = <&cpg CPG_MOD 523>; 1077 resets = <&cpg 523>; 1078 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1079 status = "disabled"; 1080 }; 1081 1082 pwm1: pwm@e6e31000 { 1083 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1084 reg = <0 0xe6e31000 0 0x8>; 1085 #pwm-cells = <2>; 1086 clocks = <&cpg CPG_MOD 523>; 1087 resets = <&cpg 523>; 1088 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1089 status = "disabled"; 1090 }; 1091 1092 pwm2: pwm@e6e32000 { 1093 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1094 reg = <0 0xe6e32000 0 0x8>; 1095 #pwm-cells = <2>; 1096 clocks = <&cpg CPG_MOD 523>; 1097 resets = <&cpg 523>; 1098 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1099 status = "disabled"; 1100 }; 1101 1102 pwm3: pwm@e6e33000 { 1103 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1104 reg = <0 0xe6e33000 0 0x8>; 1105 #pwm-cells = <2>; 1106 clocks = <&cpg CPG_MOD 523>; 1107 resets = <&cpg 523>; 1108 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1109 status = "disabled"; 1110 }; 1111 1112 pwm4: pwm@e6e34000 { 1113 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1114 reg = <0 0xe6e34000 0 0x8>; 1115 #pwm-cells = <2>; 1116 clocks = <&cpg CPG_MOD 523>; 1117 resets = <&cpg 523>; 1118 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1119 status = "disabled"; 1120 }; 1121 1122 pwm5: pwm@e6e35000 { 1123 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1124 reg = <0 0xe6e35000 0 0x8>; 1125 #pwm-cells = <2>; 1126 clocks = <&cpg CPG_MOD 523>; 1127 resets = <&cpg 523>; 1128 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1129 status = "disabled"; 1130 }; 1131 1132 pwm6: pwm@e6e36000 { 1133 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1134 reg = <0 0xe6e36000 0 0x8>; 1135 #pwm-cells = <2>; 1136 clocks = <&cpg CPG_MOD 523>; 1137 resets = <&cpg 523>; 1138 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1139 status = "disabled"; 1140 }; 1141 1142 scif0: serial@e6e60000 { 1143 compatible = "renesas,scif-r8a774b1", 1144 "renesas,rcar-gen3-scif", "renesas,scif"; 1145 reg = <0 0xe6e60000 0 0x40>; 1146 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1147 clocks = <&cpg CPG_MOD 207>, 1148 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1149 <&scif_clk>; 1150 clock-names = "fck", "brg_int", "scif_clk"; 1151 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1152 <&dmac2 0x51>, <&dmac2 0x50>; 1153 dma-names = "tx", "rx", "tx", "rx"; 1154 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1155 resets = <&cpg 207>; 1156 status = "disabled"; 1157 }; 1158 1159 scif1: serial@e6e68000 { 1160 compatible = "renesas,scif-r8a774b1", 1161 "renesas,rcar-gen3-scif", "renesas,scif"; 1162 reg = <0 0xe6e68000 0 0x40>; 1163 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1164 clocks = <&cpg CPG_MOD 206>, 1165 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1166 <&scif_clk>; 1167 clock-names = "fck", "brg_int", "scif_clk"; 1168 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1169 <&dmac2 0x53>, <&dmac2 0x52>; 1170 dma-names = "tx", "rx", "tx", "rx"; 1171 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1172 resets = <&cpg 206>; 1173 status = "disabled"; 1174 }; 1175 1176 scif2: serial@e6e88000 { 1177 compatible = "renesas,scif-r8a774b1", 1178 "renesas,rcar-gen3-scif", "renesas,scif"; 1179 reg = <0 0xe6e88000 0 0x40>; 1180 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1181 clocks = <&cpg CPG_MOD 310>, 1182 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1183 <&scif_clk>; 1184 clock-names = "fck", "brg_int", "scif_clk"; 1185 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1186 <&dmac2 0x13>, <&dmac2 0x12>; 1187 dma-names = "tx", "rx", "tx", "rx"; 1188 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1189 resets = <&cpg 310>; 1190 status = "disabled"; 1191 }; 1192 1193 scif3: serial@e6c50000 { 1194 compatible = "renesas,scif-r8a774b1", 1195 "renesas,rcar-gen3-scif", "renesas,scif"; 1196 reg = <0 0xe6c50000 0 0x40>; 1197 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1198 clocks = <&cpg CPG_MOD 204>, 1199 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1200 <&scif_clk>; 1201 clock-names = "fck", "brg_int", "scif_clk"; 1202 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1203 dma-names = "tx", "rx"; 1204 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1205 resets = <&cpg 204>; 1206 status = "disabled"; 1207 }; 1208 1209 scif4: serial@e6c40000 { 1210 compatible = "renesas,scif-r8a774b1", 1211 "renesas,rcar-gen3-scif", "renesas,scif"; 1212 reg = <0 0xe6c40000 0 0x40>; 1213 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1214 clocks = <&cpg CPG_MOD 203>, 1215 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1216 <&scif_clk>; 1217 clock-names = "fck", "brg_int", "scif_clk"; 1218 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1219 dma-names = "tx", "rx"; 1220 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1221 resets = <&cpg 203>; 1222 status = "disabled"; 1223 }; 1224 1225 scif5: serial@e6f30000 { 1226 compatible = "renesas,scif-r8a774b1", 1227 "renesas,rcar-gen3-scif", "renesas,scif"; 1228 reg = <0 0xe6f30000 0 0x40>; 1229 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1230 clocks = <&cpg CPG_MOD 202>, 1231 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1232 <&scif_clk>; 1233 clock-names = "fck", "brg_int", "scif_clk"; 1234 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1235 <&dmac2 0x5b>, <&dmac2 0x5a>; 1236 dma-names = "tx", "rx", "tx", "rx"; 1237 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1238 resets = <&cpg 202>; 1239 status = "disabled"; 1240 }; 1241 1242 msiof0: spi@e6e90000 { 1243 compatible = "renesas,msiof-r8a774b1", 1244 "renesas,rcar-gen3-msiof"; 1245 reg = <0 0xe6e90000 0 0x0064>; 1246 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1247 clocks = <&cpg CPG_MOD 211>; 1248 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1249 <&dmac2 0x41>, <&dmac2 0x40>; 1250 dma-names = "tx", "rx", "tx", "rx"; 1251 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1252 resets = <&cpg 211>; 1253 #address-cells = <1>; 1254 #size-cells = <0>; 1255 status = "disabled"; 1256 }; 1257 1258 msiof1: spi@e6ea0000 { 1259 compatible = "renesas,msiof-r8a774b1", 1260 "renesas,rcar-gen3-msiof"; 1261 reg = <0 0xe6ea0000 0 0x0064>; 1262 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1263 clocks = <&cpg CPG_MOD 210>; 1264 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1265 <&dmac2 0x43>, <&dmac2 0x42>; 1266 dma-names = "tx", "rx", "tx", "rx"; 1267 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1268 resets = <&cpg 210>; 1269 #address-cells = <1>; 1270 #size-cells = <0>; 1271 status = "disabled"; 1272 }; 1273 1274 msiof2: spi@e6c00000 { 1275 compatible = "renesas,msiof-r8a774b1", 1276 "renesas,rcar-gen3-msiof"; 1277 reg = <0 0xe6c00000 0 0x0064>; 1278 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1279 clocks = <&cpg CPG_MOD 209>; 1280 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1281 dma-names = "tx", "rx"; 1282 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1283 resets = <&cpg 209>; 1284 #address-cells = <1>; 1285 #size-cells = <0>; 1286 status = "disabled"; 1287 }; 1288 1289 msiof3: spi@e6c10000 { 1290 compatible = "renesas,msiof-r8a774b1", 1291 "renesas,rcar-gen3-msiof"; 1292 reg = <0 0xe6c10000 0 0x0064>; 1293 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1294 clocks = <&cpg CPG_MOD 208>; 1295 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1296 dma-names = "tx", "rx"; 1297 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1298 resets = <&cpg 208>; 1299 #address-cells = <1>; 1300 #size-cells = <0>; 1301 status = "disabled"; 1302 }; 1303 1304 vin0: video@e6ef0000 { 1305 compatible = "renesas,vin-r8a774b1"; 1306 reg = <0 0xe6ef0000 0 0x1000>; 1307 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1308 clocks = <&cpg CPG_MOD 811>; 1309 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1310 resets = <&cpg 811>; 1311 renesas,id = <0>; 1312 status = "disabled"; 1313 1314 ports { 1315 #address-cells = <1>; 1316 #size-cells = <0>; 1317 1318 port@1 { 1319 #address-cells = <1>; 1320 #size-cells = <0>; 1321 1322 reg = <1>; 1323 1324 vin0csi20: endpoint@0 { 1325 reg = <0>; 1326 remote-endpoint = <&csi20vin0>; 1327 }; 1328 vin0csi40: endpoint@2 { 1329 reg = <2>; 1330 remote-endpoint = <&csi40vin0>; 1331 }; 1332 }; 1333 }; 1334 }; 1335 1336 vin1: video@e6ef1000 { 1337 compatible = "renesas,vin-r8a774b1"; 1338 reg = <0 0xe6ef1000 0 0x1000>; 1339 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1340 clocks = <&cpg CPG_MOD 810>; 1341 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1342 resets = <&cpg 810>; 1343 renesas,id = <1>; 1344 status = "disabled"; 1345 1346 ports { 1347 #address-cells = <1>; 1348 #size-cells = <0>; 1349 1350 port@1 { 1351 #address-cells = <1>; 1352 #size-cells = <0>; 1353 1354 reg = <1>; 1355 1356 vin1csi20: endpoint@0 { 1357 reg = <0>; 1358 remote-endpoint = <&csi20vin1>; 1359 }; 1360 vin1csi40: endpoint@2 { 1361 reg = <2>; 1362 remote-endpoint = <&csi40vin1>; 1363 }; 1364 }; 1365 }; 1366 }; 1367 1368 vin2: video@e6ef2000 { 1369 compatible = "renesas,vin-r8a774b1"; 1370 reg = <0 0xe6ef2000 0 0x1000>; 1371 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1372 clocks = <&cpg CPG_MOD 809>; 1373 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1374 resets = <&cpg 809>; 1375 renesas,id = <2>; 1376 status = "disabled"; 1377 1378 ports { 1379 #address-cells = <1>; 1380 #size-cells = <0>; 1381 1382 port@1 { 1383 #address-cells = <1>; 1384 #size-cells = <0>; 1385 1386 reg = <1>; 1387 1388 vin2csi20: endpoint@0 { 1389 reg = <0>; 1390 remote-endpoint = <&csi20vin2>; 1391 }; 1392 vin2csi40: endpoint@2 { 1393 reg = <2>; 1394 remote-endpoint = <&csi40vin2>; 1395 }; 1396 }; 1397 }; 1398 }; 1399 1400 vin3: video@e6ef3000 { 1401 compatible = "renesas,vin-r8a774b1"; 1402 reg = <0 0xe6ef3000 0 0x1000>; 1403 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1404 clocks = <&cpg CPG_MOD 808>; 1405 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1406 resets = <&cpg 808>; 1407 renesas,id = <3>; 1408 status = "disabled"; 1409 1410 ports { 1411 #address-cells = <1>; 1412 #size-cells = <0>; 1413 1414 port@1 { 1415 #address-cells = <1>; 1416 #size-cells = <0>; 1417 1418 reg = <1>; 1419 1420 vin3csi20: endpoint@0 { 1421 reg = <0>; 1422 remote-endpoint = <&csi20vin3>; 1423 }; 1424 vin3csi40: endpoint@2 { 1425 reg = <2>; 1426 remote-endpoint = <&csi40vin3>; 1427 }; 1428 }; 1429 }; 1430 }; 1431 1432 vin4: video@e6ef4000 { 1433 compatible = "renesas,vin-r8a774b1"; 1434 reg = <0 0xe6ef4000 0 0x1000>; 1435 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1436 clocks = <&cpg CPG_MOD 807>; 1437 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1438 resets = <&cpg 807>; 1439 renesas,id = <4>; 1440 status = "disabled"; 1441 1442 ports { 1443 #address-cells = <1>; 1444 #size-cells = <0>; 1445 1446 port@1 { 1447 #address-cells = <1>; 1448 #size-cells = <0>; 1449 1450 reg = <1>; 1451 1452 vin4csi20: endpoint@0 { 1453 reg = <0>; 1454 remote-endpoint = <&csi20vin4>; 1455 }; 1456 vin4csi40: endpoint@2 { 1457 reg = <2>; 1458 remote-endpoint = <&csi40vin4>; 1459 }; 1460 }; 1461 }; 1462 }; 1463 1464 vin5: video@e6ef5000 { 1465 compatible = "renesas,vin-r8a774b1"; 1466 reg = <0 0xe6ef5000 0 0x1000>; 1467 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1468 clocks = <&cpg CPG_MOD 806>; 1469 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1470 resets = <&cpg 806>; 1471 renesas,id = <5>; 1472 status = "disabled"; 1473 1474 ports { 1475 #address-cells = <1>; 1476 #size-cells = <0>; 1477 1478 port@1 { 1479 #address-cells = <1>; 1480 #size-cells = <0>; 1481 1482 reg = <1>; 1483 1484 vin5csi20: endpoint@0 { 1485 reg = <0>; 1486 remote-endpoint = <&csi20vin5>; 1487 }; 1488 vin5csi40: endpoint@2 { 1489 reg = <2>; 1490 remote-endpoint = <&csi40vin5>; 1491 }; 1492 }; 1493 }; 1494 }; 1495 1496 vin6: video@e6ef6000 { 1497 compatible = "renesas,vin-r8a774b1"; 1498 reg = <0 0xe6ef6000 0 0x1000>; 1499 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1500 clocks = <&cpg CPG_MOD 805>; 1501 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1502 resets = <&cpg 805>; 1503 renesas,id = <6>; 1504 status = "disabled"; 1505 1506 ports { 1507 #address-cells = <1>; 1508 #size-cells = <0>; 1509 1510 port@1 { 1511 #address-cells = <1>; 1512 #size-cells = <0>; 1513 1514 reg = <1>; 1515 1516 vin6csi20: endpoint@0 { 1517 reg = <0>; 1518 remote-endpoint = <&csi20vin6>; 1519 }; 1520 vin6csi40: endpoint@2 { 1521 reg = <2>; 1522 remote-endpoint = <&csi40vin6>; 1523 }; 1524 }; 1525 }; 1526 }; 1527 1528 vin7: video@e6ef7000 { 1529 compatible = "renesas,vin-r8a774b1"; 1530 reg = <0 0xe6ef7000 0 0x1000>; 1531 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1532 clocks = <&cpg CPG_MOD 804>; 1533 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1534 resets = <&cpg 804>; 1535 renesas,id = <7>; 1536 status = "disabled"; 1537 1538 ports { 1539 #address-cells = <1>; 1540 #size-cells = <0>; 1541 1542 port@1 { 1543 #address-cells = <1>; 1544 #size-cells = <0>; 1545 1546 reg = <1>; 1547 1548 vin7csi20: endpoint@0 { 1549 reg = <0>; 1550 remote-endpoint = <&csi20vin7>; 1551 }; 1552 vin7csi40: endpoint@2 { 1553 reg = <2>; 1554 remote-endpoint = <&csi40vin7>; 1555 }; 1556 }; 1557 }; 1558 }; 1559 1560 rcar_sound: sound@ec500000 { 1561 /* 1562 * #sound-dai-cells is required 1563 * 1564 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1565 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1566 */ 1567 /* 1568 * #clock-cells is required for audio_clkout0/1/2/3 1569 * 1570 * clkout : #clock-cells = <0>; <&rcar_sound>; 1571 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1572 */ 1573 compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3"; 1574 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1575 <0 0xec5a0000 0 0x100>, /* ADG */ 1576 <0 0xec540000 0 0x1000>, /* SSIU */ 1577 <0 0xec541000 0 0x280>, /* SSI */ 1578 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1579 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1580 1581 clocks = <&cpg CPG_MOD 1005>, 1582 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1583 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1584 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1585 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1586 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1587 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1588 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1589 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1590 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1591 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1592 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1593 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1594 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1595 <&audio_clk_a>, <&audio_clk_b>, 1596 <&audio_clk_c>, 1597 <&cpg CPG_CORE R8A774B1_CLK_S0D4>; 1598 clock-names = "ssi-all", 1599 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1600 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1601 "ssi.1", "ssi.0", 1602 "src.9", "src.8", "src.7", "src.6", 1603 "src.5", "src.4", "src.3", "src.2", 1604 "src.1", "src.0", 1605 "mix.1", "mix.0", 1606 "ctu.1", "ctu.0", 1607 "dvc.0", "dvc.1", 1608 "clk_a", "clk_b", "clk_c", "clk_i"; 1609 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1610 resets = <&cpg 1005>, 1611 <&cpg 1006>, <&cpg 1007>, 1612 <&cpg 1008>, <&cpg 1009>, 1613 <&cpg 1010>, <&cpg 1011>, 1614 <&cpg 1012>, <&cpg 1013>, 1615 <&cpg 1014>, <&cpg 1015>; 1616 reset-names = "ssi-all", 1617 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1618 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1619 "ssi.1", "ssi.0"; 1620 status = "disabled"; 1621 1622 rcar_sound,ctu { 1623 ctu00: ctu-0 { }; 1624 ctu01: ctu-1 { }; 1625 ctu02: ctu-2 { }; 1626 ctu03: ctu-3 { }; 1627 ctu10: ctu-4 { }; 1628 ctu11: ctu-5 { }; 1629 ctu12: ctu-6 { }; 1630 ctu13: ctu-7 { }; 1631 }; 1632 1633 rcar_sound,dvc { 1634 dvc0: dvc-0 { 1635 dmas = <&audma1 0xbc>; 1636 dma-names = "tx"; 1637 }; 1638 dvc1: dvc-1 { 1639 dmas = <&audma1 0xbe>; 1640 dma-names = "tx"; 1641 }; 1642 }; 1643 1644 rcar_sound,mix { 1645 mix0: mix-0 { }; 1646 mix1: mix-1 { }; 1647 }; 1648 1649 rcar_sound,src { 1650 src0: src-0 { 1651 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1652 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1653 dma-names = "rx", "tx"; 1654 }; 1655 src1: src-1 { 1656 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1657 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1658 dma-names = "rx", "tx"; 1659 }; 1660 src2: src-2 { 1661 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1662 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1663 dma-names = "rx", "tx"; 1664 }; 1665 src3: src-3 { 1666 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1667 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1668 dma-names = "rx", "tx"; 1669 }; 1670 src4: src-4 { 1671 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1672 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1673 dma-names = "rx", "tx"; 1674 }; 1675 src5: src-5 { 1676 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1677 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1678 dma-names = "rx", "tx"; 1679 }; 1680 src6: src-6 { 1681 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1682 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1683 dma-names = "rx", "tx"; 1684 }; 1685 src7: src-7 { 1686 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1687 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1688 dma-names = "rx", "tx"; 1689 }; 1690 src8: src-8 { 1691 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1692 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1693 dma-names = "rx", "tx"; 1694 }; 1695 src9: src-9 { 1696 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1697 dmas = <&audma0 0x97>, <&audma1 0xba>; 1698 dma-names = "rx", "tx"; 1699 }; 1700 }; 1701 1702 rcar_sound,ssi { 1703 ssi0: ssi-0 { 1704 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1705 dmas = <&audma0 0x01>, <&audma1 0x02>; 1706 dma-names = "rx", "tx"; 1707 }; 1708 ssi1: ssi-1 { 1709 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1710 dmas = <&audma0 0x03>, <&audma1 0x04>; 1711 dma-names = "rx", "tx"; 1712 }; 1713 ssi2: ssi-2 { 1714 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1715 dmas = <&audma0 0x05>, <&audma1 0x06>; 1716 dma-names = "rx", "tx"; 1717 }; 1718 ssi3: ssi-3 { 1719 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1720 dmas = <&audma0 0x07>, <&audma1 0x08>; 1721 dma-names = "rx", "tx"; 1722 }; 1723 ssi4: ssi-4 { 1724 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1725 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1726 dma-names = "rx", "tx"; 1727 }; 1728 ssi5: ssi-5 { 1729 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1730 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1731 dma-names = "rx", "tx"; 1732 }; 1733 ssi6: ssi-6 { 1734 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1735 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1736 dma-names = "rx", "tx"; 1737 }; 1738 ssi7: ssi-7 { 1739 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1740 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1741 dma-names = "rx", "tx"; 1742 }; 1743 ssi8: ssi-8 { 1744 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1745 dmas = <&audma0 0x11>, <&audma1 0x12>; 1746 dma-names = "rx", "tx"; 1747 }; 1748 ssi9: ssi-9 { 1749 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1750 dmas = <&audma0 0x13>, <&audma1 0x14>; 1751 dma-names = "rx", "tx"; 1752 }; 1753 }; 1754 1755 rcar_sound,ssiu { 1756 ssiu00: ssiu-0 { 1757 dmas = <&audma0 0x15>, <&audma1 0x16>; 1758 dma-names = "rx", "tx"; 1759 }; 1760 ssiu01: ssiu-1 { 1761 dmas = <&audma0 0x35>, <&audma1 0x36>; 1762 dma-names = "rx", "tx"; 1763 }; 1764 ssiu02: ssiu-2 { 1765 dmas = <&audma0 0x37>, <&audma1 0x38>; 1766 dma-names = "rx", "tx"; 1767 }; 1768 ssiu03: ssiu-3 { 1769 dmas = <&audma0 0x47>, <&audma1 0x48>; 1770 dma-names = "rx", "tx"; 1771 }; 1772 ssiu04: ssiu-4 { 1773 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1774 dma-names = "rx", "tx"; 1775 }; 1776 ssiu05: ssiu-5 { 1777 dmas = <&audma0 0x43>, <&audma1 0x44>; 1778 dma-names = "rx", "tx"; 1779 }; 1780 ssiu06: ssiu-6 { 1781 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1782 dma-names = "rx", "tx"; 1783 }; 1784 ssiu07: ssiu-7 { 1785 dmas = <&audma0 0x53>, <&audma1 0x54>; 1786 dma-names = "rx", "tx"; 1787 }; 1788 ssiu10: ssiu-8 { 1789 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1790 dma-names = "rx", "tx"; 1791 }; 1792 ssiu11: ssiu-9 { 1793 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1794 dma-names = "rx", "tx"; 1795 }; 1796 ssiu12: ssiu-10 { 1797 dmas = <&audma0 0x57>, <&audma1 0x58>; 1798 dma-names = "rx", "tx"; 1799 }; 1800 ssiu13: ssiu-11 { 1801 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1802 dma-names = "rx", "tx"; 1803 }; 1804 ssiu14: ssiu-12 { 1805 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1806 dma-names = "rx", "tx"; 1807 }; 1808 ssiu15: ssiu-13 { 1809 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1810 dma-names = "rx", "tx"; 1811 }; 1812 ssiu16: ssiu-14 { 1813 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1814 dma-names = "rx", "tx"; 1815 }; 1816 ssiu17: ssiu-15 { 1817 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1818 dma-names = "rx", "tx"; 1819 }; 1820 ssiu20: ssiu-16 { 1821 dmas = <&audma0 0x63>, <&audma1 0x64>; 1822 dma-names = "rx", "tx"; 1823 }; 1824 ssiu21: ssiu-17 { 1825 dmas = <&audma0 0x67>, <&audma1 0x68>; 1826 dma-names = "rx", "tx"; 1827 }; 1828 ssiu22: ssiu-18 { 1829 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1830 dma-names = "rx", "tx"; 1831 }; 1832 ssiu23: ssiu-19 { 1833 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1834 dma-names = "rx", "tx"; 1835 }; 1836 ssiu24: ssiu-20 { 1837 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1838 dma-names = "rx", "tx"; 1839 }; 1840 ssiu25: ssiu-21 { 1841 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1842 dma-names = "rx", "tx"; 1843 }; 1844 ssiu26: ssiu-22 { 1845 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1846 dma-names = "rx", "tx"; 1847 }; 1848 ssiu27: ssiu-23 { 1849 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1850 dma-names = "rx", "tx"; 1851 }; 1852 ssiu30: ssiu-24 { 1853 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1854 dma-names = "rx", "tx"; 1855 }; 1856 ssiu31: ssiu-25 { 1857 dmas = <&audma0 0x21>, <&audma1 0x22>; 1858 dma-names = "rx", "tx"; 1859 }; 1860 ssiu32: ssiu-26 { 1861 dmas = <&audma0 0x23>, <&audma1 0x24>; 1862 dma-names = "rx", "tx"; 1863 }; 1864 ssiu33: ssiu-27 { 1865 dmas = <&audma0 0x25>, <&audma1 0x26>; 1866 dma-names = "rx", "tx"; 1867 }; 1868 ssiu34: ssiu-28 { 1869 dmas = <&audma0 0x27>, <&audma1 0x28>; 1870 dma-names = "rx", "tx"; 1871 }; 1872 ssiu35: ssiu-29 { 1873 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1874 dma-names = "rx", "tx"; 1875 }; 1876 ssiu36: ssiu-30 { 1877 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1878 dma-names = "rx", "tx"; 1879 }; 1880 ssiu37: ssiu-31 { 1881 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 1882 dma-names = "rx", "tx"; 1883 }; 1884 ssiu40: ssiu-32 { 1885 dmas = <&audma0 0x71>, <&audma1 0x72>; 1886 dma-names = "rx", "tx"; 1887 }; 1888 ssiu41: ssiu-33 { 1889 dmas = <&audma0 0x17>, <&audma1 0x18>; 1890 dma-names = "rx", "tx"; 1891 }; 1892 ssiu42: ssiu-34 { 1893 dmas = <&audma0 0x19>, <&audma1 0x1A>; 1894 dma-names = "rx", "tx"; 1895 }; 1896 ssiu43: ssiu-35 { 1897 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 1898 dma-names = "rx", "tx"; 1899 }; 1900 ssiu44: ssiu-36 { 1901 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 1902 dma-names = "rx", "tx"; 1903 }; 1904 ssiu45: ssiu-37 { 1905 dmas = <&audma0 0x1F>, <&audma1 0x20>; 1906 dma-names = "rx", "tx"; 1907 }; 1908 ssiu46: ssiu-38 { 1909 dmas = <&audma0 0x31>, <&audma1 0x32>; 1910 dma-names = "rx", "tx"; 1911 }; 1912 ssiu47: ssiu-39 { 1913 dmas = <&audma0 0x33>, <&audma1 0x34>; 1914 dma-names = "rx", "tx"; 1915 }; 1916 ssiu50: ssiu-40 { 1917 dmas = <&audma0 0x73>, <&audma1 0x74>; 1918 dma-names = "rx", "tx"; 1919 }; 1920 ssiu60: ssiu-41 { 1921 dmas = <&audma0 0x75>, <&audma1 0x76>; 1922 dma-names = "rx", "tx"; 1923 }; 1924 ssiu70: ssiu-42 { 1925 dmas = <&audma0 0x79>, <&audma1 0x7a>; 1926 dma-names = "rx", "tx"; 1927 }; 1928 ssiu80: ssiu-43 { 1929 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 1930 dma-names = "rx", "tx"; 1931 }; 1932 ssiu90: ssiu-44 { 1933 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 1934 dma-names = "rx", "tx"; 1935 }; 1936 ssiu91: ssiu-45 { 1937 dmas = <&audma0 0x7F>, <&audma1 0x80>; 1938 dma-names = "rx", "tx"; 1939 }; 1940 ssiu92: ssiu-46 { 1941 dmas = <&audma0 0x81>, <&audma1 0x82>; 1942 dma-names = "rx", "tx"; 1943 }; 1944 ssiu93: ssiu-47 { 1945 dmas = <&audma0 0x83>, <&audma1 0x84>; 1946 dma-names = "rx", "tx"; 1947 }; 1948 ssiu94: ssiu-48 { 1949 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 1950 dma-names = "rx", "tx"; 1951 }; 1952 ssiu95: ssiu-49 { 1953 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 1954 dma-names = "rx", "tx"; 1955 }; 1956 ssiu96: ssiu-50 { 1957 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 1958 dma-names = "rx", "tx"; 1959 }; 1960 ssiu97: ssiu-51 { 1961 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 1962 dma-names = "rx", "tx"; 1963 }; 1964 }; 1965 }; 1966 1967 audma0: dma-controller@ec700000 { 1968 compatible = "renesas,dmac-r8a774b1", 1969 "renesas,rcar-dmac"; 1970 reg = <0 0xec700000 0 0x10000>; 1971 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1972 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1973 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1974 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1975 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1976 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1977 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1978 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1979 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1980 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1981 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1982 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1983 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1984 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1985 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1986 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1987 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1988 interrupt-names = "error", 1989 "ch0", "ch1", "ch2", "ch3", 1990 "ch4", "ch5", "ch6", "ch7", 1991 "ch8", "ch9", "ch10", "ch11", 1992 "ch12", "ch13", "ch14", "ch15"; 1993 clocks = <&cpg CPG_MOD 502>; 1994 clock-names = "fck"; 1995 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1996 resets = <&cpg 502>; 1997 #dma-cells = <1>; 1998 dma-channels = <16>; 1999 }; 2000 2001 audma1: dma-controller@ec720000 { 2002 compatible = "renesas,dmac-r8a774b1", 2003 "renesas,rcar-dmac"; 2004 reg = <0 0xec720000 0 0x10000>; 2005 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2006 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2007 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2008 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2009 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2010 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2011 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2012 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2013 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2014 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2015 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2016 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2017 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2018 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2019 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2020 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2021 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2022 interrupt-names = "error", 2023 "ch0", "ch1", "ch2", "ch3", 2024 "ch4", "ch5", "ch6", "ch7", 2025 "ch8", "ch9", "ch10", "ch11", 2026 "ch12", "ch13", "ch14", "ch15"; 2027 clocks = <&cpg CPG_MOD 501>; 2028 clock-names = "fck"; 2029 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2030 resets = <&cpg 501>; 2031 #dma-cells = <1>; 2032 dma-channels = <16>; 2033 }; 2034 2035 xhci0: usb@ee000000 { 2036 compatible = "renesas,xhci-r8a774b1", 2037 "renesas,rcar-gen3-xhci"; 2038 reg = <0 0xee000000 0 0xc00>; 2039 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2040 clocks = <&cpg CPG_MOD 328>; 2041 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2042 resets = <&cpg 328>; 2043 status = "disabled"; 2044 }; 2045 2046 usb3_peri0: usb@ee020000 { 2047 compatible = "renesas,r8a774b1-usb3-peri", 2048 "renesas,rcar-gen3-usb3-peri"; 2049 reg = <0 0xee020000 0 0x400>; 2050 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2051 clocks = <&cpg CPG_MOD 328>; 2052 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2053 resets = <&cpg 328>; 2054 status = "disabled"; 2055 }; 2056 2057 ohci0: usb@ee080000 { 2058 compatible = "generic-ohci"; 2059 reg = <0 0xee080000 0 0x100>; 2060 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2061 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2062 phys = <&usb2_phy0 1>; 2063 phy-names = "usb"; 2064 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2065 resets = <&cpg 703>, <&cpg 704>; 2066 status = "disabled"; 2067 }; 2068 2069 ohci1: usb@ee0a0000 { 2070 compatible = "generic-ohci"; 2071 reg = <0 0xee0a0000 0 0x100>; 2072 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2073 clocks = <&cpg CPG_MOD 702>; 2074 phys = <&usb2_phy1 1>; 2075 phy-names = "usb"; 2076 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2077 resets = <&cpg 702>; 2078 status = "disabled"; 2079 }; 2080 2081 ehci0: usb@ee080100 { 2082 compatible = "generic-ehci"; 2083 reg = <0 0xee080100 0 0x100>; 2084 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2085 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2086 phys = <&usb2_phy0 2>; 2087 phy-names = "usb"; 2088 companion = <&ohci0>; 2089 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2090 resets = <&cpg 703>, <&cpg 704>; 2091 status = "disabled"; 2092 }; 2093 2094 ehci1: usb@ee0a0100 { 2095 compatible = "generic-ehci"; 2096 reg = <0 0xee0a0100 0 0x100>; 2097 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2098 clocks = <&cpg CPG_MOD 702>; 2099 phys = <&usb2_phy1 2>; 2100 phy-names = "usb"; 2101 companion = <&ohci1>; 2102 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2103 resets = <&cpg 702>; 2104 status = "disabled"; 2105 }; 2106 2107 usb2_phy0: usb-phy@ee080200 { 2108 compatible = "renesas,usb2-phy-r8a774b1", 2109 "renesas,rcar-gen3-usb2-phy"; 2110 reg = <0 0xee080200 0 0x700>; 2111 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2112 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2113 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2114 resets = <&cpg 703>, <&cpg 704>; 2115 #phy-cells = <1>; 2116 status = "disabled"; 2117 }; 2118 2119 usb2_phy1: usb-phy@ee0a0200 { 2120 compatible = "renesas,usb2-phy-r8a774b1", 2121 "renesas,rcar-gen3-usb2-phy"; 2122 reg = <0 0xee0a0200 0 0x700>; 2123 clocks = <&cpg CPG_MOD 702>; 2124 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2125 resets = <&cpg 702>; 2126 #phy-cells = <1>; 2127 status = "disabled"; 2128 }; 2129 2130 sdhi0: mmc@ee100000 { 2131 compatible = "renesas,sdhi-r8a774b1", 2132 "renesas,rcar-gen3-sdhi"; 2133 reg = <0 0xee100000 0 0x2000>; 2134 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2135 clocks = <&cpg CPG_MOD 314>; 2136 max-frequency = <200000000>; 2137 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2138 resets = <&cpg 314>; 2139 status = "disabled"; 2140 }; 2141 2142 sdhi1: mmc@ee120000 { 2143 compatible = "renesas,sdhi-r8a774b1", 2144 "renesas,rcar-gen3-sdhi"; 2145 reg = <0 0xee120000 0 0x2000>; 2146 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2147 clocks = <&cpg CPG_MOD 313>; 2148 max-frequency = <200000000>; 2149 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2150 resets = <&cpg 313>; 2151 status = "disabled"; 2152 }; 2153 2154 sdhi2: mmc@ee140000 { 2155 compatible = "renesas,sdhi-r8a774b1", 2156 "renesas,rcar-gen3-sdhi"; 2157 reg = <0 0xee140000 0 0x2000>; 2158 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2159 clocks = <&cpg CPG_MOD 312>; 2160 max-frequency = <200000000>; 2161 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2162 resets = <&cpg 312>; 2163 status = "disabled"; 2164 }; 2165 2166 sdhi3: mmc@ee160000 { 2167 compatible = "renesas,sdhi-r8a774b1", 2168 "renesas,rcar-gen3-sdhi"; 2169 reg = <0 0xee160000 0 0x2000>; 2170 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2171 clocks = <&cpg CPG_MOD 311>; 2172 max-frequency = <200000000>; 2173 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2174 resets = <&cpg 311>; 2175 status = "disabled"; 2176 }; 2177 2178 rpc: spi@ee200000 { 2179 compatible = "renesas,r8a774b1-rpc-if", 2180 "renesas,rcar-gen3-rpc-if"; 2181 reg = <0 0xee200000 0 0x200>, 2182 <0 0x08000000 0 0x4000000>, 2183 <0 0xee208000 0 0x100>; 2184 reg-names = "regs", "dirmap", "wbuf"; 2185 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2186 clocks = <&cpg CPG_MOD 917>; 2187 clock-names = "rpc"; 2188 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2189 resets = <&cpg 917>; 2190 #address-cells = <1>; 2191 #size-cells = <0>; 2192 status = "disabled"; 2193 }; 2194 2195 sata: sata@ee300000 { 2196 compatible = "renesas,sata-r8a774b1", 2197 "renesas,rcar-gen3-sata"; 2198 reg = <0 0xee300000 0 0x200000>; 2199 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2200 clocks = <&cpg CPG_MOD 815>; 2201 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2202 resets = <&cpg 815>; 2203 status = "disabled"; 2204 }; 2205 2206 gic: interrupt-controller@f1010000 { 2207 compatible = "arm,gic-400"; 2208 #interrupt-cells = <3>; 2209 #address-cells = <0>; 2210 interrupt-controller; 2211 reg = <0x0 0xf1010000 0 0x1000>, 2212 <0x0 0xf1020000 0 0x20000>, 2213 <0x0 0xf1040000 0 0x20000>, 2214 <0x0 0xf1060000 0 0x20000>; 2215 interrupts = <GIC_PPI 9 2216 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2217 clocks = <&cpg CPG_MOD 408>; 2218 clock-names = "clk"; 2219 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2220 resets = <&cpg 408>; 2221 }; 2222 2223 pciec0: pcie@fe000000 { 2224 compatible = "renesas,pcie-r8a774b1", 2225 "renesas,pcie-rcar-gen3"; 2226 reg = <0 0xfe000000 0 0x80000>; 2227 #address-cells = <3>; 2228 #size-cells = <2>; 2229 bus-range = <0x00 0xff>; 2230 device_type = "pci"; 2231 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2232 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2233 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2234 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2235 /* Map all possible DDR as inbound ranges */ 2236 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2237 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2238 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2239 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2240 #interrupt-cells = <1>; 2241 interrupt-map-mask = <0 0 0 0>; 2242 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2243 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2244 clock-names = "pcie", "pcie_bus"; 2245 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2246 resets = <&cpg 319>; 2247 status = "disabled"; 2248 }; 2249 2250 pciec1: pcie@ee800000 { 2251 compatible = "renesas,pcie-r8a774b1", 2252 "renesas,pcie-rcar-gen3"; 2253 reg = <0 0xee800000 0 0x80000>; 2254 #address-cells = <3>; 2255 #size-cells = <2>; 2256 bus-range = <0x00 0xff>; 2257 device_type = "pci"; 2258 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2259 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2260 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2261 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2262 /* Map all possible DDR as inbound ranges */ 2263 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2264 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2265 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2266 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2267 #interrupt-cells = <1>; 2268 interrupt-map-mask = <0 0 0 0>; 2269 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2270 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2271 clock-names = "pcie", "pcie_bus"; 2272 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2273 resets = <&cpg 318>; 2274 status = "disabled"; 2275 }; 2276 2277 pciec0_ep: pcie-ep@fe000000 { 2278 compatible = "renesas,r8a774b1-pcie-ep", 2279 "renesas,rcar-gen3-pcie-ep"; 2280 reg = <0x0 0xfe000000 0 0x80000>, 2281 <0x0 0xfe100000 0 0x100000>, 2282 <0x0 0xfe200000 0 0x200000>, 2283 <0x0 0x30000000 0 0x8000000>, 2284 <0x0 0x38000000 0 0x8000000>; 2285 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2286 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2287 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2288 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2289 clocks = <&cpg CPG_MOD 319>; 2290 clock-names = "pcie"; 2291 resets = <&cpg 319>; 2292 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2293 status = "disabled"; 2294 }; 2295 2296 pciec1_ep: pcie-ep@ee800000 { 2297 compatible = "renesas,r8a774b1-pcie-ep", 2298 "renesas,rcar-gen3-pcie-ep"; 2299 reg = <0x0 0xee800000 0 0x80000>, 2300 <0x0 0xee900000 0 0x100000>, 2301 <0x0 0xeea00000 0 0x200000>, 2302 <0x0 0xc0000000 0 0x8000000>, 2303 <0x0 0xc8000000 0 0x8000000>; 2304 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2305 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2306 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2307 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2308 clocks = <&cpg CPG_MOD 318>; 2309 clock-names = "pcie"; 2310 resets = <&cpg 318>; 2311 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2312 status = "disabled"; 2313 }; 2314 2315 fdp1@fe940000 { 2316 compatible = "renesas,fdp1"; 2317 reg = <0 0xfe940000 0 0x2400>; 2318 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2319 clocks = <&cpg CPG_MOD 119>; 2320 power-domains = <&sysc R8A774B1_PD_A3VP>; 2321 resets = <&cpg 119>; 2322 renesas,fcp = <&fcpf0>; 2323 }; 2324 2325 fcpf0: fcp@fe950000 { 2326 compatible = "renesas,fcpf"; 2327 reg = <0 0xfe950000 0 0x200>; 2328 clocks = <&cpg CPG_MOD 615>; 2329 power-domains = <&sysc R8A774B1_PD_A3VP>; 2330 resets = <&cpg 615>; 2331 }; 2332 2333 vspb: vsp@fe960000 { 2334 compatible = "renesas,vsp2"; 2335 reg = <0 0xfe960000 0 0x8000>; 2336 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2337 clocks = <&cpg CPG_MOD 626>; 2338 power-domains = <&sysc R8A774B1_PD_A3VP>; 2339 resets = <&cpg 626>; 2340 2341 renesas,fcp = <&fcpvb0>; 2342 }; 2343 2344 vspi0: vsp@fe9a0000 { 2345 compatible = "renesas,vsp2"; 2346 reg = <0 0xfe9a0000 0 0x8000>; 2347 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2348 clocks = <&cpg CPG_MOD 631>; 2349 power-domains = <&sysc R8A774B1_PD_A3VP>; 2350 resets = <&cpg 631>; 2351 2352 renesas,fcp = <&fcpvi0>; 2353 }; 2354 2355 vspd0: vsp@fea20000 { 2356 compatible = "renesas,vsp2"; 2357 reg = <0 0xfea20000 0 0x5000>; 2358 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2359 clocks = <&cpg CPG_MOD 623>; 2360 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2361 resets = <&cpg 623>; 2362 2363 renesas,fcp = <&fcpvd0>; 2364 }; 2365 2366 vspd1: vsp@fea28000 { 2367 compatible = "renesas,vsp2"; 2368 reg = <0 0xfea28000 0 0x5000>; 2369 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2370 clocks = <&cpg CPG_MOD 622>; 2371 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2372 resets = <&cpg 622>; 2373 2374 renesas,fcp = <&fcpvd1>; 2375 }; 2376 2377 fcpvb0: fcp@fe96f000 { 2378 compatible = "renesas,fcpv"; 2379 reg = <0 0xfe96f000 0 0x200>; 2380 clocks = <&cpg CPG_MOD 607>; 2381 power-domains = <&sysc R8A774B1_PD_A3VP>; 2382 resets = <&cpg 607>; 2383 }; 2384 2385 fcpvd0: fcp@fea27000 { 2386 compatible = "renesas,fcpv"; 2387 reg = <0 0xfea27000 0 0x200>; 2388 clocks = <&cpg CPG_MOD 603>; 2389 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2390 resets = <&cpg 603>; 2391 }; 2392 2393 fcpvd1: fcp@fea2f000 { 2394 compatible = "renesas,fcpv"; 2395 reg = <0 0xfea2f000 0 0x200>; 2396 clocks = <&cpg CPG_MOD 602>; 2397 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2398 resets = <&cpg 602>; 2399 }; 2400 2401 fcpvi0: fcp@fe9af000 { 2402 compatible = "renesas,fcpv"; 2403 reg = <0 0xfe9af000 0 0x200>; 2404 clocks = <&cpg CPG_MOD 611>; 2405 power-domains = <&sysc R8A774B1_PD_A3VP>; 2406 resets = <&cpg 611>; 2407 }; 2408 2409 csi20: csi2@fea80000 { 2410 compatible = "renesas,r8a774b1-csi2"; 2411 reg = <0 0xfea80000 0 0x10000>; 2412 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2413 clocks = <&cpg CPG_MOD 714>; 2414 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2415 resets = <&cpg 714>; 2416 status = "disabled"; 2417 2418 ports { 2419 #address-cells = <1>; 2420 #size-cells = <0>; 2421 2422 port@0 { 2423 reg = <0>; 2424 }; 2425 2426 port@1 { 2427 #address-cells = <1>; 2428 #size-cells = <0>; 2429 2430 reg = <1>; 2431 2432 csi20vin0: endpoint@0 { 2433 reg = <0>; 2434 remote-endpoint = <&vin0csi20>; 2435 }; 2436 csi20vin1: endpoint@1 { 2437 reg = <1>; 2438 remote-endpoint = <&vin1csi20>; 2439 }; 2440 csi20vin2: endpoint@2 { 2441 reg = <2>; 2442 remote-endpoint = <&vin2csi20>; 2443 }; 2444 csi20vin3: endpoint@3 { 2445 reg = <3>; 2446 remote-endpoint = <&vin3csi20>; 2447 }; 2448 csi20vin4: endpoint@4 { 2449 reg = <4>; 2450 remote-endpoint = <&vin4csi20>; 2451 }; 2452 csi20vin5: endpoint@5 { 2453 reg = <5>; 2454 remote-endpoint = <&vin5csi20>; 2455 }; 2456 csi20vin6: endpoint@6 { 2457 reg = <6>; 2458 remote-endpoint = <&vin6csi20>; 2459 }; 2460 csi20vin7: endpoint@7 { 2461 reg = <7>; 2462 remote-endpoint = <&vin7csi20>; 2463 }; 2464 }; 2465 }; 2466 }; 2467 2468 csi40: csi2@feaa0000 { 2469 compatible = "renesas,r8a774b1-csi2"; 2470 reg = <0 0xfeaa0000 0 0x10000>; 2471 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2472 clocks = <&cpg CPG_MOD 716>; 2473 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2474 resets = <&cpg 716>; 2475 status = "disabled"; 2476 2477 ports { 2478 #address-cells = <1>; 2479 #size-cells = <0>; 2480 2481 port@0 { 2482 reg = <0>; 2483 }; 2484 2485 port@1 { 2486 #address-cells = <1>; 2487 #size-cells = <0>; 2488 2489 reg = <1>; 2490 2491 csi40vin0: endpoint@0 { 2492 reg = <0>; 2493 remote-endpoint = <&vin0csi40>; 2494 }; 2495 csi40vin1: endpoint@1 { 2496 reg = <1>; 2497 remote-endpoint = <&vin1csi40>; 2498 }; 2499 csi40vin2: endpoint@2 { 2500 reg = <2>; 2501 remote-endpoint = <&vin2csi40>; 2502 }; 2503 csi40vin3: endpoint@3 { 2504 reg = <3>; 2505 remote-endpoint = <&vin3csi40>; 2506 }; 2507 csi40vin4: endpoint@4 { 2508 reg = <4>; 2509 remote-endpoint = <&vin4csi40>; 2510 }; 2511 csi40vin5: endpoint@5 { 2512 reg = <5>; 2513 remote-endpoint = <&vin5csi40>; 2514 }; 2515 csi40vin6: endpoint@6 { 2516 reg = <6>; 2517 remote-endpoint = <&vin6csi40>; 2518 }; 2519 csi40vin7: endpoint@7 { 2520 reg = <7>; 2521 remote-endpoint = <&vin7csi40>; 2522 }; 2523 }; 2524 }; 2525 }; 2526 2527 hdmi0: hdmi@fead0000 { 2528 compatible = "renesas,r8a774b1-hdmi", 2529 "renesas,rcar-gen3-hdmi"; 2530 reg = <0 0xfead0000 0 0x10000>; 2531 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2532 clocks = <&cpg CPG_MOD 729>, 2533 <&cpg CPG_CORE R8A774B1_CLK_HDMI>; 2534 clock-names = "iahb", "isfr"; 2535 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2536 resets = <&cpg 729>; 2537 status = "disabled"; 2538 2539 ports { 2540 #address-cells = <1>; 2541 #size-cells = <0>; 2542 2543 port@0 { 2544 reg = <0>; 2545 dw_hdmi0_in: endpoint { 2546 remote-endpoint = <&du_out_hdmi0>; 2547 }; 2548 }; 2549 port@1 { 2550 reg = <1>; 2551 }; 2552 port@2 { 2553 /* HDMI sound */ 2554 reg = <2>; 2555 }; 2556 }; 2557 }; 2558 2559 du: display@feb00000 { 2560 compatible = "renesas,du-r8a774b1"; 2561 reg = <0 0xfeb00000 0 0x80000>; 2562 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2563 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2564 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2565 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2566 <&cpg CPG_MOD 721>; 2567 clock-names = "du.0", "du.1", "du.3"; 2568 resets = <&cpg 724>, <&cpg 722>; 2569 reset-names = "du.0", "du.3"; 2570 status = "disabled"; 2571 2572 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2573 2574 ports { 2575 #address-cells = <1>; 2576 #size-cells = <0>; 2577 2578 port@0 { 2579 reg = <0>; 2580 du_out_rgb: endpoint { 2581 }; 2582 }; 2583 port@1 { 2584 reg = <1>; 2585 du_out_hdmi0: endpoint { 2586 remote-endpoint = <&dw_hdmi0_in>; 2587 }; 2588 }; 2589 port@2 { 2590 reg = <2>; 2591 du_out_lvds0: endpoint { 2592 remote-endpoint = <&lvds0_in>; 2593 }; 2594 }; 2595 }; 2596 }; 2597 2598 lvds0: lvds@feb90000 { 2599 compatible = "renesas,r8a774b1-lvds"; 2600 reg = <0 0xfeb90000 0 0x14>; 2601 clocks = <&cpg CPG_MOD 727>; 2602 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2603 resets = <&cpg 727>; 2604 status = "disabled"; 2605 2606 ports { 2607 #address-cells = <1>; 2608 #size-cells = <0>; 2609 2610 port@0 { 2611 reg = <0>; 2612 lvds0_in: endpoint { 2613 remote-endpoint = <&du_out_lvds0>; 2614 }; 2615 }; 2616 port@1 { 2617 reg = <1>; 2618 lvds0_out: endpoint { 2619 }; 2620 }; 2621 }; 2622 }; 2623 2624 prr: chipid@fff00044 { 2625 compatible = "renesas,prr"; 2626 reg = <0 0xfff00044 0 4>; 2627 }; 2628 }; 2629 2630 thermal-zones { 2631 sensor_thermal1: sensor-thermal1 { 2632 polling-delay-passive = <250>; 2633 polling-delay = <1000>; 2634 thermal-sensors = <&tsc 0>; 2635 sustainable-power = <2439>; 2636 2637 trips { 2638 sensor1_crit: sensor1-crit { 2639 temperature = <120000>; 2640 hysteresis = <1000>; 2641 type = "critical"; 2642 }; 2643 }; 2644 }; 2645 2646 sensor_thermal2: sensor-thermal2 { 2647 polling-delay-passive = <250>; 2648 polling-delay = <1000>; 2649 thermal-sensors = <&tsc 1>; 2650 sustainable-power = <2439>; 2651 2652 trips { 2653 sensor2_crit: sensor2-crit { 2654 temperature = <120000>; 2655 hysteresis = <1000>; 2656 type = "critical"; 2657 }; 2658 }; 2659 }; 2660 2661 sensor_thermal3: sensor-thermal3 { 2662 polling-delay-passive = <250>; 2663 polling-delay = <1000>; 2664 thermal-sensors = <&tsc 2>; 2665 sustainable-power = <2439>; 2666 2667 cooling-maps { 2668 map0 { 2669 trip = <&target>; 2670 cooling-device = <&a57_0 0 2>; 2671 contribution = <1024>; 2672 }; 2673 }; 2674 trips { 2675 target: trip-point1 { 2676 temperature = <100000>; 2677 hysteresis = <1000>; 2678 type = "passive"; 2679 }; 2680 2681 sensor3_crit: sensor3-crit { 2682 temperature = <120000>; 2683 hysteresis = <1000>; 2684 type = "critical"; 2685 }; 2686 }; 2687 }; 2688 }; 2689 2690 timer { 2691 compatible = "arm,armv8-timer"; 2692 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2693 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2694 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2695 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2696 }; 2697 2698 /* External USB clocks - can be overridden by the board */ 2699 usb3s0_clk: usb3s0 { 2700 compatible = "fixed-clock"; 2701 #clock-cells = <0>; 2702 clock-frequency = <0>; 2703 }; 2704 2705 usb_extal_clk: usb_extal { 2706 compatible = "fixed-clock"; 2707 #clock-cells = <0>; 2708 clock-frequency = <0>; 2709 }; 2710}; 2711