1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774b1 SoC 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a774b1-cpg-mssr.h> 11#include <dt-bindings/power/r8a774b1-sysc.h> 12 13#define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4 14 15/ { 16 compatible = "renesas,r8a774b1"; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 /* 21 * The external audio clocks are configured as 0 Hz fixed frequency 22 * clocks by default. 23 * Boards that provide audio clocks should override them. 24 */ 25 audio_clk_a: audio_clk_a { 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <0>; 29 }; 30 31 audio_clk_b: audio_clk_b { 32 compatible = "fixed-clock"; 33 #clock-cells = <0>; 34 clock-frequency = <0>; 35 }; 36 37 audio_clk_c: audio_clk_c { 38 compatible = "fixed-clock"; 39 #clock-cells = <0>; 40 clock-frequency = <0>; 41 }; 42 43 /* External CAN clock - to be overridden by boards that provide it */ 44 can_clk: can { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 cluster0_opp: opp-table-0 { 51 compatible = "operating-points-v2"; 52 opp-shared; 53 54 opp-500000000 { 55 opp-hz = /bits/ 64 <500000000>; 56 opp-microvolt = <830000>; 57 clock-latency-ns = <300000>; 58 }; 59 opp-1000000000 { 60 opp-hz = /bits/ 64 <1000000000>; 61 opp-microvolt = <830000>; 62 clock-latency-ns = <300000>; 63 }; 64 opp-1500000000 { 65 opp-hz = /bits/ 64 <1500000000>; 66 opp-microvolt = <830000>; 67 clock-latency-ns = <300000>; 68 opp-suspend; 69 }; 70 }; 71 72 cpus { 73 #address-cells = <1>; 74 #size-cells = <0>; 75 76 a57_0: cpu@0 { 77 compatible = "arm,cortex-a57"; 78 reg = <0x0>; 79 device_type = "cpu"; 80 power-domains = <&sysc R8A774B1_PD_CA57_CPU0>; 81 next-level-cache = <&L2_CA57>; 82 enable-method = "psci"; 83 #cooling-cells = <2>; 84 dynamic-power-coefficient = <854>; 85 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 86 operating-points-v2 = <&cluster0_opp>; 87 }; 88 89 a57_1: cpu@1 { 90 compatible = "arm,cortex-a57"; 91 reg = <0x1>; 92 device_type = "cpu"; 93 power-domains = <&sysc R8A774B1_PD_CA57_CPU1>; 94 next-level-cache = <&L2_CA57>; 95 enable-method = "psci"; 96 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 97 operating-points-v2 = <&cluster0_opp>; 98 }; 99 100 L2_CA57: cache-controller-0 { 101 compatible = "cache"; 102 power-domains = <&sysc R8A774B1_PD_CA57_SCU>; 103 cache-unified; 104 cache-level = <2>; 105 }; 106 }; 107 108 extal_clk: extal { 109 compatible = "fixed-clock"; 110 #clock-cells = <0>; 111 /* This value must be overridden by the board */ 112 clock-frequency = <0>; 113 }; 114 115 extalr_clk: extalr { 116 compatible = "fixed-clock"; 117 #clock-cells = <0>; 118 /* This value must be overridden by the board */ 119 clock-frequency = <0>; 120 }; 121 122 /* External PCIe clock - can be overridden by the board */ 123 pcie_bus_clk: pcie_bus { 124 compatible = "fixed-clock"; 125 #clock-cells = <0>; 126 clock-frequency = <0>; 127 }; 128 129 pmu_a57 { 130 compatible = "arm,cortex-a57-pmu"; 131 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 132 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 133 interrupt-affinity = <&a57_0>, <&a57_1>; 134 }; 135 136 psci { 137 compatible = "arm,psci-1.0", "arm,psci-0.2"; 138 method = "smc"; 139 }; 140 141 /* External SCIF clock - to be overridden by boards that provide it */ 142 scif_clk: scif { 143 compatible = "fixed-clock"; 144 #clock-cells = <0>; 145 clock-frequency = <0>; 146 }; 147 148 soc { 149 compatible = "simple-bus"; 150 interrupt-parent = <&gic>; 151 #address-cells = <2>; 152 #size-cells = <2>; 153 ranges; 154 155 rwdt: watchdog@e6020000 { 156 compatible = "renesas,r8a774b1-wdt", 157 "renesas,rcar-gen3-wdt"; 158 reg = <0 0xe6020000 0 0x0c>; 159 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 160 clocks = <&cpg CPG_MOD 402>; 161 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 162 resets = <&cpg 402>; 163 status = "disabled"; 164 }; 165 166 gpio0: gpio@e6050000 { 167 compatible = "renesas,gpio-r8a774b1", 168 "renesas,rcar-gen3-gpio"; 169 reg = <0 0xe6050000 0 0x50>; 170 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 171 #gpio-cells = <2>; 172 gpio-controller; 173 gpio-ranges = <&pfc 0 0 16>; 174 #interrupt-cells = <2>; 175 interrupt-controller; 176 clocks = <&cpg CPG_MOD 912>; 177 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 178 resets = <&cpg 912>; 179 }; 180 181 gpio1: gpio@e6051000 { 182 compatible = "renesas,gpio-r8a774b1", 183 "renesas,rcar-gen3-gpio"; 184 reg = <0 0xe6051000 0 0x50>; 185 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 186 #gpio-cells = <2>; 187 gpio-controller; 188 gpio-ranges = <&pfc 0 32 29>; 189 #interrupt-cells = <2>; 190 interrupt-controller; 191 clocks = <&cpg CPG_MOD 911>; 192 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 193 resets = <&cpg 911>; 194 }; 195 196 gpio2: gpio@e6052000 { 197 compatible = "renesas,gpio-r8a774b1", 198 "renesas,rcar-gen3-gpio"; 199 reg = <0 0xe6052000 0 0x50>; 200 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 201 #gpio-cells = <2>; 202 gpio-controller; 203 gpio-ranges = <&pfc 0 64 15>; 204 #interrupt-cells = <2>; 205 interrupt-controller; 206 clocks = <&cpg CPG_MOD 910>; 207 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 208 resets = <&cpg 910>; 209 }; 210 211 gpio3: gpio@e6053000 { 212 compatible = "renesas,gpio-r8a774b1", 213 "renesas,rcar-gen3-gpio"; 214 reg = <0 0xe6053000 0 0x50>; 215 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 216 #gpio-cells = <2>; 217 gpio-controller; 218 gpio-ranges = <&pfc 0 96 16>; 219 #interrupt-cells = <2>; 220 interrupt-controller; 221 clocks = <&cpg CPG_MOD 909>; 222 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 223 resets = <&cpg 909>; 224 }; 225 226 gpio4: gpio@e6054000 { 227 compatible = "renesas,gpio-r8a774b1", 228 "renesas,rcar-gen3-gpio"; 229 reg = <0 0xe6054000 0 0x50>; 230 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 231 #gpio-cells = <2>; 232 gpio-controller; 233 gpio-ranges = <&pfc 0 128 18>; 234 #interrupt-cells = <2>; 235 interrupt-controller; 236 clocks = <&cpg CPG_MOD 908>; 237 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 238 resets = <&cpg 908>; 239 }; 240 241 gpio5: gpio@e6055000 { 242 compatible = "renesas,gpio-r8a774b1", 243 "renesas,rcar-gen3-gpio"; 244 reg = <0 0xe6055000 0 0x50>; 245 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 246 #gpio-cells = <2>; 247 gpio-controller; 248 gpio-ranges = <&pfc 0 160 26>; 249 #interrupt-cells = <2>; 250 interrupt-controller; 251 clocks = <&cpg CPG_MOD 907>; 252 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 253 resets = <&cpg 907>; 254 }; 255 256 gpio6: gpio@e6055400 { 257 compatible = "renesas,gpio-r8a774b1", 258 "renesas,rcar-gen3-gpio"; 259 reg = <0 0xe6055400 0 0x50>; 260 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 261 #gpio-cells = <2>; 262 gpio-controller; 263 gpio-ranges = <&pfc 0 192 32>; 264 #interrupt-cells = <2>; 265 interrupt-controller; 266 clocks = <&cpg CPG_MOD 906>; 267 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 268 resets = <&cpg 906>; 269 }; 270 271 gpio7: gpio@e6055800 { 272 compatible = "renesas,gpio-r8a774b1", 273 "renesas,rcar-gen3-gpio"; 274 reg = <0 0xe6055800 0 0x50>; 275 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 276 #gpio-cells = <2>; 277 gpio-controller; 278 gpio-ranges = <&pfc 0 224 4>; 279 #interrupt-cells = <2>; 280 interrupt-controller; 281 clocks = <&cpg CPG_MOD 905>; 282 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 283 resets = <&cpg 905>; 284 }; 285 286 pfc: pinctrl@e6060000 { 287 compatible = "renesas,pfc-r8a774b1"; 288 reg = <0 0xe6060000 0 0x50c>; 289 }; 290 291 cmt0: timer@e60f0000 { 292 compatible = "renesas,r8a774b1-cmt0", 293 "renesas,rcar-gen3-cmt0"; 294 reg = <0 0xe60f0000 0 0x1004>; 295 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 296 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 297 clocks = <&cpg CPG_MOD 303>; 298 clock-names = "fck"; 299 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 300 resets = <&cpg 303>; 301 status = "disabled"; 302 }; 303 304 cmt1: timer@e6130000 { 305 compatible = "renesas,r8a774b1-cmt1", 306 "renesas,rcar-gen3-cmt1"; 307 reg = <0 0xe6130000 0 0x1004>; 308 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 314 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 315 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 316 clocks = <&cpg CPG_MOD 302>; 317 clock-names = "fck"; 318 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 319 resets = <&cpg 302>; 320 status = "disabled"; 321 }; 322 323 cmt2: timer@e6140000 { 324 compatible = "renesas,r8a774b1-cmt1", 325 "renesas,rcar-gen3-cmt1"; 326 reg = <0 0xe6140000 0 0x1004>; 327 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 333 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 334 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 335 clocks = <&cpg CPG_MOD 301>; 336 clock-names = "fck"; 337 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 338 resets = <&cpg 301>; 339 status = "disabled"; 340 }; 341 342 cmt3: timer@e6148000 { 343 compatible = "renesas,r8a774b1-cmt1", 344 "renesas,rcar-gen3-cmt1"; 345 reg = <0 0xe6148000 0 0x1004>; 346 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 354 clocks = <&cpg CPG_MOD 300>; 355 clock-names = "fck"; 356 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 357 resets = <&cpg 300>; 358 status = "disabled"; 359 }; 360 361 cpg: clock-controller@e6150000 { 362 compatible = "renesas,r8a774b1-cpg-mssr"; 363 reg = <0 0xe6150000 0 0x1000>; 364 clocks = <&extal_clk>, <&extalr_clk>; 365 clock-names = "extal", "extalr"; 366 #clock-cells = <2>; 367 #power-domain-cells = <0>; 368 #reset-cells = <1>; 369 }; 370 371 rst: reset-controller@e6160000 { 372 compatible = "renesas,r8a774b1-rst"; 373 reg = <0 0xe6160000 0 0x0200>; 374 }; 375 376 sysc: system-controller@e6180000 { 377 compatible = "renesas,r8a774b1-sysc"; 378 reg = <0 0xe6180000 0 0x0400>; 379 #power-domain-cells = <1>; 380 }; 381 382 tsc: thermal@e6198000 { 383 compatible = "renesas,r8a774b1-thermal"; 384 reg = <0 0xe6198000 0 0x100>, 385 <0 0xe61a0000 0 0x100>, 386 <0 0xe61a8000 0 0x100>; 387 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 388 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 389 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 390 clocks = <&cpg CPG_MOD 522>; 391 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 392 resets = <&cpg 522>; 393 #thermal-sensor-cells = <1>; 394 }; 395 396 intc_ex: interrupt-controller@e61c0000 { 397 compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc"; 398 #interrupt-cells = <2>; 399 interrupt-controller; 400 reg = <0 0xe61c0000 0 0x200>; 401 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 404 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 405 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 406 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 407 clocks = <&cpg CPG_MOD 407>; 408 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 409 resets = <&cpg 407>; 410 }; 411 412 tmu0: timer@e61e0000 { 413 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 414 reg = <0 0xe61e0000 0 0x30>; 415 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 416 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 417 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 418 clocks = <&cpg CPG_MOD 125>; 419 clock-names = "fck"; 420 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 421 resets = <&cpg 125>; 422 status = "disabled"; 423 }; 424 425 tmu1: timer@e6fc0000 { 426 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 427 reg = <0 0xe6fc0000 0 0x30>; 428 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 429 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 430 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 431 clocks = <&cpg CPG_MOD 124>; 432 clock-names = "fck"; 433 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 434 resets = <&cpg 124>; 435 status = "disabled"; 436 }; 437 438 tmu2: timer@e6fd0000 { 439 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 440 reg = <0 0xe6fd0000 0 0x30>; 441 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 442 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 443 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 444 clocks = <&cpg CPG_MOD 123>; 445 clock-names = "fck"; 446 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 447 resets = <&cpg 123>; 448 status = "disabled"; 449 }; 450 451 tmu3: timer@e6fe0000 { 452 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 453 reg = <0 0xe6fe0000 0 0x30>; 454 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 455 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 456 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 457 clocks = <&cpg CPG_MOD 122>; 458 clock-names = "fck"; 459 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 460 resets = <&cpg 122>; 461 status = "disabled"; 462 }; 463 464 tmu4: timer@ffc00000 { 465 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 466 reg = <0 0xffc00000 0 0x30>; 467 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 468 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 469 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 470 clocks = <&cpg CPG_MOD 121>; 471 clock-names = "fck"; 472 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 473 resets = <&cpg 121>; 474 status = "disabled"; 475 }; 476 477 i2c0: i2c@e6500000 { 478 #address-cells = <1>; 479 #size-cells = <0>; 480 compatible = "renesas,i2c-r8a774b1", 481 "renesas,rcar-gen3-i2c"; 482 reg = <0 0xe6500000 0 0x40>; 483 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 484 clocks = <&cpg CPG_MOD 931>; 485 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 486 resets = <&cpg 931>; 487 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 488 <&dmac2 0x91>, <&dmac2 0x90>; 489 dma-names = "tx", "rx", "tx", "rx"; 490 i2c-scl-internal-delay-ns = <110>; 491 status = "disabled"; 492 }; 493 494 i2c1: i2c@e6508000 { 495 #address-cells = <1>; 496 #size-cells = <0>; 497 compatible = "renesas,i2c-r8a774b1", 498 "renesas,rcar-gen3-i2c"; 499 reg = <0 0xe6508000 0 0x40>; 500 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 930>; 502 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 503 resets = <&cpg 930>; 504 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 505 <&dmac2 0x93>, <&dmac2 0x92>; 506 dma-names = "tx", "rx", "tx", "rx"; 507 i2c-scl-internal-delay-ns = <6>; 508 status = "disabled"; 509 }; 510 511 i2c2: i2c@e6510000 { 512 #address-cells = <1>; 513 #size-cells = <0>; 514 compatible = "renesas,i2c-r8a774b1", 515 "renesas,rcar-gen3-i2c"; 516 reg = <0 0xe6510000 0 0x40>; 517 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 518 clocks = <&cpg CPG_MOD 929>; 519 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 520 resets = <&cpg 929>; 521 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 522 <&dmac2 0x95>, <&dmac2 0x94>; 523 dma-names = "tx", "rx", "tx", "rx"; 524 i2c-scl-internal-delay-ns = <6>; 525 status = "disabled"; 526 }; 527 528 i2c3: i2c@e66d0000 { 529 #address-cells = <1>; 530 #size-cells = <0>; 531 compatible = "renesas,i2c-r8a774b1", 532 "renesas,rcar-gen3-i2c"; 533 reg = <0 0xe66d0000 0 0x40>; 534 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 535 clocks = <&cpg CPG_MOD 928>; 536 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 537 resets = <&cpg 928>; 538 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 539 dma-names = "tx", "rx"; 540 i2c-scl-internal-delay-ns = <110>; 541 status = "disabled"; 542 }; 543 544 i2c4: i2c@e66d8000 { 545 #address-cells = <1>; 546 #size-cells = <0>; 547 compatible = "renesas,i2c-r8a774b1", 548 "renesas,rcar-gen3-i2c"; 549 reg = <0 0xe66d8000 0 0x40>; 550 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 551 clocks = <&cpg CPG_MOD 927>; 552 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 553 resets = <&cpg 927>; 554 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 555 dma-names = "tx", "rx"; 556 i2c-scl-internal-delay-ns = <110>; 557 status = "disabled"; 558 }; 559 560 i2c5: i2c@e66e0000 { 561 #address-cells = <1>; 562 #size-cells = <0>; 563 compatible = "renesas,i2c-r8a774b1", 564 "renesas,rcar-gen3-i2c"; 565 reg = <0 0xe66e0000 0 0x40>; 566 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&cpg CPG_MOD 919>; 568 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 569 resets = <&cpg 919>; 570 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 571 dma-names = "tx", "rx"; 572 i2c-scl-internal-delay-ns = <110>; 573 status = "disabled"; 574 }; 575 576 i2c6: i2c@e66e8000 { 577 #address-cells = <1>; 578 #size-cells = <0>; 579 compatible = "renesas,i2c-r8a774b1", 580 "renesas,rcar-gen3-i2c"; 581 reg = <0 0xe66e8000 0 0x40>; 582 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 583 clocks = <&cpg CPG_MOD 918>; 584 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 585 resets = <&cpg 918>; 586 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 587 dma-names = "tx", "rx"; 588 i2c-scl-internal-delay-ns = <6>; 589 status = "disabled"; 590 }; 591 592 iic_pmic: i2c@e60b0000 { 593 #address-cells = <1>; 594 #size-cells = <0>; 595 compatible = "renesas,iic-r8a774b1", 596 "renesas,rcar-gen3-iic", 597 "renesas,rmobile-iic"; 598 reg = <0 0xe60b0000 0 0x425>; 599 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 600 clocks = <&cpg CPG_MOD 926>; 601 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 602 resets = <&cpg 926>; 603 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 604 dma-names = "tx", "rx"; 605 status = "disabled"; 606 }; 607 608 hscif0: serial@e6540000 { 609 compatible = "renesas,hscif-r8a774b1", 610 "renesas,rcar-gen3-hscif", 611 "renesas,hscif"; 612 reg = <0 0xe6540000 0 0x60>; 613 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 614 clocks = <&cpg CPG_MOD 520>, 615 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 616 <&scif_clk>; 617 clock-names = "fck", "brg_int", "scif_clk"; 618 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 619 <&dmac2 0x31>, <&dmac2 0x30>; 620 dma-names = "tx", "rx", "tx", "rx"; 621 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 622 resets = <&cpg 520>; 623 status = "disabled"; 624 }; 625 626 hscif1: serial@e6550000 { 627 compatible = "renesas,hscif-r8a774b1", 628 "renesas,rcar-gen3-hscif", 629 "renesas,hscif"; 630 reg = <0 0xe6550000 0 0x60>; 631 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 632 clocks = <&cpg CPG_MOD 519>, 633 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 634 <&scif_clk>; 635 clock-names = "fck", "brg_int", "scif_clk"; 636 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 637 <&dmac2 0x33>, <&dmac2 0x32>; 638 dma-names = "tx", "rx", "tx", "rx"; 639 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 640 resets = <&cpg 519>; 641 status = "disabled"; 642 }; 643 644 hscif2: serial@e6560000 { 645 compatible = "renesas,hscif-r8a774b1", 646 "renesas,rcar-gen3-hscif", 647 "renesas,hscif"; 648 reg = <0 0xe6560000 0 0x60>; 649 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 650 clocks = <&cpg CPG_MOD 518>, 651 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 652 <&scif_clk>; 653 clock-names = "fck", "brg_int", "scif_clk"; 654 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 655 <&dmac2 0x35>, <&dmac2 0x34>; 656 dma-names = "tx", "rx", "tx", "rx"; 657 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 658 resets = <&cpg 518>; 659 status = "disabled"; 660 }; 661 662 hscif3: serial@e66a0000 { 663 compatible = "renesas,hscif-r8a774b1", 664 "renesas,rcar-gen3-hscif", 665 "renesas,hscif"; 666 reg = <0 0xe66a0000 0 0x60>; 667 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 668 clocks = <&cpg CPG_MOD 517>, 669 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 670 <&scif_clk>; 671 clock-names = "fck", "brg_int", "scif_clk"; 672 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 673 dma-names = "tx", "rx"; 674 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 675 resets = <&cpg 517>; 676 status = "disabled"; 677 }; 678 679 hscif4: serial@e66b0000 { 680 compatible = "renesas,hscif-r8a774b1", 681 "renesas,rcar-gen3-hscif", 682 "renesas,hscif"; 683 reg = <0 0xe66b0000 0 0x60>; 684 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 685 clocks = <&cpg CPG_MOD 516>, 686 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 687 <&scif_clk>; 688 clock-names = "fck", "brg_int", "scif_clk"; 689 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 690 dma-names = "tx", "rx"; 691 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 692 resets = <&cpg 516>; 693 status = "disabled"; 694 }; 695 696 hsusb: usb@e6590000 { 697 compatible = "renesas,usbhs-r8a774b1", 698 "renesas,rcar-gen3-usbhs"; 699 reg = <0 0xe6590000 0 0x200>; 700 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 701 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 702 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 703 <&usb_dmac1 0>, <&usb_dmac1 1>; 704 dma-names = "ch0", "ch1", "ch2", "ch3"; 705 renesas,buswait = <11>; 706 phys = <&usb2_phy0 3>; 707 phy-names = "usb"; 708 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 709 resets = <&cpg 704>, <&cpg 703>; 710 status = "disabled"; 711 }; 712 713 usb2_clksel: clock-controller@e6590630 { 714 compatible = "renesas,r8a774b1-rcar-usb2-clock-sel", 715 "renesas,rcar-gen3-usb2-clock-sel"; 716 reg = <0 0xe6590630 0 0x02>; 717 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, 718 <&usb_extal_clk>, <&usb3s0_clk>; 719 clock-names = "ehci_ohci", "hs-usb-if", 720 "usb_extal", "usb_xtal"; 721 #clock-cells = <0>; 722 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 723 resets = <&cpg 703>, <&cpg 704>; 724 reset-names = "ehci_ohci", "hs-usb-if"; 725 status = "disabled"; 726 }; 727 728 usb_dmac0: dma-controller@e65a0000 { 729 compatible = "renesas,r8a774b1-usb-dmac", 730 "renesas,usb-dmac"; 731 reg = <0 0xe65a0000 0 0x100>; 732 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 733 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 734 interrupt-names = "ch0", "ch1"; 735 clocks = <&cpg CPG_MOD 330>; 736 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 737 resets = <&cpg 330>; 738 #dma-cells = <1>; 739 dma-channels = <2>; 740 }; 741 742 usb_dmac1: dma-controller@e65b0000 { 743 compatible = "renesas,r8a774b1-usb-dmac", 744 "renesas,usb-dmac"; 745 reg = <0 0xe65b0000 0 0x100>; 746 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 747 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 748 interrupt-names = "ch0", "ch1"; 749 clocks = <&cpg CPG_MOD 331>; 750 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 751 resets = <&cpg 331>; 752 #dma-cells = <1>; 753 dma-channels = <2>; 754 }; 755 756 usb3_phy0: usb-phy@e65ee000 { 757 compatible = "renesas,r8a774b1-usb3-phy", 758 "renesas,rcar-gen3-usb3-phy"; 759 reg = <0 0xe65ee000 0 0x90>; 760 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 761 <&usb_extal_clk>; 762 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 763 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 764 resets = <&cpg 328>; 765 #phy-cells = <0>; 766 status = "disabled"; 767 }; 768 769 dmac0: dma-controller@e6700000 { 770 compatible = "renesas,dmac-r8a774b1", 771 "renesas,rcar-dmac"; 772 reg = <0 0xe6700000 0 0x10000>; 773 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 790 interrupt-names = "error", 791 "ch0", "ch1", "ch2", "ch3", 792 "ch4", "ch5", "ch6", "ch7", 793 "ch8", "ch9", "ch10", "ch11", 794 "ch12", "ch13", "ch14", "ch15"; 795 clocks = <&cpg CPG_MOD 219>; 796 clock-names = "fck"; 797 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 798 resets = <&cpg 219>; 799 #dma-cells = <1>; 800 dma-channels = <16>; 801 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 802 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 803 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 804 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 805 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 806 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 807 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 808 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 809 }; 810 811 dmac1: dma-controller@e7300000 { 812 compatible = "renesas,dmac-r8a774b1", 813 "renesas,rcar-dmac"; 814 reg = <0 0xe7300000 0 0x10000>; 815 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 832 interrupt-names = "error", 833 "ch0", "ch1", "ch2", "ch3", 834 "ch4", "ch5", "ch6", "ch7", 835 "ch8", "ch9", "ch10", "ch11", 836 "ch12", "ch13", "ch14", "ch15"; 837 clocks = <&cpg CPG_MOD 218>; 838 clock-names = "fck"; 839 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 840 resets = <&cpg 218>; 841 #dma-cells = <1>; 842 dma-channels = <16>; 843 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 844 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 845 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 846 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 847 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 848 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 849 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 850 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 851 }; 852 853 dmac2: dma-controller@e7310000 { 854 compatible = "renesas,dmac-r8a774b1", 855 "renesas,rcar-dmac"; 856 reg = <0 0xe7310000 0 0x10000>; 857 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 874 interrupt-names = "error", 875 "ch0", "ch1", "ch2", "ch3", 876 "ch4", "ch5", "ch6", "ch7", 877 "ch8", "ch9", "ch10", "ch11", 878 "ch12", "ch13", "ch14", "ch15"; 879 clocks = <&cpg CPG_MOD 217>; 880 clock-names = "fck"; 881 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 882 resets = <&cpg 217>; 883 #dma-cells = <1>; 884 dma-channels = <16>; 885 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 886 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 887 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 888 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 889 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 890 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 891 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 892 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 893 }; 894 895 ipmmu_ds0: iommu@e6740000 { 896 compatible = "renesas,ipmmu-r8a774b1"; 897 reg = <0 0xe6740000 0 0x1000>; 898 renesas,ipmmu-main = <&ipmmu_mm 0>; 899 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 900 #iommu-cells = <1>; 901 }; 902 903 ipmmu_ds1: iommu@e7740000 { 904 compatible = "renesas,ipmmu-r8a774b1"; 905 reg = <0 0xe7740000 0 0x1000>; 906 renesas,ipmmu-main = <&ipmmu_mm 1>; 907 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 908 #iommu-cells = <1>; 909 }; 910 911 ipmmu_hc: iommu@e6570000 { 912 compatible = "renesas,ipmmu-r8a774b1"; 913 reg = <0 0xe6570000 0 0x1000>; 914 renesas,ipmmu-main = <&ipmmu_mm 2>; 915 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 916 #iommu-cells = <1>; 917 }; 918 919 ipmmu_mm: iommu@e67b0000 { 920 compatible = "renesas,ipmmu-r8a774b1"; 921 reg = <0 0xe67b0000 0 0x1000>; 922 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 923 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 924 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 925 #iommu-cells = <1>; 926 }; 927 928 ipmmu_mp: iommu@ec670000 { 929 compatible = "renesas,ipmmu-r8a774b1"; 930 reg = <0 0xec670000 0 0x1000>; 931 renesas,ipmmu-main = <&ipmmu_mm 4>; 932 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 933 #iommu-cells = <1>; 934 }; 935 936 ipmmu_pv0: iommu@fd800000 { 937 compatible = "renesas,ipmmu-r8a774b1"; 938 reg = <0 0xfd800000 0 0x1000>; 939 renesas,ipmmu-main = <&ipmmu_mm 6>; 940 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 941 #iommu-cells = <1>; 942 }; 943 944 ipmmu_vc0: iommu@fe6b0000 { 945 compatible = "renesas,ipmmu-r8a774b1"; 946 reg = <0 0xfe6b0000 0 0x1000>; 947 renesas,ipmmu-main = <&ipmmu_mm 12>; 948 power-domains = <&sysc R8A774B1_PD_A3VC>; 949 #iommu-cells = <1>; 950 }; 951 952 ipmmu_vi0: iommu@febd0000 { 953 compatible = "renesas,ipmmu-r8a774b1"; 954 reg = <0 0xfebd0000 0 0x1000>; 955 renesas,ipmmu-main = <&ipmmu_mm 14>; 956 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 957 #iommu-cells = <1>; 958 }; 959 960 ipmmu_vp0: iommu@fe990000 { 961 compatible = "renesas,ipmmu-r8a774b1"; 962 reg = <0 0xfe990000 0 0x1000>; 963 renesas,ipmmu-main = <&ipmmu_mm 16>; 964 power-domains = <&sysc R8A774B1_PD_A3VP>; 965 #iommu-cells = <1>; 966 }; 967 968 avb: ethernet@e6800000 { 969 compatible = "renesas,etheravb-r8a774b1", 970 "renesas,etheravb-rcar-gen3"; 971 reg = <0 0xe6800000 0 0x800>; 972 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 997 interrupt-names = "ch0", "ch1", "ch2", "ch3", 998 "ch4", "ch5", "ch6", "ch7", 999 "ch8", "ch9", "ch10", "ch11", 1000 "ch12", "ch13", "ch14", "ch15", 1001 "ch16", "ch17", "ch18", "ch19", 1002 "ch20", "ch21", "ch22", "ch23", 1003 "ch24"; 1004 clocks = <&cpg CPG_MOD 812>; 1005 clock-names = "fck"; 1006 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1007 resets = <&cpg 812>; 1008 phy-mode = "rgmii"; 1009 rx-internal-delay-ps = <0>; 1010 tx-internal-delay-ps = <0>; 1011 iommus = <&ipmmu_ds0 16>; 1012 #address-cells = <1>; 1013 #size-cells = <0>; 1014 status = "disabled"; 1015 }; 1016 1017 can0: can@e6c30000 { 1018 compatible = "renesas,can-r8a774b1", 1019 "renesas,rcar-gen3-can"; 1020 reg = <0 0xe6c30000 0 0x1000>; 1021 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1022 clocks = <&cpg CPG_MOD 916>, 1023 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1024 <&can_clk>; 1025 clock-names = "clkp1", "clkp2", "can_clk"; 1026 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1027 assigned-clock-rates = <40000000>; 1028 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1029 resets = <&cpg 916>; 1030 status = "disabled"; 1031 }; 1032 1033 can1: can@e6c38000 { 1034 compatible = "renesas,can-r8a774b1", 1035 "renesas,rcar-gen3-can"; 1036 reg = <0 0xe6c38000 0 0x1000>; 1037 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1038 clocks = <&cpg CPG_MOD 915>, 1039 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1040 <&can_clk>; 1041 clock-names = "clkp1", "clkp2", "can_clk"; 1042 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1043 assigned-clock-rates = <40000000>; 1044 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1045 resets = <&cpg 915>; 1046 status = "disabled"; 1047 }; 1048 1049 canfd: can@e66c0000 { 1050 compatible = "renesas,r8a774b1-canfd", 1051 "renesas,rcar-gen3-canfd"; 1052 reg = <0 0xe66c0000 0 0x8000>; 1053 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1054 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1055 clocks = <&cpg CPG_MOD 914>, 1056 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1057 <&can_clk>; 1058 clock-names = "fck", "canfd", "can_clk"; 1059 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1060 assigned-clock-rates = <40000000>; 1061 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1062 resets = <&cpg 914>; 1063 status = "disabled"; 1064 1065 channel0 { 1066 status = "disabled"; 1067 }; 1068 1069 channel1 { 1070 status = "disabled"; 1071 }; 1072 }; 1073 1074 pwm0: pwm@e6e30000 { 1075 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1076 reg = <0 0xe6e30000 0 0x8>; 1077 #pwm-cells = <2>; 1078 clocks = <&cpg CPG_MOD 523>; 1079 resets = <&cpg 523>; 1080 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1081 status = "disabled"; 1082 }; 1083 1084 pwm1: pwm@e6e31000 { 1085 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1086 reg = <0 0xe6e31000 0 0x8>; 1087 #pwm-cells = <2>; 1088 clocks = <&cpg CPG_MOD 523>; 1089 resets = <&cpg 523>; 1090 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1091 status = "disabled"; 1092 }; 1093 1094 pwm2: pwm@e6e32000 { 1095 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1096 reg = <0 0xe6e32000 0 0x8>; 1097 #pwm-cells = <2>; 1098 clocks = <&cpg CPG_MOD 523>; 1099 resets = <&cpg 523>; 1100 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1101 status = "disabled"; 1102 }; 1103 1104 pwm3: pwm@e6e33000 { 1105 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1106 reg = <0 0xe6e33000 0 0x8>; 1107 #pwm-cells = <2>; 1108 clocks = <&cpg CPG_MOD 523>; 1109 resets = <&cpg 523>; 1110 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1111 status = "disabled"; 1112 }; 1113 1114 pwm4: pwm@e6e34000 { 1115 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1116 reg = <0 0xe6e34000 0 0x8>; 1117 #pwm-cells = <2>; 1118 clocks = <&cpg CPG_MOD 523>; 1119 resets = <&cpg 523>; 1120 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1121 status = "disabled"; 1122 }; 1123 1124 pwm5: pwm@e6e35000 { 1125 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1126 reg = <0 0xe6e35000 0 0x8>; 1127 #pwm-cells = <2>; 1128 clocks = <&cpg CPG_MOD 523>; 1129 resets = <&cpg 523>; 1130 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1131 status = "disabled"; 1132 }; 1133 1134 pwm6: pwm@e6e36000 { 1135 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1136 reg = <0 0xe6e36000 0 0x8>; 1137 #pwm-cells = <2>; 1138 clocks = <&cpg CPG_MOD 523>; 1139 resets = <&cpg 523>; 1140 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1141 status = "disabled"; 1142 }; 1143 1144 scif0: serial@e6e60000 { 1145 compatible = "renesas,scif-r8a774b1", 1146 "renesas,rcar-gen3-scif", "renesas,scif"; 1147 reg = <0 0xe6e60000 0 0x40>; 1148 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1149 clocks = <&cpg CPG_MOD 207>, 1150 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1151 <&scif_clk>; 1152 clock-names = "fck", "brg_int", "scif_clk"; 1153 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1154 <&dmac2 0x51>, <&dmac2 0x50>; 1155 dma-names = "tx", "rx", "tx", "rx"; 1156 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1157 resets = <&cpg 207>; 1158 status = "disabled"; 1159 }; 1160 1161 scif1: serial@e6e68000 { 1162 compatible = "renesas,scif-r8a774b1", 1163 "renesas,rcar-gen3-scif", "renesas,scif"; 1164 reg = <0 0xe6e68000 0 0x40>; 1165 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1166 clocks = <&cpg CPG_MOD 206>, 1167 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1168 <&scif_clk>; 1169 clock-names = "fck", "brg_int", "scif_clk"; 1170 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1171 <&dmac2 0x53>, <&dmac2 0x52>; 1172 dma-names = "tx", "rx", "tx", "rx"; 1173 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1174 resets = <&cpg 206>; 1175 status = "disabled"; 1176 }; 1177 1178 scif2: serial@e6e88000 { 1179 compatible = "renesas,scif-r8a774b1", 1180 "renesas,rcar-gen3-scif", "renesas,scif"; 1181 reg = <0 0xe6e88000 0 0x40>; 1182 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1183 clocks = <&cpg CPG_MOD 310>, 1184 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1185 <&scif_clk>; 1186 clock-names = "fck", "brg_int", "scif_clk"; 1187 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1188 <&dmac2 0x13>, <&dmac2 0x12>; 1189 dma-names = "tx", "rx", "tx", "rx"; 1190 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1191 resets = <&cpg 310>; 1192 status = "disabled"; 1193 }; 1194 1195 scif3: serial@e6c50000 { 1196 compatible = "renesas,scif-r8a774b1", 1197 "renesas,rcar-gen3-scif", "renesas,scif"; 1198 reg = <0 0xe6c50000 0 0x40>; 1199 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1200 clocks = <&cpg CPG_MOD 204>, 1201 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1202 <&scif_clk>; 1203 clock-names = "fck", "brg_int", "scif_clk"; 1204 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1205 dma-names = "tx", "rx"; 1206 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1207 resets = <&cpg 204>; 1208 status = "disabled"; 1209 }; 1210 1211 scif4: serial@e6c40000 { 1212 compatible = "renesas,scif-r8a774b1", 1213 "renesas,rcar-gen3-scif", "renesas,scif"; 1214 reg = <0 0xe6c40000 0 0x40>; 1215 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1216 clocks = <&cpg CPG_MOD 203>, 1217 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1218 <&scif_clk>; 1219 clock-names = "fck", "brg_int", "scif_clk"; 1220 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1221 dma-names = "tx", "rx"; 1222 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1223 resets = <&cpg 203>; 1224 status = "disabled"; 1225 }; 1226 1227 scif5: serial@e6f30000 { 1228 compatible = "renesas,scif-r8a774b1", 1229 "renesas,rcar-gen3-scif", "renesas,scif"; 1230 reg = <0 0xe6f30000 0 0x40>; 1231 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1232 clocks = <&cpg CPG_MOD 202>, 1233 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1234 <&scif_clk>; 1235 clock-names = "fck", "brg_int", "scif_clk"; 1236 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1237 <&dmac2 0x5b>, <&dmac2 0x5a>; 1238 dma-names = "tx", "rx", "tx", "rx"; 1239 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1240 resets = <&cpg 202>; 1241 status = "disabled"; 1242 }; 1243 1244 msiof0: spi@e6e90000 { 1245 compatible = "renesas,msiof-r8a774b1", 1246 "renesas,rcar-gen3-msiof"; 1247 reg = <0 0xe6e90000 0 0x0064>; 1248 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1249 clocks = <&cpg CPG_MOD 211>; 1250 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1251 <&dmac2 0x41>, <&dmac2 0x40>; 1252 dma-names = "tx", "rx", "tx", "rx"; 1253 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1254 resets = <&cpg 211>; 1255 #address-cells = <1>; 1256 #size-cells = <0>; 1257 status = "disabled"; 1258 }; 1259 1260 msiof1: spi@e6ea0000 { 1261 compatible = "renesas,msiof-r8a774b1", 1262 "renesas,rcar-gen3-msiof"; 1263 reg = <0 0xe6ea0000 0 0x0064>; 1264 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1265 clocks = <&cpg CPG_MOD 210>; 1266 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1267 <&dmac2 0x43>, <&dmac2 0x42>; 1268 dma-names = "tx", "rx", "tx", "rx"; 1269 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1270 resets = <&cpg 210>; 1271 #address-cells = <1>; 1272 #size-cells = <0>; 1273 status = "disabled"; 1274 }; 1275 1276 msiof2: spi@e6c00000 { 1277 compatible = "renesas,msiof-r8a774b1", 1278 "renesas,rcar-gen3-msiof"; 1279 reg = <0 0xe6c00000 0 0x0064>; 1280 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1281 clocks = <&cpg CPG_MOD 209>; 1282 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1283 dma-names = "tx", "rx"; 1284 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1285 resets = <&cpg 209>; 1286 #address-cells = <1>; 1287 #size-cells = <0>; 1288 status = "disabled"; 1289 }; 1290 1291 msiof3: spi@e6c10000 { 1292 compatible = "renesas,msiof-r8a774b1", 1293 "renesas,rcar-gen3-msiof"; 1294 reg = <0 0xe6c10000 0 0x0064>; 1295 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1296 clocks = <&cpg CPG_MOD 208>; 1297 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1298 dma-names = "tx", "rx"; 1299 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1300 resets = <&cpg 208>; 1301 #address-cells = <1>; 1302 #size-cells = <0>; 1303 status = "disabled"; 1304 }; 1305 1306 vin0: video@e6ef0000 { 1307 compatible = "renesas,vin-r8a774b1"; 1308 reg = <0 0xe6ef0000 0 0x1000>; 1309 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1310 clocks = <&cpg CPG_MOD 811>; 1311 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1312 resets = <&cpg 811>; 1313 renesas,id = <0>; 1314 status = "disabled"; 1315 1316 ports { 1317 #address-cells = <1>; 1318 #size-cells = <0>; 1319 1320 port@1 { 1321 #address-cells = <1>; 1322 #size-cells = <0>; 1323 1324 reg = <1>; 1325 1326 vin0csi20: endpoint@0 { 1327 reg = <0>; 1328 remote-endpoint = <&csi20vin0>; 1329 }; 1330 vin0csi40: endpoint@2 { 1331 reg = <2>; 1332 remote-endpoint = <&csi40vin0>; 1333 }; 1334 }; 1335 }; 1336 }; 1337 1338 vin1: video@e6ef1000 { 1339 compatible = "renesas,vin-r8a774b1"; 1340 reg = <0 0xe6ef1000 0 0x1000>; 1341 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1342 clocks = <&cpg CPG_MOD 810>; 1343 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1344 resets = <&cpg 810>; 1345 renesas,id = <1>; 1346 status = "disabled"; 1347 1348 ports { 1349 #address-cells = <1>; 1350 #size-cells = <0>; 1351 1352 port@1 { 1353 #address-cells = <1>; 1354 #size-cells = <0>; 1355 1356 reg = <1>; 1357 1358 vin1csi20: endpoint@0 { 1359 reg = <0>; 1360 remote-endpoint = <&csi20vin1>; 1361 }; 1362 vin1csi40: endpoint@2 { 1363 reg = <2>; 1364 remote-endpoint = <&csi40vin1>; 1365 }; 1366 }; 1367 }; 1368 }; 1369 1370 vin2: video@e6ef2000 { 1371 compatible = "renesas,vin-r8a774b1"; 1372 reg = <0 0xe6ef2000 0 0x1000>; 1373 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1374 clocks = <&cpg CPG_MOD 809>; 1375 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1376 resets = <&cpg 809>; 1377 renesas,id = <2>; 1378 status = "disabled"; 1379 1380 ports { 1381 #address-cells = <1>; 1382 #size-cells = <0>; 1383 1384 port@1 { 1385 #address-cells = <1>; 1386 #size-cells = <0>; 1387 1388 reg = <1>; 1389 1390 vin2csi20: endpoint@0 { 1391 reg = <0>; 1392 remote-endpoint = <&csi20vin2>; 1393 }; 1394 vin2csi40: endpoint@2 { 1395 reg = <2>; 1396 remote-endpoint = <&csi40vin2>; 1397 }; 1398 }; 1399 }; 1400 }; 1401 1402 vin3: video@e6ef3000 { 1403 compatible = "renesas,vin-r8a774b1"; 1404 reg = <0 0xe6ef3000 0 0x1000>; 1405 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1406 clocks = <&cpg CPG_MOD 808>; 1407 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1408 resets = <&cpg 808>; 1409 renesas,id = <3>; 1410 status = "disabled"; 1411 1412 ports { 1413 #address-cells = <1>; 1414 #size-cells = <0>; 1415 1416 port@1 { 1417 #address-cells = <1>; 1418 #size-cells = <0>; 1419 1420 reg = <1>; 1421 1422 vin3csi20: endpoint@0 { 1423 reg = <0>; 1424 remote-endpoint = <&csi20vin3>; 1425 }; 1426 vin3csi40: endpoint@2 { 1427 reg = <2>; 1428 remote-endpoint = <&csi40vin3>; 1429 }; 1430 }; 1431 }; 1432 }; 1433 1434 vin4: video@e6ef4000 { 1435 compatible = "renesas,vin-r8a774b1"; 1436 reg = <0 0xe6ef4000 0 0x1000>; 1437 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1438 clocks = <&cpg CPG_MOD 807>; 1439 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1440 resets = <&cpg 807>; 1441 renesas,id = <4>; 1442 status = "disabled"; 1443 1444 ports { 1445 #address-cells = <1>; 1446 #size-cells = <0>; 1447 1448 port@1 { 1449 #address-cells = <1>; 1450 #size-cells = <0>; 1451 1452 reg = <1>; 1453 1454 vin4csi20: endpoint@0 { 1455 reg = <0>; 1456 remote-endpoint = <&csi20vin4>; 1457 }; 1458 vin4csi40: endpoint@2 { 1459 reg = <2>; 1460 remote-endpoint = <&csi40vin4>; 1461 }; 1462 }; 1463 }; 1464 }; 1465 1466 vin5: video@e6ef5000 { 1467 compatible = "renesas,vin-r8a774b1"; 1468 reg = <0 0xe6ef5000 0 0x1000>; 1469 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1470 clocks = <&cpg CPG_MOD 806>; 1471 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1472 resets = <&cpg 806>; 1473 renesas,id = <5>; 1474 status = "disabled"; 1475 1476 ports { 1477 #address-cells = <1>; 1478 #size-cells = <0>; 1479 1480 port@1 { 1481 #address-cells = <1>; 1482 #size-cells = <0>; 1483 1484 reg = <1>; 1485 1486 vin5csi20: endpoint@0 { 1487 reg = <0>; 1488 remote-endpoint = <&csi20vin5>; 1489 }; 1490 vin5csi40: endpoint@2 { 1491 reg = <2>; 1492 remote-endpoint = <&csi40vin5>; 1493 }; 1494 }; 1495 }; 1496 }; 1497 1498 vin6: video@e6ef6000 { 1499 compatible = "renesas,vin-r8a774b1"; 1500 reg = <0 0xe6ef6000 0 0x1000>; 1501 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1502 clocks = <&cpg CPG_MOD 805>; 1503 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1504 resets = <&cpg 805>; 1505 renesas,id = <6>; 1506 status = "disabled"; 1507 1508 ports { 1509 #address-cells = <1>; 1510 #size-cells = <0>; 1511 1512 port@1 { 1513 #address-cells = <1>; 1514 #size-cells = <0>; 1515 1516 reg = <1>; 1517 1518 vin6csi20: endpoint@0 { 1519 reg = <0>; 1520 remote-endpoint = <&csi20vin6>; 1521 }; 1522 vin6csi40: endpoint@2 { 1523 reg = <2>; 1524 remote-endpoint = <&csi40vin6>; 1525 }; 1526 }; 1527 }; 1528 }; 1529 1530 vin7: video@e6ef7000 { 1531 compatible = "renesas,vin-r8a774b1"; 1532 reg = <0 0xe6ef7000 0 0x1000>; 1533 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1534 clocks = <&cpg CPG_MOD 804>; 1535 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1536 resets = <&cpg 804>; 1537 renesas,id = <7>; 1538 status = "disabled"; 1539 1540 ports { 1541 #address-cells = <1>; 1542 #size-cells = <0>; 1543 1544 port@1 { 1545 #address-cells = <1>; 1546 #size-cells = <0>; 1547 1548 reg = <1>; 1549 1550 vin7csi20: endpoint@0 { 1551 reg = <0>; 1552 remote-endpoint = <&csi20vin7>; 1553 }; 1554 vin7csi40: endpoint@2 { 1555 reg = <2>; 1556 remote-endpoint = <&csi40vin7>; 1557 }; 1558 }; 1559 }; 1560 }; 1561 1562 rcar_sound: sound@ec500000 { 1563 /* 1564 * #sound-dai-cells is required 1565 * 1566 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1567 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1568 */ 1569 /* 1570 * #clock-cells is required for audio_clkout0/1/2/3 1571 * 1572 * clkout : #clock-cells = <0>; <&rcar_sound>; 1573 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1574 */ 1575 compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3"; 1576 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1577 <0 0xec5a0000 0 0x100>, /* ADG */ 1578 <0 0xec540000 0 0x1000>, /* SSIU */ 1579 <0 0xec541000 0 0x280>, /* SSI */ 1580 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1581 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1582 1583 clocks = <&cpg CPG_MOD 1005>, 1584 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1585 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1586 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1587 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1588 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1589 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1590 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1591 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1592 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1593 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1594 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1595 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1596 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1597 <&audio_clk_a>, <&audio_clk_b>, 1598 <&audio_clk_c>, 1599 <&cpg CPG_CORE R8A774B1_CLK_S0D4>; 1600 clock-names = "ssi-all", 1601 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1602 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1603 "ssi.1", "ssi.0", 1604 "src.9", "src.8", "src.7", "src.6", 1605 "src.5", "src.4", "src.3", "src.2", 1606 "src.1", "src.0", 1607 "mix.1", "mix.0", 1608 "ctu.1", "ctu.0", 1609 "dvc.0", "dvc.1", 1610 "clk_a", "clk_b", "clk_c", "clk_i"; 1611 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1612 resets = <&cpg 1005>, 1613 <&cpg 1006>, <&cpg 1007>, 1614 <&cpg 1008>, <&cpg 1009>, 1615 <&cpg 1010>, <&cpg 1011>, 1616 <&cpg 1012>, <&cpg 1013>, 1617 <&cpg 1014>, <&cpg 1015>; 1618 reset-names = "ssi-all", 1619 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1620 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1621 "ssi.1", "ssi.0"; 1622 status = "disabled"; 1623 1624 rcar_sound,ctu { 1625 ctu00: ctu-0 { }; 1626 ctu01: ctu-1 { }; 1627 ctu02: ctu-2 { }; 1628 ctu03: ctu-3 { }; 1629 ctu10: ctu-4 { }; 1630 ctu11: ctu-5 { }; 1631 ctu12: ctu-6 { }; 1632 ctu13: ctu-7 { }; 1633 }; 1634 1635 rcar_sound,dvc { 1636 dvc0: dvc-0 { 1637 dmas = <&audma1 0xbc>; 1638 dma-names = "tx"; 1639 }; 1640 dvc1: dvc-1 { 1641 dmas = <&audma1 0xbe>; 1642 dma-names = "tx"; 1643 }; 1644 }; 1645 1646 rcar_sound,mix { 1647 mix0: mix-0 { }; 1648 mix1: mix-1 { }; 1649 }; 1650 1651 rcar_sound,src { 1652 src0: src-0 { 1653 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1654 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1655 dma-names = "rx", "tx"; 1656 }; 1657 src1: src-1 { 1658 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1659 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1660 dma-names = "rx", "tx"; 1661 }; 1662 src2: src-2 { 1663 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1664 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1665 dma-names = "rx", "tx"; 1666 }; 1667 src3: src-3 { 1668 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1669 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1670 dma-names = "rx", "tx"; 1671 }; 1672 src4: src-4 { 1673 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1674 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1675 dma-names = "rx", "tx"; 1676 }; 1677 src5: src-5 { 1678 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1679 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1680 dma-names = "rx", "tx"; 1681 }; 1682 src6: src-6 { 1683 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1684 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1685 dma-names = "rx", "tx"; 1686 }; 1687 src7: src-7 { 1688 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1689 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1690 dma-names = "rx", "tx"; 1691 }; 1692 src8: src-8 { 1693 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1694 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1695 dma-names = "rx", "tx"; 1696 }; 1697 src9: src-9 { 1698 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1699 dmas = <&audma0 0x97>, <&audma1 0xba>; 1700 dma-names = "rx", "tx"; 1701 }; 1702 }; 1703 1704 rcar_sound,ssi { 1705 ssi0: ssi-0 { 1706 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1707 dmas = <&audma0 0x01>, <&audma1 0x02>; 1708 dma-names = "rx", "tx"; 1709 }; 1710 ssi1: ssi-1 { 1711 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1712 dmas = <&audma0 0x03>, <&audma1 0x04>; 1713 dma-names = "rx", "tx"; 1714 }; 1715 ssi2: ssi-2 { 1716 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1717 dmas = <&audma0 0x05>, <&audma1 0x06>; 1718 dma-names = "rx", "tx"; 1719 }; 1720 ssi3: ssi-3 { 1721 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1722 dmas = <&audma0 0x07>, <&audma1 0x08>; 1723 dma-names = "rx", "tx"; 1724 }; 1725 ssi4: ssi-4 { 1726 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1727 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1728 dma-names = "rx", "tx"; 1729 }; 1730 ssi5: ssi-5 { 1731 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1732 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1733 dma-names = "rx", "tx"; 1734 }; 1735 ssi6: ssi-6 { 1736 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1737 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1738 dma-names = "rx", "tx"; 1739 }; 1740 ssi7: ssi-7 { 1741 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1742 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1743 dma-names = "rx", "tx"; 1744 }; 1745 ssi8: ssi-8 { 1746 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1747 dmas = <&audma0 0x11>, <&audma1 0x12>; 1748 dma-names = "rx", "tx"; 1749 }; 1750 ssi9: ssi-9 { 1751 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1752 dmas = <&audma0 0x13>, <&audma1 0x14>; 1753 dma-names = "rx", "tx"; 1754 }; 1755 }; 1756 1757 rcar_sound,ssiu { 1758 ssiu00: ssiu-0 { 1759 dmas = <&audma0 0x15>, <&audma1 0x16>; 1760 dma-names = "rx", "tx"; 1761 }; 1762 ssiu01: ssiu-1 { 1763 dmas = <&audma0 0x35>, <&audma1 0x36>; 1764 dma-names = "rx", "tx"; 1765 }; 1766 ssiu02: ssiu-2 { 1767 dmas = <&audma0 0x37>, <&audma1 0x38>; 1768 dma-names = "rx", "tx"; 1769 }; 1770 ssiu03: ssiu-3 { 1771 dmas = <&audma0 0x47>, <&audma1 0x48>; 1772 dma-names = "rx", "tx"; 1773 }; 1774 ssiu04: ssiu-4 { 1775 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1776 dma-names = "rx", "tx"; 1777 }; 1778 ssiu05: ssiu-5 { 1779 dmas = <&audma0 0x43>, <&audma1 0x44>; 1780 dma-names = "rx", "tx"; 1781 }; 1782 ssiu06: ssiu-6 { 1783 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1784 dma-names = "rx", "tx"; 1785 }; 1786 ssiu07: ssiu-7 { 1787 dmas = <&audma0 0x53>, <&audma1 0x54>; 1788 dma-names = "rx", "tx"; 1789 }; 1790 ssiu10: ssiu-8 { 1791 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1792 dma-names = "rx", "tx"; 1793 }; 1794 ssiu11: ssiu-9 { 1795 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1796 dma-names = "rx", "tx"; 1797 }; 1798 ssiu12: ssiu-10 { 1799 dmas = <&audma0 0x57>, <&audma1 0x58>; 1800 dma-names = "rx", "tx"; 1801 }; 1802 ssiu13: ssiu-11 { 1803 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1804 dma-names = "rx", "tx"; 1805 }; 1806 ssiu14: ssiu-12 { 1807 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1808 dma-names = "rx", "tx"; 1809 }; 1810 ssiu15: ssiu-13 { 1811 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1812 dma-names = "rx", "tx"; 1813 }; 1814 ssiu16: ssiu-14 { 1815 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1816 dma-names = "rx", "tx"; 1817 }; 1818 ssiu17: ssiu-15 { 1819 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1820 dma-names = "rx", "tx"; 1821 }; 1822 ssiu20: ssiu-16 { 1823 dmas = <&audma0 0x63>, <&audma1 0x64>; 1824 dma-names = "rx", "tx"; 1825 }; 1826 ssiu21: ssiu-17 { 1827 dmas = <&audma0 0x67>, <&audma1 0x68>; 1828 dma-names = "rx", "tx"; 1829 }; 1830 ssiu22: ssiu-18 { 1831 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1832 dma-names = "rx", "tx"; 1833 }; 1834 ssiu23: ssiu-19 { 1835 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1836 dma-names = "rx", "tx"; 1837 }; 1838 ssiu24: ssiu-20 { 1839 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1840 dma-names = "rx", "tx"; 1841 }; 1842 ssiu25: ssiu-21 { 1843 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1844 dma-names = "rx", "tx"; 1845 }; 1846 ssiu26: ssiu-22 { 1847 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1848 dma-names = "rx", "tx"; 1849 }; 1850 ssiu27: ssiu-23 { 1851 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1852 dma-names = "rx", "tx"; 1853 }; 1854 ssiu30: ssiu-24 { 1855 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1856 dma-names = "rx", "tx"; 1857 }; 1858 ssiu31: ssiu-25 { 1859 dmas = <&audma0 0x21>, <&audma1 0x22>; 1860 dma-names = "rx", "tx"; 1861 }; 1862 ssiu32: ssiu-26 { 1863 dmas = <&audma0 0x23>, <&audma1 0x24>; 1864 dma-names = "rx", "tx"; 1865 }; 1866 ssiu33: ssiu-27 { 1867 dmas = <&audma0 0x25>, <&audma1 0x26>; 1868 dma-names = "rx", "tx"; 1869 }; 1870 ssiu34: ssiu-28 { 1871 dmas = <&audma0 0x27>, <&audma1 0x28>; 1872 dma-names = "rx", "tx"; 1873 }; 1874 ssiu35: ssiu-29 { 1875 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1876 dma-names = "rx", "tx"; 1877 }; 1878 ssiu36: ssiu-30 { 1879 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1880 dma-names = "rx", "tx"; 1881 }; 1882 ssiu37: ssiu-31 { 1883 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 1884 dma-names = "rx", "tx"; 1885 }; 1886 ssiu40: ssiu-32 { 1887 dmas = <&audma0 0x71>, <&audma1 0x72>; 1888 dma-names = "rx", "tx"; 1889 }; 1890 ssiu41: ssiu-33 { 1891 dmas = <&audma0 0x17>, <&audma1 0x18>; 1892 dma-names = "rx", "tx"; 1893 }; 1894 ssiu42: ssiu-34 { 1895 dmas = <&audma0 0x19>, <&audma1 0x1A>; 1896 dma-names = "rx", "tx"; 1897 }; 1898 ssiu43: ssiu-35 { 1899 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 1900 dma-names = "rx", "tx"; 1901 }; 1902 ssiu44: ssiu-36 { 1903 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 1904 dma-names = "rx", "tx"; 1905 }; 1906 ssiu45: ssiu-37 { 1907 dmas = <&audma0 0x1F>, <&audma1 0x20>; 1908 dma-names = "rx", "tx"; 1909 }; 1910 ssiu46: ssiu-38 { 1911 dmas = <&audma0 0x31>, <&audma1 0x32>; 1912 dma-names = "rx", "tx"; 1913 }; 1914 ssiu47: ssiu-39 { 1915 dmas = <&audma0 0x33>, <&audma1 0x34>; 1916 dma-names = "rx", "tx"; 1917 }; 1918 ssiu50: ssiu-40 { 1919 dmas = <&audma0 0x73>, <&audma1 0x74>; 1920 dma-names = "rx", "tx"; 1921 }; 1922 ssiu60: ssiu-41 { 1923 dmas = <&audma0 0x75>, <&audma1 0x76>; 1924 dma-names = "rx", "tx"; 1925 }; 1926 ssiu70: ssiu-42 { 1927 dmas = <&audma0 0x79>, <&audma1 0x7a>; 1928 dma-names = "rx", "tx"; 1929 }; 1930 ssiu80: ssiu-43 { 1931 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 1932 dma-names = "rx", "tx"; 1933 }; 1934 ssiu90: ssiu-44 { 1935 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 1936 dma-names = "rx", "tx"; 1937 }; 1938 ssiu91: ssiu-45 { 1939 dmas = <&audma0 0x7F>, <&audma1 0x80>; 1940 dma-names = "rx", "tx"; 1941 }; 1942 ssiu92: ssiu-46 { 1943 dmas = <&audma0 0x81>, <&audma1 0x82>; 1944 dma-names = "rx", "tx"; 1945 }; 1946 ssiu93: ssiu-47 { 1947 dmas = <&audma0 0x83>, <&audma1 0x84>; 1948 dma-names = "rx", "tx"; 1949 }; 1950 ssiu94: ssiu-48 { 1951 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 1952 dma-names = "rx", "tx"; 1953 }; 1954 ssiu95: ssiu-49 { 1955 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 1956 dma-names = "rx", "tx"; 1957 }; 1958 ssiu96: ssiu-50 { 1959 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 1960 dma-names = "rx", "tx"; 1961 }; 1962 ssiu97: ssiu-51 { 1963 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 1964 dma-names = "rx", "tx"; 1965 }; 1966 }; 1967 }; 1968 1969 audma0: dma-controller@ec700000 { 1970 compatible = "renesas,dmac-r8a774b1", 1971 "renesas,rcar-dmac"; 1972 reg = <0 0xec700000 0 0x10000>; 1973 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1974 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1975 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1976 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1977 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1978 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1979 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1980 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1981 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1982 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1983 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1984 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1985 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1986 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1987 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1988 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1989 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1990 interrupt-names = "error", 1991 "ch0", "ch1", "ch2", "ch3", 1992 "ch4", "ch5", "ch6", "ch7", 1993 "ch8", "ch9", "ch10", "ch11", 1994 "ch12", "ch13", "ch14", "ch15"; 1995 clocks = <&cpg CPG_MOD 502>; 1996 clock-names = "fck"; 1997 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1998 resets = <&cpg 502>; 1999 #dma-cells = <1>; 2000 dma-channels = <16>; 2001 }; 2002 2003 audma1: dma-controller@ec720000 { 2004 compatible = "renesas,dmac-r8a774b1", 2005 "renesas,rcar-dmac"; 2006 reg = <0 0xec720000 0 0x10000>; 2007 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2008 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2009 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2010 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2011 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2012 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2013 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2014 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2015 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2016 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2017 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2018 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2019 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2020 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2021 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2022 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2023 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2024 interrupt-names = "error", 2025 "ch0", "ch1", "ch2", "ch3", 2026 "ch4", "ch5", "ch6", "ch7", 2027 "ch8", "ch9", "ch10", "ch11", 2028 "ch12", "ch13", "ch14", "ch15"; 2029 clocks = <&cpg CPG_MOD 501>; 2030 clock-names = "fck"; 2031 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2032 resets = <&cpg 501>; 2033 #dma-cells = <1>; 2034 dma-channels = <16>; 2035 }; 2036 2037 xhci0: usb@ee000000 { 2038 compatible = "renesas,xhci-r8a774b1", 2039 "renesas,rcar-gen3-xhci"; 2040 reg = <0 0xee000000 0 0xc00>; 2041 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2042 clocks = <&cpg CPG_MOD 328>; 2043 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2044 resets = <&cpg 328>; 2045 status = "disabled"; 2046 }; 2047 2048 usb3_peri0: usb@ee020000 { 2049 compatible = "renesas,r8a774b1-usb3-peri", 2050 "renesas,rcar-gen3-usb3-peri"; 2051 reg = <0 0xee020000 0 0x400>; 2052 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2053 clocks = <&cpg CPG_MOD 328>; 2054 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2055 resets = <&cpg 328>; 2056 status = "disabled"; 2057 }; 2058 2059 ohci0: usb@ee080000 { 2060 compatible = "generic-ohci"; 2061 reg = <0 0xee080000 0 0x100>; 2062 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2063 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2064 phys = <&usb2_phy0 1>; 2065 phy-names = "usb"; 2066 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2067 resets = <&cpg 703>, <&cpg 704>; 2068 status = "disabled"; 2069 }; 2070 2071 ohci1: usb@ee0a0000 { 2072 compatible = "generic-ohci"; 2073 reg = <0 0xee0a0000 0 0x100>; 2074 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2075 clocks = <&cpg CPG_MOD 702>; 2076 phys = <&usb2_phy1 1>; 2077 phy-names = "usb"; 2078 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2079 resets = <&cpg 702>; 2080 status = "disabled"; 2081 }; 2082 2083 ehci0: usb@ee080100 { 2084 compatible = "generic-ehci"; 2085 reg = <0 0xee080100 0 0x100>; 2086 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2087 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2088 phys = <&usb2_phy0 2>; 2089 phy-names = "usb"; 2090 companion = <&ohci0>; 2091 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2092 resets = <&cpg 703>, <&cpg 704>; 2093 status = "disabled"; 2094 }; 2095 2096 ehci1: usb@ee0a0100 { 2097 compatible = "generic-ehci"; 2098 reg = <0 0xee0a0100 0 0x100>; 2099 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2100 clocks = <&cpg CPG_MOD 702>; 2101 phys = <&usb2_phy1 2>; 2102 phy-names = "usb"; 2103 companion = <&ohci1>; 2104 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2105 resets = <&cpg 702>; 2106 status = "disabled"; 2107 }; 2108 2109 usb2_phy0: usb-phy@ee080200 { 2110 compatible = "renesas,usb2-phy-r8a774b1", 2111 "renesas,rcar-gen3-usb2-phy"; 2112 reg = <0 0xee080200 0 0x700>; 2113 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2114 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2115 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2116 resets = <&cpg 703>, <&cpg 704>; 2117 #phy-cells = <1>; 2118 status = "disabled"; 2119 }; 2120 2121 usb2_phy1: usb-phy@ee0a0200 { 2122 compatible = "renesas,usb2-phy-r8a774b1", 2123 "renesas,rcar-gen3-usb2-phy"; 2124 reg = <0 0xee0a0200 0 0x700>; 2125 clocks = <&cpg CPG_MOD 702>; 2126 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2127 resets = <&cpg 702>; 2128 #phy-cells = <1>; 2129 status = "disabled"; 2130 }; 2131 2132 sdhi0: mmc@ee100000 { 2133 compatible = "renesas,sdhi-r8a774b1", 2134 "renesas,rcar-gen3-sdhi"; 2135 reg = <0 0xee100000 0 0x2000>; 2136 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2137 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774B1_CLK_SD0H>; 2138 clock-names = "core", "clkh"; 2139 max-frequency = <200000000>; 2140 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2141 resets = <&cpg 314>; 2142 status = "disabled"; 2143 }; 2144 2145 sdhi1: mmc@ee120000 { 2146 compatible = "renesas,sdhi-r8a774b1", 2147 "renesas,rcar-gen3-sdhi"; 2148 reg = <0 0xee120000 0 0x2000>; 2149 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2150 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774B1_CLK_SD1H>; 2151 clock-names = "core", "clkh"; 2152 max-frequency = <200000000>; 2153 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2154 resets = <&cpg 313>; 2155 status = "disabled"; 2156 }; 2157 2158 sdhi2: mmc@ee140000 { 2159 compatible = "renesas,sdhi-r8a774b1", 2160 "renesas,rcar-gen3-sdhi"; 2161 reg = <0 0xee140000 0 0x2000>; 2162 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2163 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774B1_CLK_SD2H>; 2164 clock-names = "core", "clkh"; 2165 max-frequency = <200000000>; 2166 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2167 resets = <&cpg 312>; 2168 status = "disabled"; 2169 }; 2170 2171 sdhi3: mmc@ee160000 { 2172 compatible = "renesas,sdhi-r8a774b1", 2173 "renesas,rcar-gen3-sdhi"; 2174 reg = <0 0xee160000 0 0x2000>; 2175 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2176 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774B1_CLK_SD3H>; 2177 clock-names = "core", "clkh"; 2178 max-frequency = <200000000>; 2179 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2180 resets = <&cpg 311>; 2181 status = "disabled"; 2182 }; 2183 2184 rpc: spi@ee200000 { 2185 compatible = "renesas,r8a774b1-rpc-if", 2186 "renesas,rcar-gen3-rpc-if"; 2187 reg = <0 0xee200000 0 0x200>, 2188 <0 0x08000000 0 0x4000000>, 2189 <0 0xee208000 0 0x100>; 2190 reg-names = "regs", "dirmap", "wbuf"; 2191 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2192 clocks = <&cpg CPG_MOD 917>; 2193 clock-names = "rpc"; 2194 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2195 resets = <&cpg 917>; 2196 #address-cells = <1>; 2197 #size-cells = <0>; 2198 status = "disabled"; 2199 }; 2200 2201 sata: sata@ee300000 { 2202 compatible = "renesas,sata-r8a774b1", 2203 "renesas,rcar-gen3-sata"; 2204 reg = <0 0xee300000 0 0x200000>; 2205 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2206 clocks = <&cpg CPG_MOD 815>; 2207 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2208 resets = <&cpg 815>; 2209 status = "disabled"; 2210 }; 2211 2212 gic: interrupt-controller@f1010000 { 2213 compatible = "arm,gic-400"; 2214 #interrupt-cells = <3>; 2215 #address-cells = <0>; 2216 interrupt-controller; 2217 reg = <0x0 0xf1010000 0 0x1000>, 2218 <0x0 0xf1020000 0 0x20000>, 2219 <0x0 0xf1040000 0 0x20000>, 2220 <0x0 0xf1060000 0 0x20000>; 2221 interrupts = <GIC_PPI 9 2222 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2223 clocks = <&cpg CPG_MOD 408>; 2224 clock-names = "clk"; 2225 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2226 resets = <&cpg 408>; 2227 }; 2228 2229 pciec0: pcie@fe000000 { 2230 compatible = "renesas,pcie-r8a774b1", 2231 "renesas,pcie-rcar-gen3"; 2232 reg = <0 0xfe000000 0 0x80000>; 2233 #address-cells = <3>; 2234 #size-cells = <2>; 2235 bus-range = <0x00 0xff>; 2236 device_type = "pci"; 2237 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2238 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2239 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2240 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2241 /* Map all possible DDR as inbound ranges */ 2242 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2243 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2244 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2245 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2246 #interrupt-cells = <1>; 2247 interrupt-map-mask = <0 0 0 0>; 2248 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2249 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2250 clock-names = "pcie", "pcie_bus"; 2251 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2252 resets = <&cpg 319>; 2253 status = "disabled"; 2254 }; 2255 2256 pciec1: pcie@ee800000 { 2257 compatible = "renesas,pcie-r8a774b1", 2258 "renesas,pcie-rcar-gen3"; 2259 reg = <0 0xee800000 0 0x80000>; 2260 #address-cells = <3>; 2261 #size-cells = <2>; 2262 bus-range = <0x00 0xff>; 2263 device_type = "pci"; 2264 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2265 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2266 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2267 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2268 /* Map all possible DDR as inbound ranges */ 2269 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2270 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2271 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2272 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2273 #interrupt-cells = <1>; 2274 interrupt-map-mask = <0 0 0 0>; 2275 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2276 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2277 clock-names = "pcie", "pcie_bus"; 2278 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2279 resets = <&cpg 318>; 2280 status = "disabled"; 2281 }; 2282 2283 pciec0_ep: pcie-ep@fe000000 { 2284 compatible = "renesas,r8a774b1-pcie-ep", 2285 "renesas,rcar-gen3-pcie-ep"; 2286 reg = <0x0 0xfe000000 0 0x80000>, 2287 <0x0 0xfe100000 0 0x100000>, 2288 <0x0 0xfe200000 0 0x200000>, 2289 <0x0 0x30000000 0 0x8000000>, 2290 <0x0 0x38000000 0 0x8000000>; 2291 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2292 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2293 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2294 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2295 clocks = <&cpg CPG_MOD 319>; 2296 clock-names = "pcie"; 2297 resets = <&cpg 319>; 2298 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2299 status = "disabled"; 2300 }; 2301 2302 pciec1_ep: pcie-ep@ee800000 { 2303 compatible = "renesas,r8a774b1-pcie-ep", 2304 "renesas,rcar-gen3-pcie-ep"; 2305 reg = <0x0 0xee800000 0 0x80000>, 2306 <0x0 0xee900000 0 0x100000>, 2307 <0x0 0xeea00000 0 0x200000>, 2308 <0x0 0xc0000000 0 0x8000000>, 2309 <0x0 0xc8000000 0 0x8000000>; 2310 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2311 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2312 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2313 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2314 clocks = <&cpg CPG_MOD 318>; 2315 clock-names = "pcie"; 2316 resets = <&cpg 318>; 2317 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2318 status = "disabled"; 2319 }; 2320 2321 fdp1@fe940000 { 2322 compatible = "renesas,fdp1"; 2323 reg = <0 0xfe940000 0 0x2400>; 2324 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2325 clocks = <&cpg CPG_MOD 119>; 2326 power-domains = <&sysc R8A774B1_PD_A3VP>; 2327 resets = <&cpg 119>; 2328 renesas,fcp = <&fcpf0>; 2329 }; 2330 2331 fcpf0: fcp@fe950000 { 2332 compatible = "renesas,fcpf"; 2333 reg = <0 0xfe950000 0 0x200>; 2334 clocks = <&cpg CPG_MOD 615>; 2335 power-domains = <&sysc R8A774B1_PD_A3VP>; 2336 resets = <&cpg 615>; 2337 }; 2338 2339 vspb: vsp@fe960000 { 2340 compatible = "renesas,vsp2"; 2341 reg = <0 0xfe960000 0 0x8000>; 2342 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2343 clocks = <&cpg CPG_MOD 626>; 2344 power-domains = <&sysc R8A774B1_PD_A3VP>; 2345 resets = <&cpg 626>; 2346 2347 renesas,fcp = <&fcpvb0>; 2348 }; 2349 2350 vspi0: vsp@fe9a0000 { 2351 compatible = "renesas,vsp2"; 2352 reg = <0 0xfe9a0000 0 0x8000>; 2353 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2354 clocks = <&cpg CPG_MOD 631>; 2355 power-domains = <&sysc R8A774B1_PD_A3VP>; 2356 resets = <&cpg 631>; 2357 2358 renesas,fcp = <&fcpvi0>; 2359 }; 2360 2361 vspd0: vsp@fea20000 { 2362 compatible = "renesas,vsp2"; 2363 reg = <0 0xfea20000 0 0x5000>; 2364 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2365 clocks = <&cpg CPG_MOD 623>; 2366 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2367 resets = <&cpg 623>; 2368 2369 renesas,fcp = <&fcpvd0>; 2370 }; 2371 2372 vspd1: vsp@fea28000 { 2373 compatible = "renesas,vsp2"; 2374 reg = <0 0xfea28000 0 0x5000>; 2375 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2376 clocks = <&cpg CPG_MOD 622>; 2377 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2378 resets = <&cpg 622>; 2379 2380 renesas,fcp = <&fcpvd1>; 2381 }; 2382 2383 fcpvb0: fcp@fe96f000 { 2384 compatible = "renesas,fcpv"; 2385 reg = <0 0xfe96f000 0 0x200>; 2386 clocks = <&cpg CPG_MOD 607>; 2387 power-domains = <&sysc R8A774B1_PD_A3VP>; 2388 resets = <&cpg 607>; 2389 }; 2390 2391 fcpvd0: fcp@fea27000 { 2392 compatible = "renesas,fcpv"; 2393 reg = <0 0xfea27000 0 0x200>; 2394 clocks = <&cpg CPG_MOD 603>; 2395 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2396 resets = <&cpg 603>; 2397 }; 2398 2399 fcpvd1: fcp@fea2f000 { 2400 compatible = "renesas,fcpv"; 2401 reg = <0 0xfea2f000 0 0x200>; 2402 clocks = <&cpg CPG_MOD 602>; 2403 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2404 resets = <&cpg 602>; 2405 }; 2406 2407 fcpvi0: fcp@fe9af000 { 2408 compatible = "renesas,fcpv"; 2409 reg = <0 0xfe9af000 0 0x200>; 2410 clocks = <&cpg CPG_MOD 611>; 2411 power-domains = <&sysc R8A774B1_PD_A3VP>; 2412 resets = <&cpg 611>; 2413 }; 2414 2415 csi20: csi2@fea80000 { 2416 compatible = "renesas,r8a774b1-csi2"; 2417 reg = <0 0xfea80000 0 0x10000>; 2418 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2419 clocks = <&cpg CPG_MOD 714>; 2420 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2421 resets = <&cpg 714>; 2422 status = "disabled"; 2423 2424 ports { 2425 #address-cells = <1>; 2426 #size-cells = <0>; 2427 2428 port@0 { 2429 reg = <0>; 2430 }; 2431 2432 port@1 { 2433 #address-cells = <1>; 2434 #size-cells = <0>; 2435 2436 reg = <1>; 2437 2438 csi20vin0: endpoint@0 { 2439 reg = <0>; 2440 remote-endpoint = <&vin0csi20>; 2441 }; 2442 csi20vin1: endpoint@1 { 2443 reg = <1>; 2444 remote-endpoint = <&vin1csi20>; 2445 }; 2446 csi20vin2: endpoint@2 { 2447 reg = <2>; 2448 remote-endpoint = <&vin2csi20>; 2449 }; 2450 csi20vin3: endpoint@3 { 2451 reg = <3>; 2452 remote-endpoint = <&vin3csi20>; 2453 }; 2454 csi20vin4: endpoint@4 { 2455 reg = <4>; 2456 remote-endpoint = <&vin4csi20>; 2457 }; 2458 csi20vin5: endpoint@5 { 2459 reg = <5>; 2460 remote-endpoint = <&vin5csi20>; 2461 }; 2462 csi20vin6: endpoint@6 { 2463 reg = <6>; 2464 remote-endpoint = <&vin6csi20>; 2465 }; 2466 csi20vin7: endpoint@7 { 2467 reg = <7>; 2468 remote-endpoint = <&vin7csi20>; 2469 }; 2470 }; 2471 }; 2472 }; 2473 2474 csi40: csi2@feaa0000 { 2475 compatible = "renesas,r8a774b1-csi2"; 2476 reg = <0 0xfeaa0000 0 0x10000>; 2477 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2478 clocks = <&cpg CPG_MOD 716>; 2479 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2480 resets = <&cpg 716>; 2481 status = "disabled"; 2482 2483 ports { 2484 #address-cells = <1>; 2485 #size-cells = <0>; 2486 2487 port@0 { 2488 reg = <0>; 2489 }; 2490 2491 port@1 { 2492 #address-cells = <1>; 2493 #size-cells = <0>; 2494 2495 reg = <1>; 2496 2497 csi40vin0: endpoint@0 { 2498 reg = <0>; 2499 remote-endpoint = <&vin0csi40>; 2500 }; 2501 csi40vin1: endpoint@1 { 2502 reg = <1>; 2503 remote-endpoint = <&vin1csi40>; 2504 }; 2505 csi40vin2: endpoint@2 { 2506 reg = <2>; 2507 remote-endpoint = <&vin2csi40>; 2508 }; 2509 csi40vin3: endpoint@3 { 2510 reg = <3>; 2511 remote-endpoint = <&vin3csi40>; 2512 }; 2513 csi40vin4: endpoint@4 { 2514 reg = <4>; 2515 remote-endpoint = <&vin4csi40>; 2516 }; 2517 csi40vin5: endpoint@5 { 2518 reg = <5>; 2519 remote-endpoint = <&vin5csi40>; 2520 }; 2521 csi40vin6: endpoint@6 { 2522 reg = <6>; 2523 remote-endpoint = <&vin6csi40>; 2524 }; 2525 csi40vin7: endpoint@7 { 2526 reg = <7>; 2527 remote-endpoint = <&vin7csi40>; 2528 }; 2529 }; 2530 }; 2531 }; 2532 2533 hdmi0: hdmi@fead0000 { 2534 compatible = "renesas,r8a774b1-hdmi", 2535 "renesas,rcar-gen3-hdmi"; 2536 reg = <0 0xfead0000 0 0x10000>; 2537 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2538 clocks = <&cpg CPG_MOD 729>, 2539 <&cpg CPG_CORE R8A774B1_CLK_HDMI>; 2540 clock-names = "iahb", "isfr"; 2541 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2542 resets = <&cpg 729>; 2543 status = "disabled"; 2544 2545 ports { 2546 #address-cells = <1>; 2547 #size-cells = <0>; 2548 2549 port@0 { 2550 reg = <0>; 2551 dw_hdmi0_in: endpoint { 2552 remote-endpoint = <&du_out_hdmi0>; 2553 }; 2554 }; 2555 port@1 { 2556 reg = <1>; 2557 }; 2558 port@2 { 2559 /* HDMI sound */ 2560 reg = <2>; 2561 }; 2562 }; 2563 }; 2564 2565 du: display@feb00000 { 2566 compatible = "renesas,du-r8a774b1"; 2567 reg = <0 0xfeb00000 0 0x80000>; 2568 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2569 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2570 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2571 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2572 <&cpg CPG_MOD 721>; 2573 clock-names = "du.0", "du.1", "du.3"; 2574 resets = <&cpg 724>, <&cpg 722>; 2575 reset-names = "du.0", "du.3"; 2576 status = "disabled"; 2577 2578 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2579 2580 ports { 2581 #address-cells = <1>; 2582 #size-cells = <0>; 2583 2584 port@0 { 2585 reg = <0>; 2586 du_out_rgb: endpoint { 2587 }; 2588 }; 2589 port@1 { 2590 reg = <1>; 2591 du_out_hdmi0: endpoint { 2592 remote-endpoint = <&dw_hdmi0_in>; 2593 }; 2594 }; 2595 port@2 { 2596 reg = <2>; 2597 du_out_lvds0: endpoint { 2598 remote-endpoint = <&lvds0_in>; 2599 }; 2600 }; 2601 }; 2602 }; 2603 2604 lvds0: lvds@feb90000 { 2605 compatible = "renesas,r8a774b1-lvds"; 2606 reg = <0 0xfeb90000 0 0x14>; 2607 clocks = <&cpg CPG_MOD 727>; 2608 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2609 resets = <&cpg 727>; 2610 status = "disabled"; 2611 2612 ports { 2613 #address-cells = <1>; 2614 #size-cells = <0>; 2615 2616 port@0 { 2617 reg = <0>; 2618 lvds0_in: endpoint { 2619 remote-endpoint = <&du_out_lvds0>; 2620 }; 2621 }; 2622 port@1 { 2623 reg = <1>; 2624 }; 2625 }; 2626 }; 2627 2628 prr: chipid@fff00044 { 2629 compatible = "renesas,prr"; 2630 reg = <0 0xfff00044 0 4>; 2631 }; 2632 }; 2633 2634 thermal-zones { 2635 sensor1_thermal: sensor1-thermal { 2636 polling-delay-passive = <250>; 2637 polling-delay = <1000>; 2638 thermal-sensors = <&tsc 0>; 2639 sustainable-power = <2439>; 2640 2641 trips { 2642 sensor1_crit: sensor1-crit { 2643 temperature = <120000>; 2644 hysteresis = <1000>; 2645 type = "critical"; 2646 }; 2647 }; 2648 }; 2649 2650 sensor2_thermal: sensor2-thermal { 2651 polling-delay-passive = <250>; 2652 polling-delay = <1000>; 2653 thermal-sensors = <&tsc 1>; 2654 sustainable-power = <2439>; 2655 2656 trips { 2657 sensor2_crit: sensor2-crit { 2658 temperature = <120000>; 2659 hysteresis = <1000>; 2660 type = "critical"; 2661 }; 2662 }; 2663 }; 2664 2665 sensor3_thermal: sensor3-thermal { 2666 polling-delay-passive = <250>; 2667 polling-delay = <1000>; 2668 thermal-sensors = <&tsc 2>; 2669 sustainable-power = <2439>; 2670 2671 cooling-maps { 2672 map0 { 2673 trip = <&target>; 2674 cooling-device = <&a57_0 0 2>; 2675 contribution = <1024>; 2676 }; 2677 }; 2678 trips { 2679 target: trip-point1 { 2680 temperature = <100000>; 2681 hysteresis = <1000>; 2682 type = "passive"; 2683 }; 2684 2685 sensor3_crit: sensor3-crit { 2686 temperature = <120000>; 2687 hysteresis = <1000>; 2688 type = "critical"; 2689 }; 2690 }; 2691 }; 2692 }; 2693 2694 timer { 2695 compatible = "arm,armv8-timer"; 2696 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2697 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2698 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2699 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2700 }; 2701 2702 /* External USB clocks - can be overridden by the board */ 2703 usb3s0_clk: usb3s0 { 2704 compatible = "fixed-clock"; 2705 #clock-cells = <0>; 2706 clock-frequency = <0>; 2707 }; 2708 2709 usb_extal_clk: usb_extal { 2710 compatible = "fixed-clock"; 2711 #clock-cells = <0>; 2712 clock-frequency = <0>; 2713 }; 2714}; 2715