1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774b1 SoC 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a774b1-cpg-mssr.h> 11#include <dt-bindings/power/r8a774b1-sysc.h> 12 13/ { 14 compatible = "renesas,r8a774b1"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 /* 19 * The external audio clocks are configured as 0 Hz fixed frequency 20 * clocks by default. 21 * Boards that provide audio clocks should override them. 22 */ 23 audio_clk_a: audio_clk_a { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; 27 }; 28 29 audio_clk_b: audio_clk_b { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_c: audio_clk_c { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 /* External CAN clock - to be overridden by boards that provide it */ 42 can_clk: can { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 46 }; 47 48 cluster0_opp: opp-table-0 { 49 compatible = "operating-points-v2"; 50 opp-shared; 51 52 opp-500000000 { 53 opp-hz = /bits/ 64 <500000000>; 54 opp-microvolt = <830000>; 55 clock-latency-ns = <300000>; 56 }; 57 opp-1000000000 { 58 opp-hz = /bits/ 64 <1000000000>; 59 opp-microvolt = <830000>; 60 clock-latency-ns = <300000>; 61 }; 62 opp-1500000000 { 63 opp-hz = /bits/ 64 <1500000000>; 64 opp-microvolt = <830000>; 65 clock-latency-ns = <300000>; 66 opp-suspend; 67 }; 68 }; 69 70 cpus { 71 #address-cells = <1>; 72 #size-cells = <0>; 73 74 a57_0: cpu@0 { 75 compatible = "arm,cortex-a57"; 76 reg = <0x0>; 77 device_type = "cpu"; 78 power-domains = <&sysc R8A774B1_PD_CA57_CPU0>; 79 next-level-cache = <&L2_CA57>; 80 enable-method = "psci"; 81 #cooling-cells = <2>; 82 dynamic-power-coefficient = <854>; 83 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 84 operating-points-v2 = <&cluster0_opp>; 85 }; 86 87 a57_1: cpu@1 { 88 compatible = "arm,cortex-a57"; 89 reg = <0x1>; 90 device_type = "cpu"; 91 power-domains = <&sysc R8A774B1_PD_CA57_CPU1>; 92 next-level-cache = <&L2_CA57>; 93 enable-method = "psci"; 94 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 95 operating-points-v2 = <&cluster0_opp>; 96 }; 97 98 L2_CA57: cache-controller-0 { 99 compatible = "cache"; 100 power-domains = <&sysc R8A774B1_PD_CA57_SCU>; 101 cache-unified; 102 cache-level = <2>; 103 }; 104 }; 105 106 extal_clk: extal { 107 compatible = "fixed-clock"; 108 #clock-cells = <0>; 109 /* This value must be overridden by the board */ 110 clock-frequency = <0>; 111 }; 112 113 extalr_clk: extalr { 114 compatible = "fixed-clock"; 115 #clock-cells = <0>; 116 /* This value must be overridden by the board */ 117 clock-frequency = <0>; 118 }; 119 120 /* External PCIe clock - can be overridden by the board */ 121 pcie_bus_clk: pcie_bus { 122 compatible = "fixed-clock"; 123 #clock-cells = <0>; 124 clock-frequency = <0>; 125 }; 126 127 pmu_a57 { 128 compatible = "arm,cortex-a57-pmu"; 129 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 130 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 131 interrupt-affinity = <&a57_0>, <&a57_1>; 132 }; 133 134 psci { 135 compatible = "arm,psci-1.0", "arm,psci-0.2"; 136 method = "smc"; 137 }; 138 139 /* External SCIF clock - to be overridden by boards that provide it */ 140 scif_clk: scif { 141 compatible = "fixed-clock"; 142 #clock-cells = <0>; 143 clock-frequency = <0>; 144 }; 145 146 soc { 147 compatible = "simple-bus"; 148 interrupt-parent = <&gic>; 149 #address-cells = <2>; 150 #size-cells = <2>; 151 ranges; 152 153 rwdt: watchdog@e6020000 { 154 compatible = "renesas,r8a774b1-wdt", 155 "renesas,rcar-gen3-wdt"; 156 reg = <0 0xe6020000 0 0x0c>; 157 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 158 clocks = <&cpg CPG_MOD 402>; 159 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 160 resets = <&cpg 402>; 161 status = "disabled"; 162 }; 163 164 gpio0: gpio@e6050000 { 165 compatible = "renesas,gpio-r8a774b1", 166 "renesas,rcar-gen3-gpio"; 167 reg = <0 0xe6050000 0 0x50>; 168 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 169 #gpio-cells = <2>; 170 gpio-controller; 171 gpio-ranges = <&pfc 0 0 16>; 172 #interrupt-cells = <2>; 173 interrupt-controller; 174 clocks = <&cpg CPG_MOD 912>; 175 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 176 resets = <&cpg 912>; 177 }; 178 179 gpio1: gpio@e6051000 { 180 compatible = "renesas,gpio-r8a774b1", 181 "renesas,rcar-gen3-gpio"; 182 reg = <0 0xe6051000 0 0x50>; 183 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 184 #gpio-cells = <2>; 185 gpio-controller; 186 gpio-ranges = <&pfc 0 32 29>; 187 #interrupt-cells = <2>; 188 interrupt-controller; 189 clocks = <&cpg CPG_MOD 911>; 190 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 191 resets = <&cpg 911>; 192 }; 193 194 gpio2: gpio@e6052000 { 195 compatible = "renesas,gpio-r8a774b1", 196 "renesas,rcar-gen3-gpio"; 197 reg = <0 0xe6052000 0 0x50>; 198 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 199 #gpio-cells = <2>; 200 gpio-controller; 201 gpio-ranges = <&pfc 0 64 15>; 202 #interrupt-cells = <2>; 203 interrupt-controller; 204 clocks = <&cpg CPG_MOD 910>; 205 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 206 resets = <&cpg 910>; 207 }; 208 209 gpio3: gpio@e6053000 { 210 compatible = "renesas,gpio-r8a774b1", 211 "renesas,rcar-gen3-gpio"; 212 reg = <0 0xe6053000 0 0x50>; 213 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 214 #gpio-cells = <2>; 215 gpio-controller; 216 gpio-ranges = <&pfc 0 96 16>; 217 #interrupt-cells = <2>; 218 interrupt-controller; 219 clocks = <&cpg CPG_MOD 909>; 220 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 221 resets = <&cpg 909>; 222 }; 223 224 gpio4: gpio@e6054000 { 225 compatible = "renesas,gpio-r8a774b1", 226 "renesas,rcar-gen3-gpio"; 227 reg = <0 0xe6054000 0 0x50>; 228 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 229 #gpio-cells = <2>; 230 gpio-controller; 231 gpio-ranges = <&pfc 0 128 18>; 232 #interrupt-cells = <2>; 233 interrupt-controller; 234 clocks = <&cpg CPG_MOD 908>; 235 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 236 resets = <&cpg 908>; 237 }; 238 239 gpio5: gpio@e6055000 { 240 compatible = "renesas,gpio-r8a774b1", 241 "renesas,rcar-gen3-gpio"; 242 reg = <0 0xe6055000 0 0x50>; 243 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 244 #gpio-cells = <2>; 245 gpio-controller; 246 gpio-ranges = <&pfc 0 160 26>; 247 #interrupt-cells = <2>; 248 interrupt-controller; 249 clocks = <&cpg CPG_MOD 907>; 250 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 251 resets = <&cpg 907>; 252 }; 253 254 gpio6: gpio@e6055400 { 255 compatible = "renesas,gpio-r8a774b1", 256 "renesas,rcar-gen3-gpio"; 257 reg = <0 0xe6055400 0 0x50>; 258 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 259 #gpio-cells = <2>; 260 gpio-controller; 261 gpio-ranges = <&pfc 0 192 32>; 262 #interrupt-cells = <2>; 263 interrupt-controller; 264 clocks = <&cpg CPG_MOD 906>; 265 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 266 resets = <&cpg 906>; 267 }; 268 269 gpio7: gpio@e6055800 { 270 compatible = "renesas,gpio-r8a774b1", 271 "renesas,rcar-gen3-gpio"; 272 reg = <0 0xe6055800 0 0x50>; 273 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 274 #gpio-cells = <2>; 275 gpio-controller; 276 gpio-ranges = <&pfc 0 224 4>; 277 #interrupt-cells = <2>; 278 interrupt-controller; 279 clocks = <&cpg CPG_MOD 905>; 280 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 281 resets = <&cpg 905>; 282 }; 283 284 pfc: pinctrl@e6060000 { 285 compatible = "renesas,pfc-r8a774b1"; 286 reg = <0 0xe6060000 0 0x50c>; 287 }; 288 289 cmt0: timer@e60f0000 { 290 compatible = "renesas,r8a774b1-cmt0", 291 "renesas,rcar-gen3-cmt0"; 292 reg = <0 0xe60f0000 0 0x1004>; 293 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 295 clocks = <&cpg CPG_MOD 303>; 296 clock-names = "fck"; 297 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 298 resets = <&cpg 303>; 299 status = "disabled"; 300 }; 301 302 cmt1: timer@e6130000 { 303 compatible = "renesas,r8a774b1-cmt1", 304 "renesas,rcar-gen3-cmt1"; 305 reg = <0 0xe6130000 0 0x1004>; 306 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 307 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 308 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 309 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 314 clocks = <&cpg CPG_MOD 302>; 315 clock-names = "fck"; 316 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 317 resets = <&cpg 302>; 318 status = "disabled"; 319 }; 320 321 cmt2: timer@e6140000 { 322 compatible = "renesas,r8a774b1-cmt1", 323 "renesas,rcar-gen3-cmt1"; 324 reg = <0 0xe6140000 0 0x1004>; 325 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 326 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 327 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 328 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 333 clocks = <&cpg CPG_MOD 301>; 334 clock-names = "fck"; 335 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 336 resets = <&cpg 301>; 337 status = "disabled"; 338 }; 339 340 cmt3: timer@e6148000 { 341 compatible = "renesas,r8a774b1-cmt1", 342 "renesas,rcar-gen3-cmt1"; 343 reg = <0 0xe6148000 0 0x1004>; 344 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 345 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 347 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 300>; 353 clock-names = "fck"; 354 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 355 resets = <&cpg 300>; 356 status = "disabled"; 357 }; 358 359 cpg: clock-controller@e6150000 { 360 compatible = "renesas,r8a774b1-cpg-mssr"; 361 reg = <0 0xe6150000 0 0x1000>; 362 clocks = <&extal_clk>, <&extalr_clk>; 363 clock-names = "extal", "extalr"; 364 #clock-cells = <2>; 365 #power-domain-cells = <0>; 366 #reset-cells = <1>; 367 }; 368 369 rst: reset-controller@e6160000 { 370 compatible = "renesas,r8a774b1-rst"; 371 reg = <0 0xe6160000 0 0x0200>; 372 }; 373 374 sysc: system-controller@e6180000 { 375 compatible = "renesas,r8a774b1-sysc"; 376 reg = <0 0xe6180000 0 0x0400>; 377 #power-domain-cells = <1>; 378 }; 379 380 tsc: thermal@e6198000 { 381 compatible = "renesas,r8a774b1-thermal"; 382 reg = <0 0xe6198000 0 0x100>, 383 <0 0xe61a0000 0 0x100>, 384 <0 0xe61a8000 0 0x100>; 385 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 386 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 387 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 388 clocks = <&cpg CPG_MOD 522>; 389 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 390 resets = <&cpg 522>; 391 #thermal-sensor-cells = <1>; 392 }; 393 394 intc_ex: interrupt-controller@e61c0000 { 395 compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc"; 396 #interrupt-cells = <2>; 397 interrupt-controller; 398 reg = <0 0xe61c0000 0 0x200>; 399 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 400 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 401 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 402 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 403 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 404 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 405 clocks = <&cpg CPG_MOD 407>; 406 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 407 resets = <&cpg 407>; 408 }; 409 410 tmu0: timer@e61e0000 { 411 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 412 reg = <0 0xe61e0000 0 0x30>; 413 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 415 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 416 clocks = <&cpg CPG_MOD 125>; 417 clock-names = "fck"; 418 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 419 resets = <&cpg 125>; 420 status = "disabled"; 421 }; 422 423 tmu1: timer@e6fc0000 { 424 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 425 reg = <0 0xe6fc0000 0 0x30>; 426 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 427 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 428 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 429 clocks = <&cpg CPG_MOD 124>; 430 clock-names = "fck"; 431 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 432 resets = <&cpg 124>; 433 status = "disabled"; 434 }; 435 436 tmu2: timer@e6fd0000 { 437 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 438 reg = <0 0xe6fd0000 0 0x30>; 439 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 441 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; 442 clocks = <&cpg CPG_MOD 123>; 443 clock-names = "fck"; 444 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 445 resets = <&cpg 123>; 446 status = "disabled"; 447 }; 448 449 tmu3: timer@e6fe0000 { 450 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 451 reg = <0 0xe6fe0000 0 0x30>; 452 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 453 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 454 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 455 clocks = <&cpg CPG_MOD 122>; 456 clock-names = "fck"; 457 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 458 resets = <&cpg 122>; 459 status = "disabled"; 460 }; 461 462 tmu4: timer@ffc00000 { 463 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 464 reg = <0 0xffc00000 0 0x30>; 465 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 466 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 467 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 468 clocks = <&cpg CPG_MOD 121>; 469 clock-names = "fck"; 470 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 471 resets = <&cpg 121>; 472 status = "disabled"; 473 }; 474 475 i2c0: i2c@e6500000 { 476 #address-cells = <1>; 477 #size-cells = <0>; 478 compatible = "renesas,i2c-r8a774b1", 479 "renesas,rcar-gen3-i2c"; 480 reg = <0 0xe6500000 0 0x40>; 481 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 482 clocks = <&cpg CPG_MOD 931>; 483 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 484 resets = <&cpg 931>; 485 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 486 <&dmac2 0x91>, <&dmac2 0x90>; 487 dma-names = "tx", "rx", "tx", "rx"; 488 i2c-scl-internal-delay-ns = <110>; 489 status = "disabled"; 490 }; 491 492 i2c1: i2c@e6508000 { 493 #address-cells = <1>; 494 #size-cells = <0>; 495 compatible = "renesas,i2c-r8a774b1", 496 "renesas,rcar-gen3-i2c"; 497 reg = <0 0xe6508000 0 0x40>; 498 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 499 clocks = <&cpg CPG_MOD 930>; 500 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 501 resets = <&cpg 930>; 502 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 503 <&dmac2 0x93>, <&dmac2 0x92>; 504 dma-names = "tx", "rx", "tx", "rx"; 505 i2c-scl-internal-delay-ns = <6>; 506 status = "disabled"; 507 }; 508 509 i2c2: i2c@e6510000 { 510 #address-cells = <1>; 511 #size-cells = <0>; 512 compatible = "renesas,i2c-r8a774b1", 513 "renesas,rcar-gen3-i2c"; 514 reg = <0 0xe6510000 0 0x40>; 515 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 516 clocks = <&cpg CPG_MOD 929>; 517 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 518 resets = <&cpg 929>; 519 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 520 <&dmac2 0x95>, <&dmac2 0x94>; 521 dma-names = "tx", "rx", "tx", "rx"; 522 i2c-scl-internal-delay-ns = <6>; 523 status = "disabled"; 524 }; 525 526 i2c3: i2c@e66d0000 { 527 #address-cells = <1>; 528 #size-cells = <0>; 529 compatible = "renesas,i2c-r8a774b1", 530 "renesas,rcar-gen3-i2c"; 531 reg = <0 0xe66d0000 0 0x40>; 532 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 533 clocks = <&cpg CPG_MOD 928>; 534 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 535 resets = <&cpg 928>; 536 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 537 dma-names = "tx", "rx"; 538 i2c-scl-internal-delay-ns = <110>; 539 status = "disabled"; 540 }; 541 542 i2c4: i2c@e66d8000 { 543 #address-cells = <1>; 544 #size-cells = <0>; 545 compatible = "renesas,i2c-r8a774b1", 546 "renesas,rcar-gen3-i2c"; 547 reg = <0 0xe66d8000 0 0x40>; 548 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 549 clocks = <&cpg CPG_MOD 927>; 550 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 551 resets = <&cpg 927>; 552 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 553 dma-names = "tx", "rx"; 554 i2c-scl-internal-delay-ns = <110>; 555 status = "disabled"; 556 }; 557 558 i2c5: i2c@e66e0000 { 559 #address-cells = <1>; 560 #size-cells = <0>; 561 compatible = "renesas,i2c-r8a774b1", 562 "renesas,rcar-gen3-i2c"; 563 reg = <0 0xe66e0000 0 0x40>; 564 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 565 clocks = <&cpg CPG_MOD 919>; 566 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 567 resets = <&cpg 919>; 568 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 569 dma-names = "tx", "rx"; 570 i2c-scl-internal-delay-ns = <110>; 571 status = "disabled"; 572 }; 573 574 i2c6: i2c@e66e8000 { 575 #address-cells = <1>; 576 #size-cells = <0>; 577 compatible = "renesas,i2c-r8a774b1", 578 "renesas,rcar-gen3-i2c"; 579 reg = <0 0xe66e8000 0 0x40>; 580 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 581 clocks = <&cpg CPG_MOD 918>; 582 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 583 resets = <&cpg 918>; 584 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 585 dma-names = "tx", "rx"; 586 i2c-scl-internal-delay-ns = <6>; 587 status = "disabled"; 588 }; 589 590 iic_pmic: i2c@e60b0000 { 591 #address-cells = <1>; 592 #size-cells = <0>; 593 compatible = "renesas,iic-r8a774b1", 594 "renesas,rcar-gen3-iic", 595 "renesas,rmobile-iic"; 596 reg = <0 0xe60b0000 0 0x425>; 597 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 598 clocks = <&cpg CPG_MOD 926>; 599 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 600 resets = <&cpg 926>; 601 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 602 dma-names = "tx", "rx"; 603 status = "disabled"; 604 }; 605 606 hscif0: serial@e6540000 { 607 compatible = "renesas,hscif-r8a774b1", 608 "renesas,rcar-gen3-hscif", 609 "renesas,hscif"; 610 reg = <0 0xe6540000 0 0x60>; 611 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 520>, 613 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 614 <&scif_clk>; 615 clock-names = "fck", "brg_int", "scif_clk"; 616 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 617 <&dmac2 0x31>, <&dmac2 0x30>; 618 dma-names = "tx", "rx", "tx", "rx"; 619 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 620 resets = <&cpg 520>; 621 status = "disabled"; 622 }; 623 624 hscif1: serial@e6550000 { 625 compatible = "renesas,hscif-r8a774b1", 626 "renesas,rcar-gen3-hscif", 627 "renesas,hscif"; 628 reg = <0 0xe6550000 0 0x60>; 629 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 630 clocks = <&cpg CPG_MOD 519>, 631 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 632 <&scif_clk>; 633 clock-names = "fck", "brg_int", "scif_clk"; 634 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 635 <&dmac2 0x33>, <&dmac2 0x32>; 636 dma-names = "tx", "rx", "tx", "rx"; 637 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 638 resets = <&cpg 519>; 639 status = "disabled"; 640 }; 641 642 hscif2: serial@e6560000 { 643 compatible = "renesas,hscif-r8a774b1", 644 "renesas,rcar-gen3-hscif", 645 "renesas,hscif"; 646 reg = <0 0xe6560000 0 0x60>; 647 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 648 clocks = <&cpg CPG_MOD 518>, 649 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 650 <&scif_clk>; 651 clock-names = "fck", "brg_int", "scif_clk"; 652 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 653 <&dmac2 0x35>, <&dmac2 0x34>; 654 dma-names = "tx", "rx", "tx", "rx"; 655 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 656 resets = <&cpg 518>; 657 status = "disabled"; 658 }; 659 660 hscif3: serial@e66a0000 { 661 compatible = "renesas,hscif-r8a774b1", 662 "renesas,rcar-gen3-hscif", 663 "renesas,hscif"; 664 reg = <0 0xe66a0000 0 0x60>; 665 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 666 clocks = <&cpg CPG_MOD 517>, 667 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 668 <&scif_clk>; 669 clock-names = "fck", "brg_int", "scif_clk"; 670 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 671 dma-names = "tx", "rx"; 672 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 673 resets = <&cpg 517>; 674 status = "disabled"; 675 }; 676 677 hscif4: serial@e66b0000 { 678 compatible = "renesas,hscif-r8a774b1", 679 "renesas,rcar-gen3-hscif", 680 "renesas,hscif"; 681 reg = <0 0xe66b0000 0 0x60>; 682 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 683 clocks = <&cpg CPG_MOD 516>, 684 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 685 <&scif_clk>; 686 clock-names = "fck", "brg_int", "scif_clk"; 687 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 688 dma-names = "tx", "rx"; 689 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 690 resets = <&cpg 516>; 691 status = "disabled"; 692 }; 693 694 hsusb: usb@e6590000 { 695 compatible = "renesas,usbhs-r8a774b1", 696 "renesas,rcar-gen3-usbhs"; 697 reg = <0 0xe6590000 0 0x200>; 698 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 699 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 700 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 701 <&usb_dmac1 0>, <&usb_dmac1 1>; 702 dma-names = "ch0", "ch1", "ch2", "ch3"; 703 renesas,buswait = <11>; 704 phys = <&usb2_phy0 3>; 705 phy-names = "usb"; 706 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 707 resets = <&cpg 704>, <&cpg 703>; 708 status = "disabled"; 709 }; 710 711 usb2_clksel: clock-controller@e6590630 { 712 compatible = "renesas,r8a774b1-rcar-usb2-clock-sel", 713 "renesas,rcar-gen3-usb2-clock-sel"; 714 reg = <0 0xe6590630 0 0x02>; 715 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, 716 <&usb_extal_clk>, <&usb3s0_clk>; 717 clock-names = "ehci_ohci", "hs-usb-if", 718 "usb_extal", "usb_xtal"; 719 #clock-cells = <0>; 720 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 721 resets = <&cpg 703>, <&cpg 704>; 722 reset-names = "ehci_ohci", "hs-usb-if"; 723 status = "disabled"; 724 }; 725 726 usb_dmac0: dma-controller@e65a0000 { 727 compatible = "renesas,r8a774b1-usb-dmac", 728 "renesas,usb-dmac"; 729 reg = <0 0xe65a0000 0 0x100>; 730 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 731 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 732 interrupt-names = "ch0", "ch1"; 733 clocks = <&cpg CPG_MOD 330>; 734 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 735 resets = <&cpg 330>; 736 #dma-cells = <1>; 737 dma-channels = <2>; 738 }; 739 740 usb_dmac1: dma-controller@e65b0000 { 741 compatible = "renesas,r8a774b1-usb-dmac", 742 "renesas,usb-dmac"; 743 reg = <0 0xe65b0000 0 0x100>; 744 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 745 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 746 interrupt-names = "ch0", "ch1"; 747 clocks = <&cpg CPG_MOD 331>; 748 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 749 resets = <&cpg 331>; 750 #dma-cells = <1>; 751 dma-channels = <2>; 752 }; 753 754 usb3_phy0: usb-phy@e65ee000 { 755 compatible = "renesas,r8a774b1-usb3-phy", 756 "renesas,rcar-gen3-usb3-phy"; 757 reg = <0 0xe65ee000 0 0x90>; 758 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 759 <&usb_extal_clk>; 760 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 761 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 762 resets = <&cpg 328>; 763 #phy-cells = <0>; 764 status = "disabled"; 765 }; 766 767 dmac0: dma-controller@e6700000 { 768 compatible = "renesas,dmac-r8a774b1", 769 "renesas,rcar-dmac"; 770 reg = <0 0xe6700000 0 0x10000>; 771 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 772 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 773 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 774 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 775 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 776 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 777 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 778 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 779 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 788 interrupt-names = "error", 789 "ch0", "ch1", "ch2", "ch3", 790 "ch4", "ch5", "ch6", "ch7", 791 "ch8", "ch9", "ch10", "ch11", 792 "ch12", "ch13", "ch14", "ch15"; 793 clocks = <&cpg CPG_MOD 219>; 794 clock-names = "fck"; 795 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 796 resets = <&cpg 219>; 797 #dma-cells = <1>; 798 dma-channels = <16>; 799 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 800 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 801 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 802 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 803 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 804 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 805 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 806 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 807 }; 808 809 dmac1: dma-controller@e7300000 { 810 compatible = "renesas,dmac-r8a774b1", 811 "renesas,rcar-dmac"; 812 reg = <0 0xe7300000 0 0x10000>; 813 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 814 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 815 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 816 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 817 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 818 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 819 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 820 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 821 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 822 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 823 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 824 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 830 interrupt-names = "error", 831 "ch0", "ch1", "ch2", "ch3", 832 "ch4", "ch5", "ch6", "ch7", 833 "ch8", "ch9", "ch10", "ch11", 834 "ch12", "ch13", "ch14", "ch15"; 835 clocks = <&cpg CPG_MOD 218>; 836 clock-names = "fck"; 837 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 838 resets = <&cpg 218>; 839 #dma-cells = <1>; 840 dma-channels = <16>; 841 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 842 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 843 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 844 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 845 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 846 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 847 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 848 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 849 }; 850 851 dmac2: dma-controller@e7310000 { 852 compatible = "renesas,dmac-r8a774b1", 853 "renesas,rcar-dmac"; 854 reg = <0 0xe7310000 0 0x10000>; 855 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 856 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 857 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 858 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 859 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 860 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 861 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 862 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 863 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 864 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 865 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 866 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 867 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 868 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 869 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 872 interrupt-names = "error", 873 "ch0", "ch1", "ch2", "ch3", 874 "ch4", "ch5", "ch6", "ch7", 875 "ch8", "ch9", "ch10", "ch11", 876 "ch12", "ch13", "ch14", "ch15"; 877 clocks = <&cpg CPG_MOD 217>; 878 clock-names = "fck"; 879 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 880 resets = <&cpg 217>; 881 #dma-cells = <1>; 882 dma-channels = <16>; 883 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 884 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 885 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 886 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 887 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 888 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 889 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 890 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 891 }; 892 893 ipmmu_ds0: iommu@e6740000 { 894 compatible = "renesas,ipmmu-r8a774b1"; 895 reg = <0 0xe6740000 0 0x1000>; 896 renesas,ipmmu-main = <&ipmmu_mm 0>; 897 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 898 #iommu-cells = <1>; 899 }; 900 901 ipmmu_ds1: iommu@e7740000 { 902 compatible = "renesas,ipmmu-r8a774b1"; 903 reg = <0 0xe7740000 0 0x1000>; 904 renesas,ipmmu-main = <&ipmmu_mm 1>; 905 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 906 #iommu-cells = <1>; 907 }; 908 909 ipmmu_hc: iommu@e6570000 { 910 compatible = "renesas,ipmmu-r8a774b1"; 911 reg = <0 0xe6570000 0 0x1000>; 912 renesas,ipmmu-main = <&ipmmu_mm 2>; 913 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 914 #iommu-cells = <1>; 915 }; 916 917 ipmmu_mm: iommu@e67b0000 { 918 compatible = "renesas,ipmmu-r8a774b1"; 919 reg = <0 0xe67b0000 0 0x1000>; 920 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 921 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 922 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 923 #iommu-cells = <1>; 924 }; 925 926 ipmmu_mp: iommu@ec670000 { 927 compatible = "renesas,ipmmu-r8a774b1"; 928 reg = <0 0xec670000 0 0x1000>; 929 renesas,ipmmu-main = <&ipmmu_mm 4>; 930 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 931 #iommu-cells = <1>; 932 }; 933 934 ipmmu_pv0: iommu@fd800000 { 935 compatible = "renesas,ipmmu-r8a774b1"; 936 reg = <0 0xfd800000 0 0x1000>; 937 renesas,ipmmu-main = <&ipmmu_mm 6>; 938 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 939 #iommu-cells = <1>; 940 }; 941 942 ipmmu_vc0: iommu@fe6b0000 { 943 compatible = "renesas,ipmmu-r8a774b1"; 944 reg = <0 0xfe6b0000 0 0x1000>; 945 renesas,ipmmu-main = <&ipmmu_mm 12>; 946 power-domains = <&sysc R8A774B1_PD_A3VC>; 947 #iommu-cells = <1>; 948 }; 949 950 ipmmu_vi0: iommu@febd0000 { 951 compatible = "renesas,ipmmu-r8a774b1"; 952 reg = <0 0xfebd0000 0 0x1000>; 953 renesas,ipmmu-main = <&ipmmu_mm 14>; 954 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 955 #iommu-cells = <1>; 956 }; 957 958 ipmmu_vp0: iommu@fe990000 { 959 compatible = "renesas,ipmmu-r8a774b1"; 960 reg = <0 0xfe990000 0 0x1000>; 961 renesas,ipmmu-main = <&ipmmu_mm 16>; 962 power-domains = <&sysc R8A774B1_PD_A3VP>; 963 #iommu-cells = <1>; 964 }; 965 966 avb: ethernet@e6800000 { 967 compatible = "renesas,etheravb-r8a774b1", 968 "renesas,etheravb-rcar-gen3"; 969 reg = <0 0xe6800000 0 0x800>; 970 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 977 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 978 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 979 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 980 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 982 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 983 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 984 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 995 interrupt-names = "ch0", "ch1", "ch2", "ch3", 996 "ch4", "ch5", "ch6", "ch7", 997 "ch8", "ch9", "ch10", "ch11", 998 "ch12", "ch13", "ch14", "ch15", 999 "ch16", "ch17", "ch18", "ch19", 1000 "ch20", "ch21", "ch22", "ch23", 1001 "ch24"; 1002 clocks = <&cpg CPG_MOD 812>; 1003 clock-names = "fck"; 1004 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1005 resets = <&cpg 812>; 1006 phy-mode = "rgmii"; 1007 rx-internal-delay-ps = <0>; 1008 tx-internal-delay-ps = <0>; 1009 iommus = <&ipmmu_ds0 16>; 1010 #address-cells = <1>; 1011 #size-cells = <0>; 1012 status = "disabled"; 1013 }; 1014 1015 can0: can@e6c30000 { 1016 compatible = "renesas,can-r8a774b1", 1017 "renesas,rcar-gen3-can"; 1018 reg = <0 0xe6c30000 0 0x1000>; 1019 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1020 clocks = <&cpg CPG_MOD 916>, 1021 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1022 <&can_clk>; 1023 clock-names = "clkp1", "clkp2", "can_clk"; 1024 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1025 assigned-clock-rates = <40000000>; 1026 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1027 resets = <&cpg 916>; 1028 status = "disabled"; 1029 }; 1030 1031 can1: can@e6c38000 { 1032 compatible = "renesas,can-r8a774b1", 1033 "renesas,rcar-gen3-can"; 1034 reg = <0 0xe6c38000 0 0x1000>; 1035 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1036 clocks = <&cpg CPG_MOD 915>, 1037 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1038 <&can_clk>; 1039 clock-names = "clkp1", "clkp2", "can_clk"; 1040 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1041 assigned-clock-rates = <40000000>; 1042 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1043 resets = <&cpg 915>; 1044 status = "disabled"; 1045 }; 1046 1047 canfd: can@e66c0000 { 1048 compatible = "renesas,r8a774b1-canfd", 1049 "renesas,rcar-gen3-canfd"; 1050 reg = <0 0xe66c0000 0 0x8000>; 1051 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1052 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1053 interrupt-names = "ch_int", "g_int"; 1054 clocks = <&cpg CPG_MOD 914>, 1055 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1056 <&can_clk>; 1057 clock-names = "fck", "canfd", "can_clk"; 1058 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1059 assigned-clock-rates = <40000000>; 1060 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1061 resets = <&cpg 914>; 1062 status = "disabled"; 1063 1064 channel0 { 1065 status = "disabled"; 1066 }; 1067 1068 channel1 { 1069 status = "disabled"; 1070 }; 1071 }; 1072 1073 pwm0: pwm@e6e30000 { 1074 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1075 reg = <0 0xe6e30000 0 0x8>; 1076 #pwm-cells = <2>; 1077 clocks = <&cpg CPG_MOD 523>; 1078 resets = <&cpg 523>; 1079 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1080 status = "disabled"; 1081 }; 1082 1083 pwm1: pwm@e6e31000 { 1084 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1085 reg = <0 0xe6e31000 0 0x8>; 1086 #pwm-cells = <2>; 1087 clocks = <&cpg CPG_MOD 523>; 1088 resets = <&cpg 523>; 1089 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1090 status = "disabled"; 1091 }; 1092 1093 pwm2: pwm@e6e32000 { 1094 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1095 reg = <0 0xe6e32000 0 0x8>; 1096 #pwm-cells = <2>; 1097 clocks = <&cpg CPG_MOD 523>; 1098 resets = <&cpg 523>; 1099 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1100 status = "disabled"; 1101 }; 1102 1103 pwm3: pwm@e6e33000 { 1104 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1105 reg = <0 0xe6e33000 0 0x8>; 1106 #pwm-cells = <2>; 1107 clocks = <&cpg CPG_MOD 523>; 1108 resets = <&cpg 523>; 1109 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1110 status = "disabled"; 1111 }; 1112 1113 pwm4: pwm@e6e34000 { 1114 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1115 reg = <0 0xe6e34000 0 0x8>; 1116 #pwm-cells = <2>; 1117 clocks = <&cpg CPG_MOD 523>; 1118 resets = <&cpg 523>; 1119 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1120 status = "disabled"; 1121 }; 1122 1123 pwm5: pwm@e6e35000 { 1124 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1125 reg = <0 0xe6e35000 0 0x8>; 1126 #pwm-cells = <2>; 1127 clocks = <&cpg CPG_MOD 523>; 1128 resets = <&cpg 523>; 1129 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1130 status = "disabled"; 1131 }; 1132 1133 pwm6: pwm@e6e36000 { 1134 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1135 reg = <0 0xe6e36000 0 0x8>; 1136 #pwm-cells = <2>; 1137 clocks = <&cpg CPG_MOD 523>; 1138 resets = <&cpg 523>; 1139 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1140 status = "disabled"; 1141 }; 1142 1143 scif0: serial@e6e60000 { 1144 compatible = "renesas,scif-r8a774b1", 1145 "renesas,rcar-gen3-scif", "renesas,scif"; 1146 reg = <0 0xe6e60000 0 0x40>; 1147 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1148 clocks = <&cpg CPG_MOD 207>, 1149 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1150 <&scif_clk>; 1151 clock-names = "fck", "brg_int", "scif_clk"; 1152 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1153 <&dmac2 0x51>, <&dmac2 0x50>; 1154 dma-names = "tx", "rx", "tx", "rx"; 1155 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1156 resets = <&cpg 207>; 1157 status = "disabled"; 1158 }; 1159 1160 scif1: serial@e6e68000 { 1161 compatible = "renesas,scif-r8a774b1", 1162 "renesas,rcar-gen3-scif", "renesas,scif"; 1163 reg = <0 0xe6e68000 0 0x40>; 1164 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1165 clocks = <&cpg CPG_MOD 206>, 1166 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1167 <&scif_clk>; 1168 clock-names = "fck", "brg_int", "scif_clk"; 1169 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1170 <&dmac2 0x53>, <&dmac2 0x52>; 1171 dma-names = "tx", "rx", "tx", "rx"; 1172 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1173 resets = <&cpg 206>; 1174 status = "disabled"; 1175 }; 1176 1177 scif2: serial@e6e88000 { 1178 compatible = "renesas,scif-r8a774b1", 1179 "renesas,rcar-gen3-scif", "renesas,scif"; 1180 reg = <0 0xe6e88000 0 0x40>; 1181 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1182 clocks = <&cpg CPG_MOD 310>, 1183 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1184 <&scif_clk>; 1185 clock-names = "fck", "brg_int", "scif_clk"; 1186 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1187 <&dmac2 0x13>, <&dmac2 0x12>; 1188 dma-names = "tx", "rx", "tx", "rx"; 1189 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1190 resets = <&cpg 310>; 1191 status = "disabled"; 1192 }; 1193 1194 scif3: serial@e6c50000 { 1195 compatible = "renesas,scif-r8a774b1", 1196 "renesas,rcar-gen3-scif", "renesas,scif"; 1197 reg = <0 0xe6c50000 0 0x40>; 1198 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1199 clocks = <&cpg CPG_MOD 204>, 1200 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1201 <&scif_clk>; 1202 clock-names = "fck", "brg_int", "scif_clk"; 1203 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1204 dma-names = "tx", "rx"; 1205 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1206 resets = <&cpg 204>; 1207 status = "disabled"; 1208 }; 1209 1210 scif4: serial@e6c40000 { 1211 compatible = "renesas,scif-r8a774b1", 1212 "renesas,rcar-gen3-scif", "renesas,scif"; 1213 reg = <0 0xe6c40000 0 0x40>; 1214 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1215 clocks = <&cpg CPG_MOD 203>, 1216 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1217 <&scif_clk>; 1218 clock-names = "fck", "brg_int", "scif_clk"; 1219 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1220 dma-names = "tx", "rx"; 1221 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1222 resets = <&cpg 203>; 1223 status = "disabled"; 1224 }; 1225 1226 scif5: serial@e6f30000 { 1227 compatible = "renesas,scif-r8a774b1", 1228 "renesas,rcar-gen3-scif", "renesas,scif"; 1229 reg = <0 0xe6f30000 0 0x40>; 1230 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1231 clocks = <&cpg CPG_MOD 202>, 1232 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1233 <&scif_clk>; 1234 clock-names = "fck", "brg_int", "scif_clk"; 1235 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1236 <&dmac2 0x5b>, <&dmac2 0x5a>; 1237 dma-names = "tx", "rx", "tx", "rx"; 1238 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1239 resets = <&cpg 202>; 1240 status = "disabled"; 1241 }; 1242 1243 msiof0: spi@e6e90000 { 1244 compatible = "renesas,msiof-r8a774b1", 1245 "renesas,rcar-gen3-msiof"; 1246 reg = <0 0xe6e90000 0 0x0064>; 1247 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1248 clocks = <&cpg CPG_MOD 211>; 1249 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1250 <&dmac2 0x41>, <&dmac2 0x40>; 1251 dma-names = "tx", "rx", "tx", "rx"; 1252 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1253 resets = <&cpg 211>; 1254 #address-cells = <1>; 1255 #size-cells = <0>; 1256 status = "disabled"; 1257 }; 1258 1259 msiof1: spi@e6ea0000 { 1260 compatible = "renesas,msiof-r8a774b1", 1261 "renesas,rcar-gen3-msiof"; 1262 reg = <0 0xe6ea0000 0 0x0064>; 1263 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1264 clocks = <&cpg CPG_MOD 210>; 1265 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1266 <&dmac2 0x43>, <&dmac2 0x42>; 1267 dma-names = "tx", "rx", "tx", "rx"; 1268 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1269 resets = <&cpg 210>; 1270 #address-cells = <1>; 1271 #size-cells = <0>; 1272 status = "disabled"; 1273 }; 1274 1275 msiof2: spi@e6c00000 { 1276 compatible = "renesas,msiof-r8a774b1", 1277 "renesas,rcar-gen3-msiof"; 1278 reg = <0 0xe6c00000 0 0x0064>; 1279 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1280 clocks = <&cpg CPG_MOD 209>; 1281 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1282 dma-names = "tx", "rx"; 1283 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1284 resets = <&cpg 209>; 1285 #address-cells = <1>; 1286 #size-cells = <0>; 1287 status = "disabled"; 1288 }; 1289 1290 msiof3: spi@e6c10000 { 1291 compatible = "renesas,msiof-r8a774b1", 1292 "renesas,rcar-gen3-msiof"; 1293 reg = <0 0xe6c10000 0 0x0064>; 1294 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1295 clocks = <&cpg CPG_MOD 208>; 1296 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1297 dma-names = "tx", "rx"; 1298 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1299 resets = <&cpg 208>; 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 status = "disabled"; 1303 }; 1304 1305 vin0: video@e6ef0000 { 1306 compatible = "renesas,vin-r8a774b1"; 1307 reg = <0 0xe6ef0000 0 0x1000>; 1308 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1309 clocks = <&cpg CPG_MOD 811>; 1310 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1311 resets = <&cpg 811>; 1312 renesas,id = <0>; 1313 status = "disabled"; 1314 1315 ports { 1316 #address-cells = <1>; 1317 #size-cells = <0>; 1318 1319 port@1 { 1320 #address-cells = <1>; 1321 #size-cells = <0>; 1322 1323 reg = <1>; 1324 1325 vin0csi20: endpoint@0 { 1326 reg = <0>; 1327 remote-endpoint = <&csi20vin0>; 1328 }; 1329 vin0csi40: endpoint@2 { 1330 reg = <2>; 1331 remote-endpoint = <&csi40vin0>; 1332 }; 1333 }; 1334 }; 1335 }; 1336 1337 vin1: video@e6ef1000 { 1338 compatible = "renesas,vin-r8a774b1"; 1339 reg = <0 0xe6ef1000 0 0x1000>; 1340 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1341 clocks = <&cpg CPG_MOD 810>; 1342 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1343 resets = <&cpg 810>; 1344 renesas,id = <1>; 1345 status = "disabled"; 1346 1347 ports { 1348 #address-cells = <1>; 1349 #size-cells = <0>; 1350 1351 port@1 { 1352 #address-cells = <1>; 1353 #size-cells = <0>; 1354 1355 reg = <1>; 1356 1357 vin1csi20: endpoint@0 { 1358 reg = <0>; 1359 remote-endpoint = <&csi20vin1>; 1360 }; 1361 vin1csi40: endpoint@2 { 1362 reg = <2>; 1363 remote-endpoint = <&csi40vin1>; 1364 }; 1365 }; 1366 }; 1367 }; 1368 1369 vin2: video@e6ef2000 { 1370 compatible = "renesas,vin-r8a774b1"; 1371 reg = <0 0xe6ef2000 0 0x1000>; 1372 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1373 clocks = <&cpg CPG_MOD 809>; 1374 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1375 resets = <&cpg 809>; 1376 renesas,id = <2>; 1377 status = "disabled"; 1378 1379 ports { 1380 #address-cells = <1>; 1381 #size-cells = <0>; 1382 1383 port@1 { 1384 #address-cells = <1>; 1385 #size-cells = <0>; 1386 1387 reg = <1>; 1388 1389 vin2csi20: endpoint@0 { 1390 reg = <0>; 1391 remote-endpoint = <&csi20vin2>; 1392 }; 1393 vin2csi40: endpoint@2 { 1394 reg = <2>; 1395 remote-endpoint = <&csi40vin2>; 1396 }; 1397 }; 1398 }; 1399 }; 1400 1401 vin3: video@e6ef3000 { 1402 compatible = "renesas,vin-r8a774b1"; 1403 reg = <0 0xe6ef3000 0 0x1000>; 1404 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1405 clocks = <&cpg CPG_MOD 808>; 1406 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1407 resets = <&cpg 808>; 1408 renesas,id = <3>; 1409 status = "disabled"; 1410 1411 ports { 1412 #address-cells = <1>; 1413 #size-cells = <0>; 1414 1415 port@1 { 1416 #address-cells = <1>; 1417 #size-cells = <0>; 1418 1419 reg = <1>; 1420 1421 vin3csi20: endpoint@0 { 1422 reg = <0>; 1423 remote-endpoint = <&csi20vin3>; 1424 }; 1425 vin3csi40: endpoint@2 { 1426 reg = <2>; 1427 remote-endpoint = <&csi40vin3>; 1428 }; 1429 }; 1430 }; 1431 }; 1432 1433 vin4: video@e6ef4000 { 1434 compatible = "renesas,vin-r8a774b1"; 1435 reg = <0 0xe6ef4000 0 0x1000>; 1436 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1437 clocks = <&cpg CPG_MOD 807>; 1438 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1439 resets = <&cpg 807>; 1440 renesas,id = <4>; 1441 status = "disabled"; 1442 1443 ports { 1444 #address-cells = <1>; 1445 #size-cells = <0>; 1446 1447 port@1 { 1448 #address-cells = <1>; 1449 #size-cells = <0>; 1450 1451 reg = <1>; 1452 1453 vin4csi20: endpoint@0 { 1454 reg = <0>; 1455 remote-endpoint = <&csi20vin4>; 1456 }; 1457 vin4csi40: endpoint@2 { 1458 reg = <2>; 1459 remote-endpoint = <&csi40vin4>; 1460 }; 1461 }; 1462 }; 1463 }; 1464 1465 vin5: video@e6ef5000 { 1466 compatible = "renesas,vin-r8a774b1"; 1467 reg = <0 0xe6ef5000 0 0x1000>; 1468 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1469 clocks = <&cpg CPG_MOD 806>; 1470 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1471 resets = <&cpg 806>; 1472 renesas,id = <5>; 1473 status = "disabled"; 1474 1475 ports { 1476 #address-cells = <1>; 1477 #size-cells = <0>; 1478 1479 port@1 { 1480 #address-cells = <1>; 1481 #size-cells = <0>; 1482 1483 reg = <1>; 1484 1485 vin5csi20: endpoint@0 { 1486 reg = <0>; 1487 remote-endpoint = <&csi20vin5>; 1488 }; 1489 vin5csi40: endpoint@2 { 1490 reg = <2>; 1491 remote-endpoint = <&csi40vin5>; 1492 }; 1493 }; 1494 }; 1495 }; 1496 1497 vin6: video@e6ef6000 { 1498 compatible = "renesas,vin-r8a774b1"; 1499 reg = <0 0xe6ef6000 0 0x1000>; 1500 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1501 clocks = <&cpg CPG_MOD 805>; 1502 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1503 resets = <&cpg 805>; 1504 renesas,id = <6>; 1505 status = "disabled"; 1506 1507 ports { 1508 #address-cells = <1>; 1509 #size-cells = <0>; 1510 1511 port@1 { 1512 #address-cells = <1>; 1513 #size-cells = <0>; 1514 1515 reg = <1>; 1516 1517 vin6csi20: endpoint@0 { 1518 reg = <0>; 1519 remote-endpoint = <&csi20vin6>; 1520 }; 1521 vin6csi40: endpoint@2 { 1522 reg = <2>; 1523 remote-endpoint = <&csi40vin6>; 1524 }; 1525 }; 1526 }; 1527 }; 1528 1529 vin7: video@e6ef7000 { 1530 compatible = "renesas,vin-r8a774b1"; 1531 reg = <0 0xe6ef7000 0 0x1000>; 1532 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1533 clocks = <&cpg CPG_MOD 804>; 1534 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1535 resets = <&cpg 804>; 1536 renesas,id = <7>; 1537 status = "disabled"; 1538 1539 ports { 1540 #address-cells = <1>; 1541 #size-cells = <0>; 1542 1543 port@1 { 1544 #address-cells = <1>; 1545 #size-cells = <0>; 1546 1547 reg = <1>; 1548 1549 vin7csi20: endpoint@0 { 1550 reg = <0>; 1551 remote-endpoint = <&csi20vin7>; 1552 }; 1553 vin7csi40: endpoint@2 { 1554 reg = <2>; 1555 remote-endpoint = <&csi40vin7>; 1556 }; 1557 }; 1558 }; 1559 }; 1560 1561 rcar_sound: sound@ec500000 { 1562 /* 1563 * #sound-dai-cells is required if simple-card 1564 * 1565 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1566 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1567 */ 1568 /* 1569 * #clock-cells is required for audio_clkout0/1/2/3 1570 * 1571 * clkout : #clock-cells = <0>; <&rcar_sound>; 1572 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1573 */ 1574 compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3"; 1575 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1576 <0 0xec5a0000 0 0x100>, /* ADG */ 1577 <0 0xec540000 0 0x1000>, /* SSIU */ 1578 <0 0xec541000 0 0x280>, /* SSI */ 1579 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1580 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1581 1582 clocks = <&cpg CPG_MOD 1005>, 1583 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1584 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1585 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1586 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1587 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1588 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1589 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1590 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1591 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1592 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1593 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1594 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1595 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1596 <&audio_clk_a>, <&audio_clk_b>, 1597 <&audio_clk_c>, 1598 <&cpg CPG_MOD 922>; 1599 clock-names = "ssi-all", 1600 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1601 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1602 "ssi.1", "ssi.0", 1603 "src.9", "src.8", "src.7", "src.6", 1604 "src.5", "src.4", "src.3", "src.2", 1605 "src.1", "src.0", 1606 "mix.1", "mix.0", 1607 "ctu.1", "ctu.0", 1608 "dvc.0", "dvc.1", 1609 "clk_a", "clk_b", "clk_c", "clk_i"; 1610 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1611 resets = <&cpg 1005>, 1612 <&cpg 1006>, <&cpg 1007>, 1613 <&cpg 1008>, <&cpg 1009>, 1614 <&cpg 1010>, <&cpg 1011>, 1615 <&cpg 1012>, <&cpg 1013>, 1616 <&cpg 1014>, <&cpg 1015>; 1617 reset-names = "ssi-all", 1618 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1619 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1620 "ssi.1", "ssi.0"; 1621 status = "disabled"; 1622 1623 rcar_sound,ctu { 1624 ctu00: ctu-0 { }; 1625 ctu01: ctu-1 { }; 1626 ctu02: ctu-2 { }; 1627 ctu03: ctu-3 { }; 1628 ctu10: ctu-4 { }; 1629 ctu11: ctu-5 { }; 1630 ctu12: ctu-6 { }; 1631 ctu13: ctu-7 { }; 1632 }; 1633 1634 rcar_sound,dvc { 1635 dvc0: dvc-0 { 1636 dmas = <&audma1 0xbc>; 1637 dma-names = "tx"; 1638 }; 1639 dvc1: dvc-1 { 1640 dmas = <&audma1 0xbe>; 1641 dma-names = "tx"; 1642 }; 1643 }; 1644 1645 rcar_sound,mix { 1646 mix0: mix-0 { }; 1647 mix1: mix-1 { }; 1648 }; 1649 1650 rcar_sound,src { 1651 src0: src-0 { 1652 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1653 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1654 dma-names = "rx", "tx"; 1655 }; 1656 src1: src-1 { 1657 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1658 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1659 dma-names = "rx", "tx"; 1660 }; 1661 src2: src-2 { 1662 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1663 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1664 dma-names = "rx", "tx"; 1665 }; 1666 src3: src-3 { 1667 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1668 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1669 dma-names = "rx", "tx"; 1670 }; 1671 src4: src-4 { 1672 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1673 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1674 dma-names = "rx", "tx"; 1675 }; 1676 src5: src-5 { 1677 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1678 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1679 dma-names = "rx", "tx"; 1680 }; 1681 src6: src-6 { 1682 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1683 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1684 dma-names = "rx", "tx"; 1685 }; 1686 src7: src-7 { 1687 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1688 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1689 dma-names = "rx", "tx"; 1690 }; 1691 src8: src-8 { 1692 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1693 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1694 dma-names = "rx", "tx"; 1695 }; 1696 src9: src-9 { 1697 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1698 dmas = <&audma0 0x97>, <&audma1 0xba>; 1699 dma-names = "rx", "tx"; 1700 }; 1701 }; 1702 1703 rcar_sound,ssi { 1704 ssi0: ssi-0 { 1705 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1706 dmas = <&audma0 0x01>, <&audma1 0x02>; 1707 dma-names = "rx", "tx"; 1708 }; 1709 ssi1: ssi-1 { 1710 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1711 dmas = <&audma0 0x03>, <&audma1 0x04>; 1712 dma-names = "rx", "tx"; 1713 }; 1714 ssi2: ssi-2 { 1715 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1716 dmas = <&audma0 0x05>, <&audma1 0x06>; 1717 dma-names = "rx", "tx"; 1718 }; 1719 ssi3: ssi-3 { 1720 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1721 dmas = <&audma0 0x07>, <&audma1 0x08>; 1722 dma-names = "rx", "tx"; 1723 }; 1724 ssi4: ssi-4 { 1725 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1726 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1727 dma-names = "rx", "tx"; 1728 }; 1729 ssi5: ssi-5 { 1730 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1731 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1732 dma-names = "rx", "tx"; 1733 }; 1734 ssi6: ssi-6 { 1735 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1736 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1737 dma-names = "rx", "tx"; 1738 }; 1739 ssi7: ssi-7 { 1740 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1741 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1742 dma-names = "rx", "tx"; 1743 }; 1744 ssi8: ssi-8 { 1745 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1746 dmas = <&audma0 0x11>, <&audma1 0x12>; 1747 dma-names = "rx", "tx"; 1748 }; 1749 ssi9: ssi-9 { 1750 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1751 dmas = <&audma0 0x13>, <&audma1 0x14>; 1752 dma-names = "rx", "tx"; 1753 }; 1754 }; 1755 1756 rcar_sound,ssiu { 1757 ssiu00: ssiu-0 { 1758 dmas = <&audma0 0x15>, <&audma1 0x16>; 1759 dma-names = "rx", "tx"; 1760 }; 1761 ssiu01: ssiu-1 { 1762 dmas = <&audma0 0x35>, <&audma1 0x36>; 1763 dma-names = "rx", "tx"; 1764 }; 1765 ssiu02: ssiu-2 { 1766 dmas = <&audma0 0x37>, <&audma1 0x38>; 1767 dma-names = "rx", "tx"; 1768 }; 1769 ssiu03: ssiu-3 { 1770 dmas = <&audma0 0x47>, <&audma1 0x48>; 1771 dma-names = "rx", "tx"; 1772 }; 1773 ssiu04: ssiu-4 { 1774 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1775 dma-names = "rx", "tx"; 1776 }; 1777 ssiu05: ssiu-5 { 1778 dmas = <&audma0 0x43>, <&audma1 0x44>; 1779 dma-names = "rx", "tx"; 1780 }; 1781 ssiu06: ssiu-6 { 1782 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1783 dma-names = "rx", "tx"; 1784 }; 1785 ssiu07: ssiu-7 { 1786 dmas = <&audma0 0x53>, <&audma1 0x54>; 1787 dma-names = "rx", "tx"; 1788 }; 1789 ssiu10: ssiu-8 { 1790 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1791 dma-names = "rx", "tx"; 1792 }; 1793 ssiu11: ssiu-9 { 1794 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1795 dma-names = "rx", "tx"; 1796 }; 1797 ssiu12: ssiu-10 { 1798 dmas = <&audma0 0x57>, <&audma1 0x58>; 1799 dma-names = "rx", "tx"; 1800 }; 1801 ssiu13: ssiu-11 { 1802 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1803 dma-names = "rx", "tx"; 1804 }; 1805 ssiu14: ssiu-12 { 1806 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1807 dma-names = "rx", "tx"; 1808 }; 1809 ssiu15: ssiu-13 { 1810 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1811 dma-names = "rx", "tx"; 1812 }; 1813 ssiu16: ssiu-14 { 1814 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1815 dma-names = "rx", "tx"; 1816 }; 1817 ssiu17: ssiu-15 { 1818 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1819 dma-names = "rx", "tx"; 1820 }; 1821 ssiu20: ssiu-16 { 1822 dmas = <&audma0 0x63>, <&audma1 0x64>; 1823 dma-names = "rx", "tx"; 1824 }; 1825 ssiu21: ssiu-17 { 1826 dmas = <&audma0 0x67>, <&audma1 0x68>; 1827 dma-names = "rx", "tx"; 1828 }; 1829 ssiu22: ssiu-18 { 1830 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1831 dma-names = "rx", "tx"; 1832 }; 1833 ssiu23: ssiu-19 { 1834 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1835 dma-names = "rx", "tx"; 1836 }; 1837 ssiu24: ssiu-20 { 1838 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1839 dma-names = "rx", "tx"; 1840 }; 1841 ssiu25: ssiu-21 { 1842 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1843 dma-names = "rx", "tx"; 1844 }; 1845 ssiu26: ssiu-22 { 1846 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1847 dma-names = "rx", "tx"; 1848 }; 1849 ssiu27: ssiu-23 { 1850 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1851 dma-names = "rx", "tx"; 1852 }; 1853 ssiu30: ssiu-24 { 1854 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1855 dma-names = "rx", "tx"; 1856 }; 1857 ssiu31: ssiu-25 { 1858 dmas = <&audma0 0x21>, <&audma1 0x22>; 1859 dma-names = "rx", "tx"; 1860 }; 1861 ssiu32: ssiu-26 { 1862 dmas = <&audma0 0x23>, <&audma1 0x24>; 1863 dma-names = "rx", "tx"; 1864 }; 1865 ssiu33: ssiu-27 { 1866 dmas = <&audma0 0x25>, <&audma1 0x26>; 1867 dma-names = "rx", "tx"; 1868 }; 1869 ssiu34: ssiu-28 { 1870 dmas = <&audma0 0x27>, <&audma1 0x28>; 1871 dma-names = "rx", "tx"; 1872 }; 1873 ssiu35: ssiu-29 { 1874 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1875 dma-names = "rx", "tx"; 1876 }; 1877 ssiu36: ssiu-30 { 1878 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1879 dma-names = "rx", "tx"; 1880 }; 1881 ssiu37: ssiu-31 { 1882 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 1883 dma-names = "rx", "tx"; 1884 }; 1885 ssiu40: ssiu-32 { 1886 dmas = <&audma0 0x71>, <&audma1 0x72>; 1887 dma-names = "rx", "tx"; 1888 }; 1889 ssiu41: ssiu-33 { 1890 dmas = <&audma0 0x17>, <&audma1 0x18>; 1891 dma-names = "rx", "tx"; 1892 }; 1893 ssiu42: ssiu-34 { 1894 dmas = <&audma0 0x19>, <&audma1 0x1A>; 1895 dma-names = "rx", "tx"; 1896 }; 1897 ssiu43: ssiu-35 { 1898 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 1899 dma-names = "rx", "tx"; 1900 }; 1901 ssiu44: ssiu-36 { 1902 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 1903 dma-names = "rx", "tx"; 1904 }; 1905 ssiu45: ssiu-37 { 1906 dmas = <&audma0 0x1F>, <&audma1 0x20>; 1907 dma-names = "rx", "tx"; 1908 }; 1909 ssiu46: ssiu-38 { 1910 dmas = <&audma0 0x31>, <&audma1 0x32>; 1911 dma-names = "rx", "tx"; 1912 }; 1913 ssiu47: ssiu-39 { 1914 dmas = <&audma0 0x33>, <&audma1 0x34>; 1915 dma-names = "rx", "tx"; 1916 }; 1917 ssiu50: ssiu-40 { 1918 dmas = <&audma0 0x73>, <&audma1 0x74>; 1919 dma-names = "rx", "tx"; 1920 }; 1921 ssiu60: ssiu-41 { 1922 dmas = <&audma0 0x75>, <&audma1 0x76>; 1923 dma-names = "rx", "tx"; 1924 }; 1925 ssiu70: ssiu-42 { 1926 dmas = <&audma0 0x79>, <&audma1 0x7a>; 1927 dma-names = "rx", "tx"; 1928 }; 1929 ssiu80: ssiu-43 { 1930 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 1931 dma-names = "rx", "tx"; 1932 }; 1933 ssiu90: ssiu-44 { 1934 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 1935 dma-names = "rx", "tx"; 1936 }; 1937 ssiu91: ssiu-45 { 1938 dmas = <&audma0 0x7F>, <&audma1 0x80>; 1939 dma-names = "rx", "tx"; 1940 }; 1941 ssiu92: ssiu-46 { 1942 dmas = <&audma0 0x81>, <&audma1 0x82>; 1943 dma-names = "rx", "tx"; 1944 }; 1945 ssiu93: ssiu-47 { 1946 dmas = <&audma0 0x83>, <&audma1 0x84>; 1947 dma-names = "rx", "tx"; 1948 }; 1949 ssiu94: ssiu-48 { 1950 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 1951 dma-names = "rx", "tx"; 1952 }; 1953 ssiu95: ssiu-49 { 1954 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 1955 dma-names = "rx", "tx"; 1956 }; 1957 ssiu96: ssiu-50 { 1958 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 1959 dma-names = "rx", "tx"; 1960 }; 1961 ssiu97: ssiu-51 { 1962 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 1963 dma-names = "rx", "tx"; 1964 }; 1965 }; 1966 }; 1967 1968 audma0: dma-controller@ec700000 { 1969 compatible = "renesas,dmac-r8a774b1", 1970 "renesas,rcar-dmac"; 1971 reg = <0 0xec700000 0 0x10000>; 1972 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1973 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1974 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1975 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1976 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1977 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1978 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1979 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1980 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1981 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1982 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1983 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1984 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1985 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1986 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1987 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1988 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1989 interrupt-names = "error", 1990 "ch0", "ch1", "ch2", "ch3", 1991 "ch4", "ch5", "ch6", "ch7", 1992 "ch8", "ch9", "ch10", "ch11", 1993 "ch12", "ch13", "ch14", "ch15"; 1994 clocks = <&cpg CPG_MOD 502>; 1995 clock-names = "fck"; 1996 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1997 resets = <&cpg 502>; 1998 #dma-cells = <1>; 1999 dma-channels = <16>; 2000 }; 2001 2002 audma1: dma-controller@ec720000 { 2003 compatible = "renesas,dmac-r8a774b1", 2004 "renesas,rcar-dmac"; 2005 reg = <0 0xec720000 0 0x10000>; 2006 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2007 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2008 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2009 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2010 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2011 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2012 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2013 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2014 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2015 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2016 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2017 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2018 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2019 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2020 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2021 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2022 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2023 interrupt-names = "error", 2024 "ch0", "ch1", "ch2", "ch3", 2025 "ch4", "ch5", "ch6", "ch7", 2026 "ch8", "ch9", "ch10", "ch11", 2027 "ch12", "ch13", "ch14", "ch15"; 2028 clocks = <&cpg CPG_MOD 501>; 2029 clock-names = "fck"; 2030 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2031 resets = <&cpg 501>; 2032 #dma-cells = <1>; 2033 dma-channels = <16>; 2034 }; 2035 2036 xhci0: usb@ee000000 { 2037 compatible = "renesas,xhci-r8a774b1", 2038 "renesas,rcar-gen3-xhci"; 2039 reg = <0 0xee000000 0 0xc00>; 2040 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2041 clocks = <&cpg CPG_MOD 328>; 2042 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2043 resets = <&cpg 328>; 2044 status = "disabled"; 2045 }; 2046 2047 usb3_peri0: usb@ee020000 { 2048 compatible = "renesas,r8a774b1-usb3-peri", 2049 "renesas,rcar-gen3-usb3-peri"; 2050 reg = <0 0xee020000 0 0x400>; 2051 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2052 clocks = <&cpg CPG_MOD 328>; 2053 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2054 resets = <&cpg 328>; 2055 status = "disabled"; 2056 }; 2057 2058 ohci0: usb@ee080000 { 2059 compatible = "generic-ohci"; 2060 reg = <0 0xee080000 0 0x100>; 2061 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2062 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2063 phys = <&usb2_phy0 1>; 2064 phy-names = "usb"; 2065 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2066 resets = <&cpg 703>, <&cpg 704>; 2067 status = "disabled"; 2068 }; 2069 2070 ohci1: usb@ee0a0000 { 2071 compatible = "generic-ohci"; 2072 reg = <0 0xee0a0000 0 0x100>; 2073 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2074 clocks = <&cpg CPG_MOD 702>; 2075 phys = <&usb2_phy1 1>; 2076 phy-names = "usb"; 2077 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2078 resets = <&cpg 702>; 2079 status = "disabled"; 2080 }; 2081 2082 ehci0: usb@ee080100 { 2083 compatible = "generic-ehci"; 2084 reg = <0 0xee080100 0 0x100>; 2085 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2086 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2087 phys = <&usb2_phy0 2>; 2088 phy-names = "usb"; 2089 companion = <&ohci0>; 2090 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2091 resets = <&cpg 703>, <&cpg 704>; 2092 status = "disabled"; 2093 }; 2094 2095 ehci1: usb@ee0a0100 { 2096 compatible = "generic-ehci"; 2097 reg = <0 0xee0a0100 0 0x100>; 2098 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2099 clocks = <&cpg CPG_MOD 702>; 2100 phys = <&usb2_phy1 2>; 2101 phy-names = "usb"; 2102 companion = <&ohci1>; 2103 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2104 resets = <&cpg 702>; 2105 status = "disabled"; 2106 }; 2107 2108 usb2_phy0: usb-phy@ee080200 { 2109 compatible = "renesas,usb2-phy-r8a774b1", 2110 "renesas,rcar-gen3-usb2-phy"; 2111 reg = <0 0xee080200 0 0x700>; 2112 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2113 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2114 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2115 resets = <&cpg 703>, <&cpg 704>; 2116 #phy-cells = <1>; 2117 status = "disabled"; 2118 }; 2119 2120 usb2_phy1: usb-phy@ee0a0200 { 2121 compatible = "renesas,usb2-phy-r8a774b1", 2122 "renesas,rcar-gen3-usb2-phy"; 2123 reg = <0 0xee0a0200 0 0x700>; 2124 clocks = <&cpg CPG_MOD 702>; 2125 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2126 resets = <&cpg 702>; 2127 #phy-cells = <1>; 2128 status = "disabled"; 2129 }; 2130 2131 sdhi0: mmc@ee100000 { 2132 compatible = "renesas,sdhi-r8a774b1", 2133 "renesas,rcar-gen3-sdhi"; 2134 reg = <0 0xee100000 0 0x2000>; 2135 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2136 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774B1_CLK_SD0H>; 2137 clock-names = "core", "clkh"; 2138 max-frequency = <200000000>; 2139 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2140 resets = <&cpg 314>; 2141 status = "disabled"; 2142 }; 2143 2144 sdhi1: mmc@ee120000 { 2145 compatible = "renesas,sdhi-r8a774b1", 2146 "renesas,rcar-gen3-sdhi"; 2147 reg = <0 0xee120000 0 0x2000>; 2148 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2149 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774B1_CLK_SD1H>; 2150 clock-names = "core", "clkh"; 2151 max-frequency = <200000000>; 2152 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2153 resets = <&cpg 313>; 2154 status = "disabled"; 2155 }; 2156 2157 sdhi2: mmc@ee140000 { 2158 compatible = "renesas,sdhi-r8a774b1", 2159 "renesas,rcar-gen3-sdhi"; 2160 reg = <0 0xee140000 0 0x2000>; 2161 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2162 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774B1_CLK_SD2H>; 2163 clock-names = "core", "clkh"; 2164 max-frequency = <200000000>; 2165 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2166 resets = <&cpg 312>; 2167 status = "disabled"; 2168 }; 2169 2170 sdhi3: mmc@ee160000 { 2171 compatible = "renesas,sdhi-r8a774b1", 2172 "renesas,rcar-gen3-sdhi"; 2173 reg = <0 0xee160000 0 0x2000>; 2174 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2175 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774B1_CLK_SD3H>; 2176 clock-names = "core", "clkh"; 2177 max-frequency = <200000000>; 2178 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2179 resets = <&cpg 311>; 2180 status = "disabled"; 2181 }; 2182 2183 rpc: spi@ee200000 { 2184 compatible = "renesas,r8a774b1-rpc-if", 2185 "renesas,rcar-gen3-rpc-if"; 2186 reg = <0 0xee200000 0 0x200>, 2187 <0 0x08000000 0 0x4000000>, 2188 <0 0xee208000 0 0x100>; 2189 reg-names = "regs", "dirmap", "wbuf"; 2190 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2191 clocks = <&cpg CPG_MOD 917>; 2192 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2193 resets = <&cpg 917>; 2194 #address-cells = <1>; 2195 #size-cells = <0>; 2196 status = "disabled"; 2197 }; 2198 2199 sata: sata@ee300000 { 2200 compatible = "renesas,sata-r8a774b1", 2201 "renesas,rcar-gen3-sata"; 2202 reg = <0 0xee300000 0 0x200000>; 2203 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2204 clocks = <&cpg CPG_MOD 815>; 2205 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2206 resets = <&cpg 815>; 2207 status = "disabled"; 2208 }; 2209 2210 gic: interrupt-controller@f1010000 { 2211 compatible = "arm,gic-400"; 2212 #interrupt-cells = <3>; 2213 #address-cells = <0>; 2214 interrupt-controller; 2215 reg = <0x0 0xf1010000 0 0x1000>, 2216 <0x0 0xf1020000 0 0x20000>, 2217 <0x0 0xf1040000 0 0x20000>, 2218 <0x0 0xf1060000 0 0x20000>; 2219 interrupts = <GIC_PPI 9 2220 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2221 clocks = <&cpg CPG_MOD 408>; 2222 clock-names = "clk"; 2223 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2224 resets = <&cpg 408>; 2225 }; 2226 2227 pciec0: pcie@fe000000 { 2228 compatible = "renesas,pcie-r8a774b1", 2229 "renesas,pcie-rcar-gen3"; 2230 reg = <0 0xfe000000 0 0x80000>; 2231 #address-cells = <3>; 2232 #size-cells = <2>; 2233 bus-range = <0x00 0xff>; 2234 device_type = "pci"; 2235 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2236 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2237 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2238 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2239 /* Map all possible DDR/IOMMU as inbound ranges */ 2240 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2241 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2242 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2243 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2244 #interrupt-cells = <1>; 2245 interrupt-map-mask = <0 0 0 0>; 2246 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2247 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2248 clock-names = "pcie", "pcie_bus"; 2249 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2250 resets = <&cpg 319>; 2251 iommu-map = <0 &ipmmu_hc 0 1>; 2252 iommu-map-mask = <0>; 2253 status = "disabled"; 2254 }; 2255 2256 pciec1: pcie@ee800000 { 2257 compatible = "renesas,pcie-r8a774b1", 2258 "renesas,pcie-rcar-gen3"; 2259 reg = <0 0xee800000 0 0x80000>; 2260 #address-cells = <3>; 2261 #size-cells = <2>; 2262 bus-range = <0x00 0xff>; 2263 device_type = "pci"; 2264 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2265 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2266 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2267 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2268 /* Map all possible DDR/IOMMU as inbound ranges */ 2269 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2270 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2271 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2272 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2273 #interrupt-cells = <1>; 2274 interrupt-map-mask = <0 0 0 0>; 2275 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2276 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2277 clock-names = "pcie", "pcie_bus"; 2278 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2279 resets = <&cpg 318>; 2280 iommu-map = <0 &ipmmu_hc 1 1>; 2281 iommu-map-mask = <0>; 2282 status = "disabled"; 2283 }; 2284 2285 pciec0_ep: pcie-ep@fe000000 { 2286 compatible = "renesas,r8a774b1-pcie-ep", 2287 "renesas,rcar-gen3-pcie-ep"; 2288 reg = <0x0 0xfe000000 0 0x80000>, 2289 <0x0 0xfe100000 0 0x100000>, 2290 <0x0 0xfe200000 0 0x200000>, 2291 <0x0 0x30000000 0 0x8000000>, 2292 <0x0 0x38000000 0 0x8000000>; 2293 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2294 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2295 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2296 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2297 clocks = <&cpg CPG_MOD 319>; 2298 clock-names = "pcie"; 2299 resets = <&cpg 319>; 2300 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2301 status = "disabled"; 2302 }; 2303 2304 pciec1_ep: pcie-ep@ee800000 { 2305 compatible = "renesas,r8a774b1-pcie-ep", 2306 "renesas,rcar-gen3-pcie-ep"; 2307 reg = <0x0 0xee800000 0 0x80000>, 2308 <0x0 0xee900000 0 0x100000>, 2309 <0x0 0xeea00000 0 0x200000>, 2310 <0x0 0xc0000000 0 0x8000000>, 2311 <0x0 0xc8000000 0 0x8000000>; 2312 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2313 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2314 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2315 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2316 clocks = <&cpg CPG_MOD 318>; 2317 clock-names = "pcie"; 2318 resets = <&cpg 318>; 2319 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2320 status = "disabled"; 2321 }; 2322 2323 fdp1@fe940000 { 2324 compatible = "renesas,fdp1"; 2325 reg = <0 0xfe940000 0 0x2400>; 2326 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2327 clocks = <&cpg CPG_MOD 119>; 2328 power-domains = <&sysc R8A774B1_PD_A3VP>; 2329 resets = <&cpg 119>; 2330 renesas,fcp = <&fcpf0>; 2331 }; 2332 2333 fcpf0: fcp@fe950000 { 2334 compatible = "renesas,fcpf"; 2335 reg = <0 0xfe950000 0 0x200>; 2336 clocks = <&cpg CPG_MOD 615>; 2337 power-domains = <&sysc R8A774B1_PD_A3VP>; 2338 resets = <&cpg 615>; 2339 }; 2340 2341 vspb: vsp@fe960000 { 2342 compatible = "renesas,vsp2"; 2343 reg = <0 0xfe960000 0 0x8000>; 2344 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2345 clocks = <&cpg CPG_MOD 626>; 2346 power-domains = <&sysc R8A774B1_PD_A3VP>; 2347 resets = <&cpg 626>; 2348 2349 renesas,fcp = <&fcpvb0>; 2350 }; 2351 2352 vspi0: vsp@fe9a0000 { 2353 compatible = "renesas,vsp2"; 2354 reg = <0 0xfe9a0000 0 0x8000>; 2355 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2356 clocks = <&cpg CPG_MOD 631>; 2357 power-domains = <&sysc R8A774B1_PD_A3VP>; 2358 resets = <&cpg 631>; 2359 2360 renesas,fcp = <&fcpvi0>; 2361 }; 2362 2363 vspd0: vsp@fea20000 { 2364 compatible = "renesas,vsp2"; 2365 reg = <0 0xfea20000 0 0x5000>; 2366 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2367 clocks = <&cpg CPG_MOD 623>; 2368 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2369 resets = <&cpg 623>; 2370 2371 renesas,fcp = <&fcpvd0>; 2372 }; 2373 2374 vspd1: vsp@fea28000 { 2375 compatible = "renesas,vsp2"; 2376 reg = <0 0xfea28000 0 0x5000>; 2377 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2378 clocks = <&cpg CPG_MOD 622>; 2379 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2380 resets = <&cpg 622>; 2381 2382 renesas,fcp = <&fcpvd1>; 2383 }; 2384 2385 fcpvb0: fcp@fe96f000 { 2386 compatible = "renesas,fcpv"; 2387 reg = <0 0xfe96f000 0 0x200>; 2388 clocks = <&cpg CPG_MOD 607>; 2389 power-domains = <&sysc R8A774B1_PD_A3VP>; 2390 resets = <&cpg 607>; 2391 }; 2392 2393 fcpvd0: fcp@fea27000 { 2394 compatible = "renesas,fcpv"; 2395 reg = <0 0xfea27000 0 0x200>; 2396 clocks = <&cpg CPG_MOD 603>; 2397 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2398 resets = <&cpg 603>; 2399 }; 2400 2401 fcpvd1: fcp@fea2f000 { 2402 compatible = "renesas,fcpv"; 2403 reg = <0 0xfea2f000 0 0x200>; 2404 clocks = <&cpg CPG_MOD 602>; 2405 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2406 resets = <&cpg 602>; 2407 }; 2408 2409 fcpvi0: fcp@fe9af000 { 2410 compatible = "renesas,fcpv"; 2411 reg = <0 0xfe9af000 0 0x200>; 2412 clocks = <&cpg CPG_MOD 611>; 2413 power-domains = <&sysc R8A774B1_PD_A3VP>; 2414 resets = <&cpg 611>; 2415 }; 2416 2417 csi20: csi2@fea80000 { 2418 compatible = "renesas,r8a774b1-csi2"; 2419 reg = <0 0xfea80000 0 0x10000>; 2420 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2421 clocks = <&cpg CPG_MOD 714>; 2422 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2423 resets = <&cpg 714>; 2424 status = "disabled"; 2425 2426 ports { 2427 #address-cells = <1>; 2428 #size-cells = <0>; 2429 2430 port@0 { 2431 reg = <0>; 2432 }; 2433 2434 port@1 { 2435 #address-cells = <1>; 2436 #size-cells = <0>; 2437 2438 reg = <1>; 2439 2440 csi20vin0: endpoint@0 { 2441 reg = <0>; 2442 remote-endpoint = <&vin0csi20>; 2443 }; 2444 csi20vin1: endpoint@1 { 2445 reg = <1>; 2446 remote-endpoint = <&vin1csi20>; 2447 }; 2448 csi20vin2: endpoint@2 { 2449 reg = <2>; 2450 remote-endpoint = <&vin2csi20>; 2451 }; 2452 csi20vin3: endpoint@3 { 2453 reg = <3>; 2454 remote-endpoint = <&vin3csi20>; 2455 }; 2456 csi20vin4: endpoint@4 { 2457 reg = <4>; 2458 remote-endpoint = <&vin4csi20>; 2459 }; 2460 csi20vin5: endpoint@5 { 2461 reg = <5>; 2462 remote-endpoint = <&vin5csi20>; 2463 }; 2464 csi20vin6: endpoint@6 { 2465 reg = <6>; 2466 remote-endpoint = <&vin6csi20>; 2467 }; 2468 csi20vin7: endpoint@7 { 2469 reg = <7>; 2470 remote-endpoint = <&vin7csi20>; 2471 }; 2472 }; 2473 }; 2474 }; 2475 2476 csi40: csi2@feaa0000 { 2477 compatible = "renesas,r8a774b1-csi2"; 2478 reg = <0 0xfeaa0000 0 0x10000>; 2479 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2480 clocks = <&cpg CPG_MOD 716>; 2481 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2482 resets = <&cpg 716>; 2483 status = "disabled"; 2484 2485 ports { 2486 #address-cells = <1>; 2487 #size-cells = <0>; 2488 2489 port@0 { 2490 reg = <0>; 2491 }; 2492 2493 port@1 { 2494 #address-cells = <1>; 2495 #size-cells = <0>; 2496 2497 reg = <1>; 2498 2499 csi40vin0: endpoint@0 { 2500 reg = <0>; 2501 remote-endpoint = <&vin0csi40>; 2502 }; 2503 csi40vin1: endpoint@1 { 2504 reg = <1>; 2505 remote-endpoint = <&vin1csi40>; 2506 }; 2507 csi40vin2: endpoint@2 { 2508 reg = <2>; 2509 remote-endpoint = <&vin2csi40>; 2510 }; 2511 csi40vin3: endpoint@3 { 2512 reg = <3>; 2513 remote-endpoint = <&vin3csi40>; 2514 }; 2515 csi40vin4: endpoint@4 { 2516 reg = <4>; 2517 remote-endpoint = <&vin4csi40>; 2518 }; 2519 csi40vin5: endpoint@5 { 2520 reg = <5>; 2521 remote-endpoint = <&vin5csi40>; 2522 }; 2523 csi40vin6: endpoint@6 { 2524 reg = <6>; 2525 remote-endpoint = <&vin6csi40>; 2526 }; 2527 csi40vin7: endpoint@7 { 2528 reg = <7>; 2529 remote-endpoint = <&vin7csi40>; 2530 }; 2531 }; 2532 }; 2533 }; 2534 2535 hdmi0: hdmi@fead0000 { 2536 compatible = "renesas,r8a774b1-hdmi", 2537 "renesas,rcar-gen3-hdmi"; 2538 reg = <0 0xfead0000 0 0x10000>; 2539 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2540 clocks = <&cpg CPG_MOD 729>, 2541 <&cpg CPG_CORE R8A774B1_CLK_HDMI>; 2542 clock-names = "iahb", "isfr"; 2543 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2544 resets = <&cpg 729>; 2545 status = "disabled"; 2546 2547 ports { 2548 #address-cells = <1>; 2549 #size-cells = <0>; 2550 2551 port@0 { 2552 reg = <0>; 2553 dw_hdmi0_in: endpoint { 2554 remote-endpoint = <&du_out_hdmi0>; 2555 }; 2556 }; 2557 port@1 { 2558 reg = <1>; 2559 }; 2560 port@2 { 2561 /* HDMI sound */ 2562 reg = <2>; 2563 }; 2564 }; 2565 }; 2566 2567 du: display@feb00000 { 2568 compatible = "renesas,du-r8a774b1"; 2569 reg = <0 0xfeb00000 0 0x80000>; 2570 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2571 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2572 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2573 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2574 <&cpg CPG_MOD 721>; 2575 clock-names = "du.0", "du.1", "du.3"; 2576 resets = <&cpg 724>, <&cpg 722>; 2577 reset-names = "du.0", "du.3"; 2578 status = "disabled"; 2579 2580 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2581 2582 ports { 2583 #address-cells = <1>; 2584 #size-cells = <0>; 2585 2586 port@0 { 2587 reg = <0>; 2588 }; 2589 port@1 { 2590 reg = <1>; 2591 du_out_hdmi0: endpoint { 2592 remote-endpoint = <&dw_hdmi0_in>; 2593 }; 2594 }; 2595 port@2 { 2596 reg = <2>; 2597 du_out_lvds0: endpoint { 2598 remote-endpoint = <&lvds0_in>; 2599 }; 2600 }; 2601 }; 2602 }; 2603 2604 lvds0: lvds@feb90000 { 2605 compatible = "renesas,r8a774b1-lvds"; 2606 reg = <0 0xfeb90000 0 0x14>; 2607 clocks = <&cpg CPG_MOD 727>; 2608 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2609 resets = <&cpg 727>; 2610 status = "disabled"; 2611 2612 ports { 2613 #address-cells = <1>; 2614 #size-cells = <0>; 2615 2616 port@0 { 2617 reg = <0>; 2618 lvds0_in: endpoint { 2619 remote-endpoint = <&du_out_lvds0>; 2620 }; 2621 }; 2622 port@1 { 2623 reg = <1>; 2624 }; 2625 }; 2626 }; 2627 2628 prr: chipid@fff00044 { 2629 compatible = "renesas,prr"; 2630 reg = <0 0xfff00044 0 4>; 2631 }; 2632 }; 2633 2634 thermal-zones { 2635 sensor1_thermal: sensor1-thermal { 2636 polling-delay-passive = <250>; 2637 polling-delay = <1000>; 2638 thermal-sensors = <&tsc 0>; 2639 sustainable-power = <2439>; 2640 2641 trips { 2642 sensor1_crit: sensor1-crit { 2643 temperature = <120000>; 2644 hysteresis = <1000>; 2645 type = "critical"; 2646 }; 2647 }; 2648 }; 2649 2650 sensor2_thermal: sensor2-thermal { 2651 polling-delay-passive = <250>; 2652 polling-delay = <1000>; 2653 thermal-sensors = <&tsc 1>; 2654 sustainable-power = <2439>; 2655 2656 trips { 2657 sensor2_crit: sensor2-crit { 2658 temperature = <120000>; 2659 hysteresis = <1000>; 2660 type = "critical"; 2661 }; 2662 }; 2663 }; 2664 2665 sensor3_thermal: sensor3-thermal { 2666 polling-delay-passive = <250>; 2667 polling-delay = <1000>; 2668 thermal-sensors = <&tsc 2>; 2669 sustainable-power = <2439>; 2670 2671 cooling-maps { 2672 map0 { 2673 trip = <&target>; 2674 cooling-device = <&a57_0 0 2>; 2675 contribution = <1024>; 2676 }; 2677 }; 2678 trips { 2679 target: trip-point1 { 2680 temperature = <100000>; 2681 hysteresis = <1000>; 2682 type = "passive"; 2683 }; 2684 2685 sensor3_crit: sensor3-crit { 2686 temperature = <120000>; 2687 hysteresis = <1000>; 2688 type = "critical"; 2689 }; 2690 }; 2691 }; 2692 }; 2693 2694 timer { 2695 compatible = "arm,armv8-timer"; 2696 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2697 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2698 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2699 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2700 }; 2701 2702 /* External USB clocks - can be overridden by the board */ 2703 usb3s0_clk: usb3s0 { 2704 compatible = "fixed-clock"; 2705 #clock-cells = <0>; 2706 clock-frequency = <0>; 2707 }; 2708 2709 usb_extal_clk: usb_extal { 2710 compatible = "fixed-clock"; 2711 #clock-cells = <0>; 2712 clock-frequency = <0>; 2713 }; 2714}; 2715