xref: /linux/arch/arm64/boot/dts/renesas/ebisu.dtsi (revision 7f71507851fc7764b36a3221839607d3a45c2025) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Ebisu/Ebisu-4D board
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10
11/ {
12	model = "Renesas Ebisu board";
13	compatible = "renesas,ebisu";
14
15	aliases {
16		i2c0 = &i2c0;
17		i2c1 = &i2c1;
18		i2c2 = &i2c2;
19		i2c3 = &i2c3;
20		i2c4 = &i2c4;
21		i2c5 = &i2c5;
22		i2c6 = &i2c6;
23		i2c7 = &i2c7;
24		serial0 = &scif2;
25		ethernet0 = &avb;
26		mmc0 = &sdhi3;
27		mmc1 = &sdhi0;
28		mmc2 = &sdhi1;
29	};
30
31	chosen {
32		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
33		stdout-path = "serial0:115200n8";
34	};
35
36	audio_clkout: audio-clkout {
37		/*
38		 * This is same as <&rcar_sound 0>
39		 * but needed to avoid cs2000/rcar_sound probe dead-lock
40		 */
41		compatible = "fixed-clock";
42		#clock-cells = <0>;
43		clock-frequency = <11289600>;
44	};
45
46	backlight: backlight {
47		compatible = "pwm-backlight";
48		pwms = <&pwm3 0 50000>;
49
50		brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
51		default-brightness-level = <10>;
52
53		power-supply = <&reg_12p0v>;
54	};
55
56	cvbs-in {
57		compatible = "composite-video-connector";
58		label = "CVBS IN";
59
60		port {
61			cvbs_con: endpoint {
62				remote-endpoint = <&adv7482_ain7>;
63			};
64		};
65	};
66
67	hdmi-in {
68		compatible = "hdmi-connector";
69		label = "HDMI IN";
70		type = "a";
71
72		port {
73			hdmi_in_con: endpoint {
74				remote-endpoint = <&adv7482_hdmi>;
75			};
76		};
77	};
78
79	hdmi-out {
80		compatible = "hdmi-connector";
81		type = "a";
82
83		port {
84			hdmi_con_out: endpoint {
85				remote-endpoint = <&adv7511_out>;
86			};
87		};
88	};
89
90	keys {
91		compatible = "gpio-keys";
92
93		pinctrl-0 = <&keys_pins>;
94		pinctrl-names = "default";
95
96		key-1 {
97			gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
98			linux,code = <KEY_1>;
99			label = "SW4-1";
100			wakeup-source;
101			debounce-interval = <20>;
102		};
103		key-2 {
104			gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
105			linux,code = <KEY_2>;
106			label = "SW4-2";
107			wakeup-source;
108			debounce-interval = <20>;
109		};
110		key-3 {
111			gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
112			linux,code = <KEY_3>;
113			label = "SW4-3";
114			wakeup-source;
115			debounce-interval = <20>;
116		};
117		key-4 {
118			gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
119			linux,code = <KEY_4>;
120			label = "SW4-4";
121			wakeup-source;
122			debounce-interval = <20>;
123		};
124	};
125
126	lvds-decoder {
127		compatible = "thine,thc63lvd1024";
128		vcc-supply = <&reg_3p3v>;
129
130		ports {
131			#address-cells = <1>;
132			#size-cells = <0>;
133
134			port@0 {
135				reg = <0>;
136				thc63lvd1024_in: endpoint {
137					remote-endpoint = <&lvds0_out>;
138				};
139			};
140
141			port@2 {
142				reg = <2>;
143				thc63lvd1024_out: endpoint {
144					remote-endpoint = <&adv7511_in>;
145				};
146			};
147		};
148	};
149
150	memory@48000000 {
151		device_type = "memory";
152		/* first 128MB is reserved for secure area. */
153		reg = <0x0 0x48000000 0x0 0x38000000>;
154	};
155
156	reg_1p8v: regulator-1p8v {
157		compatible = "regulator-fixed";
158		regulator-name = "fixed-1.8V";
159		regulator-min-microvolt = <1800000>;
160		regulator-max-microvolt = <1800000>;
161		regulator-boot-on;
162		regulator-always-on;
163	};
164
165	reg_3p3v: regulator-3p3v {
166		compatible = "regulator-fixed";
167		regulator-name = "fixed-3.3V";
168		regulator-min-microvolt = <3300000>;
169		regulator-max-microvolt = <3300000>;
170		regulator-boot-on;
171		regulator-always-on;
172	};
173
174	reg_12p0v: regulator-12p0v {
175		compatible = "regulator-fixed";
176		regulator-name = "D12.0V";
177		regulator-min-microvolt = <12000000>;
178		regulator-max-microvolt = <12000000>;
179		regulator-boot-on;
180		regulator-always-on;
181	};
182
183	rsnd_ak4613: sound {
184		compatible = "simple-audio-card";
185
186		simple-audio-card,name = "rsnd-ak4613";
187		simple-audio-card,format = "left_j";
188		simple-audio-card,bitclock-master = <&sndcpu>;
189		simple-audio-card,frame-master = <&sndcpu>;
190
191		sndcodec: simple-audio-card,codec {
192			sound-dai = <&ak4613>;
193		};
194
195		sndcpu: simple-audio-card,cpu {
196			sound-dai = <&rcar_sound>;
197		};
198	};
199
200	vbus0_usb2: regulator-vbus0-usb2 {
201		compatible = "regulator-fixed";
202
203		regulator-name = "USB20_VBUS_CN";
204		regulator-min-microvolt = <5000000>;
205		regulator-max-microvolt = <5000000>;
206
207		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
208		enable-active-high;
209	};
210
211	vcc_sdhi0: regulator-vcc-sdhi0 {
212		compatible = "regulator-fixed";
213
214		regulator-name = "SDHI0 Vcc";
215		regulator-min-microvolt = <3300000>;
216		regulator-max-microvolt = <3300000>;
217
218		gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
219		enable-active-high;
220	};
221
222	vccq_sdhi0: regulator-vccq-sdhi0 {
223		compatible = "regulator-gpio";
224
225		regulator-name = "SDHI0 VccQ";
226		regulator-min-microvolt = <1800000>;
227		regulator-max-microvolt = <3300000>;
228
229		gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
230		gpios-states = <1>;
231		states = <3300000 1>, <1800000 0>;
232	};
233
234	vcc_sdhi1: regulator-vcc-sdhi1 {
235		compatible = "regulator-fixed";
236
237		regulator-name = "SDHI1 Vcc";
238		regulator-min-microvolt = <3300000>;
239		regulator-max-microvolt = <3300000>;
240
241		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
242		enable-active-high;
243	};
244
245	vccq_sdhi1: regulator-vccq-sdhi1 {
246		compatible = "regulator-gpio";
247
248		regulator-name = "SDHI1 VccQ";
249		regulator-min-microvolt = <1800000>;
250		regulator-max-microvolt = <3300000>;
251
252		gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
253		gpios-states = <1>;
254		states = <3300000 1>, <1800000 0>;
255	};
256
257	vga {
258		compatible = "vga-connector";
259
260		port {
261			vga_in: endpoint {
262				remote-endpoint = <&adv7123_out>;
263			};
264		};
265	};
266
267	vga-encoder {
268		compatible = "adi,adv7123";
269
270		ports {
271			#address-cells = <1>;
272			#size-cells = <0>;
273
274			port@0 {
275				reg = <0>;
276				adv7123_in: endpoint {
277					remote-endpoint = <&du_out_rgb>;
278				};
279			};
280			port@1 {
281				reg = <1>;
282				adv7123_out: endpoint {
283					remote-endpoint = <&vga_in>;
284				};
285			};
286		};
287	};
288
289	x12_clk: x12 {
290		compatible = "fixed-clock";
291		#clock-cells = <0>;
292		clock-frequency = <24576000>;
293	};
294
295	x13_clk: x13 {
296		compatible = "fixed-clock";
297		#clock-cells = <0>;
298		clock-frequency = <74250000>;
299	};
300};
301
302&audio_clk_a {
303	clock-frequency = <22579200>;
304};
305
306&avb {
307	pinctrl-0 = <&avb_pins>;
308	pinctrl-names = "default";
309	phy-handle = <&phy0>;
310	status = "okay";
311
312	phy0: ethernet-phy@0 {
313		compatible = "ethernet-phy-id0022.1622",
314			     "ethernet-phy-ieee802.3-c22";
315		rxc-skew-ps = <1500>;
316		reg = <0>;
317		interrupts-extended = <&gpio2 21 IRQ_TYPE_LEVEL_LOW>;
318		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
319		/*
320		 * TX clock internal delay mode is required for reliable
321		 * 1Gbps communication using the KSZ9031RNX phy present on
322		 * the Ebisu board, however, TX clock internal delay mode
323		 * isn't supported on R-Car E3(e).  Thus, limit speed to
324		 * 100Mbps for reliable communication.
325		 */
326		max-speed = <100>;
327	};
328};
329
330&canfd {
331	pinctrl-0 = <&canfd0_pins>;
332	pinctrl-names = "default";
333	status = "okay";
334
335	channel0 {
336		status = "okay";
337	};
338};
339
340&csi40 {
341	status = "okay";
342
343	ports {
344		port@0 {
345			csi40_in: endpoint {
346				clock-lanes = <0>;
347				data-lanes = <1 2>;
348				remote-endpoint = <&adv7482_txa>;
349			};
350		};
351	};
352};
353
354&du {
355	pinctrl-0 = <&du_pins>;
356	pinctrl-names = "default";
357	status = "okay";
358
359	clocks = <&cpg CPG_MOD 724>,
360		 <&cpg CPG_MOD 723>,
361		 <&x13_clk>;
362	clock-names = "du.0", "du.1", "dclkin.0";
363
364	ports {
365		port@0 {
366			du_out_rgb: endpoint {
367				remote-endpoint = <&adv7123_in>;
368			};
369		};
370	};
371};
372
373&ehci0 {
374	dr_mode = "otg";
375	status = "okay";
376};
377
378&extal_clk {
379	clock-frequency = <48000000>;
380};
381
382&hsusb {
383	dr_mode = "otg";
384	status = "okay";
385};
386
387&i2c0 {
388	status = "okay";
389
390	io_expander: gpio@20 {
391		compatible = "onnn,pca9654";
392		reg = <0x20>;
393		gpio-controller;
394		#gpio-cells = <2>;
395		interrupts-extended = <&gpio2 22 IRQ_TYPE_LEVEL_LOW>;
396	};
397
398	hdmi-encoder@39 {
399		compatible = "adi,adv7511w";
400		reg = <0x39>;
401		interrupts-extended = <&gpio1 1 IRQ_TYPE_LEVEL_LOW>;
402
403		avdd-supply = <&reg_1p8v>;
404		dvdd-supply = <&reg_1p8v>;
405		pvdd-supply = <&reg_1p8v>;
406		dvdd-3v-supply = <&reg_3p3v>;
407		bgvdd-supply = <&reg_1p8v>;
408
409		adi,input-depth = <8>;
410		adi,input-colorspace = "rgb";
411		adi,input-clock = "1x";
412
413		ports {
414			#address-cells = <1>;
415			#size-cells = <0>;
416
417			port@0 {
418				reg = <0>;
419				adv7511_in: endpoint {
420					remote-endpoint = <&thc63lvd1024_out>;
421				};
422			};
423
424			port@1 {
425				reg = <1>;
426				adv7511_out: endpoint {
427					remote-endpoint = <&hdmi_con_out>;
428				};
429			};
430		};
431	};
432
433	video-receiver@70 {
434		compatible = "adi,adv7482";
435		reg = <0x70>;
436
437		interrupts-extended = <&gpio0 7 IRQ_TYPE_LEVEL_LOW>,
438				      <&gpio0 17 IRQ_TYPE_LEVEL_LOW>;
439		interrupt-names = "intrq1", "intrq2";
440
441		ports {
442			#address-cells = <1>;
443			#size-cells = <0>;
444
445			port@7 {
446				reg = <7>;
447
448				adv7482_ain7: endpoint {
449					remote-endpoint = <&cvbs_con>;
450				};
451			};
452
453			port@8 {
454				reg = <8>;
455
456				adv7482_hdmi: endpoint {
457					remote-endpoint = <&hdmi_in_con>;
458				};
459			};
460
461			port@a {
462				reg = <10>;
463
464				adv7482_txa: endpoint {
465					clock-lanes = <0>;
466					data-lanes = <1 2>;
467					remote-endpoint = <&csi40_in>;
468				};
469			};
470		};
471	};
472};
473
474&i2c3 {
475	status = "okay";
476
477	ak4613: codec@10 {
478		compatible = "asahi-kasei,ak4613";
479		#sound-dai-cells = <0>;
480		reg = <0x10>;
481		clocks = <&rcar_sound 3>;
482
483		asahi-kasei,in1-single-end;
484		asahi-kasei,in2-single-end;
485		asahi-kasei,out1-single-end;
486		asahi-kasei,out2-single-end;
487		asahi-kasei,out3-single-end;
488		asahi-kasei,out4-single-end;
489		asahi-kasei,out5-single-end;
490		asahi-kasei,out6-single-end;
491	};
492
493	cs2000: clk-multiplier@4f {
494		#clock-cells = <0>;
495		compatible = "cirrus,cs2000-cp";
496		reg = <0x4f>;
497		clocks = <&audio_clkout>, <&x12_clk>;
498		clock-names = "clk_in", "ref_clk";
499
500		assigned-clocks = <&cs2000>;
501		assigned-clock-rates = <24576000>; /* 1/1 divide */
502	};
503};
504
505&i2c_dvfs {
506	status = "okay";
507
508	clock-frequency = <400000>;
509
510	pmic: pmic@30 {
511		pinctrl-0 = <&irq0_pins>;
512		pinctrl-names = "default";
513
514		compatible = "rohm,bd9571mwv";
515		reg = <0x30>;
516		interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_LOW>;
517		interrupt-controller;
518		#interrupt-cells = <2>;
519		gpio-controller;
520		#gpio-cells = <2>;
521		rohm,ddr-backup-power = <0x1>;
522		rohm,rstbmode-level;
523	};
524
525	eeprom@50 {
526		compatible = "rohm,br24t01", "atmel,24c01";
527		reg = <0x50>;
528		pagesize = <8>;
529	};
530};
531
532&lvds0 {
533	status = "okay";
534
535	clocks = <&cpg CPG_MOD 727>,
536		 <&x13_clk>,
537		 <&extal_clk>;
538	clock-names = "fck", "dclkin.0", "extal";
539
540	ports {
541		port@1 {
542			lvds0_out: endpoint {
543				remote-endpoint = <&thc63lvd1024_in>;
544			};
545		};
546	};
547};
548
549&lvds1 {
550	/*
551	 * Even though the LVDS1 output is not connected, the encoder must be
552	 * enabled to supply a pixel clock to the DU for the DPAD output when
553	 * LVDS0 is in use.
554	 */
555	status = "okay";
556
557	clocks = <&cpg CPG_MOD 727>,
558		 <&x13_clk>,
559		 <&extal_clk>;
560	clock-names = "fck", "dclkin.0", "extal";
561};
562
563&ohci0 {
564	dr_mode = "otg";
565	status = "okay";
566};
567
568&pcie_bus_clk {
569	clock-frequency = <100000000>;
570};
571
572&pciec0 {
573	status = "okay";
574};
575
576&pfc {
577	avb_pins: avb {
578		groups = "avb_link", "avb_mii";
579		function = "avb";
580	};
581
582	canfd0_pins: canfd0 {
583		groups = "canfd0_data";
584		function = "canfd0";
585	};
586
587	du_pins: du {
588		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
589		function = "du";
590	};
591
592	irq0_pins: irq0 {
593		groups = "intc_ex_irq0";
594		function = "intc_ex";
595	};
596
597	keys_pins: keys {
598		pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
599		bias-pull-up;
600	};
601
602	pwm3_pins: pwm3 {
603		groups = "pwm3_b";
604		function = "pwm3";
605	};
606
607	pwm5_pins: pwm5 {
608		groups = "pwm5_a";
609		function = "pwm5";
610	};
611
612	rpc_pins: rpc {
613		groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
614			 "rpc_int";
615		function = "rpc";
616	};
617
618	scif2_pins: scif2 {
619		groups = "scif2_data_a";
620		function = "scif2";
621	};
622
623	sdhi0_pins: sd0 {
624		groups = "sdhi0_data4", "sdhi0_ctrl";
625		function = "sdhi0";
626		power-source = <3300>;
627	};
628
629	sdhi0_pins_uhs: sd0_uhs {
630		groups = "sdhi0_data4", "sdhi0_ctrl";
631		function = "sdhi0";
632		power-source = <1800>;
633	};
634
635	sdhi1_pins: sd1 {
636		groups = "sdhi1_data4", "sdhi1_ctrl";
637		function = "sdhi1";
638		power-source = <3300>;
639	};
640
641	sdhi1_pins_uhs: sd1_uhs {
642		groups = "sdhi1_data4", "sdhi1_ctrl";
643		function = "sdhi1";
644		power-source = <1800>;
645	};
646
647	sdhi3_pins: sd3 {
648		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
649		function = "sdhi3";
650		power-source = <1800>;
651	};
652
653	sound_clk_pins: sound_clk {
654		groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
655			 "audio_clkout_a", "audio_clkout1_a";
656		function = "audio_clk";
657	};
658
659	sound_pins: sound {
660		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
661		function = "ssi";
662	};
663
664	usb0_pins: usb {
665		groups = "usb0_b", "usb0_id";
666		function = "usb0";
667	};
668
669	usb30_pins: usb30 {
670		groups = "usb30";
671		function = "usb30";
672	};
673};
674
675&pwm3 {
676	pinctrl-0 = <&pwm3_pins>;
677	pinctrl-names = "default";
678
679	status = "okay";
680};
681
682&pwm5 {
683	pinctrl-0 = <&pwm5_pins>;
684	pinctrl-names = "default";
685
686	status = "okay";
687};
688
689&rcar_sound {
690	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
691	pinctrl-names = "default";
692
693	/* Single DAI */
694	#sound-dai-cells = <0>;
695
696	/* audio_clkout0/1/2/3 */
697	#clock-cells = <1>;
698	clock-frequency = <12288000 11289600>;
699
700	status = "okay";
701
702	/* update <audio_clk_b> to <cs2000> */
703	clocks = <&cpg CPG_MOD 1005>,
704		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
705		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
706		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
707		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
708		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
709		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
710		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
711		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
712		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
713		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
714		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
715		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
716		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
717		 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
718		 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
719
720	rcar_sound,dai {
721		dai0 {
722			playback = <&ssi0>, <&src0>, <&dvc0>;
723			capture = <&ssi1>, <&src1>, <&dvc1>;
724		};
725	};
726
727};
728
729&rpc {
730	pinctrl-0 = <&rpc_pins>;
731	pinctrl-names = "default";
732
733	/* Left disabled.  To be enabled by firmware when unlocked. */
734
735	flash@0 {
736		compatible = "cypress,hyperflash", "cfi-flash";
737		reg = <0>;
738
739		partitions {
740			compatible = "fixed-partitions";
741			#address-cells = <1>;
742			#size-cells = <1>;
743
744			bootparam@0 {
745				reg = <0x00000000 0x040000>;
746				read-only;
747			};
748			bl2@40000 {
749				reg = <0x00040000 0x140000>;
750				read-only;
751			};
752			cert_header_sa6@180000 {
753				reg = <0x00180000 0x040000>;
754				read-only;
755			};
756			bl31@1c0000 {
757				reg = <0x001c0000 0x040000>;
758				read-only;
759			};
760			tee@200000 {
761				reg = <0x00200000 0x440000>;
762				read-only;
763			};
764			uboot@640000 {
765				reg = <0x00640000 0x100000>;
766				read-only;
767			};
768			dtb@740000 {
769				reg = <0x00740000 0x080000>;
770			};
771			kernel@7c0000 {
772				reg = <0x007c0000 0x1400000>;
773			};
774			user@1bc0000 {
775				reg = <0x01bc0000 0x2440000>;
776			};
777		};
778	};
779};
780
781&rwdt {
782	timeout-sec = <60>;
783	status = "okay";
784};
785
786&scif2 {
787	pinctrl-0 = <&scif2_pins>;
788	pinctrl-names = "default";
789
790	status = "okay";
791};
792
793&sdhi0 {
794	pinctrl-0 = <&sdhi0_pins>;
795	pinctrl-1 = <&sdhi0_pins_uhs>;
796	pinctrl-names = "default", "state_uhs";
797
798	vmmc-supply = <&vcc_sdhi0>;
799	vqmmc-supply = <&vccq_sdhi0>;
800	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
801	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
802	bus-width = <4>;
803	sd-uhs-sdr50;
804	sd-uhs-sdr104;
805	status = "okay";
806};
807
808&sdhi1 {
809	pinctrl-0 = <&sdhi1_pins>;
810	pinctrl-1 = <&sdhi1_pins_uhs>;
811	pinctrl-names = "default", "state_uhs";
812
813	vmmc-supply = <&vcc_sdhi1>;
814	vqmmc-supply = <&vccq_sdhi1>;
815	cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
816	bus-width = <4>;
817	sd-uhs-sdr50;
818	sd-uhs-sdr104;
819	status = "okay";
820};
821
822&sdhi3 {
823	/* used for on-board 8bit eMMC */
824	pinctrl-0 = <&sdhi3_pins>;
825	pinctrl-1 = <&sdhi3_pins>;
826	pinctrl-names = "default", "state_uhs";
827
828	vmmc-supply = <&reg_3p3v>;
829	vqmmc-supply = <&reg_1p8v>;
830	mmc-hs200-1_8v;
831	mmc-hs400-1_8v;
832	bus-width = <8>;
833	no-sd;
834	no-sdio;
835	non-removable;
836	full-pwr-cycle-in-suspend;
837	status = "okay";
838};
839
840&ssi1 {
841	shared-pin;
842};
843
844&usb2_phy0 {
845	pinctrl-0 = <&usb0_pins>;
846	pinctrl-names = "default";
847
848	vbus-supply = <&vbus0_usb2>;
849	status = "okay";
850};
851
852&usb3_peri0 {
853	companion = <&xhci0>;
854	status = "okay";
855};
856
857&vin4 {
858	status = "okay";
859};
860
861&vin5 {
862	status = "okay";
863};
864
865&xhci0 {
866	pinctrl-0 = <&usb30_pins>;
867	pinctrl-names = "default";
868
869	status = "okay";
870};
871