xref: /linux/arch/arm64/boot/dts/renesas/ebisu.dtsi (revision 6e7fd890f1d6ac83805409e9c346240de2705584) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Ebisu/Ebisu-4D board
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10
11/ {
12	model = "Renesas Ebisu board";
13	compatible = "renesas,ebisu";
14
15	aliases {
16		i2c0 = &i2c0;
17		i2c1 = &i2c1;
18		i2c2 = &i2c2;
19		i2c3 = &i2c3;
20		i2c4 = &i2c4;
21		i2c5 = &i2c5;
22		i2c6 = &i2c6;
23		i2c7 = &i2c7;
24		serial0 = &scif2;
25		ethernet0 = &avb;
26		mmc0 = &sdhi3;
27		mmc1 = &sdhi0;
28		mmc2 = &sdhi1;
29	};
30
31	chosen {
32		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
33		stdout-path = "serial0:115200n8";
34	};
35
36	audio_clkout: audio-clkout {
37		/*
38		 * This is same as <&rcar_sound 0>
39		 * but needed to avoid cs2000/rcar_sound probe dead-lock
40		 */
41		compatible = "fixed-clock";
42		#clock-cells = <0>;
43		clock-frequency = <11289600>;
44	};
45
46	backlight: backlight {
47		compatible = "pwm-backlight";
48		pwms = <&pwm3 0 50000>;
49
50		brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
51		default-brightness-level = <10>;
52
53		power-supply = <&reg_12p0v>;
54	};
55
56	cvbs-in {
57		compatible = "composite-video-connector";
58		label = "CVBS IN";
59
60		port {
61			cvbs_con: endpoint {
62				remote-endpoint = <&adv7482_ain7>;
63			};
64		};
65	};
66
67	hdmi-in {
68		compatible = "hdmi-connector";
69		label = "HDMI IN";
70		type = "a";
71
72		port {
73			hdmi_in_con: endpoint {
74				remote-endpoint = <&adv7482_hdmi>;
75			};
76		};
77	};
78
79	hdmi-out {
80		compatible = "hdmi-connector";
81		type = "a";
82
83		port {
84			hdmi_con_out: endpoint {
85				remote-endpoint = <&adv7511_out>;
86			};
87		};
88	};
89
90	keys {
91		compatible = "gpio-keys";
92
93		pinctrl-0 = <&keys_pins>;
94		pinctrl-names = "default";
95
96		key-1 {
97			gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
98			linux,code = <KEY_1>;
99			label = "SW4-1";
100			wakeup-source;
101			debounce-interval = <20>;
102		};
103		key-2 {
104			gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
105			linux,code = <KEY_2>;
106			label = "SW4-2";
107			wakeup-source;
108			debounce-interval = <20>;
109		};
110		key-3 {
111			gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
112			linux,code = <KEY_3>;
113			label = "SW4-3";
114			wakeup-source;
115			debounce-interval = <20>;
116		};
117		key-4 {
118			gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
119			linux,code = <KEY_4>;
120			label = "SW4-4";
121			wakeup-source;
122			debounce-interval = <20>;
123		};
124	};
125
126	lvds-decoder {
127		compatible = "thine,thc63lvd1024";
128		vcc-supply = <&reg_3p3v>;
129
130		ports {
131			#address-cells = <1>;
132			#size-cells = <0>;
133
134			port@0 {
135				reg = <0>;
136				thc63lvd1024_in: endpoint {
137					remote-endpoint = <&lvds0_out>;
138				};
139			};
140
141			port@2 {
142				reg = <2>;
143				thc63lvd1024_out: endpoint {
144					remote-endpoint = <&adv7511_in>;
145				};
146			};
147		};
148	};
149
150	memory@48000000 {
151		device_type = "memory";
152		/* first 128MB is reserved for secure area. */
153		reg = <0x0 0x48000000 0x0 0x38000000>;
154	};
155
156	reg_1p8v: regulator-1p8v {
157		compatible = "regulator-fixed";
158		regulator-name = "fixed-1.8V";
159		regulator-min-microvolt = <1800000>;
160		regulator-max-microvolt = <1800000>;
161		regulator-boot-on;
162		regulator-always-on;
163	};
164
165	reg_3p3v: regulator-3p3v {
166		compatible = "regulator-fixed";
167		regulator-name = "fixed-3.3V";
168		regulator-min-microvolt = <3300000>;
169		regulator-max-microvolt = <3300000>;
170		regulator-boot-on;
171		regulator-always-on;
172	};
173
174	reg_12p0v: regulator-12p0v {
175		compatible = "regulator-fixed";
176		regulator-name = "D12.0V";
177		regulator-min-microvolt = <12000000>;
178		regulator-max-microvolt = <12000000>;
179		regulator-boot-on;
180		regulator-always-on;
181	};
182
183	rsnd_ak4613: sound {
184		compatible = "simple-audio-card";
185
186		simple-audio-card,name = "rsnd-ak4613";
187		simple-audio-card,format = "left_j";
188		simple-audio-card,bitclock-master = <&sndcpu>;
189		simple-audio-card,frame-master = <&sndcpu>;
190
191		sndcodec: simple-audio-card,codec {
192			sound-dai = <&ak4613>;
193		};
194
195		sndcpu: simple-audio-card,cpu {
196			sound-dai = <&rcar_sound>;
197		};
198	};
199
200	vbus0_usb2: regulator-vbus0-usb2 {
201		compatible = "regulator-fixed";
202
203		regulator-name = "USB20_VBUS_CN";
204		regulator-min-microvolt = <5000000>;
205		regulator-max-microvolt = <5000000>;
206
207		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
208		enable-active-high;
209	};
210
211	vcc_sdhi0: regulator-vcc-sdhi0 {
212		compatible = "regulator-fixed";
213
214		regulator-name = "SDHI0 Vcc";
215		regulator-min-microvolt = <3300000>;
216		regulator-max-microvolt = <3300000>;
217
218		gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
219		enable-active-high;
220	};
221
222	vccq_sdhi0: regulator-vccq-sdhi0 {
223		compatible = "regulator-gpio";
224
225		regulator-name = "SDHI0 VccQ";
226		regulator-min-microvolt = <1800000>;
227		regulator-max-microvolt = <3300000>;
228
229		gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
230		gpios-states = <1>;
231		states = <3300000 1>, <1800000 0>;
232	};
233
234	vcc_sdhi1: regulator-vcc-sdhi1 {
235		compatible = "regulator-fixed";
236
237		regulator-name = "SDHI1 Vcc";
238		regulator-min-microvolt = <3300000>;
239		regulator-max-microvolt = <3300000>;
240
241		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
242		enable-active-high;
243	};
244
245	vccq_sdhi1: regulator-vccq-sdhi1 {
246		compatible = "regulator-gpio";
247
248		regulator-name = "SDHI1 VccQ";
249		regulator-min-microvolt = <1800000>;
250		regulator-max-microvolt = <3300000>;
251
252		gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
253		gpios-states = <1>;
254		states = <3300000 1>, <1800000 0>;
255	};
256
257	vga {
258		compatible = "vga-connector";
259
260		port {
261			vga_in: endpoint {
262				remote-endpoint = <&adv7123_out>;
263			};
264		};
265	};
266
267	vga-encoder {
268		compatible = "adi,adv7123";
269
270		ports {
271			#address-cells = <1>;
272			#size-cells = <0>;
273
274			port@0 {
275				reg = <0>;
276				adv7123_in: endpoint {
277					remote-endpoint = <&du_out_rgb>;
278				};
279			};
280			port@1 {
281				reg = <1>;
282				adv7123_out: endpoint {
283					remote-endpoint = <&vga_in>;
284				};
285			};
286		};
287	};
288
289	x12_clk: x12 {
290		compatible = "fixed-clock";
291		#clock-cells = <0>;
292		clock-frequency = <24576000>;
293	};
294
295	x13_clk: x13 {
296		compatible = "fixed-clock";
297		#clock-cells = <0>;
298		clock-frequency = <74250000>;
299	};
300};
301
302&audio_clk_a {
303	clock-frequency = <22579200>;
304};
305
306&avb {
307	pinctrl-0 = <&avb_pins>;
308	pinctrl-names = "default";
309	phy-handle = <&phy0>;
310	status = "okay";
311
312	phy0: ethernet-phy@0 {
313		compatible = "ethernet-phy-id0022.1622",
314			     "ethernet-phy-ieee802.3-c22";
315		rxc-skew-ps = <1500>;
316		reg = <0>;
317		interrupt-parent = <&gpio2>;
318		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
319		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
320		/*
321		 * TX clock internal delay mode is required for reliable
322		 * 1Gbps communication using the KSZ9031RNX phy present on
323		 * the Ebisu board, however, TX clock internal delay mode
324		 * isn't supported on R-Car E3(e).  Thus, limit speed to
325		 * 100Mbps for reliable communication.
326		 */
327		max-speed = <100>;
328	};
329};
330
331&canfd {
332	pinctrl-0 = <&canfd0_pins>;
333	pinctrl-names = "default";
334	status = "okay";
335
336	channel0 {
337		status = "okay";
338	};
339};
340
341&csi40 {
342	status = "okay";
343
344	ports {
345		port@0 {
346			csi40_in: endpoint {
347				clock-lanes = <0>;
348				data-lanes = <1 2>;
349				remote-endpoint = <&adv7482_txa>;
350			};
351		};
352	};
353};
354
355&du {
356	pinctrl-0 = <&du_pins>;
357	pinctrl-names = "default";
358	status = "okay";
359
360	clocks = <&cpg CPG_MOD 724>,
361		 <&cpg CPG_MOD 723>,
362		 <&x13_clk>;
363	clock-names = "du.0", "du.1", "dclkin.0";
364
365	ports {
366		port@0 {
367			du_out_rgb: endpoint {
368				remote-endpoint = <&adv7123_in>;
369			};
370		};
371	};
372};
373
374&ehci0 {
375	dr_mode = "otg";
376	status = "okay";
377};
378
379&extal_clk {
380	clock-frequency = <48000000>;
381};
382
383&hsusb {
384	dr_mode = "otg";
385	status = "okay";
386};
387
388&i2c0 {
389	status = "okay";
390
391	io_expander: gpio@20 {
392		compatible = "onnn,pca9654";
393		reg = <0x20>;
394		gpio-controller;
395		#gpio-cells = <2>;
396		interrupt-parent = <&gpio2>;
397		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
398	};
399
400	hdmi-encoder@39 {
401		compatible = "adi,adv7511w";
402		reg = <0x39>;
403		interrupt-parent = <&gpio1>;
404		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
405
406		avdd-supply = <&reg_1p8v>;
407		dvdd-supply = <&reg_1p8v>;
408		pvdd-supply = <&reg_1p8v>;
409		dvdd-3v-supply = <&reg_3p3v>;
410		bgvdd-supply = <&reg_1p8v>;
411
412		adi,input-depth = <8>;
413		adi,input-colorspace = "rgb";
414		adi,input-clock = "1x";
415
416		ports {
417			#address-cells = <1>;
418			#size-cells = <0>;
419
420			port@0 {
421				reg = <0>;
422				adv7511_in: endpoint {
423					remote-endpoint = <&thc63lvd1024_out>;
424				};
425			};
426
427			port@1 {
428				reg = <1>;
429				adv7511_out: endpoint {
430					remote-endpoint = <&hdmi_con_out>;
431				};
432			};
433		};
434	};
435
436	video-receiver@70 {
437		compatible = "adi,adv7482";
438		reg = <0x70>;
439
440		interrupt-parent = <&gpio0>;
441		interrupt-names = "intrq1", "intrq2";
442		interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
443			     <17 IRQ_TYPE_LEVEL_LOW>;
444
445		ports {
446			#address-cells = <1>;
447			#size-cells = <0>;
448
449			port@7 {
450				reg = <7>;
451
452				adv7482_ain7: endpoint {
453					remote-endpoint = <&cvbs_con>;
454				};
455			};
456
457			port@8 {
458				reg = <8>;
459
460				adv7482_hdmi: endpoint {
461					remote-endpoint = <&hdmi_in_con>;
462				};
463			};
464
465			port@a {
466				reg = <10>;
467
468				adv7482_txa: endpoint {
469					clock-lanes = <0>;
470					data-lanes = <1 2>;
471					remote-endpoint = <&csi40_in>;
472				};
473			};
474		};
475	};
476};
477
478&i2c3 {
479	status = "okay";
480
481	ak4613: codec@10 {
482		compatible = "asahi-kasei,ak4613";
483		#sound-dai-cells = <0>;
484		reg = <0x10>;
485		clocks = <&rcar_sound 3>;
486
487		asahi-kasei,in1-single-end;
488		asahi-kasei,in2-single-end;
489		asahi-kasei,out1-single-end;
490		asahi-kasei,out2-single-end;
491		asahi-kasei,out3-single-end;
492		asahi-kasei,out4-single-end;
493		asahi-kasei,out5-single-end;
494		asahi-kasei,out6-single-end;
495	};
496
497	cs2000: clk-multiplier@4f {
498		#clock-cells = <0>;
499		compatible = "cirrus,cs2000-cp";
500		reg = <0x4f>;
501		clocks = <&audio_clkout>, <&x12_clk>;
502		clock-names = "clk_in", "ref_clk";
503
504		assigned-clocks = <&cs2000>;
505		assigned-clock-rates = <24576000>; /* 1/1 divide */
506	};
507};
508
509&i2c_dvfs {
510	status = "okay";
511
512	clock-frequency = <400000>;
513
514	pmic: pmic@30 {
515		pinctrl-0 = <&irq0_pins>;
516		pinctrl-names = "default";
517
518		compatible = "rohm,bd9571mwv";
519		reg = <0x30>;
520		interrupt-parent = <&intc_ex>;
521		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
522		interrupt-controller;
523		#interrupt-cells = <2>;
524		gpio-controller;
525		#gpio-cells = <2>;
526		rohm,ddr-backup-power = <0x1>;
527		rohm,rstbmode-level;
528	};
529
530	eeprom@50 {
531		compatible = "rohm,br24t01", "atmel,24c01";
532		reg = <0x50>;
533		pagesize = <8>;
534	};
535};
536
537&lvds0 {
538	status = "okay";
539
540	clocks = <&cpg CPG_MOD 727>,
541		 <&x13_clk>,
542		 <&extal_clk>;
543	clock-names = "fck", "dclkin.0", "extal";
544
545	ports {
546		port@1 {
547			lvds0_out: endpoint {
548				remote-endpoint = <&thc63lvd1024_in>;
549			};
550		};
551	};
552};
553
554&lvds1 {
555	/*
556	 * Even though the LVDS1 output is not connected, the encoder must be
557	 * enabled to supply a pixel clock to the DU for the DPAD output when
558	 * LVDS0 is in use.
559	 */
560	status = "okay";
561
562	clocks = <&cpg CPG_MOD 727>,
563		 <&x13_clk>,
564		 <&extal_clk>;
565	clock-names = "fck", "dclkin.0", "extal";
566};
567
568&ohci0 {
569	dr_mode = "otg";
570	status = "okay";
571};
572
573&pcie_bus_clk {
574	clock-frequency = <100000000>;
575};
576
577&pciec0 {
578	status = "okay";
579};
580
581&pfc {
582	avb_pins: avb {
583		groups = "avb_link", "avb_mii";
584		function = "avb";
585	};
586
587	canfd0_pins: canfd0 {
588		groups = "canfd0_data";
589		function = "canfd0";
590	};
591
592	du_pins: du {
593		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
594		function = "du";
595	};
596
597	irq0_pins: irq0 {
598		groups = "intc_ex_irq0";
599		function = "intc_ex";
600	};
601
602	keys_pins: keys {
603		pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
604		bias-pull-up;
605	};
606
607	pwm3_pins: pwm3 {
608		groups = "pwm3_b";
609		function = "pwm3";
610	};
611
612	pwm5_pins: pwm5 {
613		groups = "pwm5_a";
614		function = "pwm5";
615	};
616
617	rpc_pins: rpc {
618		groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
619			 "rpc_int";
620		function = "rpc";
621	};
622
623	scif2_pins: scif2 {
624		groups = "scif2_data_a";
625		function = "scif2";
626	};
627
628	sdhi0_pins: sd0 {
629		groups = "sdhi0_data4", "sdhi0_ctrl";
630		function = "sdhi0";
631		power-source = <3300>;
632	};
633
634	sdhi0_pins_uhs: sd0_uhs {
635		groups = "sdhi0_data4", "sdhi0_ctrl";
636		function = "sdhi0";
637		power-source = <1800>;
638	};
639
640	sdhi1_pins: sd1 {
641		groups = "sdhi1_data4", "sdhi1_ctrl";
642		function = "sdhi1";
643		power-source = <3300>;
644	};
645
646	sdhi1_pins_uhs: sd1_uhs {
647		groups = "sdhi1_data4", "sdhi1_ctrl";
648		function = "sdhi1";
649		power-source = <1800>;
650	};
651
652	sdhi3_pins: sd3 {
653		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
654		function = "sdhi3";
655		power-source = <1800>;
656	};
657
658	sound_clk_pins: sound_clk {
659		groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
660			 "audio_clkout_a", "audio_clkout1_a";
661		function = "audio_clk";
662	};
663
664	sound_pins: sound {
665		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
666		function = "ssi";
667	};
668
669	usb0_pins: usb {
670		groups = "usb0_b", "usb0_id";
671		function = "usb0";
672	};
673
674	usb30_pins: usb30 {
675		groups = "usb30";
676		function = "usb30";
677	};
678};
679
680&pwm3 {
681	pinctrl-0 = <&pwm3_pins>;
682	pinctrl-names = "default";
683
684	status = "okay";
685};
686
687&pwm5 {
688	pinctrl-0 = <&pwm5_pins>;
689	pinctrl-names = "default";
690
691	status = "okay";
692};
693
694&rcar_sound {
695	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
696	pinctrl-names = "default";
697
698	/* Single DAI */
699	#sound-dai-cells = <0>;
700
701	/* audio_clkout0/1/2/3 */
702	#clock-cells = <1>;
703	clock-frequency = <12288000 11289600>;
704
705	status = "okay";
706
707	/* update <audio_clk_b> to <cs2000> */
708	clocks = <&cpg CPG_MOD 1005>,
709		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
710		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
711		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
712		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
713		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
714		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
715		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
716		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
717		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
718		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
719		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
720		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
721		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
722		 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
723		 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
724
725	rcar_sound,dai {
726		dai0 {
727			playback = <&ssi0>, <&src0>, <&dvc0>;
728			capture = <&ssi1>, <&src1>, <&dvc1>;
729		};
730	};
731
732};
733
734&rpc {
735	pinctrl-0 = <&rpc_pins>;
736	pinctrl-names = "default";
737
738	/* Left disabled.  To be enabled by firmware when unlocked. */
739
740	flash@0 {
741		compatible = "cypress,hyperflash", "cfi-flash";
742		reg = <0>;
743
744		partitions {
745			compatible = "fixed-partitions";
746			#address-cells = <1>;
747			#size-cells = <1>;
748
749			bootparam@0 {
750				reg = <0x00000000 0x040000>;
751				read-only;
752			};
753			bl2@40000 {
754				reg = <0x00040000 0x140000>;
755				read-only;
756			};
757			cert_header_sa6@180000 {
758				reg = <0x00180000 0x040000>;
759				read-only;
760			};
761			bl31@1c0000 {
762				reg = <0x001c0000 0x040000>;
763				read-only;
764			};
765			tee@200000 {
766				reg = <0x00200000 0x440000>;
767				read-only;
768			};
769			uboot@640000 {
770				reg = <0x00640000 0x100000>;
771				read-only;
772			};
773			dtb@740000 {
774				reg = <0x00740000 0x080000>;
775			};
776			kernel@7c0000 {
777				reg = <0x007c0000 0x1400000>;
778			};
779			user@1bc0000 {
780				reg = <0x01bc0000 0x2440000>;
781			};
782		};
783	};
784};
785
786&rwdt {
787	timeout-sec = <60>;
788	status = "okay";
789};
790
791&scif2 {
792	pinctrl-0 = <&scif2_pins>;
793	pinctrl-names = "default";
794
795	status = "okay";
796};
797
798&sdhi0 {
799	pinctrl-0 = <&sdhi0_pins>;
800	pinctrl-1 = <&sdhi0_pins_uhs>;
801	pinctrl-names = "default", "state_uhs";
802
803	vmmc-supply = <&vcc_sdhi0>;
804	vqmmc-supply = <&vccq_sdhi0>;
805	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
806	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
807	bus-width = <4>;
808	sd-uhs-sdr50;
809	sd-uhs-sdr104;
810	status = "okay";
811};
812
813&sdhi1 {
814	pinctrl-0 = <&sdhi1_pins>;
815	pinctrl-1 = <&sdhi1_pins_uhs>;
816	pinctrl-names = "default", "state_uhs";
817
818	vmmc-supply = <&vcc_sdhi1>;
819	vqmmc-supply = <&vccq_sdhi1>;
820	cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
821	bus-width = <4>;
822	sd-uhs-sdr50;
823	sd-uhs-sdr104;
824	status = "okay";
825};
826
827&sdhi3 {
828	/* used for on-board 8bit eMMC */
829	pinctrl-0 = <&sdhi3_pins>;
830	pinctrl-1 = <&sdhi3_pins>;
831	pinctrl-names = "default", "state_uhs";
832
833	vmmc-supply = <&reg_3p3v>;
834	vqmmc-supply = <&reg_1p8v>;
835	mmc-hs200-1_8v;
836	mmc-hs400-1_8v;
837	bus-width = <8>;
838	no-sd;
839	no-sdio;
840	non-removable;
841	full-pwr-cycle-in-suspend;
842	status = "okay";
843};
844
845&ssi1 {
846	shared-pin;
847};
848
849&usb2_phy0 {
850	pinctrl-0 = <&usb0_pins>;
851	pinctrl-names = "default";
852
853	vbus-supply = <&vbus0_usb2>;
854	status = "okay";
855};
856
857&usb3_peri0 {
858	companion = <&xhci0>;
859	status = "okay";
860};
861
862&vin4 {
863	status = "okay";
864};
865
866&vin5 {
867	status = "okay";
868};
869
870&xhci0 {
871	pinctrl-0 = <&usb30_pins>;
872	pinctrl-names = "default";
873
874	status = "okay";
875};
876